drm/i915/lvds: Move the acpi_lid_notifier from drm_i915_private to the connector
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_panel.c
CommitLineData
1d8e1c75
CW
1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
a70491cc
JP
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
7bd90909 33#include <linux/moduleparam.h>
1d8e1c75
CW
34#include "intel_drv.h"
35
ba3820ad
TI
36#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
37
1d8e1c75
CW
38void
39intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
40 struct drm_display_mode *adjusted_mode)
41{
42 adjusted_mode->hdisplay = fixed_mode->hdisplay;
43 adjusted_mode->hsync_start = fixed_mode->hsync_start;
44 adjusted_mode->hsync_end = fixed_mode->hsync_end;
45 adjusted_mode->htotal = fixed_mode->htotal;
46
47 adjusted_mode->vdisplay = fixed_mode->vdisplay;
48 adjusted_mode->vsync_start = fixed_mode->vsync_start;
49 adjusted_mode->vsync_end = fixed_mode->vsync_end;
50 adjusted_mode->vtotal = fixed_mode->vtotal;
51
52 adjusted_mode->clock = fixed_mode->clock;
1d8e1c75
CW
53}
54
55/* adjusted_mode has been preset to be the panel's fixed mode */
56void
57intel_pch_panel_fitting(struct drm_device *dev,
58 int fitting_mode,
cb1793ce 59 const struct drm_display_mode *mode,
1d8e1c75
CW
60 struct drm_display_mode *adjusted_mode)
61{
62 struct drm_i915_private *dev_priv = dev->dev_private;
63 int x, y, width, height;
64
65 x = y = width = height = 0;
66
67 /* Native modes don't need fitting */
68 if (adjusted_mode->hdisplay == mode->hdisplay &&
69 adjusted_mode->vdisplay == mode->vdisplay)
70 goto done;
71
72 switch (fitting_mode) {
73 case DRM_MODE_SCALE_CENTER:
74 width = mode->hdisplay;
75 height = mode->vdisplay;
76 x = (adjusted_mode->hdisplay - width + 1)/2;
77 y = (adjusted_mode->vdisplay - height + 1)/2;
78 break;
79
80 case DRM_MODE_SCALE_ASPECT:
81 /* Scale but preserve the aspect ratio */
82 {
83 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
84 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
85 if (scaled_width > scaled_height) { /* pillar */
86 width = scaled_height / mode->vdisplay;
302983e9 87 if (width & 1)
0206e353 88 width++;
1d8e1c75
CW
89 x = (adjusted_mode->hdisplay - width + 1) / 2;
90 y = 0;
91 height = adjusted_mode->vdisplay;
92 } else if (scaled_width < scaled_height) { /* letter */
93 height = scaled_width / mode->hdisplay;
302983e9
AJ
94 if (height & 1)
95 height++;
1d8e1c75
CW
96 y = (adjusted_mode->vdisplay - height + 1) / 2;
97 x = 0;
98 width = adjusted_mode->hdisplay;
99 } else {
100 x = y = 0;
101 width = adjusted_mode->hdisplay;
102 height = adjusted_mode->vdisplay;
103 }
104 }
105 break;
106
107 default:
108 case DRM_MODE_SCALE_FULLSCREEN:
109 x = y = 0;
110 width = adjusted_mode->hdisplay;
111 height = adjusted_mode->vdisplay;
112 break;
113 }
114
115done:
116 dev_priv->pch_pf_pos = (x << 16) | y;
117 dev_priv->pch_pf_size = (width << 16) | height;
118}
a9573556 119
ba3820ad
TI
120static int is_backlight_combination_mode(struct drm_device *dev)
121{
122 struct drm_i915_private *dev_priv = dev->dev_private;
123
124 if (INTEL_INFO(dev)->gen >= 4)
125 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
126
127 if (IS_GEN2(dev))
128 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
129
130 return 0;
131}
132
0b0b053a
CW
133static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv)
134{
135 u32 val;
136
137 /* Restore the CTL value if it lost, e.g. GPU reset */
138
139 if (HAS_PCH_SPLIT(dev_priv->dev)) {
140 val = I915_READ(BLC_PWM_PCH_CTL2);
141 if (dev_priv->saveBLC_PWM_CTL2 == 0) {
142 dev_priv->saveBLC_PWM_CTL2 = val;
143 } else if (val == 0) {
144 I915_WRITE(BLC_PWM_PCH_CTL2,
2aded1b6
SQ
145 dev_priv->saveBLC_PWM_CTL2);
146 val = dev_priv->saveBLC_PWM_CTL2;
0b0b053a
CW
147 }
148 } else {
149 val = I915_READ(BLC_PWM_CTL);
150 if (dev_priv->saveBLC_PWM_CTL == 0) {
151 dev_priv->saveBLC_PWM_CTL = val;
152 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
153 } else if (val == 0) {
154 I915_WRITE(BLC_PWM_CTL,
155 dev_priv->saveBLC_PWM_CTL);
156 I915_WRITE(BLC_PWM_CTL2,
157 dev_priv->saveBLC_PWM_CTL2);
158 val = dev_priv->saveBLC_PWM_CTL;
159 }
160 }
161
162 return val;
163}
164
28dcc2d6 165static u32 _intel_panel_get_max_backlight(struct drm_device *dev)
a9573556
CW
166{
167 struct drm_i915_private *dev_priv = dev->dev_private;
168 u32 max;
169
0b0b053a 170 max = i915_read_blc_pwm_ctl(dev_priv);
0b0b053a 171
a9573556 172 if (HAS_PCH_SPLIT(dev)) {
0b0b053a 173 max >>= 16;
a9573556 174 } else {
ca88479c 175 if (INTEL_INFO(dev)->gen < 4)
a9573556 176 max >>= 17;
ca88479c 177 else
a9573556 178 max >>= 16;
ba3820ad
TI
179
180 if (is_backlight_combination_mode(dev))
181 max *= 0xff;
a9573556
CW
182 }
183
28dcc2d6
JN
184 return max;
185}
186
187u32 intel_panel_get_max_backlight(struct drm_device *dev)
188{
189 u32 max;
190
191 max = _intel_panel_get_max_backlight(dev);
192 if (max == 0) {
193 /* XXX add code here to query mode clock or hardware clock
194 * and program max PWM appropriately.
195 */
196 pr_warn_once("fixme: max PWM is zero\n");
197 return 1;
198 }
199
a9573556
CW
200 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
201 return max;
202}
203
4dca20ef
CE
204static int i915_panel_invert_brightness;
205MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
206 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
7bd90909
CE
207 "report PCI device ID, subsystem vendor and subsystem device ID "
208 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
209 "It will then be included in an upcoming module version.");
4dca20ef 210module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
7bd90909
CE
211static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
212{
4dca20ef
CE
213 struct drm_i915_private *dev_priv = dev->dev_private;
214
215 if (i915_panel_invert_brightness < 0)
216 return val;
217
218 if (i915_panel_invert_brightness > 0 ||
219 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)
7bd90909
CE
220 return intel_panel_get_max_backlight(dev) - val;
221
222 return val;
223}
224
faea35dd 225static u32 intel_panel_get_backlight(struct drm_device *dev)
a9573556
CW
226{
227 struct drm_i915_private *dev_priv = dev->dev_private;
228 u32 val;
229
230 if (HAS_PCH_SPLIT(dev)) {
231 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
232 } else {
233 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
ca88479c 234 if (INTEL_INFO(dev)->gen < 4)
a9573556 235 val >>= 1;
ba3820ad 236
0206e353 237 if (is_backlight_combination_mode(dev)) {
ba3820ad
TI
238 u8 lbpc;
239
ba3820ad
TI
240 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
241 val *= lbpc;
242 }
a9573556
CW
243 }
244
7bd90909 245 val = intel_panel_compute_brightness(dev, val);
a9573556
CW
246 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
247 return val;
248}
249
250static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
251{
252 struct drm_i915_private *dev_priv = dev->dev_private;
253 u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
254 I915_WRITE(BLC_PWM_CPU_CTL, val | level);
255}
256
f52c619a 257static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
a9573556
CW
258{
259 struct drm_i915_private *dev_priv = dev->dev_private;
260 u32 tmp;
261
262 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
7bd90909 263 level = intel_panel_compute_brightness(dev, level);
a9573556
CW
264
265 if (HAS_PCH_SPLIT(dev))
266 return intel_pch_panel_set_backlight(dev, level);
ba3820ad 267
0206e353 268 if (is_backlight_combination_mode(dev)) {
ba3820ad
TI
269 u32 max = intel_panel_get_max_backlight(dev);
270 u8 lbpc;
271
272 lbpc = level * 0xfe / max + 1;
273 level /= lbpc;
274 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
275 }
276
a9573556 277 tmp = I915_READ(BLC_PWM_CTL);
ca88479c 278 if (INTEL_INFO(dev)->gen < 4)
a9573556 279 level <<= 1;
ca88479c 280 tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
a9573556
CW
281 I915_WRITE(BLC_PWM_CTL, tmp | level);
282}
47356eb6 283
f52c619a 284void intel_panel_set_backlight(struct drm_device *dev, u32 level)
47356eb6
CW
285{
286 struct drm_i915_private *dev_priv = dev->dev_private;
287
f52c619a
TI
288 dev_priv->backlight_level = level;
289 if (dev_priv->backlight_enabled)
290 intel_panel_actually_set_backlight(dev, level);
291}
292
293void intel_panel_disable_backlight(struct drm_device *dev)
294{
295 struct drm_i915_private *dev_priv = dev->dev_private;
47356eb6 296
f52c619a
TI
297 dev_priv->backlight_enabled = false;
298 intel_panel_actually_set_backlight(dev, 0);
24ded204
DV
299
300 if (INTEL_INFO(dev)->gen >= 4) {
a4f32fc3 301 uint32_t reg, tmp;
24ded204
DV
302
303 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
304
305 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
a4f32fc3
PZ
306
307 if (HAS_PCH_SPLIT(dev)) {
308 tmp = I915_READ(BLC_PWM_PCH_CTL1);
309 tmp &= ~BLM_PCH_PWM_ENABLE;
310 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
311 }
24ded204 312 }
47356eb6
CW
313}
314
24ded204
DV
315void intel_panel_enable_backlight(struct drm_device *dev,
316 enum pipe pipe)
47356eb6
CW
317{
318 struct drm_i915_private *dev_priv = dev->dev_private;
319
320 if (dev_priv->backlight_level == 0)
321 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
322
24ded204
DV
323 if (INTEL_INFO(dev)->gen >= 4) {
324 uint32_t reg, tmp;
325
326 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
327
328
329 tmp = I915_READ(reg);
330
331 /* Note that this can also get called through dpms changes. And
332 * we don't track the backlight dpms state, hence check whether
333 * we have to do anything first. */
334 if (tmp & BLM_PWM_ENABLE)
770c1231 335 goto set_level;
24ded204
DV
336
337 if (dev_priv->num_pipe == 3)
338 tmp &= ~BLM_PIPE_SELECT_IVB;
339 else
340 tmp &= ~BLM_PIPE_SELECT;
341
342 tmp |= BLM_PIPE(pipe);
343 tmp &= ~BLM_PWM_ENABLE;
344
345 I915_WRITE(reg, tmp);
346 POSTING_READ(reg);
347 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
a4f32fc3
PZ
348
349 if (HAS_PCH_SPLIT(dev)) {
350 tmp = I915_READ(BLC_PWM_PCH_CTL1);
351 tmp |= BLM_PCH_PWM_ENABLE;
352 tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
353 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
354 }
24ded204 355 }
770c1231
TI
356
357set_level:
358 /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
359 * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
360 * registers are set.
361 */
362 dev_priv->backlight_enabled = true;
363 intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
47356eb6
CW
364}
365
aaa6fd2a 366static void intel_panel_init_backlight(struct drm_device *dev)
47356eb6
CW
367{
368 struct drm_i915_private *dev_priv = dev->dev_private;
369
c8303e7f 370 dev_priv->backlight_level = intel_panel_get_backlight(dev);
47356eb6
CW
371 dev_priv->backlight_enabled = dev_priv->backlight_level != 0;
372}
fe16d949
CW
373
374enum drm_connector_status
375intel_panel_detect(struct drm_device *dev)
376{
bcd5023c 377#if 0
fe16d949 378 struct drm_i915_private *dev_priv = dev->dev_private;
bcd5023c 379#endif
fe16d949 380
fca87409
CW
381 if (i915_panel_ignore_lid)
382 return i915_panel_ignore_lid > 0 ?
383 connector_status_connected :
384 connector_status_disconnected;
385
bcd5023c
DA
386 /* opregion lid state on HP 2540p is wrong at boot up,
387 * appears to be either the BIOS or Linux ACPI fault */
388#if 0
fe16d949
CW
389 /* Assume that the BIOS does not lie through the OpRegion... */
390 if (dev_priv->opregion.lid_state)
391 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
392 connector_status_connected :
393 connector_status_disconnected;
bcd5023c 394#endif
fe16d949
CW
395
396 return connector_status_unknown;
397}
aaa6fd2a
MG
398
399#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
400static int intel_panel_update_status(struct backlight_device *bd)
401{
402 struct drm_device *dev = bl_get_data(bd);
403 intel_panel_set_backlight(dev, bd->props.brightness);
404 return 0;
405}
406
407static int intel_panel_get_brightness(struct backlight_device *bd)
408{
409 struct drm_device *dev = bl_get_data(bd);
04b38670
TI
410 struct drm_i915_private *dev_priv = dev->dev_private;
411 return dev_priv->backlight_level;
aaa6fd2a
MG
412}
413
414static const struct backlight_ops intel_panel_bl_ops = {
415 .update_status = intel_panel_update_status,
416 .get_brightness = intel_panel_get_brightness,
417};
418
419int intel_panel_setup_backlight(struct drm_device *dev)
420{
421 struct drm_i915_private *dev_priv = dev->dev_private;
422 struct backlight_properties props;
423 struct drm_connector *connector;
424
425 intel_panel_init_backlight(dev);
426
427 if (dev_priv->int_lvds_connector)
428 connector = dev_priv->int_lvds_connector;
429 else if (dev_priv->int_edp_connector)
430 connector = dev_priv->int_edp_connector;
431 else
432 return -ENODEV;
433
af437cfd 434 memset(&props, 0, sizeof(props));
aaa6fd2a 435 props.type = BACKLIGHT_RAW;
28dcc2d6
JN
436 props.max_brightness = _intel_panel_get_max_backlight(dev);
437 if (props.max_brightness == 0) {
438 DRM_ERROR("Failed to get maximum backlight value\n");
439 return -ENODEV;
440 }
aaa6fd2a
MG
441 dev_priv->backlight =
442 backlight_device_register("intel_backlight",
443 &connector->kdev, dev,
444 &intel_panel_bl_ops, &props);
445
446 if (IS_ERR(dev_priv->backlight)) {
447 DRM_ERROR("Failed to register backlight: %ld\n",
448 PTR_ERR(dev_priv->backlight));
449 dev_priv->backlight = NULL;
450 return -ENODEV;
451 }
452 dev_priv->backlight->props.brightness = intel_panel_get_backlight(dev);
453 return 0;
454}
455
456void intel_panel_destroy_backlight(struct drm_device *dev)
457{
458 struct drm_i915_private *dev_priv = dev->dev_private;
459 if (dev_priv->backlight)
460 backlight_device_unregister(dev_priv->backlight);
461}
462#else
463int intel_panel_setup_backlight(struct drm_device *dev)
464{
465 intel_panel_init_backlight(dev);
466 return 0;
467}
468
469void intel_panel_destroy_backlight(struct drm_device *dev)
470{
471 return;
472}
473#endif
This page took 0.137761 seconds and 5 git commands to generate.