drm/imx: dw_hdmi-imx: add mode_valid callback prune unsupported modes
[deliverable/linux.git] / drivers / gpu / drm / imx / dw_hdmi-imx.c
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1/* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
2 *
b21f4b65 3 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
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4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#include <linux/module.h>
10#include <linux/platform_device.h>
11#include <linux/component.h>
12#include <linux/mfd/syscon.h>
13#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
b21f4b65 14#include <drm/bridge/dw_hdmi.h>
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15#include <video/imx-ipu-v3.h>
16#include <linux/regmap.h>
17#include <drm/drm_of.h>
18#include <drm/drmP.h>
19#include <drm/drm_crtc_helper.h>
20#include <drm/drm_edid.h>
21#include <drm/drm_encoder_slave.h>
22
23#include "imx-drm.h"
3d1b35a3 24
b21f4b65 25struct imx_hdmi {
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26 struct device *dev;
27 struct drm_encoder encoder;
28 struct regmap *regmap;
29};
30
b21f4b65 31static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = {
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32 {
33 45250000, {
34 { 0x01e0, 0x0000 },
35 { 0x21e1, 0x0000 },
36 { 0x41e2, 0x0000 }
37 },
38 }, {
39 92500000, {
40 { 0x0140, 0x0005 },
41 { 0x2141, 0x0005 },
42 { 0x4142, 0x0005 },
43 },
44 }, {
45 148500000, {
46 { 0x00a0, 0x000a },
47 { 0x20a1, 0x000a },
48 { 0x40a2, 0x000a },
49 },
50 }, {
51 ~0UL, {
52 { 0x00a0, 0x000a },
53 { 0x2001, 0x000f },
54 { 0x4002, 0x000f },
55 },
56 }
57};
58
b21f4b65 59static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
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60 /* pixelclk bpp8 bpp10 bpp12 */
61 {
62 54000000, { 0x091c, 0x091c, 0x06dc },
63 }, {
64 58400000, { 0x091c, 0x06dc, 0x06dc },
65 }, {
66 72000000, { 0x06dc, 0x06dc, 0x091c },
67 }, {
68 74250000, { 0x06dc, 0x0b5c, 0x091c },
69 }, {
70 118800000, { 0x091c, 0x091c, 0x06dc },
71 }, {
72 216000000, { 0x06dc, 0x0b5c, 0x091c },
73 }
74};
75
b21f4b65 76static const struct dw_hdmi_sym_term imx_sym_term[] = {
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77 /*pixelclk symbol term*/
78 { 148500000, 0x800d, 0x0005 },
79 { ~0UL, 0x0000, 0x0000 }
80};
81
b21f4b65 82static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi)
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83{
84 struct device_node *np = hdmi->dev->of_node;
85
86 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
87 if (IS_ERR(hdmi->regmap)) {
88 dev_err(hdmi->dev, "Unable to get gpr\n");
89 return PTR_ERR(hdmi->regmap);
90 }
91
92 return 0;
93}
94
b21f4b65 95static void dw_hdmi_imx_encoder_disable(struct drm_encoder *encoder)
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96{
97}
98
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99static bool dw_hdmi_imx_encoder_mode_fixup(struct drm_encoder *encoder,
100 const struct drm_display_mode *mode,
101 struct drm_display_mode *adj_mode)
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102{
103 return true;
104}
105
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106static void dw_hdmi_imx_encoder_mode_set(struct drm_encoder *encoder,
107 struct drm_display_mode *mode,
108 struct drm_display_mode *adj_mode)
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109{
110}
111
b21f4b65 112static void dw_hdmi_imx_encoder_commit(struct drm_encoder *encoder)
3d1b35a3 113{
b21f4b65 114 struct imx_hdmi *hdmi = container_of(encoder, struct imx_hdmi, encoder);
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115 int mux = imx_drm_encoder_get_mux_id(hdmi->dev->of_node, encoder);
116
117 regmap_update_bits(hdmi->regmap, IOMUXC_GPR3,
118 IMX6Q_GPR3_HDMI_MUX_CTL_MASK,
119 mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT);
120}
121
b21f4b65 122static void dw_hdmi_imx_encoder_prepare(struct drm_encoder *encoder)
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123{
124 imx_drm_panel_format(encoder, V4L2_PIX_FMT_RGB24);
125}
126
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127static struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = {
128 .mode_fixup = dw_hdmi_imx_encoder_mode_fixup,
129 .mode_set = dw_hdmi_imx_encoder_mode_set,
130 .prepare = dw_hdmi_imx_encoder_prepare,
131 .commit = dw_hdmi_imx_encoder_commit,
132 .disable = dw_hdmi_imx_encoder_disable,
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133};
134
b21f4b65 135static struct drm_encoder_funcs dw_hdmi_imx_encoder_funcs = {
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136 .destroy = drm_encoder_cleanup,
137};
138
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139static enum drm_mode_status imx6q_hdmi_mode_valid(struct drm_connector *con,
140 struct drm_display_mode *mode)
141{
142 if (mode->clock < 13500)
143 return MODE_CLOCK_LOW;
144 if (mode->clock > 266000)
145 return MODE_CLOCK_HIGH;
146
147 return MODE_OK;
148}
149
150static enum drm_mode_status imx6dl_hdmi_mode_valid(struct drm_connector *con,
151 struct drm_display_mode *mode)
152{
153 if (mode->clock < 13500)
154 return MODE_CLOCK_LOW;
155 if (mode->clock > 270000)
156 return MODE_CLOCK_HIGH;
157
158 return MODE_OK;
159}
160
b21f4b65 161static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
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162 .mpll_cfg = imx_mpll_cfg,
163 .cur_ctr = imx_cur_ctr,
164 .sym_term = imx_sym_term,
165 .dev_type = IMX6Q_HDMI,
166 .mode_valid = imx6q_hdmi_mode_valid,
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167};
168
b21f4b65 169static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
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170 .mpll_cfg = imx_mpll_cfg,
171 .cur_ctr = imx_cur_ctr,
172 .sym_term = imx_sym_term,
3d1b35a3 173 .dev_type = IMX6DL_HDMI,
081c80e8 174 .mode_valid = imx6dl_hdmi_mode_valid,
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175};
176
b21f4b65 177static const struct of_device_id dw_hdmi_imx_dt_ids[] = {
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178 { .compatible = "fsl,imx6q-hdmi",
179 .data = &imx6q_hdmi_drv_data
180 }, {
181 .compatible = "fsl,imx6dl-hdmi",
182 .data = &imx6dl_hdmi_drv_data
183 },
184 {},
185};
b21f4b65 186MODULE_DEVICE_TABLE(of, dw_hdmi_imx_dt_ids);
3d1b35a3 187
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188static int dw_hdmi_imx_bind(struct device *dev, struct device *master,
189 void *data)
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190{
191 struct platform_device *pdev = to_platform_device(dev);
b21f4b65 192 const struct dw_hdmi_plat_data *plat_data;
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193 const struct of_device_id *match;
194 struct drm_device *drm = data;
195 struct drm_encoder *encoder;
b21f4b65 196 struct imx_hdmi *hdmi;
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197 struct resource *iores;
198 int irq;
199 int ret;
200
201 if (!pdev->dev.of_node)
202 return -ENODEV;
203
204 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
205 if (!hdmi)
206 return -ENOMEM;
207
b21f4b65 208 match = of_match_node(dw_hdmi_imx_dt_ids, pdev->dev.of_node);
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209 plat_data = match->data;
210 hdmi->dev = &pdev->dev;
211 encoder = &hdmi->encoder;
212
213 irq = platform_get_irq(pdev, 0);
214 if (irq < 0)
215 return irq;
216
217 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
218 if (!iores)
219 return -ENXIO;
220
221 platform_set_drvdata(pdev, hdmi);
222
223 encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
224 /*
225 * If we failed to find the CRTC(s) which this encoder is
226 * supposed to be connected to, it's because the CRTC has
227 * not been registered yet. Defer probing, and hope that
228 * the required CRTC is added later.
229 */
230 if (encoder->possible_crtcs == 0)
231 return -EPROBE_DEFER;
232
b21f4b65 233 ret = dw_hdmi_imx_parse_dt(hdmi);
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234 if (ret < 0)
235 return ret;
236
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237 drm_encoder_helper_add(encoder, &dw_hdmi_imx_encoder_helper_funcs);
238 drm_encoder_init(drm, encoder, &dw_hdmi_imx_encoder_funcs,
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239 DRM_MODE_ENCODER_TMDS);
240
b21f4b65 241 return dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data);
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242}
243
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244static void dw_hdmi_imx_unbind(struct device *dev, struct device *master,
245 void *data)
3d1b35a3 246{
b21f4b65 247 return dw_hdmi_unbind(dev, master, data);
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248}
249
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250static const struct component_ops dw_hdmi_imx_ops = {
251 .bind = dw_hdmi_imx_bind,
252 .unbind = dw_hdmi_imx_unbind,
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253};
254
b21f4b65 255static int dw_hdmi_imx_probe(struct platform_device *pdev)
3d1b35a3 256{
b21f4b65 257 return component_add(&pdev->dev, &dw_hdmi_imx_ops);
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258}
259
b21f4b65 260static int dw_hdmi_imx_remove(struct platform_device *pdev)
3d1b35a3 261{
b21f4b65 262 component_del(&pdev->dev, &dw_hdmi_imx_ops);
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263
264 return 0;
265}
266
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267static struct platform_driver dw_hdmi_imx_platform_driver = {
268 .probe = dw_hdmi_imx_probe,
269 .remove = dw_hdmi_imx_remove,
3d1b35a3 270 .driver = {
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271 .name = "dwhdmi-imx",
272 .of_match_table = dw_hdmi_imx_dt_ids,
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273 },
274};
275
b21f4b65 276module_platform_driver(dw_hdmi_imx_platform_driver);
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277
278MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
279MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
280MODULE_DESCRIPTION("IMX6 Specific DW-HDMI Driver Extension");
281MODULE_LICENSE("GPL");
b21f4b65 282MODULE_ALIAS("platform:dwhdmi-imx");
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