[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / engine / disp / nv50.h

#ifndef __NV50_DISP_H__
#define __NV50_DISP_H__

#include <core/parent.h>
#include <core/namedb.h>
#include <core/engctx.h>
#include <core/ramht.h>
#include <core/event.h>

#include <engine/dmaobj.h>

#include "dport.h"
#include "priv.h"

struct nv50_disp_impl {
	struct nouveau_disp_impl base;
};

struct nv50_disp_priv {
	struct nouveau_disp base;
	struct nouveau_oclass *sclass;

	struct work_struct supervisor;
	u32 super;

	struct {
		int nr;
	} head;
	struct {
		int nr;
		int (*power)(struct nv50_disp_priv *, int dac, u32 data);
		int (*sense)(struct nv50_disp_priv *, int dac, u32 load);
	} dac;
	struct {
		int nr;
		int (*power)(struct nv50_disp_priv *, int sor, u32 data);
		int (*hda_eld)(struct nv50_disp_priv *, int sor, u8 *, u32);
		int (*hdmi)(struct nv50_disp_priv *, int head, int sor, u32);
		u32 lvdsconf;
		const struct nouveau_dp_func *dp;
	} sor;
	struct {
		int nr;
		int (*power)(struct nv50_disp_priv *, int ext, u32 data);
		u8 type[3];
		const struct nouveau_dp_func *dp;
	} pior;
};

#define HEAD_MTHD(n) (n), (n) + 0x03

int nv50_disp_base_scanoutpos(struct nouveau_object *, u32, void *, u32);

#define DAC_MTHD(n) (n), (n) + 0x03

int nv50_dac_mthd(struct nouveau_object *, u32, void *, u32);
int nv50_dac_power(struct nv50_disp_priv *, int, u32);
int nv50_dac_sense(struct nv50_disp_priv *, int, u32);

#define SOR_MTHD(n) (n), (n) + 0x3f

int nva3_hda_eld(struct nv50_disp_priv *, int, u8 *, u32);
int nvd0_hda_eld(struct nv50_disp_priv *, int, u8 *, u32);

int nv84_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
int nva3_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
int nvd0_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);

int nv50_sor_mthd(struct nouveau_object *, u32, void *, u32);
int nv50_sor_power(struct nv50_disp_priv *, int, u32);

int nv94_sor_dp_train_init(struct nv50_disp_priv *, int, int, int, u16, u16,
		           u32, struct dcb_output *);
int nv94_sor_dp_train_fini(struct nv50_disp_priv *, int, int, int, u16, u16,
		           u32, struct dcb_output *);
int nv94_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32,
		      struct dcb_output *);
int nv94_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
		       struct dcb_output *);
int nv94_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
		       struct dcb_output *);

int nvd0_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32,
		      struct dcb_output *);
int nvd0_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
		       struct dcb_output *);
int nvd0_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
		       struct dcb_output *);

#define PIOR_MTHD(n) (n), (n) + 0x03

int nv50_pior_mthd(struct nouveau_object *, u32, void *, u32);
int nv50_pior_power(struct nv50_disp_priv *, int, u32);

struct nv50_disp_base {
	struct nouveau_parent base;
	struct nouveau_ramht *ramht;
	u32 chan;
};

struct nv50_disp_chan {
	struct nouveau_namedb base;
	int chid;
};

int  nv50_disp_chan_create_(struct nouveau_object *, struct nouveau_object *,
			    struct nouveau_oclass *, int, int, void **);
void nv50_disp_chan_destroy(struct nv50_disp_chan *);
u32  nv50_disp_chan_rd32(struct nouveau_object *, u64);
void nv50_disp_chan_wr32(struct nouveau_object *, u64, u32);

#define nv50_disp_chan_init(a)                                                 \
	nouveau_namedb_init(&(a)->base)
#define nv50_disp_chan_fini(a,b)                                               \
	nouveau_namedb_fini(&(a)->base, (b))

int  nv50_disp_dmac_create_(struct nouveau_object *, struct nouveau_object *,
			    struct nouveau_oclass *, u32, int, int, void **);
void nv50_disp_dmac_dtor(struct nouveau_object *);

struct nv50_disp_dmac {
	struct nv50_disp_chan base;
	struct nouveau_dmaobj *pushdma;
	u32 push;
};

struct nv50_disp_pioc {
	struct nv50_disp_chan base;
};

extern struct nouveau_ofuncs nv50_disp_mast_ofuncs;
extern struct nouveau_ofuncs nv50_disp_sync_ofuncs;
extern struct nouveau_ofuncs nv50_disp_ovly_ofuncs;
extern struct nouveau_ofuncs nv50_disp_oimm_ofuncs;
extern struct nouveau_ofuncs nv50_disp_curs_ofuncs;
extern struct nouveau_ofuncs nv50_disp_base_ofuncs;
extern struct nouveau_oclass nv50_disp_cclass;
void nv50_disp_intr_supervisor(struct work_struct *);
void nv50_disp_intr(struct nouveau_subdev *);

extern struct nouveau_omthds nv84_disp_base_omthds[];

extern struct nouveau_ofuncs nvd0_disp_mast_ofuncs;
extern struct nouveau_ofuncs nvd0_disp_sync_ofuncs;
extern struct nouveau_ofuncs nvd0_disp_ovly_ofuncs;
extern struct nouveau_ofuncs nvd0_disp_oimm_ofuncs;
extern struct nouveau_ofuncs nvd0_disp_curs_ofuncs;
extern struct nouveau_omthds nvd0_disp_base_omthds[];
extern struct nouveau_ofuncs nvd0_disp_base_ofuncs;
extern struct nouveau_oclass nvd0_disp_cclass;
void nvd0_disp_intr_supervisor(struct work_struct *);
void nvd0_disp_intr(struct nouveau_subdev *);

#endif
Commit	Line	Data
70cabe4a BS	1	#ifndef __NV50_DISP_H__
	2	#define __NV50_DISP_H__
	3
	4	#include <core/parent.h>
370c00f9	5	#include <core/namedb.h>
1d7c71a3	6	#include <core/engctx.h>
370c00f9	7	#include <core/ramht.h>
1d7c71a3	8	#include <core/event.h>
370c00f9 BS	9
370c00f9 BS	10	#include <engine/dmaobj.h>
70cabe4a	11
0a0afd28	12	#include "dport.h"
a8f8b489 BS	13	#include "priv.h"
	14
	15	struct nv50_disp_impl {
	16	struct nouveau_disp_impl base;
	17	};
6c5a0424	18
70cabe4a BS	19	struct nv50_disp_priv {
	20	struct nouveau_disp base;
	21	struct nouveau_oclass *sclass;
5cc027f6 BS	22
	23	struct work_struct supervisor;
	24	u32 super;
	25
70cabe4a BS	26	struct {
	27	int nr;
	28	} head;
	29	struct {
	30	int nr;
35b21d39	31	int (power)(struct nv50_disp_priv , int dac, u32 data);
7ebb38b5	32	int (sense)(struct nv50_disp_priv , int dac, u32 load);
70cabe4a BS	33	} dac;
	34	struct {
	35	int nr;
74b66850	36	int (power)(struct nv50_disp_priv , int sor, u32 data);
0a9e2b95	37	int (hda_eld)(struct nv50_disp_priv , int sor, u8 *, u32);
1c30cd09	38	int (hdmi)(struct nv50_disp_priv , int head, int sor, u32);
4a230fa6	39	u32 lvdsconf;
0a0afd28	40	const struct nouveau_dp_func *dp;
70cabe4a	41	} sor;
a2bc283f BS	42	struct {
	43	int nr;
	44	int (power)(struct nv50_disp_priv , int ext, u32 data);
	45	u8 type[3];
	46	const struct nouveau_dp_func *dp;
	47	} pior;
70cabe4a BS	48	};
70cabe4a BS	49
d2fa7d32 BS	50	#define HEAD_MTHD(n) (n), (n) + 0x03
	51
	52	int nv50_disp_base_scanoutpos(struct nouveau_object , u32, void , u32);
	53
35b21d39 BS	54	#define DAC_MTHD(n) (n), (n) + 0x03
	55
	56	int nv50_dac_mthd(struct nouveau_object , u32, void , u32);
	57	int nv50_dac_power(struct nv50_disp_priv *, int, u32);
7ebb38b5	58	int nv50_dac_sense(struct nv50_disp_priv *, int, u32);
35b21d39	59
6c5a0424 BS	60	#define SOR_MTHD(n) (n), (n) + 0x3f
6c5a0424 BS	61
a4feaf4e BS	62	int nva3_hda_eld(struct nv50_disp_priv , int, u8 , u32);
	63	int nvd0_hda_eld(struct nv50_disp_priv , int, u8 , u32);
	64
8e9e3d2d BS	65	int nv84_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
8e9e3d2d BS	66	int nva3_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
a4feaf4e BS	67	int nvd0_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
a4feaf4e BS	68
6c5a0424	69	int nv50_sor_mthd(struct nouveau_object , u32, void , u32);
74b66850	70	int nv50_sor_power(struct nv50_disp_priv *, int, u32);
6c5a0424	71
8f2abc25 BS	72	int nv94_sor_dp_train_init(struct nv50_disp_priv *, int, int, int, u16, u16,
	73	u32, struct dcb_output *);
	74	int nv94_sor_dp_train_fini(struct nv50_disp_priv *, int, int, int, u16, u16,
	75	u32, struct dcb_output *);
f7960736 BS	76	int nv94_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32,
	77	struct dcb_output *);
	78	int nv94_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
	79	struct dcb_output *);
	80	int nv94_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
	81	struct dcb_output *);
	82
6c5a0424 BS	83	int nvd0_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32,
	84	struct dcb_output *);
	85	int nvd0_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
	86	struct dcb_output *);
	87	int nvd0_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
	88	struct dcb_output *);
	89
a2bc283f BS	90	#define PIOR_MTHD(n) (n), (n) + 0x03
	91
	92	int nv50_pior_mthd(struct nouveau_object , u32, void , u32);
	93	int nv50_pior_power(struct nv50_disp_priv *, int, u32);
	94
70cabe4a BS	95	struct nv50_disp_base {
70cabe4a BS	96	struct nouveau_parent base;
370c00f9 BS	97	struct nouveau_ramht *ramht;
370c00f9 BS	98	u32 chan;
70cabe4a BS	99	};
	100
	101	struct nv50_disp_chan {
370c00f9 BS	102	struct nouveau_namedb base;
	103	int chid;
	104	};
	105
	106	int nv50_disp_chan_create_(struct nouveau_object , struct nouveau_object ,
	107	struct nouveau_oclass , int, int, void *);
	108	void nv50_disp_chan_destroy(struct nv50_disp_chan *);
	109	u32 nv50_disp_chan_rd32(struct nouveau_object *, u64);
	110	void nv50_disp_chan_wr32(struct nouveau_object *, u64, u32);
	111
	112	#define nv50_disp_chan_init(a) \
	113	nouveau_namedb_init(&(a)->base)
	114	#define nv50_disp_chan_fini(a,b) \
	115	nouveau_namedb_fini(&(a)->base, (b))
	116
	117	int nv50_disp_dmac_create_(struct nouveau_object , struct nouveau_object ,
	118	struct nouveau_oclass , u32, int, int, void *);
	119	void nv50_disp_dmac_dtor(struct nouveau_object *);
	120
	121	struct nv50_disp_dmac {
	122	struct nv50_disp_chan base;
	123	struct nouveau_dmaobj *pushdma;
	124	u32 push;
	125	};
	126
	127	struct nv50_disp_pioc {
	128	struct nv50_disp_chan base;
70cabe4a BS	129	};
	130
	131	extern struct nouveau_ofuncs nv50_disp_mast_ofuncs;
370c00f9 BS	132	extern struct nouveau_ofuncs nv50_disp_sync_ofuncs;
	133	extern struct nouveau_ofuncs nv50_disp_ovly_ofuncs;
	134	extern struct nouveau_ofuncs nv50_disp_oimm_ofuncs;
	135	extern struct nouveau_ofuncs nv50_disp_curs_ofuncs;
70cabe4a BS	136	extern struct nouveau_ofuncs nv50_disp_base_ofuncs;
70cabe4a BS	137	extern struct nouveau_oclass nv50_disp_cclass;
5cc027f6	138	void nv50_disp_intr_supervisor(struct work_struct *);
70cabe4a BS	139	void nv50_disp_intr(struct nouveau_subdev *);
70cabe4a BS	140
ef22c8bb BS	141	extern struct nouveau_omthds nv84_disp_base_omthds[];
ef22c8bb BS	142
46654061 BS	143	extern struct nouveau_ofuncs nvd0_disp_mast_ofuncs;
	144	extern struct nouveau_ofuncs nvd0_disp_sync_ofuncs;
	145	extern struct nouveau_ofuncs nvd0_disp_ovly_ofuncs;
	146	extern struct nouveau_ofuncs nvd0_disp_oimm_ofuncs;
	147	extern struct nouveau_ofuncs nvd0_disp_curs_ofuncs;
d2fa7d32	148	extern struct nouveau_omthds nvd0_disp_base_omthds[];
46654061 BS	149	extern struct nouveau_ofuncs nvd0_disp_base_ofuncs;
46654061 BS	150	extern struct nouveau_oclass nvd0_disp_cclass;
5cc027f6	151	void nvd0_disp_intr_supervisor(struct work_struct *);
46654061 BS	152	void nvd0_disp_intr(struct nouveau_subdev *);
46654061 BS	153
70cabe4a	154	#endif