[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / engine / software / nvc0.c

/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */

#include <core/os.h>
#include <core/class.h>
#include <core/engctx.h>
#include <core/event.h>

#include <subdev/bar.h>

#include <engine/software.h>
#include <engine/disp.h>

#include "nv50.h"

/*******************************************************************************
 * software object classes
 ******************************************************************************/

static int
nvc0_software_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd,
				 void *args, u32 size)
{
	struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
	u64 data = *(u32 *)args;
	if (mthd == 0x0400) {
		chan->base.vblank.offset &= 0x00ffffffffULL;
		chan->base.vblank.offset |= data << 32;
	} else {
		chan->base.vblank.offset &= 0xff00000000ULL;
		chan->base.vblank.offset |= data;
	}
	return 0;
}

static int
nvc0_software_mthd_vblsem_value(struct nouveau_object *object, u32 mthd,
				void *args, u32 size)
{
	struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
	chan->base.vblank.value = *(u32 *)args;
	return 0;
}

static int
nvc0_software_mthd_vblsem_release(struct nouveau_object *object, u32 mthd,
				  void *args, u32 size)
{
	struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
	struct nouveau_disp *disp = nouveau_disp(object);
	u32 crtc = *(u32 *)args;

	if ((nv_device(object)->card_type < NV_E0 && crtc > 1) || crtc > 3)
		return -EINVAL;

	nouveau_event_get(disp->vblank, crtc, &chan->base.vblank.event);
	return 0;
}

static int
nvc0_software_mthd_flip(struct nouveau_object *object, u32 mthd,
			void *args, u32 size)
{
	struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
	if (chan->base.flip)
		return chan->base.flip(chan->base.flip_data);
	return -EINVAL;
}

static int
nvc0_software_mthd_mp_control(struct nouveau_object *object, u32 mthd,
                              void *args, u32 size)
{
	struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
	struct nv50_software_priv *priv = (void *)nv_object(chan)->engine;
	u32 data = *(u32 *)args;

	switch (mthd) {
	case 0x600:
		nv_wr32(priv, 0x419e00, data); /* MP.PM_UNK000 */
		break;
	case 0x644:
		if (data & ~0x1ffffe)
			return -EINVAL;
		nv_wr32(priv, 0x419e44, data); /* MP.TRAP_WARP_ERROR_EN */
		break;
	case 0x6ac:
		nv_wr32(priv, 0x419eac, data); /* MP.PM_UNK0AC */
		break;
	default:
		return -EINVAL;
	}
	return 0;
}

static struct nouveau_omthds
nvc0_software_omthds[] = {
	{ 0x0400, 0x0400, nvc0_software_mthd_vblsem_offset },
	{ 0x0404, 0x0404, nvc0_software_mthd_vblsem_offset },
	{ 0x0408, 0x0408, nvc0_software_mthd_vblsem_value },
	{ 0x040c, 0x040c, nvc0_software_mthd_vblsem_release },
	{ 0x0500, 0x0500, nvc0_software_mthd_flip },
	{ 0x0600, 0x0600, nvc0_software_mthd_mp_control },
	{ 0x0644, 0x0644, nvc0_software_mthd_mp_control },
	{ 0x06ac, 0x06ac, nvc0_software_mthd_mp_control },
	{}
};

static struct nouveau_oclass
nvc0_software_sclass[] = {
	{ 0x906e, &nouveau_object_ofuncs, nvc0_software_omthds },
	{}
};

/*******************************************************************************
 * software context
 ******************************************************************************/

static int
nvc0_software_vblsem_release(struct nouveau_eventh *event, int head)
{
	struct nouveau_software_chan *chan =
		container_of(event, struct nouveau_software_chan, vblank.event);
	struct nv50_software_priv *priv = (void *)nv_object(chan)->engine;
	struct nouveau_bar *bar = nouveau_bar(priv);

	nv_wr32(priv, 0x001718, 0x80000000 | chan->vblank.channel);
	bar->flush(bar);
	nv_wr32(priv, 0x06000c, upper_32_bits(chan->vblank.offset));
	nv_wr32(priv, 0x060010, lower_32_bits(chan->vblank.offset));
	nv_wr32(priv, 0x060014, chan->vblank.value);

	return NVKM_EVENT_DROP;
}

static int
nvc0_software_context_ctor(struct nouveau_object *parent,
			   struct nouveau_object *engine,
			   struct nouveau_oclass *oclass, void *data, u32 size,
			   struct nouveau_object **pobject)
{
	struct nv50_software_chan *chan;
	int ret;

	ret = nouveau_software_context_create(parent, engine, oclass, &chan);
	*pobject = nv_object(chan);
	if (ret)
		return ret;

	chan->base.vblank.channel = nv_gpuobj(parent->parent)->addr >> 12;
	chan->base.vblank.event.func = nvc0_software_vblsem_release;
	return 0;
}

static struct nouveau_oclass
nvc0_software_cclass = {
	.handle = NV_ENGCTX(SW, 0xc0),
	.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = nvc0_software_context_ctor,
		.dtor = _nouveau_software_context_dtor,
		.init = _nouveau_software_context_init,
		.fini = _nouveau_software_context_fini,
	},
};

/*******************************************************************************
 * software engine/subdev functions
 ******************************************************************************/

static int
nvc0_software_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
		   struct nouveau_oclass *oclass, void *data, u32 size,
		   struct nouveau_object **pobject)
{
	struct nv50_software_priv *priv;
	int ret;

	ret = nouveau_software_create(parent, engine, oclass, &priv);
	*pobject = nv_object(priv);
	if (ret)
		return ret;

	nv_engine(priv)->cclass = &nvc0_software_cclass;
	nv_engine(priv)->sclass = nvc0_software_sclass;
	nv_subdev(priv)->intr = nv04_software_intr;
	return 0;
}

struct nouveau_oclass
nvc0_software_oclass = {
	.handle = NV_ENGINE(SW, 0xc0),
	.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = nvc0_software_ctor,
		.dtor = _nouveau_software_dtor,
		.init = _nouveau_software_init,
		.fini = _nouveau_software_fini,
	},
};
Commit	Line	Data
ebb945a9 BS	1	/*
	2	* Copyright 2012 Red Hat Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Ben Skeggs
	23	*/
	24
	25	#include <core/os.h>
	26	#include <core/class.h>
	27	#include <core/engctx.h>
1d7c71a3 BS	28	#include <core/event.h>
	29
	30	#include <subdev/bar.h>
ebb945a9 BS	31
	32	#include <engine/software.h>
	33	#include <engine/disp.h>
	34
3bfcec35	35	#include "nv50.h"
ebb945a9 BS	36
	37	/*******************************************************************************
	38	* software object classes
	39	******************************************************************************/
	40
	41	static int
	42	nvc0_software_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd,
	43	void *args, u32 size)
	44	{
3bfcec35	45	struct nv50_software_chan chan = (void )nv_engctx(object->parent);
ebb945a9 BS	46	u64 data = (u32 )args;
	47	if (mthd == 0x0400) {
	48	chan->base.vblank.offset &= 0x00ffffffffULL;
	49	chan->base.vblank.offset \|= data << 32;
	50	} else {
	51	chan->base.vblank.offset &= 0xff00000000ULL;
	52	chan->base.vblank.offset \|= data;
	53	}
	54	return 0;
	55	}
	56
	57	static int
	58	nvc0_software_mthd_vblsem_value(struct nouveau_object *object, u32 mthd,
	59	void *args, u32 size)
	60	{
3bfcec35	61	struct nv50_software_chan chan = (void )nv_engctx(object->parent);
ebb945a9 BS	62	chan->base.vblank.value = (u32 )args;
	63	return 0;
	64	}
	65
	66	static int
	67	nvc0_software_mthd_vblsem_release(struct nouveau_object *object, u32 mthd,
	68	void *args, u32 size)
	69	{
3bfcec35	70	struct nv50_software_chan chan = (void )nv_engctx(object->parent);
ebb945a9	71	struct nouveau_disp *disp = nouveau_disp(object);
ebb945a9 BS	72	u32 crtc = (u32 )args;
	73
	74	if ((nv_device(object)->card_type < NV_E0 && crtc > 1) \|\| crtc > 3)
	75	return -EINVAL;
	76
1d7c71a3	77	nouveau_event_get(disp->vblank, crtc, &chan->base.vblank.event);
ebb945a9 BS	78	return 0;
	79	}
	80
	81	static int
	82	nvc0_software_mthd_flip(struct nouveau_object *object, u32 mthd,
	83	void *args, u32 size)
	84	{
3bfcec35	85	struct nv50_software_chan chan = (void )nv_engctx(object->parent);
ebb945a9 BS	86	if (chan->base.flip)
	87	return chan->base.flip(chan->base.flip_data);
	88	return -EINVAL;
	89	}
	90
96854823 CB	91	static int
	92	nvc0_software_mthd_mp_control(struct nouveau_object *object, u32 mthd,
	93	void *args, u32 size)
	94	{
3bfcec35 BS	95	struct nv50_software_chan chan = (void )nv_engctx(object->parent);
3bfcec35 BS	96	struct nv50_software_priv priv = (void )nv_object(chan)->engine;
96854823 CB	97	u32 data = (u32 )args;
	98
	99	switch (mthd) {
	100	case 0x600:
	101	nv_wr32(priv, 0x419e00, data); /* MP.PM_UNK000 */
	102	break;
	103	case 0x644:
	104	if (data & ~0x1ffffe)
	105	return -EINVAL;
	106	nv_wr32(priv, 0x419e44, data); /* MP.TRAP_WARP_ERROR_EN */
	107	break;
	108	case 0x6ac:
	109	nv_wr32(priv, 0x419eac, data); /* MP.PM_UNK0AC */
	110	break;
	111	default:
	112	return -EINVAL;
	113	}
	114	return 0;
	115	}
	116
ebb945a9 BS	117	static struct nouveau_omthds
ebb945a9 BS	118	nvc0_software_omthds[] = {
fb445b3c BS	119	{ 0x0400, 0x0400, nvc0_software_mthd_vblsem_offset },
	120	{ 0x0404, 0x0404, nvc0_software_mthd_vblsem_offset },
	121	{ 0x0408, 0x0408, nvc0_software_mthd_vblsem_value },
	122	{ 0x040c, 0x040c, nvc0_software_mthd_vblsem_release },
	123	{ 0x0500, 0x0500, nvc0_software_mthd_flip },
96854823 CB	124	{ 0x0600, 0x0600, nvc0_software_mthd_mp_control },
	125	{ 0x0644, 0x0644, nvc0_software_mthd_mp_control },
	126	{ 0x06ac, 0x06ac, nvc0_software_mthd_mp_control },
ebb945a9 BS	127	{}
	128	};
	129
	130	static struct nouveau_oclass
	131	nvc0_software_sclass[] = {
	132	{ 0x906e, &nouveau_object_ofuncs, nvc0_software_omthds },
	133	{}
	134	};
	135
	136	/*******************************************************************************
	137	* software context
	138	******************************************************************************/
	139
1d7c71a3 BS	140	static int
	141	nvc0_software_vblsem_release(struct nouveau_eventh *event, int head)
	142	{
	143	struct nouveau_software_chan *chan =
	144	container_of(event, struct nouveau_software_chan, vblank.event);
3bfcec35	145	struct nv50_software_priv priv = (void )nv_object(chan)->engine;
1d7c71a3 BS	146	struct nouveau_bar *bar = nouveau_bar(priv);
	147
	148	nv_wr32(priv, 0x001718, 0x80000000 \| chan->vblank.channel);
	149	bar->flush(bar);
	150	nv_wr32(priv, 0x06000c, upper_32_bits(chan->vblank.offset));
	151	nv_wr32(priv, 0x060010, lower_32_bits(chan->vblank.offset));
	152	nv_wr32(priv, 0x060014, chan->vblank.value);
	153
	154	return NVKM_EVENT_DROP;
	155	}
	156
ebb945a9 BS	157	static int
	158	nvc0_software_context_ctor(struct nouveau_object *parent,
	159	struct nouveau_object *engine,
	160	struct nouveau_oclass oclass, void data, u32 size,
	161	struct nouveau_object **pobject)
	162	{
3bfcec35	163	struct nv50_software_chan *chan;
ebb945a9 BS	164	int ret;
	165
	166	ret = nouveau_software_context_create(parent, engine, oclass, &chan);
	167	*pobject = nv_object(chan);
	168	if (ret)
	169	return ret;
	170
	171	chan->base.vblank.channel = nv_gpuobj(parent->parent)->addr >> 12;
1d7c71a3	172	chan->base.vblank.event.func = nvc0_software_vblsem_release;
ebb945a9 BS	173	return 0;
	174	}
	175
	176	static struct nouveau_oclass
	177	nvc0_software_cclass = {
	178	.handle = NV_ENGCTX(SW, 0xc0),
	179	.ofuncs = &(struct nouveau_ofuncs) {
	180	.ctor = nvc0_software_context_ctor,
	181	.dtor = _nouveau_software_context_dtor,
	182	.init = _nouveau_software_context_init,
	183	.fini = _nouveau_software_context_fini,
	184	},
	185	};
	186
	187	/*******************************************************************************
	188	* software engine/subdev functions
	189	******************************************************************************/
	190
	191	static int
	192	nvc0_software_ctor(struct nouveau_object parent, struct nouveau_object engine,
	193	struct nouveau_oclass oclass, void data, u32 size,
	194	struct nouveau_object **pobject)
	195	{
3bfcec35	196	struct nv50_software_priv *priv;
ebb945a9 BS	197	int ret;
	198
	199	ret = nouveau_software_create(parent, engine, oclass, &priv);
	200	*pobject = nv_object(priv);
	201	if (ret)
	202	return ret;
	203
	204	nv_engine(priv)->cclass = &nvc0_software_cclass;
	205	nv_engine(priv)->sclass = nvc0_software_sclass;
757833cc	206	nv_subdev(priv)->intr = nv04_software_intr;
ebb945a9 BS	207	return 0;
	208	}
	209
	210	struct nouveau_oclass
	211	nvc0_software_oclass = {
	212	.handle = NV_ENGINE(SW, 0xc0),
	213	.ofuncs = &(struct nouveau_ofuncs) {
	214	.ctor = nvc0_software_ctor,
	215	.dtor = _nouveau_software_dtor,
	216	.init = _nouveau_software_init,
	217	.fini = _nouveau_software_fini,
	218	},
	219	};