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9274f4a9 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
25 | #include <subdev/device.h> | |
70c0f263 | 26 | #include <subdev/bios.h> |
a10220bb | 27 | #include <subdev/bus.h> |
e0996aea | 28 | #include <subdev/gpio.h> |
4196faa8 | 29 | #include <subdev/i2c.h> |
8aceb7de | 30 | #include <subdev/clock.h> |
cb75d97e | 31 | #include <subdev/devinit.h> |
7d9115de | 32 | #include <subdev/mc.h> |
5a5c7432 | 33 | #include <subdev/timer.h> |
861d2107 | 34 | #include <subdev/fb.h> |
3863c9bc BS |
35 | #include <subdev/instmem.h> |
36 | #include <subdev/vm.h> | |
9274f4a9 | 37 | |
ebb945a9 BS |
38 | #include <engine/dmaobj.h> |
39 | #include <engine/fifo.h> | |
40 | #include <engine/software.h> | |
41 | #include <engine/graph.h> | |
42 | #include <engine/disp.h> | |
43 | ||
9274f4a9 BS |
44 | int |
45 | nv10_identify(struct nouveau_device *device) | |
46 | { | |
47 | switch (device->chipset) { | |
48 | case 0x10: | |
2094dd82 | 49 | device->cname = "NV10"; |
70c0f263 | 50 | device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; |
e0996aea | 51 | device->oclass[NVDEV_SUBDEV_GPIO ] = &nv10_gpio_oclass; |
4196faa8 | 52 | device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass; |
8aceb7de | 53 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass; |
cb75d97e | 54 | device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass; |
7d9115de | 55 | device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass; |
a10220bb | 56 | device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; |
5a5c7432 | 57 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
861d2107 | 58 | device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; |
3863c9bc BS |
59 | device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; |
60 | device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; | |
ebb945a9 BS |
61 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; |
62 | device->oclass[NVDEV_ENGINE_GR ] = &nv10_graph_oclass; | |
63 | device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass; | |
9274f4a9 BS |
64 | break; |
65 | case 0x15: | |
2094dd82 | 66 | device->cname = "NV15"; |
70c0f263 | 67 | device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; |
e0996aea | 68 | device->oclass[NVDEV_SUBDEV_GPIO ] = &nv10_gpio_oclass; |
4196faa8 | 69 | device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass; |
8aceb7de | 70 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass; |
cb75d97e | 71 | device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass; |
7d9115de | 72 | device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass; |
a10220bb | 73 | device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; |
5a5c7432 | 74 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
861d2107 | 75 | device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; |
3863c9bc BS |
76 | device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; |
77 | device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; | |
ebb945a9 BS |
78 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; |
79 | device->oclass[NVDEV_ENGINE_FIFO ] = &nv10_fifo_oclass; | |
80 | device->oclass[NVDEV_ENGINE_SW ] = &nv10_software_oclass; | |
81 | device->oclass[NVDEV_ENGINE_GR ] = &nv10_graph_oclass; | |
82 | device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass; | |
9274f4a9 BS |
83 | break; |
84 | case 0x16: | |
2094dd82 | 85 | device->cname = "NV16"; |
70c0f263 | 86 | device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; |
e0996aea | 87 | device->oclass[NVDEV_SUBDEV_GPIO ] = &nv10_gpio_oclass; |
4196faa8 | 88 | device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass; |
8aceb7de | 89 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass; |
cb75d97e | 90 | device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass; |
7d9115de | 91 | device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass; |
a10220bb | 92 | device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; |
5a5c7432 | 93 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
861d2107 | 94 | device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; |
3863c9bc BS |
95 | device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; |
96 | device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; | |
ebb945a9 BS |
97 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; |
98 | device->oclass[NVDEV_ENGINE_FIFO ] = &nv10_fifo_oclass; | |
99 | device->oclass[NVDEV_ENGINE_SW ] = &nv10_software_oclass; | |
100 | device->oclass[NVDEV_ENGINE_GR ] = &nv10_graph_oclass; | |
101 | device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass; | |
9274f4a9 BS |
102 | break; |
103 | case 0x1a: | |
2094dd82 | 104 | device->cname = "nForce"; |
70c0f263 | 105 | device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; |
e0996aea | 106 | device->oclass[NVDEV_SUBDEV_GPIO ] = &nv10_gpio_oclass; |
4196faa8 | 107 | device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass; |
8aceb7de | 108 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass; |
cb75d97e | 109 | device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass; |
7d9115de | 110 | device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass; |
a10220bb | 111 | device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; |
5a5c7432 | 112 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
dac1558d | 113 | device->oclass[NVDEV_SUBDEV_FB ] = &nv1a_fb_oclass; |
3863c9bc BS |
114 | device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; |
115 | device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; | |
ebb945a9 BS |
116 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; |
117 | device->oclass[NVDEV_ENGINE_FIFO ] = &nv10_fifo_oclass; | |
118 | device->oclass[NVDEV_ENGINE_SW ] = &nv10_software_oclass; | |
119 | device->oclass[NVDEV_ENGINE_GR ] = &nv10_graph_oclass; | |
120 | device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass; | |
9274f4a9 BS |
121 | break; |
122 | case 0x11: | |
2094dd82 | 123 | device->cname = "NV11"; |
70c0f263 | 124 | device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; |
e0996aea | 125 | device->oclass[NVDEV_SUBDEV_GPIO ] = &nv10_gpio_oclass; |
4196faa8 | 126 | device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass; |
8aceb7de | 127 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass; |
cb75d97e | 128 | device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass; |
7d9115de | 129 | device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass; |
a10220bb | 130 | device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; |
5a5c7432 | 131 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
861d2107 | 132 | device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; |
3863c9bc BS |
133 | device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; |
134 | device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; | |
ebb945a9 BS |
135 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; |
136 | device->oclass[NVDEV_ENGINE_FIFO ] = &nv10_fifo_oclass; | |
137 | device->oclass[NVDEV_ENGINE_SW ] = &nv10_software_oclass; | |
138 | device->oclass[NVDEV_ENGINE_GR ] = &nv10_graph_oclass; | |
139 | device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass; | |
9274f4a9 BS |
140 | break; |
141 | case 0x17: | |
2094dd82 | 142 | device->cname = "NV17"; |
70c0f263 | 143 | device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; |
e0996aea | 144 | device->oclass[NVDEV_SUBDEV_GPIO ] = &nv10_gpio_oclass; |
4196faa8 | 145 | device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass; |
8aceb7de | 146 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass; |
cb75d97e | 147 | device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass; |
7d9115de | 148 | device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass; |
a10220bb | 149 | device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; |
5a5c7432 | 150 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
861d2107 | 151 | device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; |
3863c9bc BS |
152 | device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; |
153 | device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; | |
ebb945a9 BS |
154 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; |
155 | device->oclass[NVDEV_ENGINE_FIFO ] = &nv17_fifo_oclass; | |
156 | device->oclass[NVDEV_ENGINE_SW ] = &nv10_software_oclass; | |
157 | device->oclass[NVDEV_ENGINE_GR ] = &nv10_graph_oclass; | |
158 | device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass; | |
9274f4a9 BS |
159 | break; |
160 | case 0x1f: | |
2094dd82 | 161 | device->cname = "nForce2"; |
70c0f263 | 162 | device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; |
e0996aea | 163 | device->oclass[NVDEV_SUBDEV_GPIO ] = &nv10_gpio_oclass; |
4196faa8 | 164 | device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass; |
8aceb7de | 165 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass; |
cb75d97e | 166 | device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass; |
7d9115de | 167 | device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass; |
a10220bb | 168 | device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; |
5a5c7432 | 169 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
dac1558d | 170 | device->oclass[NVDEV_SUBDEV_FB ] = &nv1a_fb_oclass; |
3863c9bc BS |
171 | device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; |
172 | device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; | |
ebb945a9 BS |
173 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; |
174 | device->oclass[NVDEV_ENGINE_FIFO ] = &nv17_fifo_oclass; | |
175 | device->oclass[NVDEV_ENGINE_SW ] = &nv10_software_oclass; | |
176 | device->oclass[NVDEV_ENGINE_GR ] = &nv10_graph_oclass; | |
177 | device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass; | |
9274f4a9 BS |
178 | break; |
179 | case 0x18: | |
2094dd82 | 180 | device->cname = "NV18"; |
70c0f263 | 181 | device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; |
e0996aea | 182 | device->oclass[NVDEV_SUBDEV_GPIO ] = &nv10_gpio_oclass; |
4196faa8 | 183 | device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass; |
8aceb7de | 184 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass; |
cb75d97e | 185 | device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass; |
7d9115de | 186 | device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass; |
a10220bb | 187 | device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; |
5a5c7432 | 188 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
861d2107 | 189 | device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; |
3863c9bc BS |
190 | device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; |
191 | device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; | |
ebb945a9 BS |
192 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; |
193 | device->oclass[NVDEV_ENGINE_FIFO ] = &nv17_fifo_oclass; | |
194 | device->oclass[NVDEV_ENGINE_SW ] = &nv10_software_oclass; | |
195 | device->oclass[NVDEV_ENGINE_GR ] = &nv10_graph_oclass; | |
196 | device->oclass[NVDEV_ENGINE_DISP ] = &nv04_disp_oclass; | |
9274f4a9 BS |
197 | break; |
198 | default: | |
199 | nv_fatal(device, "unknown Celsius chipset\n"); | |
200 | return -EINVAL; | |
201 | } | |
202 | ||
203 | return 0; | |
204 | } |