[deliverable/linux.git] / drivers / gpu / drm / nouveau / include / nvkm / subdev / secboot.h

/*
 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */

#ifndef __NVKM_SECURE_BOOT_H__
#define __NVKM_SECURE_BOOT_H__

#include <core/subdev.h>

enum nvkm_secboot_falcon {
	NVKM_SECBOOT_FALCON_PMU	= 0,
	NVKM_SECBOOT_FALCON_RESERVED = 1,
	NVKM_SECBOOT_FALCON_FECS = 2,
	NVKM_SECBOOT_FALCON_GPCCS = 3,
	NVKM_SECBOOT_FALCON_END = 4,
	NVKM_SECBOOT_FALCON_INVALID = 0xffffffff,
};

/**
 * @base:		base IO address of the falcon performing secure boot
 * @irq_mask:		IRQ mask of the falcon performing secure boot
 * @enable_mask:	enable mask of the falcon performing secure boot
*/
struct nvkm_secboot {
	const struct nvkm_secboot_func *func;
	struct nvkm_subdev subdev;

	u32 base;
	u32 irq_mask;
	u32 enable_mask;
};
#define nvkm_secboot(p) container_of((p), struct nvkm_secboot, subdev)

bool nvkm_secboot_is_managed(struct nvkm_secboot *, enum nvkm_secboot_falcon);
int nvkm_secboot_reset(struct nvkm_secboot *, u32 falcon);
int nvkm_secboot_start(struct nvkm_secboot *, u32 falcon);

int gm200_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **);
int gm20b_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **);

#endif
Commit	Line	Data
7d12388a AC	1	/*
	2	* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	18	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	19	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	20	* DEALINGS IN THE SOFTWARE.
	21	*/
	22
	23	#ifndef __NVKM_SECURE_BOOT_H__
	24	#define __NVKM_SECURE_BOOT_H__
	25
	26	#include <core/subdev.h>
	27
	28	enum nvkm_secboot_falcon {
	29	NVKM_SECBOOT_FALCON_PMU = 0,
	30	NVKM_SECBOOT_FALCON_RESERVED = 1,
	31	NVKM_SECBOOT_FALCON_FECS = 2,
	32	NVKM_SECBOOT_FALCON_GPCCS = 3,
	33	NVKM_SECBOOT_FALCON_END = 4,
	34	NVKM_SECBOOT_FALCON_INVALID = 0xffffffff,
	35	};
	36
	37	/**
	38	* @base: base IO address of the falcon performing secure boot
	39	* @irq_mask: IRQ mask of the falcon performing secure boot
	40	* @enable_mask: enable mask of the falcon performing secure boot
	41	*/
	42	struct nvkm_secboot {
	43	const struct nvkm_secboot_func *func;
	44	struct nvkm_subdev subdev;
	45
	46	u32 base;
	47	u32 irq_mask;
	48	u32 enable_mask;
	49	};
	50	#define nvkm_secboot(p) container_of((p), struct nvkm_secboot, subdev)
	51
	52	bool nvkm_secboot_is_managed(struct nvkm_secboot *, enum nvkm_secboot_falcon);
	53	int nvkm_secboot_reset(struct nvkm_secboot *, u32 falcon);
	54	int nvkm_secboot_start(struct nvkm_secboot *, u32 falcon);
	55
9cc45521	56	int gm200_secboot_new(struct nvkm_device , int, struct nvkm_secboot *);
923f1bd2	57	int gm20b_secboot_new(struct nvkm_device , int, struct nvkm_secboot *);
9cc45521	58
7d12388a	59	#endif