Commit | Line | Data |
---|---|---|
94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
c5fd936e | 26 | #include <linux/delay.h> |
94580299 BS |
27 | #include <linux/module.h> |
28 | #include <linux/pci.h> | |
5addcf0a DA |
29 | #include <linux/pm_runtime.h> |
30 | #include <linux/vga_switcheroo.h> | |
fdb751ef | 31 | |
5addcf0a DA |
32 | #include "drmP.h" |
33 | #include "drm_crtc_helper.h" | |
fdb751ef | 34 | |
ebb945a9 | 35 | #include <core/gpuobj.h> |
c33e05a1 | 36 | #include <core/option.h> |
7974dd1b BS |
37 | #include <core/pci.h> |
38 | #include <core/tegra.h> | |
94580299 | 39 | |
923bc416 | 40 | #include <nvif/class.h> |
845f2725 | 41 | #include <nvif/cl0002.h> |
8ed1730c | 42 | #include <nvif/cla06f.h> |
538b269b BS |
43 | #include <nvif/if0004.h> |
44 | ||
94580299 | 45 | #include "nouveau_drm.h" |
ebb945a9 | 46 | #include "nouveau_dma.h" |
77145f1c BS |
47 | #include "nouveau_ttm.h" |
48 | #include "nouveau_gem.h" | |
77145f1c | 49 | #include "nouveau_vga.h" |
b9ed919f | 50 | #include "nouveau_hwmon.h" |
77145f1c BS |
51 | #include "nouveau_acpi.h" |
52 | #include "nouveau_bios.h" | |
53 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
54 | #include "nouveau_abi16.h" |
55 | #include "nouveau_fbcon.h" | |
56 | #include "nouveau_fence.h" | |
33b903e8 | 57 | #include "nouveau_debugfs.h" |
27111a23 | 58 | #include "nouveau_usif.h" |
703fa264 | 59 | #include "nouveau_connector.h" |
055a65d5 | 60 | #include "nouveau_platform.h" |
ebb945a9 | 61 | |
94580299 BS |
62 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
63 | static char *nouveau_config; | |
64 | module_param_named(config, nouveau_config, charp, 0400); | |
65 | ||
66 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
67 | static char *nouveau_debug; | |
68 | module_param_named(debug, nouveau_debug, charp, 0400); | |
69 | ||
ebb945a9 BS |
70 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
71 | static int nouveau_noaccel = 0; | |
72 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
73 | ||
9430738d BS |
74 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
75 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
76 | int nouveau_modeset = -1; | |
77145f1c BS |
77 | module_param_named(modeset, nouveau_modeset, int, 0400); |
78 | ||
5addcf0a DA |
79 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
80 | int nouveau_runtime_pm = -1; | |
81 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); | |
82 | ||
915b4d11 DH |
83 | static struct drm_driver driver_stub; |
84 | static struct drm_driver driver_pci; | |
85 | static struct drm_driver driver_platform; | |
77145f1c | 86 | |
94580299 | 87 | static u64 |
420b9469 | 88 | nouveau_pci_name(struct pci_dev *pdev) |
94580299 BS |
89 | { |
90 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
91 | name |= pdev->bus->number << 16; | |
92 | name |= PCI_SLOT(pdev->devfn) << 8; | |
93 | return name | PCI_FUNC(pdev->devfn); | |
94 | } | |
95 | ||
420b9469 AC |
96 | static u64 |
97 | nouveau_platform_name(struct platform_device *platformdev) | |
98 | { | |
99 | return platformdev->id; | |
100 | } | |
101 | ||
102 | static u64 | |
103 | nouveau_name(struct drm_device *dev) | |
104 | { | |
105 | if (dev->pdev) | |
106 | return nouveau_pci_name(dev->pdev); | |
107 | else | |
108 | return nouveau_platform_name(dev->platformdev); | |
109 | } | |
110 | ||
94580299 | 111 | static int |
9ad97ede | 112 | nouveau_cli_create(struct drm_device *dev, const char *sname, |
fa6df8c1 | 113 | int size, void **pcli) |
94580299 | 114 | { |
0ad72863 | 115 | struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL); |
9ad97ede | 116 | int ret; |
0ad72863 | 117 | if (cli) { |
9ad97ede BS |
118 | snprintf(cli->name, sizeof(cli->name), "%s", sname); |
119 | cli->dev = dev; | |
120 | ||
a01ca78c | 121 | ret = nvif_client_init(NULL, cli->name, nouveau_name(dev), |
9ad97ede BS |
122 | nouveau_config, nouveau_debug, |
123 | &cli->base); | |
27111a23 | 124 | if (ret == 0) { |
0ad72863 | 125 | mutex_init(&cli->mutex); |
27111a23 BS |
126 | usif_client_init(cli); |
127 | } | |
94580299 | 128 | return ret; |
dd5700ea | 129 | } |
0ad72863 | 130 | return -ENOMEM; |
94580299 BS |
131 | } |
132 | ||
133 | static void | |
134 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
135 | { | |
be83cd4e | 136 | nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL); |
0ad72863 | 137 | nvif_client_fini(&cli->base); |
27111a23 | 138 | usif_client_fini(cli); |
f5654d95 | 139 | kfree(cli); |
94580299 BS |
140 | } |
141 | ||
ebb945a9 BS |
142 | static void |
143 | nouveau_accel_fini(struct nouveau_drm *drm) | |
144 | { | |
fbd58ebd | 145 | nouveau_channel_idle(drm->channel); |
0ad72863 | 146 | nvif_object_fini(&drm->ntfy); |
f027f491 | 147 | nvkm_gpuobj_del(&drm->notify); |
fbd58ebd | 148 | nvif_notify_fini(&drm->flip); |
0ad72863 | 149 | nvif_object_fini(&drm->nvsw); |
fbd58ebd BS |
150 | nouveau_channel_del(&drm->channel); |
151 | ||
152 | nouveau_channel_idle(drm->cechan); | |
0ad72863 | 153 | nvif_object_fini(&drm->ttm.copy); |
fbd58ebd BS |
154 | nouveau_channel_del(&drm->cechan); |
155 | ||
ebb945a9 BS |
156 | if (drm->fence) |
157 | nouveau_fence(drm)->dtor(drm); | |
158 | } | |
159 | ||
160 | static void | |
161 | nouveau_accel_init(struct nouveau_drm *drm) | |
162 | { | |
967e7bde | 163 | struct nvif_device *device = &drm->device; |
41a63406 | 164 | struct nvif_sclass *sclass; |
49981046 | 165 | u32 arg0, arg1; |
41a63406 | 166 | int ret, i, n; |
ebb945a9 | 167 | |
967e7bde | 168 | if (nouveau_noaccel) |
ebb945a9 BS |
169 | return; |
170 | ||
171 | /* initialise synchronisation routines */ | |
967e7bde BS |
172 | /*XXX: this is crap, but the fence/channel stuff is a little |
173 | * backwards in some places. this will be fixed. | |
174 | */ | |
41a63406 | 175 | ret = n = nvif_object_sclass_get(&device->object, &sclass); |
967e7bde BS |
176 | if (ret < 0) |
177 | return; | |
178 | ||
41a63406 BS |
179 | for (ret = -ENOSYS, i = 0; i < n; i++) { |
180 | switch (sclass[i].oclass) { | |
bbf8906b | 181 | case NV03_CHANNEL_DMA: |
967e7bde BS |
182 | ret = nv04_fence_create(drm); |
183 | break; | |
bbf8906b | 184 | case NV10_CHANNEL_DMA: |
967e7bde BS |
185 | ret = nv10_fence_create(drm); |
186 | break; | |
bbf8906b BS |
187 | case NV17_CHANNEL_DMA: |
188 | case NV40_CHANNEL_DMA: | |
967e7bde BS |
189 | ret = nv17_fence_create(drm); |
190 | break; | |
bbf8906b | 191 | case NV50_CHANNEL_GPFIFO: |
967e7bde BS |
192 | ret = nv50_fence_create(drm); |
193 | break; | |
bbf8906b | 194 | case G82_CHANNEL_GPFIFO: |
967e7bde BS |
195 | ret = nv84_fence_create(drm); |
196 | break; | |
bbf8906b BS |
197 | case FERMI_CHANNEL_GPFIFO: |
198 | case KEPLER_CHANNEL_GPFIFO_A: | |
a1020afe | 199 | case MAXWELL_CHANNEL_GPFIFO_A: |
967e7bde BS |
200 | ret = nvc0_fence_create(drm); |
201 | break; | |
202 | default: | |
203 | break; | |
204 | } | |
205 | } | |
206 | ||
41a63406 | 207 | nvif_object_sclass_put(&sclass); |
ebb945a9 BS |
208 | if (ret) { |
209 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
210 | nouveau_accel_fini(drm); | |
211 | return; | |
212 | } | |
213 | ||
967e7bde | 214 | if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { |
fcf3f91c | 215 | ret = nouveau_channel_new(drm, &drm->device, |
bbf8906b BS |
216 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0| |
217 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1, | |
218 | 0, &drm->cechan); | |
49981046 BS |
219 | if (ret) |
220 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
221 | ||
bbf8906b | 222 | arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR; |
49469800 | 223 | arg1 = 1; |
00fc6f6f | 224 | } else |
967e7bde BS |
225 | if (device->info.chipset >= 0xa3 && |
226 | device->info.chipset != 0xaa && | |
227 | device->info.chipset != 0xac) { | |
fcf3f91c | 228 | ret = nouveau_channel_new(drm, &drm->device, |
0ad72863 | 229 | NvDmaFB, NvDmaTT, &drm->cechan); |
00fc6f6f BS |
230 | if (ret) |
231 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
232 | ||
233 | arg0 = NvDmaFB; | |
234 | arg1 = NvDmaTT; | |
49981046 BS |
235 | } else { |
236 | arg0 = NvDmaFB; | |
237 | arg1 = NvDmaTT; | |
238 | } | |
239 | ||
fcf3f91c | 240 | ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel); |
ebb945a9 BS |
241 | if (ret) { |
242 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
243 | nouveau_accel_fini(drm); | |
244 | return; | |
245 | } | |
246 | ||
a01ca78c | 247 | ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW, |
0ad72863 | 248 | nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw); |
69a6146d | 249 | if (ret == 0) { |
69a6146d BS |
250 | ret = RING_SPACE(drm->channel, 2); |
251 | if (ret == 0) { | |
967e7bde | 252 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
69a6146d BS |
253 | BEGIN_NV04(drm->channel, NvSubSw, 0, 1); |
254 | OUT_RING (drm->channel, NVDRM_NVSW); | |
255 | } else | |
967e7bde | 256 | if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) { |
69a6146d BS |
257 | BEGIN_NVC0(drm->channel, FermiSw, 0, 1); |
258 | OUT_RING (drm->channel, 0x001f0000); | |
259 | } | |
260 | } | |
898a2b32 BS |
261 | |
262 | ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete, | |
538b269b BS |
263 | false, NV04_NVSW_NTFY_UEVENT, |
264 | NULL, 0, 0, &drm->flip); | |
898a2b32 BS |
265 | if (ret == 0) |
266 | ret = nvif_notify_get(&drm->flip); | |
267 | if (ret) { | |
268 | nouveau_accel_fini(drm); | |
269 | return; | |
270 | } | |
69a6146d BS |
271 | } |
272 | ||
273 | if (ret) { | |
274 | NV_ERROR(drm, "failed to allocate software object, %d\n", ret); | |
275 | nouveau_accel_fini(drm); | |
276 | return; | |
277 | } | |
278 | ||
967e7bde | 279 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
f027f491 BS |
280 | ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false, |
281 | NULL, &drm->notify); | |
ebb945a9 BS |
282 | if (ret) { |
283 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
284 | nouveau_accel_fini(drm); | |
285 | return; | |
286 | } | |
287 | ||
a01ca78c | 288 | ret = nvif_object_init(&drm->channel->user, NvNotify0, |
4acfd707 BS |
289 | NV_DMA_IN_MEMORY, |
290 | &(struct nv_dma_v0) { | |
291 | .target = NV_DMA_V0_TARGET_VRAM, | |
292 | .access = NV_DMA_V0_ACCESS_RDWR, | |
ebb945a9 BS |
293 | .start = drm->notify->addr, |
294 | .limit = drm->notify->addr + 31 | |
4acfd707 | 295 | }, sizeof(struct nv_dma_v0), |
0ad72863 | 296 | &drm->ntfy); |
ebb945a9 BS |
297 | if (ret) { |
298 | nouveau_accel_fini(drm); | |
299 | return; | |
300 | } | |
301 | } | |
302 | ||
303 | ||
49981046 | 304 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
305 | } |
306 | ||
56550d94 GKH |
307 | static int nouveau_drm_probe(struct pci_dev *pdev, |
308 | const struct pci_device_id *pent) | |
94580299 | 309 | { |
be83cd4e | 310 | struct nvkm_device *device; |
ebb945a9 BS |
311 | struct apertures_struct *aper; |
312 | bool boot = false; | |
94580299 BS |
313 | int ret; |
314 | ||
ebb945a9 BS |
315 | /* remove conflicting drivers (vesafb, efifb etc) */ |
316 | aper = alloc_apertures(3); | |
317 | if (!aper) | |
318 | return -ENOMEM; | |
319 | ||
320 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
321 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
322 | aper->count = 1; | |
323 | ||
324 | if (pci_resource_len(pdev, 2)) { | |
325 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
326 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
327 | aper->count++; | |
328 | } | |
329 | ||
330 | if (pci_resource_len(pdev, 3)) { | |
331 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
332 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
333 | aper->count++; | |
334 | } | |
335 | ||
336 | #ifdef CONFIG_X86 | |
337 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
338 | #endif | |
771fa0e4 BS |
339 | if (nouveau_modeset != 2) |
340 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 341 | kfree(aper); |
ebb945a9 | 342 | |
7974dd1b BS |
343 | ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, |
344 | true, true, ~0ULL, &device); | |
94580299 BS |
345 | if (ret) |
346 | return ret; | |
347 | ||
348 | pci_set_master(pdev); | |
349 | ||
915b4d11 | 350 | ret = drm_get_pci_dev(pdev, pent, &driver_pci); |
94580299 | 351 | if (ret) { |
e781dc8f | 352 | nvkm_device_del(&device); |
94580299 BS |
353 | return ret; |
354 | } | |
355 | ||
356 | return 0; | |
357 | } | |
358 | ||
5addcf0a DA |
359 | #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 |
360 | ||
361 | static void | |
46941b0f | 362 | nouveau_get_hdmi_dev(struct nouveau_drm *drm) |
5addcf0a | 363 | { |
46941b0f | 364 | struct pci_dev *pdev = drm->dev->pdev; |
5addcf0a | 365 | |
420b9469 | 366 | if (!pdev) { |
40189b0c | 367 | DRM_INFO("not a PCI device; no HDMI\n"); |
420b9469 AC |
368 | drm->hdmi_device = NULL; |
369 | return; | |
370 | } | |
371 | ||
5addcf0a DA |
372 | /* subfunction one is a hdmi audio device? */ |
373 | drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, | |
374 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); | |
375 | ||
376 | if (!drm->hdmi_device) { | |
46941b0f | 377 | NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); |
5addcf0a DA |
378 | return; |
379 | } | |
380 | ||
381 | if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) { | |
46941b0f | 382 | NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class); |
5addcf0a DA |
383 | pci_dev_put(drm->hdmi_device); |
384 | drm->hdmi_device = NULL; | |
385 | return; | |
386 | } | |
387 | } | |
388 | ||
5b8a43ae | 389 | static int |
94580299 BS |
390 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
391 | { | |
94580299 BS |
392 | struct nouveau_drm *drm; |
393 | int ret; | |
394 | ||
9ad97ede | 395 | ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm); |
94580299 BS |
396 | if (ret) |
397 | return ret; | |
398 | ||
77145f1c BS |
399 | dev->dev_private = drm; |
400 | drm->dev = dev; | |
989aa5b7 | 401 | nvxx_client(&drm->client.base)->debug = |
be83cd4e | 402 | nvkm_dbgopt(nouveau_debug, "DRM"); |
77145f1c | 403 | |
94580299 | 404 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 405 | spin_lock_init(&drm->tile.lock); |
94580299 | 406 | |
46941b0f | 407 | nouveau_get_hdmi_dev(drm); |
5addcf0a | 408 | |
fcf3f91c | 409 | ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE, |
586491e6 | 410 | &(struct nv_device_v0) { |
94580299 | 411 | .device = ~0, |
586491e6 | 412 | }, sizeof(struct nv_device_v0), |
0ad72863 | 413 | &drm->device); |
94580299 BS |
414 | if (ret) |
415 | goto fail_device; | |
416 | ||
7d3428cd IM |
417 | dev->irq_enabled = true; |
418 | ||
77145f1c BS |
419 | /* workaround an odd issue on nvc1 by disabling the device's |
420 | * nosnoop capability. hopefully won't cause issues until a | |
421 | * better fix is found - assuming there is one... | |
422 | */ | |
967e7bde | 423 | if (drm->device.info.chipset == 0xc1) |
a01ca78c | 424 | nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000); |
ebb945a9 | 425 | |
77145f1c | 426 | nouveau_vga_init(drm); |
cb75d97e | 427 | |
967e7bde | 428 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
be83cd4e | 429 | ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40), |
1de68568 | 430 | 0x1000, NULL, &drm->client.vm); |
ebb945a9 BS |
431 | if (ret) |
432 | goto fail_device; | |
3ee6f5b5 | 433 | |
989aa5b7 | 434 | nvxx_client(&drm->client.base)->vm = drm->client.vm; |
ebb945a9 BS |
435 | } |
436 | ||
437 | ret = nouveau_ttm_init(drm); | |
94580299 | 438 | if (ret) |
77145f1c BS |
439 | goto fail_ttm; |
440 | ||
441 | ret = nouveau_bios_init(dev); | |
442 | if (ret) | |
443 | goto fail_bios; | |
444 | ||
77145f1c | 445 | ret = nouveau_display_create(dev); |
ebb945a9 | 446 | if (ret) |
77145f1c BS |
447 | goto fail_dispctor; |
448 | ||
449 | if (dev->mode_config.num_crtc) { | |
450 | ret = nouveau_display_init(dev); | |
451 | if (ret) | |
452 | goto fail_dispinit; | |
453 | } | |
454 | ||
b126a200 | 455 | nouveau_debugfs_init(drm); |
b9ed919f | 456 | nouveau_hwmon_init(dev); |
ebb945a9 BS |
457 | nouveau_accel_init(drm); |
458 | nouveau_fbcon_init(dev); | |
5addcf0a DA |
459 | |
460 | if (nouveau_runtime_pm != 0) { | |
461 | pm_runtime_use_autosuspend(dev->dev); | |
462 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | |
463 | pm_runtime_set_active(dev->dev); | |
464 | pm_runtime_allow(dev->dev); | |
465 | pm_runtime_mark_last_busy(dev->dev); | |
466 | pm_runtime_put(dev->dev); | |
467 | } | |
94580299 BS |
468 | return 0; |
469 | ||
77145f1c BS |
470 | fail_dispinit: |
471 | nouveau_display_destroy(dev); | |
472 | fail_dispctor: | |
77145f1c BS |
473 | nouveau_bios_takedown(dev); |
474 | fail_bios: | |
ebb945a9 | 475 | nouveau_ttm_fini(drm); |
77145f1c | 476 | fail_ttm: |
77145f1c | 477 | nouveau_vga_fini(drm); |
94580299 | 478 | fail_device: |
0ad72863 | 479 | nvif_device_fini(&drm->device); |
94580299 BS |
480 | nouveau_cli_destroy(&drm->client); |
481 | return ret; | |
482 | } | |
483 | ||
5b8a43ae | 484 | static int |
94580299 BS |
485 | nouveau_drm_unload(struct drm_device *dev) |
486 | { | |
77145f1c | 487 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 488 | |
5addcf0a | 489 | pm_runtime_get_sync(dev->dev); |
ebb945a9 BS |
490 | nouveau_fbcon_fini(dev); |
491 | nouveau_accel_fini(drm); | |
b9ed919f | 492 | nouveau_hwmon_fini(dev); |
b126a200 | 493 | nouveau_debugfs_fini(drm); |
77145f1c | 494 | |
9430738d BS |
495 | if (dev->mode_config.num_crtc) |
496 | nouveau_display_fini(dev); | |
77145f1c BS |
497 | nouveau_display_destroy(dev); |
498 | ||
77145f1c | 499 | nouveau_bios_takedown(dev); |
94580299 | 500 | |
ebb945a9 | 501 | nouveau_ttm_fini(drm); |
77145f1c | 502 | nouveau_vga_fini(drm); |
cb75d97e | 503 | |
0ad72863 | 504 | nvif_device_fini(&drm->device); |
5addcf0a DA |
505 | if (drm->hdmi_device) |
506 | pci_dev_put(drm->hdmi_device); | |
94580299 BS |
507 | nouveau_cli_destroy(&drm->client); |
508 | return 0; | |
509 | } | |
510 | ||
8ba9ff11 AC |
511 | void |
512 | nouveau_drm_device_remove(struct drm_device *dev) | |
94580299 | 513 | { |
77145f1c | 514 | struct nouveau_drm *drm = nouveau_drm(dev); |
be83cd4e | 515 | struct nvkm_client *client; |
76ecea5b | 516 | struct nvkm_device *device; |
77145f1c | 517 | |
7d3428cd | 518 | dev->irq_enabled = false; |
989aa5b7 | 519 | client = nvxx_client(&drm->client.base); |
4e7e62d6 | 520 | device = nvkm_device_find(client->device); |
77145f1c BS |
521 | drm_put_dev(dev); |
522 | ||
e781dc8f | 523 | nvkm_device_del(&device); |
94580299 | 524 | } |
8ba9ff11 AC |
525 | |
526 | static void | |
527 | nouveau_drm_remove(struct pci_dev *pdev) | |
528 | { | |
529 | struct drm_device *dev = pci_get_drvdata(pdev); | |
530 | ||
531 | nouveau_drm_device_remove(dev); | |
532 | } | |
94580299 | 533 | |
cd897837 | 534 | static int |
05c63c2f | 535 | nouveau_do_suspend(struct drm_device *dev, bool runtime) |
94580299 | 536 | { |
77145f1c | 537 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
538 | struct nouveau_cli *cli; |
539 | int ret; | |
540 | ||
6fbb702e BS |
541 | if (dev->mode_config.num_crtc) { |
542 | NV_INFO(drm, "suspending console...\n"); | |
543 | nouveau_fbcon_set_suspend(dev, 1); | |
c52f4fa6 | 544 | NV_INFO(drm, "suspending display...\n"); |
6fbb702e | 545 | ret = nouveau_display_suspend(dev, runtime); |
9430738d BS |
546 | if (ret) |
547 | return ret; | |
548 | } | |
94580299 | 549 | |
c52f4fa6 | 550 | NV_INFO(drm, "evicting buffers...\n"); |
ebb945a9 BS |
551 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
552 | ||
c52f4fa6 | 553 | NV_INFO(drm, "waiting for kernel channels to go idle...\n"); |
81dff21b BS |
554 | if (drm->cechan) { |
555 | ret = nouveau_channel_idle(drm->cechan); | |
556 | if (ret) | |
f3980dc5 | 557 | goto fail_display; |
81dff21b BS |
558 | } |
559 | ||
560 | if (drm->channel) { | |
561 | ret = nouveau_channel_idle(drm->channel); | |
562 | if (ret) | |
f3980dc5 | 563 | goto fail_display; |
81dff21b BS |
564 | } |
565 | ||
c52f4fa6 | 566 | NV_INFO(drm, "suspending client object trees...\n"); |
ebb945a9 | 567 | if (drm->fence && nouveau_fence(drm)->suspend) { |
f3980dc5 IM |
568 | if (!nouveau_fence(drm)->suspend(drm)) { |
569 | ret = -ENOMEM; | |
570 | goto fail_display; | |
571 | } | |
ebb945a9 BS |
572 | } |
573 | ||
94580299 | 574 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 575 | ret = nvif_client_suspend(&cli->base); |
94580299 BS |
576 | if (ret) |
577 | goto fail_client; | |
578 | } | |
579 | ||
c52f4fa6 | 580 | NV_INFO(drm, "suspending kernel object tree...\n"); |
0ad72863 | 581 | ret = nvif_client_suspend(&drm->client.base); |
94580299 BS |
582 | if (ret) |
583 | goto fail_client; | |
584 | ||
94580299 BS |
585 | return 0; |
586 | ||
587 | fail_client: | |
588 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
0ad72863 | 589 | nvif_client_resume(&cli->base); |
94580299 BS |
590 | } |
591 | ||
f3980dc5 IM |
592 | if (drm->fence && nouveau_fence(drm)->resume) |
593 | nouveau_fence(drm)->resume(drm); | |
594 | ||
595 | fail_display: | |
9430738d | 596 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 597 | NV_INFO(drm, "resuming display...\n"); |
6fbb702e | 598 | nouveau_display_resume(dev, runtime); |
9430738d | 599 | } |
94580299 BS |
600 | return ret; |
601 | } | |
602 | ||
cd897837 | 603 | static int |
6fbb702e | 604 | nouveau_do_resume(struct drm_device *dev, bool runtime) |
2d8b9ccb DA |
605 | { |
606 | struct nouveau_drm *drm = nouveau_drm(dev); | |
607 | struct nouveau_cli *cli; | |
608 | ||
c52f4fa6 | 609 | NV_INFO(drm, "resuming kernel object tree...\n"); |
0ad72863 | 610 | nvif_client_resume(&drm->client.base); |
94580299 | 611 | |
c52f4fa6 | 612 | NV_INFO(drm, "resuming client object trees...\n"); |
81dff21b BS |
613 | if (drm->fence && nouveau_fence(drm)->resume) |
614 | nouveau_fence(drm)->resume(drm); | |
615 | ||
94580299 | 616 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 617 | nvif_client_resume(&cli->base); |
94580299 | 618 | } |
cb75d97e | 619 | |
77145f1c | 620 | nouveau_run_vbios_init(dev); |
77145f1c | 621 | |
9430738d | 622 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 623 | NV_INFO(drm, "resuming display...\n"); |
6fbb702e BS |
624 | nouveau_display_resume(dev, runtime); |
625 | NV_INFO(drm, "resuming console...\n"); | |
626 | nouveau_fbcon_set_suspend(dev, 0); | |
9430738d | 627 | } |
5addcf0a | 628 | |
77145f1c | 629 | return 0; |
94580299 BS |
630 | } |
631 | ||
7bb6d442 BS |
632 | int |
633 | nouveau_pmops_suspend(struct device *dev) | |
634 | { | |
635 | struct pci_dev *pdev = to_pci_dev(dev); | |
636 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
637 | int ret; | |
638 | ||
639 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || | |
640 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
641 | return 0; | |
642 | ||
643 | ret = nouveau_do_suspend(drm_dev, false); | |
644 | if (ret) | |
645 | return ret; | |
646 | ||
647 | pci_save_state(pdev); | |
648 | pci_disable_device(pdev); | |
7bb6d442 | 649 | pci_set_power_state(pdev, PCI_D3hot); |
c5fd936e | 650 | udelay(200); |
7bb6d442 BS |
651 | return 0; |
652 | } | |
653 | ||
654 | int | |
655 | nouveau_pmops_resume(struct device *dev) | |
2d8b9ccb DA |
656 | { |
657 | struct pci_dev *pdev = to_pci_dev(dev); | |
658 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
659 | int ret; | |
660 | ||
5addcf0a DA |
661 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
662 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
2d8b9ccb DA |
663 | return 0; |
664 | ||
665 | pci_set_power_state(pdev, PCI_D0); | |
666 | pci_restore_state(pdev); | |
667 | ret = pci_enable_device(pdev); | |
668 | if (ret) | |
669 | return ret; | |
670 | pci_set_master(pdev); | |
671 | ||
6fbb702e | 672 | return nouveau_do_resume(drm_dev, false); |
2d8b9ccb DA |
673 | } |
674 | ||
7bb6d442 BS |
675 | static int |
676 | nouveau_pmops_freeze(struct device *dev) | |
2d8b9ccb DA |
677 | { |
678 | struct pci_dev *pdev = to_pci_dev(dev); | |
679 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
6fbb702e | 680 | return nouveau_do_suspend(drm_dev, false); |
2d8b9ccb DA |
681 | } |
682 | ||
7bb6d442 BS |
683 | static int |
684 | nouveau_pmops_thaw(struct device *dev) | |
2d8b9ccb DA |
685 | { |
686 | struct pci_dev *pdev = to_pci_dev(dev); | |
687 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
6fbb702e | 688 | return nouveau_do_resume(drm_dev, false); |
2d8b9ccb DA |
689 | } |
690 | ||
7bb6d442 BS |
691 | static int |
692 | nouveau_pmops_runtime_suspend(struct device *dev) | |
693 | { | |
694 | struct pci_dev *pdev = to_pci_dev(dev); | |
695 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
696 | int ret; | |
697 | ||
698 | if (nouveau_runtime_pm == 0) { | |
699 | pm_runtime_forbid(dev); | |
700 | return -EBUSY; | |
701 | } | |
702 | ||
703 | /* are we optimus enabled? */ | |
704 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
705 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
706 | pm_runtime_forbid(dev); | |
707 | return -EBUSY; | |
708 | } | |
709 | ||
7bb6d442 BS |
710 | drm_kms_helper_poll_disable(drm_dev); |
711 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); | |
712 | nouveau_switcheroo_optimus_dsm(); | |
713 | ret = nouveau_do_suspend(drm_dev, true); | |
714 | pci_save_state(pdev); | |
715 | pci_disable_device(pdev); | |
8c863944 | 716 | pci_ignore_hotplug(pdev); |
7bb6d442 BS |
717 | pci_set_power_state(pdev, PCI_D3cold); |
718 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; | |
719 | return ret; | |
720 | } | |
721 | ||
722 | static int | |
723 | nouveau_pmops_runtime_resume(struct device *dev) | |
724 | { | |
725 | struct pci_dev *pdev = to_pci_dev(dev); | |
726 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
727 | struct nvif_device *device = &nouveau_drm(drm_dev)->device; | |
728 | int ret; | |
729 | ||
730 | if (nouveau_runtime_pm == 0) | |
731 | return -EINVAL; | |
732 | ||
733 | pci_set_power_state(pdev, PCI_D0); | |
734 | pci_restore_state(pdev); | |
735 | ret = pci_enable_device(pdev); | |
736 | if (ret) | |
737 | return ret; | |
738 | pci_set_master(pdev); | |
739 | ||
740 | ret = nouveau_do_resume(drm_dev, true); | |
741 | drm_kms_helper_poll_enable(drm_dev); | |
742 | /* do magic */ | |
a01ca78c | 743 | nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); |
7bb6d442 BS |
744 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); |
745 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; | |
7bb6d442 BS |
746 | return ret; |
747 | } | |
748 | ||
749 | static int | |
750 | nouveau_pmops_runtime_idle(struct device *dev) | |
751 | { | |
752 | struct pci_dev *pdev = to_pci_dev(dev); | |
753 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
754 | struct nouveau_drm *drm = nouveau_drm(drm_dev); | |
755 | struct drm_crtc *crtc; | |
756 | ||
757 | if (nouveau_runtime_pm == 0) { | |
758 | pm_runtime_forbid(dev); | |
759 | return -EBUSY; | |
760 | } | |
761 | ||
762 | /* are we optimus enabled? */ | |
763 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
764 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
765 | pm_runtime_forbid(dev); | |
766 | return -EBUSY; | |
767 | } | |
768 | ||
769 | /* if we have a hdmi audio device - make sure it has a driver loaded */ | |
770 | if (drm->hdmi_device) { | |
771 | if (!drm->hdmi_device->driver) { | |
772 | DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n"); | |
773 | pm_runtime_mark_last_busy(dev); | |
774 | return -EBUSY; | |
775 | } | |
776 | } | |
777 | ||
778 | list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { | |
779 | if (crtc->enabled) { | |
780 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
781 | return -EBUSY; | |
782 | } | |
783 | } | |
784 | pm_runtime_mark_last_busy(dev); | |
785 | pm_runtime_autosuspend(dev); | |
786 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ | |
787 | return 1; | |
788 | } | |
2d8b9ccb | 789 | |
5b8a43ae | 790 | static int |
ebb945a9 BS |
791 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
792 | { | |
ebb945a9 BS |
793 | struct nouveau_drm *drm = nouveau_drm(dev); |
794 | struct nouveau_cli *cli; | |
a2896ced | 795 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
796 | int ret; |
797 | ||
5addcf0a DA |
798 | /* need to bring up power immediately if opening device */ |
799 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 800 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
801 | return ret; |
802 | ||
a2896ced MS |
803 | get_task_comm(tmpname, current); |
804 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 | 805 | |
9ad97ede | 806 | ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli); |
420b9469 | 807 | |
ebb945a9 | 808 | if (ret) |
5addcf0a | 809 | goto out_suspend; |
ebb945a9 | 810 | |
0ad72863 BS |
811 | cli->base.super = false; |
812 | ||
967e7bde | 813 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
be83cd4e | 814 | ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40), |
1de68568 | 815 | 0x1000, NULL, &cli->vm); |
ebb945a9 BS |
816 | if (ret) { |
817 | nouveau_cli_destroy(cli); | |
5addcf0a | 818 | goto out_suspend; |
ebb945a9 | 819 | } |
3ee6f5b5 | 820 | |
989aa5b7 | 821 | nvxx_client(&cli->base)->vm = cli->vm; |
ebb945a9 BS |
822 | } |
823 | ||
824 | fpriv->driver_priv = cli; | |
825 | ||
826 | mutex_lock(&drm->client.mutex); | |
827 | list_add(&cli->head, &drm->clients); | |
828 | mutex_unlock(&drm->client.mutex); | |
5addcf0a DA |
829 | |
830 | out_suspend: | |
831 | pm_runtime_mark_last_busy(dev->dev); | |
832 | pm_runtime_put_autosuspend(dev->dev); | |
833 | ||
834 | return ret; | |
ebb945a9 BS |
835 | } |
836 | ||
5b8a43ae | 837 | static void |
ebb945a9 BS |
838 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
839 | { | |
840 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
841 | struct nouveau_drm *drm = nouveau_drm(dev); | |
842 | ||
5addcf0a DA |
843 | pm_runtime_get_sync(dev->dev); |
844 | ||
ac8c7930 | 845 | mutex_lock(&cli->mutex); |
ebb945a9 BS |
846 | if (cli->abi16) |
847 | nouveau_abi16_fini(cli->abi16); | |
ac8c7930 | 848 | mutex_unlock(&cli->mutex); |
ebb945a9 BS |
849 | |
850 | mutex_lock(&drm->client.mutex); | |
851 | list_del(&cli->head); | |
852 | mutex_unlock(&drm->client.mutex); | |
5addcf0a | 853 | |
ebb945a9 BS |
854 | } |
855 | ||
5b8a43ae | 856 | static void |
ebb945a9 BS |
857 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
858 | { | |
859 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
860 | nouveau_cli_destroy(cli); | |
5addcf0a DA |
861 | pm_runtime_mark_last_busy(dev->dev); |
862 | pm_runtime_put_autosuspend(dev->dev); | |
ebb945a9 BS |
863 | } |
864 | ||
baa70943 | 865 | static const struct drm_ioctl_desc |
77145f1c | 866 | nouveau_ioctls[] = { |
f8c47144 DV |
867 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW), |
868 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | |
869 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW), | |
870 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW), | |
871 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), | |
872 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), | |
873 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW), | |
874 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW), | |
875 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW), | |
876 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW), | |
877 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW), | |
878 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW), | |
77145f1c BS |
879 | }; |
880 | ||
27111a23 BS |
881 | long |
882 | nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
5addcf0a | 883 | { |
27111a23 BS |
884 | struct drm_file *filp = file->private_data; |
885 | struct drm_device *dev = filp->minor->dev; | |
5addcf0a | 886 | long ret; |
5addcf0a DA |
887 | |
888 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 889 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
890 | return ret; |
891 | ||
27111a23 BS |
892 | switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { |
893 | case DRM_NOUVEAU_NVIF: | |
894 | ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); | |
895 | break; | |
896 | default: | |
897 | ret = drm_ioctl(file, cmd, arg); | |
898 | break; | |
899 | } | |
5addcf0a DA |
900 | |
901 | pm_runtime_mark_last_busy(dev->dev); | |
902 | pm_runtime_put_autosuspend(dev->dev); | |
903 | return ret; | |
904 | } | |
27111a23 | 905 | |
77145f1c BS |
906 | static const struct file_operations |
907 | nouveau_driver_fops = { | |
908 | .owner = THIS_MODULE, | |
909 | .open = drm_open, | |
910 | .release = drm_release, | |
5addcf0a | 911 | .unlocked_ioctl = nouveau_drm_ioctl, |
77145f1c BS |
912 | .mmap = nouveau_ttm_mmap, |
913 | .poll = drm_poll, | |
77145f1c BS |
914 | .read = drm_read, |
915 | #if defined(CONFIG_COMPAT) | |
916 | .compat_ioctl = nouveau_compat_ioctl, | |
917 | #endif | |
918 | .llseek = noop_llseek, | |
919 | }; | |
920 | ||
921 | static struct drm_driver | |
915b4d11 | 922 | driver_stub = { |
77145f1c | 923 | .driver_features = |
0e975980 PA |
924 | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER | |
925 | DRIVER_KMS_LEGACY_CONTEXT, | |
77145f1c BS |
926 | |
927 | .load = nouveau_drm_load, | |
928 | .unload = nouveau_drm_unload, | |
929 | .open = nouveau_drm_open, | |
930 | .preclose = nouveau_drm_preclose, | |
931 | .postclose = nouveau_drm_postclose, | |
932 | .lastclose = nouveau_vga_lastclose, | |
933 | ||
33b903e8 | 934 | #if defined(CONFIG_DEBUG_FS) |
56c101af KH |
935 | .debugfs_init = nouveau_drm_debugfs_init, |
936 | .debugfs_cleanup = nouveau_drm_debugfs_cleanup, | |
33b903e8 MS |
937 | #endif |
938 | ||
b44f8408 | 939 | .get_vblank_counter = drm_vblank_no_hw_counter, |
51cb4b39 BS |
940 | .enable_vblank = nouveau_display_vblank_enable, |
941 | .disable_vblank = nouveau_display_vblank_disable, | |
d83ef853 BS |
942 | .get_scanout_position = nouveau_display_scanoutpos, |
943 | .get_vblank_timestamp = nouveau_display_vblstamp, | |
77145f1c BS |
944 | |
945 | .ioctls = nouveau_ioctls, | |
baa70943 | 946 | .num_ioctls = ARRAY_SIZE(nouveau_ioctls), |
77145f1c BS |
947 | .fops = &nouveau_driver_fops, |
948 | ||
949 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
950 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
ab9ccb96 AP |
951 | .gem_prime_export = drm_gem_prime_export, |
952 | .gem_prime_import = drm_gem_prime_import, | |
953 | .gem_prime_pin = nouveau_gem_prime_pin, | |
3aac4502 | 954 | .gem_prime_res_obj = nouveau_gem_prime_res_obj, |
1af7c7dd | 955 | .gem_prime_unpin = nouveau_gem_prime_unpin, |
ab9ccb96 AP |
956 | .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, |
957 | .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, | |
958 | .gem_prime_vmap = nouveau_gem_prime_vmap, | |
959 | .gem_prime_vunmap = nouveau_gem_prime_vunmap, | |
77145f1c | 960 | |
77145f1c BS |
961 | .gem_free_object = nouveau_gem_object_del, |
962 | .gem_open_object = nouveau_gem_object_open, | |
963 | .gem_close_object = nouveau_gem_object_close, | |
964 | ||
965 | .dumb_create = nouveau_display_dumb_create, | |
966 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
43387b37 | 967 | .dumb_destroy = drm_gem_dumb_destroy, |
77145f1c BS |
968 | |
969 | .name = DRIVER_NAME, | |
970 | .desc = DRIVER_DESC, | |
971 | #ifdef GIT_REVISION | |
972 | .date = GIT_REVISION, | |
973 | #else | |
974 | .date = DRIVER_DATE, | |
975 | #endif | |
976 | .major = DRIVER_MAJOR, | |
977 | .minor = DRIVER_MINOR, | |
978 | .patchlevel = DRIVER_PATCHLEVEL, | |
979 | }; | |
980 | ||
94580299 BS |
981 | static struct pci_device_id |
982 | nouveau_drm_pci_table[] = { | |
983 | { | |
984 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
985 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
986 | .class_mask = 0xff << 16, | |
987 | }, | |
988 | { | |
989 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
990 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
991 | .class_mask = 0xff << 16, | |
992 | }, | |
993 | {} | |
994 | }; | |
995 | ||
703fa264 PM |
996 | static void nouveau_display_options(void) |
997 | { | |
998 | DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); | |
999 | ||
1000 | DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); | |
1001 | DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); | |
1002 | DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); | |
1003 | DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel); | |
1004 | DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); | |
1005 | DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); | |
1006 | DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); | |
1007 | DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); | |
1008 | DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); | |
1009 | DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); | |
703fa264 PM |
1010 | } |
1011 | ||
2d8b9ccb DA |
1012 | static const struct dev_pm_ops nouveau_pm_ops = { |
1013 | .suspend = nouveau_pmops_suspend, | |
1014 | .resume = nouveau_pmops_resume, | |
1015 | .freeze = nouveau_pmops_freeze, | |
1016 | .thaw = nouveau_pmops_thaw, | |
1017 | .poweroff = nouveau_pmops_freeze, | |
1018 | .restore = nouveau_pmops_resume, | |
5addcf0a DA |
1019 | .runtime_suspend = nouveau_pmops_runtime_suspend, |
1020 | .runtime_resume = nouveau_pmops_runtime_resume, | |
1021 | .runtime_idle = nouveau_pmops_runtime_idle, | |
2d8b9ccb DA |
1022 | }; |
1023 | ||
94580299 BS |
1024 | static struct pci_driver |
1025 | nouveau_drm_pci_driver = { | |
1026 | .name = "nouveau", | |
1027 | .id_table = nouveau_drm_pci_table, | |
1028 | .probe = nouveau_drm_probe, | |
1029 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 1030 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
1031 | }; |
1032 | ||
8ba9ff11 | 1033 | struct drm_device * |
e396ecd1 AC |
1034 | nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, |
1035 | struct platform_device *pdev, | |
47b2505e | 1036 | struct nvkm_device **pdevice) |
420b9469 | 1037 | { |
8ba9ff11 AC |
1038 | struct drm_device *drm; |
1039 | int err; | |
420b9469 | 1040 | |
e396ecd1 | 1041 | err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, |
7974dd1b | 1042 | true, true, ~0ULL, pdevice); |
8ba9ff11 | 1043 | if (err) |
e781dc8f | 1044 | goto err_free; |
8ba9ff11 | 1045 | |
915b4d11 | 1046 | drm = drm_dev_alloc(&driver_platform, &pdev->dev); |
8ba9ff11 AC |
1047 | if (!drm) { |
1048 | err = -ENOMEM; | |
1049 | goto err_free; | |
420b9469 AC |
1050 | } |
1051 | ||
8ba9ff11 AC |
1052 | drm->platformdev = pdev; |
1053 | platform_set_drvdata(pdev, drm); | |
1054 | ||
1055 | return drm; | |
1056 | ||
1057 | err_free: | |
e781dc8f | 1058 | nvkm_device_del(pdevice); |
8ba9ff11 AC |
1059 | |
1060 | return ERR_PTR(err); | |
420b9469 AC |
1061 | } |
1062 | ||
94580299 BS |
1063 | static int __init |
1064 | nouveau_drm_init(void) | |
1065 | { | |
915b4d11 DH |
1066 | driver_pci = driver_stub; |
1067 | driver_pci.set_busid = drm_pci_set_busid; | |
1068 | driver_platform = driver_stub; | |
1069 | driver_platform.set_busid = drm_platform_set_busid; | |
1070 | ||
703fa264 PM |
1071 | nouveau_display_options(); |
1072 | ||
77145f1c BS |
1073 | if (nouveau_modeset == -1) { |
1074 | #ifdef CONFIG_VGA_CONSOLE | |
1075 | if (vgacon_text_force()) | |
1076 | nouveau_modeset = 0; | |
77145f1c | 1077 | #endif |
77145f1c BS |
1078 | } |
1079 | ||
1080 | if (!nouveau_modeset) | |
1081 | return 0; | |
1082 | ||
055a65d5 AC |
1083 | #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER |
1084 | platform_driver_register(&nouveau_platform_driver); | |
1085 | #endif | |
1086 | ||
77145f1c | 1087 | nouveau_register_dsm_handler(); |
915b4d11 | 1088 | return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver); |
94580299 BS |
1089 | } |
1090 | ||
1091 | static void __exit | |
1092 | nouveau_drm_exit(void) | |
1093 | { | |
77145f1c BS |
1094 | if (!nouveau_modeset) |
1095 | return; | |
1096 | ||
915b4d11 | 1097 | drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver); |
77145f1c | 1098 | nouveau_unregister_dsm_handler(); |
055a65d5 AC |
1099 | |
1100 | #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER | |
1101 | platform_driver_unregister(&nouveau_platform_driver); | |
1102 | #endif | |
94580299 BS |
1103 | } |
1104 | ||
1105 | module_init(nouveau_drm_init); | |
1106 | module_exit(nouveau_drm_exit); | |
1107 | ||
1108 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
1109 | MODULE_AUTHOR(DRIVER_AUTHOR); |
1110 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 1111 | MODULE_LICENSE("GPL and additional rights"); |