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c0924326 | 1 | /* |
ebb945a9 | 2 | * Copyright 2012 Red Hat Inc. |
c0924326 BS |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
218f978d | 24 | #include "priv.h" |
c0924326 | 25 | |
218f978d | 26 | #include <core/gpuobj.h> |
ebb945a9 | 27 | #include <subdev/timer.h> |
c0924326 | 28 | |
218f978d | 29 | #include <nvif/class.h> |
5511d490 | 30 | |
ebb945a9 BS |
31 | /******************************************************************************* |
32 | * PMPEG context | |
33 | ******************************************************************************/ | |
c0924326 | 34 | |
218f978d BS |
35 | static int |
36 | nv50_mpeg_cclass_bind(struct nvkm_object *object, struct nvkm_gpuobj *parent, | |
37 | int align, struct nvkm_gpuobj **pgpuobj) | |
c0924326 | 38 | { |
218f978d BS |
39 | int ret = nvkm_gpuobj_new(object->engine->subdev.device, 128 * 4, |
40 | align, true, parent, pgpuobj); | |
41 | if (ret == 0) { | |
42 | nvkm_kmap(*pgpuobj); | |
43 | nvkm_wo32(*pgpuobj, 0x70, 0x00801ec1); | |
44 | nvkm_wo32(*pgpuobj, 0x7c, 0x0000037c); | |
45 | nvkm_done(*pgpuobj); | |
46 | } | |
47 | return ret; | |
c0924326 BS |
48 | } |
49 | ||
218f978d | 50 | const struct nvkm_object_func |
ebb945a9 | 51 | nv50_mpeg_cclass = { |
218f978d | 52 | .bind = nv50_mpeg_cclass_bind, |
ebb945a9 | 53 | }; |
c0924326 | 54 | |
ebb945a9 BS |
55 | /******************************************************************************* |
56 | * PMPEG engine/subdev functions | |
57 | ******************************************************************************/ | |
c0924326 | 58 | |
ebb945a9 | 59 | void |
7624fc01 | 60 | nv50_mpeg_intr(struct nvkm_engine *mpeg) |
c0924326 | 61 | { |
7624fc01 BS |
62 | struct nvkm_subdev *subdev = &mpeg->subdev; |
63 | struct nvkm_device *device = subdev->device; | |
636e37aa BS |
64 | u32 stat = nvkm_rd32(device, 0x00b100); |
65 | u32 type = nvkm_rd32(device, 0x00b230); | |
66 | u32 mthd = nvkm_rd32(device, 0x00b234); | |
67 | u32 data = nvkm_rd32(device, 0x00b238); | |
c0924326 BS |
68 | u32 show = stat; |
69 | ||
70 | if (stat & 0x01000000) { | |
71 | /* happens on initial binding of the object */ | |
72 | if (type == 0x00000020 && mthd == 0x0000) { | |
636e37aa | 73 | nvkm_wr32(device, 0x00b308, 0x00000100); |
c0924326 BS |
74 | show &= ~0x01000000; |
75 | } | |
76 | } | |
77 | ||
ebb945a9 | 78 | if (show) { |
b835c09b BS |
79 | nvkm_info(subdev, "%08x %08x %08x %08x\n", |
80 | stat, type, mthd, data); | |
c0924326 BS |
81 | } |
82 | ||
636e37aa BS |
83 | nvkm_wr32(device, 0x00b100, stat); |
84 | nvkm_wr32(device, 0x00b230, 0x00000001); | |
c0924326 BS |
85 | } |
86 | ||
c0924326 | 87 | int |
7624fc01 | 88 | nv50_mpeg_init(struct nvkm_engine *mpeg) |
c0924326 | 89 | { |
7624fc01 | 90 | struct nvkm_subdev *subdev = &mpeg->subdev; |
b835c09b | 91 | struct nvkm_device *device = subdev->device; |
ebb945a9 | 92 | |
636e37aa BS |
93 | nvkm_wr32(device, 0x00b32c, 0x00000000); |
94 | nvkm_wr32(device, 0x00b314, 0x00000100); | |
95 | nvkm_wr32(device, 0x00b0e0, 0x0000001a); | |
ebb945a9 | 96 | |
636e37aa BS |
97 | nvkm_wr32(device, 0x00b220, 0x00000044); |
98 | nvkm_wr32(device, 0x00b300, 0x00801ec1); | |
99 | nvkm_wr32(device, 0x00b390, 0x00000000); | |
100 | nvkm_wr32(device, 0x00b394, 0x00000000); | |
101 | nvkm_wr32(device, 0x00b398, 0x00000000); | |
102 | nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000001); | |
ebb945a9 | 103 | |
636e37aa BS |
104 | nvkm_wr32(device, 0x00b100, 0xffffffff); |
105 | nvkm_wr32(device, 0x00b140, 0xffffffff); | |
ebb945a9 | 106 | |
37eabb03 BS |
107 | if (nvkm_msec(device, 2000, |
108 | if (!(nvkm_rd32(device, 0x00b200) & 0x00000001)) | |
109 | break; | |
110 | ) < 0) { | |
b835c09b BS |
111 | nvkm_error(subdev, "timeout %08x\n", |
112 | nvkm_rd32(device, 0x00b200)); | |
ebb945a9 | 113 | return -EBUSY; |
9548258f | 114 | } |
c0924326 | 115 | |
c0924326 | 116 | return 0; |
c0924326 | 117 | } |
ebb945a9 | 118 | |
7624fc01 BS |
119 | static const struct nvkm_engine_func |
120 | nv50_mpeg = { | |
121 | .init = nv50_mpeg_init, | |
122 | .intr = nv50_mpeg_intr, | |
123 | .cclass = &nv50_mpeg_cclass, | |
124 | .sclass = { | |
125 | { -1, -1, NV31_MPEG, &nv31_mpeg_object }, | |
126 | {} | |
127 | } | |
ebb945a9 | 128 | }; |
7624fc01 BS |
129 | |
130 | int | |
131 | nv50_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg) | |
132 | { | |
56d06fa2 | 133 | return nvkm_engine_new_(&nv50_mpeg, device, index, true, pmpeg); |
7624fc01 | 134 | } |