[deliverable/linux.git] / drivers / gpu / drm / omapdrm / dss / dss_features.h

/*
 * linux/drivers/video/omap2/dss/dss_features.h
 *
 * Copyright (C) 2010 Texas Instruments
 * Author: Archit Taneja <archit@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef __OMAP2_DSS_FEATURES_H
#define __OMAP2_DSS_FEATURES_H

#define MAX_DSS_MANAGERS	4
#define MAX_DSS_OVERLAYS	4
#define MAX_DSS_LCD_MANAGERS	3
#define MAX_NUM_DSI		2

/* DSS has feature id */
enum dss_feat_id {
	FEAT_LCDENABLEPOL,
	FEAT_LCDENABLESIGNAL,
	FEAT_PCKFREEENABLE,
	FEAT_FUNCGATED,
	FEAT_MGR_LCD2,
	FEAT_MGR_LCD3,
	FEAT_LINEBUFFERSPLIT,
	FEAT_ROWREPEATENABLE,
	FEAT_RESIZECONF,
	/* Independent core clk divider */
	FEAT_CORE_CLK_DIV,
	FEAT_LCD_CLK_SRC,
	/* DSI-PLL power command 0x3 is not working */
	FEAT_DSI_PLL_PWR_BUG,
	FEAT_DSI_DCS_CMD_CONFIG_VC,
	FEAT_DSI_VC_OCP_WIDTH,
	FEAT_DSI_REVERSE_TXCLKESC,
	FEAT_DSI_GNQ,
	FEAT_DPI_USES_VDDS_DSI,
	FEAT_HDMI_CTS_SWMODE,
	FEAT_HDMI_AUDIO_USE_MCLK,
	FEAT_HANDLE_UV_SEPARATE,
	FEAT_ATTR2,
	FEAT_VENC_REQUIRES_TV_DAC_CLK,
	FEAT_CPR,
	FEAT_PRELOAD,
	FEAT_FIR_COEF_V,
	FEAT_ALPHA_FIXED_ZORDER,
	FEAT_ALPHA_FREE_ZORDER,
	FEAT_FIFO_MERGE,
	/* An unknown HW bug causing the normal FIFO thresholds not to work */
	FEAT_OMAP3_DSI_FIFO_BUG,
	FEAT_BURST_2D,
	FEAT_DSI_PHY_DCC,
	FEAT_MFLAG,
};

/* DSS register field id */
enum dss_feat_reg_field {
	FEAT_REG_FIRHINC,
	FEAT_REG_FIRVINC,
	FEAT_REG_FIFOHIGHTHRESHOLD,
	FEAT_REG_FIFOLOWTHRESHOLD,
	FEAT_REG_FIFOSIZE,
	FEAT_REG_HORIZONTALACCU,
	FEAT_REG_VERTICALACCU,
	FEAT_REG_DISPC_CLK_SWITCH,
};

enum dss_range_param {
	FEAT_PARAM_DSS_FCK,
	FEAT_PARAM_DSS_PCD,
	FEAT_PARAM_DSIPLL_LPDIV,
	FEAT_PARAM_DSI_FCK,
	FEAT_PARAM_DOWNSCALE,
	FEAT_PARAM_LINEWIDTH,
};

/* DSS Feature Functions */
unsigned long dss_feat_get_param_min(enum dss_range_param param);
unsigned long dss_feat_get_param_max(enum dss_range_param param);
enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane);
bool dss_feat_color_mode_supported(enum omap_plane plane,
		enum omap_color_mode color_mode);
const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id);

u32 dss_feat_get_buffer_size_unit(void);	/* in bytes */
u32 dss_feat_get_burst_size_unit(void);		/* in bytes */

bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type);

bool dss_has_feature(enum dss_feat_id id);
void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
void dss_features_init(enum omapdss_version version);

enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);

#endif
Commit	Line	Data
e1ef4d23 AT	1	/*
	2	* linux/drivers/video/omap2/dss/dss_features.h
	3	*
	4	* Copyright (C) 2010 Texas Instruments
	5	* Author: Archit Taneja <archit@ti.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License version 2 as published by
	9	* the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful, but WITHOUT
	12	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	13	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	14	* more details.
	15	*
	16	* You should have received a copy of the GNU General Public License along with
	17	* this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#ifndef __OMAP2_DSS_FEATURES_H
	21	#define __OMAP2_DSS_FEATURES_H
	22
e86d456a	23	#define MAX_DSS_MANAGERS 4
b8c095b4	24	#define MAX_DSS_OVERLAYS 4
e86d456a	25	#define MAX_DSS_LCD_MANAGERS 3
a72b64b9	26	#define MAX_NUM_DSI 2
e1ef4d23 AT	27
	28	/* DSS has feature id */
	29	enum dss_feat_id {
c124f23d AT	30	FEAT_LCDENABLEPOL,
	31	FEAT_LCDENABLESIGNAL,
	32	FEAT_PCKFREEENABLE,
	33	FEAT_FUNCGATED,
	34	FEAT_MGR_LCD2,
e86d456a	35	FEAT_MGR_LCD3,
c124f23d AT	36	FEAT_LINEBUFFERSPLIT,
	37	FEAT_ROWREPEATENABLE,
	38	FEAT_RESIZECONF,
5c6366e1	39	/* Independent core clk divider */
c124f23d AT	40	FEAT_CORE_CLK_DIV,
c124f23d AT	41	FEAT_LCD_CLK_SRC,
c94dfe05	42	/* DSI-PLL power command 0x3 is not working */
c124f23d	43	FEAT_DSI_PLL_PWR_BUG,
c124f23d AT	44	FEAT_DSI_DCS_CMD_CONFIG_VC,
	45	FEAT_DSI_VC_OCP_WIDTH,
	46	FEAT_DSI_REVERSE_TXCLKESC,
	47	FEAT_DSI_GNQ,
195e672a	48	FEAT_DPI_USES_VDDS_DSI,
c124f23d	49	FEAT_HDMI_CTS_SWMODE,
70988194	50	FEAT_HDMI_AUDIO_USE_MCLK,
c124f23d AT	51	FEAT_HANDLE_UV_SEPARATE,
	52	FEAT_ATTR2,
	53	FEAT_VENC_REQUIRES_TV_DAC_CLK,
	54	FEAT_CPR,
	55	FEAT_PRELOAD,
	56	FEAT_FIR_COEF_V,
	57	FEAT_ALPHA_FIXED_ZORDER,
	58	FEAT_ALPHA_FREE_ZORDER,
	59	FEAT_FIFO_MERGE,
e0e405b9	60	/* An unknown HW bug causing the normal FIFO thresholds not to work */
c124f23d	61	FEAT_OMAP3_DSI_FIFO_BUG,
65e006ff	62	FEAT_BURST_2D,
77ccbfbb	63	FEAT_DSI_PHY_DCC,
29fceeeb	64	FEAT_MFLAG,
e1ef4d23 AT	65	};
	66
	67	/* DSS register field id */
	68	enum dss_feat_reg_field {
	69	FEAT_REG_FIRHINC,
	70	FEAT_REG_FIRVINC,
	71	FEAT_REG_FIFOHIGHTHRESHOLD,
	72	FEAT_REG_FIFOLOWTHRESHOLD,
	73	FEAT_REG_FIFOSIZE,
87a7484b AT	74	FEAT_REG_HORIZONTALACCU,
87a7484b AT	75	FEAT_REG_VERTICALACCU,
ea75159e	76	FEAT_REG_DISPC_CLK_SWITCH,
e1ef4d23 AT	77	};
e1ef4d23 AT	78
31ef8237 TA	79	enum dss_range_param {
31ef8237 TA	80	FEAT_PARAM_DSS_FCK,
9eaaf207	81	FEAT_PARAM_DSS_PCD,
49641116	82	FEAT_PARAM_DSIPLL_LPDIV,
bc63f304	83	FEAT_PARAM_DSI_FCK,
0373cac6	84	FEAT_PARAM_DOWNSCALE,
7282f1b7	85	FEAT_PARAM_LINEWIDTH,
31ef8237 TA	86	};
31ef8237 TA	87
e1ef4d23	88	/* DSS Feature Functions */
31ef8237 TA	89	unsigned long dss_feat_get_param_min(enum dss_range_param param);
31ef8237 TA	90	unsigned long dss_feat_get_param_max(enum dss_range_param param);
67019db8	91	enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane);
8dad2ab6 AT	92	bool dss_feat_color_mode_supported(enum omap_plane plane,
8dad2ab6 AT	93	enum omap_color_mode color_mode);
89a35e51	94	const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id);
e1ef4d23	95
5ed8cf5b TV	96	u32 dss_feat_get_buffer_size_unit(void); /* in bytes */
	97	u32 dss_feat_get_burst_size_unit(void); /* in bytes */
	98
65e006ff CM	99	bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type);
65e006ff CM	100
e1ef4d23 AT	101	bool dss_has_feature(enum dss_feat_id id);
e1ef4d23 AT	102	void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 start, u8 end);
649514c6	103	void dss_features_init(enum omapdss_version version);
98c2835e TV	104
	105	enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
	106	enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
	107
e1ef4d23	108	#endif