Commit | Line | Data |
---|---|---|
cd5351f4 | 1 | /* |
8bb0daff | 2 | * drivers/gpu/drm/omapdrm/omap_fb.c |
cd5351f4 RC |
3 | * |
4 | * Copyright (C) 2011 Texas Instruments | |
5 | * Author: Rob Clark <rob@ti.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License version 2 as published by | |
9 | * the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along with | |
17 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
2d802453 AB |
20 | #include <linux/seq_file.h> |
21 | ||
2d278f54 LP |
22 | #include <drm/drm_crtc.h> |
23 | #include <drm/drm_crtc_helper.h> | |
cd5351f4 | 24 | |
2d278f54 LP |
25 | #include "omap_dmm_tiler.h" |
26 | #include "omap_drv.h" | |
cd5351f4 | 27 | |
cd5351f4 RC |
28 | /* |
29 | * framebuffer funcs | |
30 | */ | |
31 | ||
ae43d7ca RC |
32 | /* per-format info: */ |
33 | struct format { | |
34 | enum omap_color_mode dss_format; | |
35 | uint32_t pixel_format; | |
36 | struct { | |
37 | int stride_bpp; /* this times width is stride */ | |
38 | int sub_y; /* sub-sample in y dimension */ | |
39 | } planes[4]; | |
40 | bool yuv; | |
41 | }; | |
42 | ||
43 | static const struct format formats[] = { | |
44 | /* 16bpp [A]RGB: */ | |
45 | { OMAP_DSS_COLOR_RGB16, DRM_FORMAT_RGB565, {{2, 1}}, false }, /* RGB16-565 */ | |
46 | { OMAP_DSS_COLOR_RGB12U, DRM_FORMAT_RGBX4444, {{2, 1}}, false }, /* RGB12x-4444 */ | |
47 | { OMAP_DSS_COLOR_RGBX16, DRM_FORMAT_XRGB4444, {{2, 1}}, false }, /* xRGB12-4444 */ | |
48 | { OMAP_DSS_COLOR_RGBA16, DRM_FORMAT_RGBA4444, {{2, 1}}, false }, /* RGBA12-4444 */ | |
49 | { OMAP_DSS_COLOR_ARGB16, DRM_FORMAT_ARGB4444, {{2, 1}}, false }, /* ARGB16-4444 */ | |
50 | { OMAP_DSS_COLOR_XRGB16_1555, DRM_FORMAT_XRGB1555, {{2, 1}}, false }, /* xRGB15-1555 */ | |
51 | { OMAP_DSS_COLOR_ARGB16_1555, DRM_FORMAT_ARGB1555, {{2, 1}}, false }, /* ARGB16-1555 */ | |
52 | /* 24bpp RGB: */ | |
53 | { OMAP_DSS_COLOR_RGB24P, DRM_FORMAT_RGB888, {{3, 1}}, false }, /* RGB24-888 */ | |
54 | /* 32bpp [A]RGB: */ | |
55 | { OMAP_DSS_COLOR_RGBX32, DRM_FORMAT_RGBX8888, {{4, 1}}, false }, /* RGBx24-8888 */ | |
56 | { OMAP_DSS_COLOR_RGB24U, DRM_FORMAT_XRGB8888, {{4, 1}}, false }, /* xRGB24-8888 */ | |
57 | { OMAP_DSS_COLOR_RGBA32, DRM_FORMAT_RGBA8888, {{4, 1}}, false }, /* RGBA32-8888 */ | |
58 | { OMAP_DSS_COLOR_ARGB32, DRM_FORMAT_ARGB8888, {{4, 1}}, false }, /* ARGB32-8888 */ | |
59 | /* YUV: */ | |
60 | { OMAP_DSS_COLOR_NV12, DRM_FORMAT_NV12, {{1, 1}, {1, 2}}, true }, | |
61 | { OMAP_DSS_COLOR_YUV2, DRM_FORMAT_YUYV, {{2, 1}}, true }, | |
62 | { OMAP_DSS_COLOR_UYVY, DRM_FORMAT_UYVY, {{2, 1}}, true }, | |
63 | }; | |
64 | ||
a890e662 RC |
65 | /* convert from overlay's pixel formats bitmask to an array of fourcc's */ |
66 | uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats, | |
67 | uint32_t max_formats, enum omap_color_mode supported_modes) | |
68 | { | |
69 | uint32_t nformats = 0; | |
70 | int i = 0; | |
71 | ||
72 | for (i = 0; i < ARRAY_SIZE(formats) && nformats < max_formats; i++) | |
73 | if (formats[i].dss_format & supported_modes) | |
74 | pixel_formats[nformats++] = formats[i].pixel_format; | |
75 | ||
76 | return nformats; | |
77 | } | |
78 | ||
9a0774e0 RC |
79 | /* per-plane info for the fb: */ |
80 | struct plane { | |
81 | struct drm_gem_object *bo; | |
82 | uint32_t pitch; | |
83 | uint32_t offset; | |
84 | dma_addr_t paddr; | |
85 | }; | |
86 | ||
cd5351f4 RC |
87 | #define to_omap_framebuffer(x) container_of(x, struct omap_framebuffer, base) |
88 | ||
89 | struct omap_framebuffer { | |
90 | struct drm_framebuffer base; | |
f36eb5a8 | 91 | int pin_count; |
ae43d7ca | 92 | const struct format *format; |
9a0774e0 | 93 | struct plane planes[4]; |
f524ab7c TV |
94 | /* lock for pinning (pin_count and planes.paddr) */ |
95 | struct mutex lock; | |
cd5351f4 RC |
96 | }; |
97 | ||
98 | static int omap_framebuffer_create_handle(struct drm_framebuffer *fb, | |
99 | struct drm_file *file_priv, | |
100 | unsigned int *handle) | |
101 | { | |
102 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); | |
9a0774e0 RC |
103 | return drm_gem_handle_create(file_priv, |
104 | omap_fb->planes[0].bo, handle); | |
cd5351f4 RC |
105 | } |
106 | ||
107 | static void omap_framebuffer_destroy(struct drm_framebuffer *fb) | |
108 | { | |
cd5351f4 | 109 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); |
9f18c95a | 110 | int i, n = drm_format_num_planes(fb->pixel_format); |
cd5351f4 RC |
111 | |
112 | DBG("destroy: FB ID: %d (%p)", fb->base.id, fb); | |
113 | ||
114 | drm_framebuffer_cleanup(fb); | |
115 | ||
9a0774e0 RC |
116 | for (i = 0; i < n; i++) { |
117 | struct plane *plane = &omap_fb->planes[i]; | |
76e4c327 ME |
118 | |
119 | drm_gem_object_unreference_unlocked(plane->bo); | |
cd5351f4 RC |
120 | } |
121 | ||
122 | kfree(omap_fb); | |
123 | } | |
124 | ||
cd5351f4 RC |
125 | static const struct drm_framebuffer_funcs omap_framebuffer_funcs = { |
126 | .create_handle = omap_framebuffer_create_handle, | |
127 | .destroy = omap_framebuffer_destroy, | |
cd5351f4 RC |
128 | }; |
129 | ||
3c810c61 RC |
130 | static uint32_t get_linear_addr(struct plane *plane, |
131 | const struct format *format, int n, int x, int y) | |
132 | { | |
133 | uint32_t offset; | |
134 | ||
135 | offset = plane->offset + | |
136 | (x * format->planes[n].stride_bpp) + | |
137 | (y * plane->pitch / format->planes[n].sub_y); | |
138 | ||
139 | return plane->paddr + offset; | |
140 | } | |
141 | ||
bfeece55 TV |
142 | bool omap_framebuffer_supports_rotation(struct drm_framebuffer *fb) |
143 | { | |
144 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); | |
145 | struct plane *plane = &omap_fb->planes[0]; | |
146 | ||
147 | return omap_gem_flags(plane->bo) & OMAP_BO_TILED; | |
148 | } | |
149 | ||
9a0774e0 RC |
150 | /* update ovl info for scanout, handles cases of multi-planar fb's, etc. |
151 | */ | |
3c810c61 RC |
152 | void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, |
153 | struct omap_drm_window *win, struct omap_overlay_info *info) | |
9a0774e0 RC |
154 | { |
155 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); | |
156 | const struct format *format = omap_fb->format; | |
157 | struct plane *plane = &omap_fb->planes[0]; | |
3c810c61 RC |
158 | uint32_t x, y, orient = 0; |
159 | ||
160 | info->color_mode = format->dss_format; | |
161 | ||
162 | info->pos_x = win->crtc_x; | |
163 | info->pos_y = win->crtc_y; | |
164 | info->out_width = win->crtc_w; | |
165 | info->out_height = win->crtc_h; | |
166 | info->width = win->src_w; | |
167 | info->height = win->src_h; | |
168 | ||
169 | x = win->src_x; | |
170 | y = win->src_y; | |
171 | ||
172 | if (omap_gem_flags(plane->bo) & OMAP_BO_TILED) { | |
173 | uint32_t w = win->src_w; | |
174 | uint32_t h = win->src_h; | |
175 | ||
14152c8d | 176 | switch (win->rotation & DRM_ROTATE_MASK) { |
3c810c61 RC |
177 | default: |
178 | dev_err(fb->dev->dev, "invalid rotation: %02x", | |
179 | (uint32_t)win->rotation); | |
180 | /* fallthru to default to no rotation */ | |
181 | case 0: | |
182 | case BIT(DRM_ROTATE_0): | |
183 | orient = 0; | |
184 | break; | |
185 | case BIT(DRM_ROTATE_90): | |
186 | orient = MASK_XY_FLIP | MASK_X_INVERT; | |
187 | break; | |
188 | case BIT(DRM_ROTATE_180): | |
189 | orient = MASK_X_INVERT | MASK_Y_INVERT; | |
190 | break; | |
191 | case BIT(DRM_ROTATE_270): | |
192 | orient = MASK_XY_FLIP | MASK_Y_INVERT; | |
193 | break; | |
194 | } | |
9a0774e0 | 195 | |
3c810c61 RC |
196 | if (win->rotation & BIT(DRM_REFLECT_X)) |
197 | orient ^= MASK_X_INVERT; | |
198 | ||
199 | if (win->rotation & BIT(DRM_REFLECT_Y)) | |
200 | orient ^= MASK_Y_INVERT; | |
201 | ||
202 | /* adjust x,y offset for flip/invert: */ | |
203 | if (orient & MASK_XY_FLIP) | |
204 | swap(w, h); | |
205 | if (orient & MASK_Y_INVERT) | |
206 | y += h - 1; | |
207 | if (orient & MASK_X_INVERT) | |
208 | x += w - 1; | |
9a0774e0 | 209 | |
3c810c61 RC |
210 | omap_gem_rotated_paddr(plane->bo, orient, x, y, &info->paddr); |
211 | info->rotation_type = OMAP_DSS_ROT_TILER; | |
212 | info->screen_width = omap_gem_tiled_stride(plane->bo, orient); | |
213 | } else { | |
14152c8d | 214 | switch (win->rotation & DRM_ROTATE_MASK) { |
5ac96345 TV |
215 | case 0: |
216 | case BIT(DRM_ROTATE_0): | |
217 | /* OK */ | |
218 | break; | |
219 | ||
220 | default: | |
221 | dev_warn(fb->dev->dev, | |
222 | "rotation '%d' ignored for non-tiled fb\n", | |
223 | win->rotation); | |
224 | win->rotation = 0; | |
225 | break; | |
226 | } | |
227 | ||
3c810c61 RC |
228 | info->paddr = get_linear_addr(plane, format, 0, x, y); |
229 | info->rotation_type = OMAP_DSS_ROT_DMA; | |
230 | info->screen_width = plane->pitch; | |
231 | } | |
232 | ||
233 | /* convert to pixels: */ | |
234 | info->screen_width /= format->planes[0].stride_bpp; | |
9a0774e0 RC |
235 | |
236 | if (format->dss_format == OMAP_DSS_COLOR_NV12) { | |
237 | plane = &omap_fb->planes[1]; | |
3c810c61 RC |
238 | |
239 | if (info->rotation_type == OMAP_DSS_ROT_TILER) { | |
240 | WARN_ON(!(omap_gem_flags(plane->bo) & OMAP_BO_TILED)); | |
241 | omap_gem_rotated_paddr(plane->bo, orient, | |
242 | x/2, y/2, &info->p_uv_addr); | |
243 | } else { | |
244 | info->p_uv_addr = get_linear_addr(plane, format, 1, x, y); | |
245 | } | |
9a0774e0 RC |
246 | } else { |
247 | info->p_uv_addr = 0; | |
248 | } | |
249 | } | |
250 | ||
5833bd2f RC |
251 | /* pin, prepare for scanout: */ |
252 | int omap_framebuffer_pin(struct drm_framebuffer *fb) | |
b33f34d3 | 253 | { |
5833bd2f RC |
254 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); |
255 | int ret, i, n = drm_format_num_planes(fb->pixel_format); | |
256 | ||
f524ab7c TV |
257 | mutex_lock(&omap_fb->lock); |
258 | ||
f36eb5a8 TV |
259 | if (omap_fb->pin_count > 0) { |
260 | omap_fb->pin_count++; | |
f524ab7c | 261 | mutex_unlock(&omap_fb->lock); |
f36eb5a8 TV |
262 | return 0; |
263 | } | |
264 | ||
5833bd2f RC |
265 | for (i = 0; i < n; i++) { |
266 | struct plane *plane = &omap_fb->planes[i]; | |
267 | ret = omap_gem_get_paddr(plane->bo, &plane->paddr, true); | |
268 | if (ret) | |
269 | goto fail; | |
270 | omap_gem_dma_sync(plane->bo, DMA_TO_DEVICE); | |
271 | } | |
b33f34d3 | 272 | |
f36eb5a8 TV |
273 | omap_fb->pin_count++; |
274 | ||
f524ab7c TV |
275 | mutex_unlock(&omap_fb->lock); |
276 | ||
5833bd2f | 277 | return 0; |
b33f34d3 | 278 | |
5833bd2f RC |
279 | fail: |
280 | for (i--; i >= 0; i--) { | |
281 | struct plane *plane = &omap_fb->planes[i]; | |
282 | omap_gem_put_paddr(plane->bo); | |
283 | plane->paddr = 0; | |
284 | } | |
b33f34d3 | 285 | |
f524ab7c TV |
286 | mutex_unlock(&omap_fb->lock); |
287 | ||
5833bd2f RC |
288 | return ret; |
289 | } | |
b33f34d3 | 290 | |
5833bd2f | 291 | /* unpin, no longer being scanned out: */ |
9c368506 | 292 | void omap_framebuffer_unpin(struct drm_framebuffer *fb) |
5833bd2f RC |
293 | { |
294 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); | |
9c368506 | 295 | int i, n = drm_format_num_planes(fb->pixel_format); |
b33f34d3 | 296 | |
f524ab7c TV |
297 | mutex_lock(&omap_fb->lock); |
298 | ||
f36eb5a8 TV |
299 | omap_fb->pin_count--; |
300 | ||
f524ab7c TV |
301 | if (omap_fb->pin_count > 0) { |
302 | mutex_unlock(&omap_fb->lock); | |
9c368506 | 303 | return; |
f524ab7c | 304 | } |
f36eb5a8 | 305 | |
5833bd2f RC |
306 | for (i = 0; i < n; i++) { |
307 | struct plane *plane = &omap_fb->planes[i]; | |
9c368506 | 308 | omap_gem_put_paddr(plane->bo); |
5833bd2f | 309 | plane->paddr = 0; |
b33f34d3 RC |
310 | } |
311 | ||
f524ab7c | 312 | mutex_unlock(&omap_fb->lock); |
b33f34d3 RC |
313 | } |
314 | ||
cd5351f4 RC |
315 | /* iterate thru all the connectors, returning ones that are attached |
316 | * to the same fb.. | |
317 | */ | |
318 | struct drm_connector *omap_framebuffer_get_next_connector( | |
319 | struct drm_framebuffer *fb, struct drm_connector *from) | |
320 | { | |
321 | struct drm_device *dev = fb->dev; | |
322 | struct list_head *connector_list = &dev->mode_config.connector_list; | |
323 | struct drm_connector *connector = from; | |
324 | ||
ddcd49ed | 325 | if (!from) |
06fb220b LP |
326 | return list_first_entry_or_null(connector_list, typeof(*from), |
327 | head); | |
cd5351f4 RC |
328 | |
329 | list_for_each_entry_from(connector, connector_list, head) { | |
330 | if (connector != from) { | |
331 | struct drm_encoder *encoder = connector->encoder; | |
332 | struct drm_crtc *crtc = encoder ? encoder->crtc : NULL; | |
f4510a27 | 333 | if (crtc && crtc->primary->fb == fb) |
cd5351f4 | 334 | return connector; |
ddcd49ed | 335 | |
cd5351f4 RC |
336 | } |
337 | } | |
338 | ||
339 | return NULL; | |
340 | } | |
cd5351f4 | 341 | |
f6b6036e RC |
342 | #ifdef CONFIG_DEBUG_FS |
343 | void omap_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m) | |
344 | { | |
345 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); | |
346 | int i, n = drm_format_num_planes(fb->pixel_format); | |
347 | ||
348 | seq_printf(m, "fb: %dx%d@%4.4s\n", fb->width, fb->height, | |
349 | (char *)&fb->pixel_format); | |
350 | ||
351 | for (i = 0; i < n; i++) { | |
352 | struct plane *plane = &omap_fb->planes[i]; | |
353 | seq_printf(m, " %d: offset=%d pitch=%d, obj: ", | |
354 | i, plane->offset, plane->pitch); | |
355 | omap_gem_describe(plane->bo, m); | |
356 | } | |
357 | } | |
358 | #endif | |
359 | ||
cd5351f4 | 360 | struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev, |
1eb83451 | 361 | struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd) |
cd5351f4 | 362 | { |
ae43d7ca | 363 | struct drm_gem_object *bos[4]; |
cd5351f4 | 364 | struct drm_framebuffer *fb; |
ae43d7ca RC |
365 | int ret; |
366 | ||
a8ad0bd8 | 367 | ret = objects_lookup(file, mode_cmd->pixel_format, |
ae43d7ca RC |
368 | bos, mode_cmd->handles); |
369 | if (ret) | |
370 | return ERR_PTR(ret); | |
371 | ||
372 | fb = omap_framebuffer_init(dev, mode_cmd, bos); | |
373 | if (IS_ERR(fb)) { | |
374 | int i, n = drm_format_num_planes(mode_cmd->pixel_format); | |
375 | for (i = 0; i < n; i++) | |
376 | drm_gem_object_unreference_unlocked(bos[i]); | |
377 | return fb; | |
cd5351f4 RC |
378 | } |
379 | return fb; | |
380 | } | |
381 | ||
382 | struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev, | |
1eb83451 | 383 | const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos) |
cd5351f4 | 384 | { |
925e4940 | 385 | struct omap_framebuffer *omap_fb = NULL; |
cd5351f4 | 386 | struct drm_framebuffer *fb = NULL; |
ae43d7ca | 387 | const struct format *format = NULL; |
9a0774e0 | 388 | int ret, i, n = drm_format_num_planes(mode_cmd->pixel_format); |
cd5351f4 | 389 | |
ae43d7ca | 390 | DBG("create framebuffer: dev=%p, mode_cmd=%p (%dx%d@%4.4s)", |
cd5351f4 | 391 | dev, mode_cmd, mode_cmd->width, mode_cmd->height, |
ae43d7ca RC |
392 | (char *)&mode_cmd->pixel_format); |
393 | ||
394 | for (i = 0; i < ARRAY_SIZE(formats); i++) { | |
395 | if (formats[i].pixel_format == mode_cmd->pixel_format) { | |
396 | format = &formats[i]; | |
397 | break; | |
398 | } | |
399 | } | |
400 | ||
401 | if (!format) { | |
402 | dev_err(dev->dev, "unsupported pixel format: %4.4s\n", | |
403 | (char *)&mode_cmd->pixel_format); | |
404 | ret = -EINVAL; | |
405 | goto fail; | |
406 | } | |
cd5351f4 | 407 | |
cd5351f4 RC |
408 | omap_fb = kzalloc(sizeof(*omap_fb), GFP_KERNEL); |
409 | if (!omap_fb) { | |
ae43d7ca | 410 | ret = -ENOMEM; |
cd5351f4 RC |
411 | goto fail; |
412 | } | |
413 | ||
414 | fb = &omap_fb->base; | |
9a0774e0 | 415 | omap_fb->format = format; |
f524ab7c | 416 | mutex_init(&omap_fb->lock); |
cd5351f4 | 417 | |
9a0774e0 RC |
418 | for (i = 0; i < n; i++) { |
419 | struct plane *plane = &omap_fb->planes[i]; | |
420 | int size, pitch = mode_cmd->pitches[i]; | |
cd5351f4 | 421 | |
9a0774e0 RC |
422 | if (pitch < (mode_cmd->width * format->planes[i].stride_bpp)) { |
423 | dev_err(dev->dev, "provided buffer pitch is too small! %d < %d\n", | |
424 | pitch, mode_cmd->width * format->planes[i].stride_bpp); | |
425 | ret = -EINVAL; | |
426 | goto fail; | |
427 | } | |
cd5351f4 | 428 | |
2dab0bab TV |
429 | if (pitch % format->planes[i].stride_bpp != 0) { |
430 | dev_err(dev->dev, | |
431 | "buffer pitch (%d bytes) is not a multiple of pixel size (%d bytes)\n", | |
432 | pitch, format->planes[i].stride_bpp); | |
433 | ret = -EINVAL; | |
434 | goto fail; | |
435 | } | |
436 | ||
9a0774e0 RC |
437 | size = pitch * mode_cmd->height / format->planes[i].sub_y; |
438 | ||
3c810c61 | 439 | if (size > (omap_gem_mmap_size(bos[i]) - mode_cmd->offsets[i])) { |
9a0774e0 RC |
440 | dev_err(dev->dev, "provided buffer object is too small! %d < %d\n", |
441 | bos[i]->size - mode_cmd->offsets[i], size); | |
442 | ret = -EINVAL; | |
443 | goto fail; | |
444 | } | |
445 | ||
be4f235c TV |
446 | if (i > 0 && pitch != mode_cmd->pitches[i - 1]) { |
447 | dev_err(dev->dev, | |
448 | "pitches are not the same between framebuffer planes %d != %d\n", | |
449 | pitch, mode_cmd->pitches[i - 1]); | |
450 | ret = -EINVAL; | |
451 | goto fail; | |
452 | } | |
453 | ||
9a0774e0 RC |
454 | plane->bo = bos[i]; |
455 | plane->offset = mode_cmd->offsets[i]; | |
9f18c95a RC |
456 | plane->pitch = pitch; |
457 | plane->paddr = 0; | |
cd5351f4 RC |
458 | } |
459 | ||
460 | drm_helper_mode_fill_fb_struct(fb, mode_cmd); | |
461 | ||
c7d73f6a DV |
462 | ret = drm_framebuffer_init(dev, fb, &omap_framebuffer_funcs); |
463 | if (ret) { | |
464 | dev_err(dev->dev, "framebuffer init failed: %d\n", ret); | |
465 | goto fail; | |
466 | } | |
467 | ||
468 | DBG("create: FB ID: %d (%p)", fb->base.id, fb); | |
469 | ||
cd5351f4 RC |
470 | return fb; |
471 | ||
472 | fail: | |
925e4940 | 473 | kfree(omap_fb); |
ddcd49ed | 474 | |
ae43d7ca | 475 | return ERR_PTR(ret); |
cd5351f4 | 476 | } |