Commit | Line | Data |
---|---|---|
bb5c2d9a | 1 | /* |
8bb0daff | 2 | * drivers/gpu/drm/omapdrm/omap_plane.c |
bb5c2d9a RC |
3 | * |
4 | * Copyright (C) 2011 Texas Instruments | |
5 | * Author: Rob Clark <rob.clark@linaro.org> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License version 2 as published by | |
9 | * the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along with | |
17 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
5833bd2f | 20 | #include "drm_flip_work.h" |
b33f34d3 | 21 | |
bb5c2d9a | 22 | #include "omap_drv.h" |
3c810c61 | 23 | #include "omap_dmm_tiler.h" |
bb5c2d9a RC |
24 | |
25 | /* some hackery because omapdss has an 'enum omap_plane' (which would be | |
26 | * better named omap_plane_id).. and compiler seems unhappy about having | |
27 | * both a 'struct omap_plane' and 'enum omap_plane' | |
28 | */ | |
29 | #define omap_plane _omap_plane | |
30 | ||
31 | /* | |
32 | * plane funcs | |
33 | */ | |
34 | ||
72d0c336 RC |
35 | struct callback { |
36 | void (*fxn)(void *); | |
37 | void *arg; | |
38 | }; | |
39 | ||
bb5c2d9a RC |
40 | #define to_omap_plane(x) container_of(x, struct omap_plane, base) |
41 | ||
42 | struct omap_plane { | |
43 | struct drm_plane base; | |
f5f9454c RC |
44 | int id; /* TODO rename omap_plane -> omap_plane_id in omapdss so I can use the enum */ |
45 | const char *name; | |
bb5c2d9a | 46 | struct omap_overlay_info info; |
f5f9454c | 47 | struct omap_drm_apply apply; |
bb5c2d9a | 48 | |
3c810c61 RC |
49 | /* position/orientation of scanout within the fb: */ |
50 | struct omap_drm_window win; | |
f5f9454c | 51 | bool enabled; |
9a0774e0 RC |
52 | |
53 | /* last fb that we pinned: */ | |
54 | struct drm_framebuffer *pinned_fb; | |
bb5c2d9a | 55 | |
a890e662 RC |
56 | uint32_t nformats; |
57 | uint32_t formats[32]; | |
b33f34d3 | 58 | |
f5f9454c | 59 | struct omap_drm_irq error_irq; |
b33f34d3 | 60 | |
5833bd2f RC |
61 | /* for deferring bo unpin's until next post_apply(): */ |
62 | struct drm_flip_work unpin_work; | |
b33f34d3 | 63 | |
f5f9454c RC |
64 | // XXX maybe get rid of this and handle vblank in crtc too? |
65 | struct callback apply_done_cb; | |
a890e662 | 66 | }; |
bb5c2d9a | 67 | |
5833bd2f | 68 | static void unpin_worker(struct drm_flip_work *work, void *val) |
b33f34d3 | 69 | { |
5833bd2f RC |
70 | struct omap_plane *omap_plane = |
71 | container_of(work, struct omap_plane, unpin_work); | |
72 | struct drm_device *dev = omap_plane->base.dev; | |
b33f34d3 | 73 | |
5833bd2f RC |
74 | omap_framebuffer_unpin(val); |
75 | mutex_lock(&dev->mode_config.mutex); | |
76 | drm_framebuffer_unreference(val); | |
77 | mutex_unlock(&dev->mode_config.mutex); | |
b33f34d3 RC |
78 | } |
79 | ||
9a0774e0 RC |
80 | /* update which fb (if any) is pinned for scanout */ |
81 | static int update_pin(struct drm_plane *plane, struct drm_framebuffer *fb) | |
82 | { | |
83 | struct omap_plane *omap_plane = to_omap_plane(plane); | |
b33f34d3 RC |
84 | struct drm_framebuffer *pinned_fb = omap_plane->pinned_fb; |
85 | ||
86 | if (pinned_fb != fb) { | |
5833bd2f | 87 | int ret = 0; |
b33f34d3 RC |
88 | |
89 | DBG("%p -> %p", pinned_fb, fb); | |
90 | ||
5833bd2f | 91 | if (fb) { |
f5f9454c | 92 | drm_framebuffer_reference(fb); |
5833bd2f RC |
93 | ret = omap_framebuffer_pin(fb); |
94 | } | |
f5f9454c RC |
95 | |
96 | if (pinned_fb) | |
5833bd2f | 97 | drm_flip_work_queue(&omap_plane->unpin_work, pinned_fb); |
b33f34d3 RC |
98 | |
99 | if (ret) { | |
100 | dev_err(plane->dev->dev, "could not swap %p -> %p\n", | |
101 | omap_plane->pinned_fb, fb); | |
5833bd2f | 102 | drm_framebuffer_unreference(fb); |
b33f34d3 RC |
103 | omap_plane->pinned_fb = NULL; |
104 | return ret; | |
105 | } | |
9a0774e0 | 106 | |
9a0774e0 | 107 | omap_plane->pinned_fb = fb; |
9a0774e0 RC |
108 | } |
109 | ||
b33f34d3 | 110 | return 0; |
9a0774e0 RC |
111 | } |
112 | ||
f5f9454c | 113 | static void omap_plane_pre_apply(struct omap_drm_apply *apply) |
bb5c2d9a | 114 | { |
f5f9454c RC |
115 | struct omap_plane *omap_plane = |
116 | container_of(apply, struct omap_plane, apply); | |
3c810c61 | 117 | struct omap_drm_window *win = &omap_plane->win; |
f5f9454c RC |
118 | struct drm_plane *plane = &omap_plane->base; |
119 | struct drm_device *dev = plane->dev; | |
120 | struct omap_overlay_info *info = &omap_plane->info; | |
121 | struct drm_crtc *crtc = plane->crtc; | |
122 | enum omap_channel channel; | |
123 | bool enabled = omap_plane->enabled && crtc; | |
9a0774e0 | 124 | int ret; |
bb5c2d9a | 125 | |
f5f9454c RC |
126 | DBG("%s, enabled=%d", omap_plane->name, enabled); |
127 | ||
128 | /* if fb has changed, pin new fb: */ | |
129 | update_pin(plane, enabled ? plane->fb : NULL); | |
130 | ||
131 | if (!enabled) { | |
132 | dispc_ovl_enable(omap_plane->id, false); | |
2f53700d | 133 | return; |
9a0774e0 | 134 | } |
bb5c2d9a | 135 | |
f5f9454c RC |
136 | channel = omap_crtc_channel(crtc); |
137 | ||
138 | /* update scanout: */ | |
3c810c61 | 139 | omap_framebuffer_update_scanout(plane->fb, win, info); |
bb5c2d9a | 140 | |
f5f9454c RC |
141 | DBG("%dx%d -> %dx%d (%d)", info->width, info->height, |
142 | info->out_width, info->out_height, | |
9a0774e0 | 143 | info->screen_width); |
2d31ca3a RK |
144 | DBG("%d,%d %pad %pad", info->pos_x, info->pos_y, |
145 | &info->paddr, &info->p_uv_addr); | |
f5f9454c | 146 | |
f5f9454c | 147 | /* and finally, update omapdss: */ |
9c660b7c LP |
148 | ret = dispc_ovl_setup(omap_plane->id, info, false, |
149 | omap_crtc_timings(crtc), false); | |
f5f9454c RC |
150 | if (ret) { |
151 | dev_err(dev->dev, "dispc_ovl_setup failed: %d\n", ret); | |
152 | return; | |
153 | } | |
154 | ||
155 | dispc_ovl_enable(omap_plane->id, true); | |
156 | dispc_ovl_set_channel_out(omap_plane->id, channel); | |
157 | } | |
158 | ||
159 | static void omap_plane_post_apply(struct omap_drm_apply *apply) | |
160 | { | |
161 | struct omap_plane *omap_plane = | |
162 | container_of(apply, struct omap_plane, apply); | |
163 | struct drm_plane *plane = &omap_plane->base; | |
5833bd2f | 164 | struct omap_drm_private *priv = plane->dev->dev_private; |
f5f9454c | 165 | struct omap_overlay_info *info = &omap_plane->info; |
f5f9454c RC |
166 | struct callback cb; |
167 | ||
168 | cb = omap_plane->apply_done_cb; | |
169 | omap_plane->apply_done_cb.fxn = NULL; | |
170 | ||
5833bd2f | 171 | drm_flip_work_commit(&omap_plane->unpin_work, priv->wq); |
f5f9454c RC |
172 | |
173 | if (cb.fxn) | |
174 | cb.fxn(cb.arg); | |
175 | ||
176 | if (omap_plane->enabled) { | |
177 | omap_framebuffer_flush(plane->fb, info->pos_x, info->pos_y, | |
178 | info->out_width, info->out_height); | |
179 | } | |
180 | } | |
181 | ||
182 | static int apply(struct drm_plane *plane) | |
183 | { | |
184 | if (plane->crtc) { | |
185 | struct omap_plane *omap_plane = to_omap_plane(plane); | |
186 | return omap_crtc_apply(plane->crtc, &omap_plane->apply); | |
187 | } | |
188 | return 0; | |
bb5c2d9a RC |
189 | } |
190 | ||
2f53700d | 191 | int omap_plane_mode_set(struct drm_plane *plane, |
bb5c2d9a RC |
192 | struct drm_crtc *crtc, struct drm_framebuffer *fb, |
193 | int crtc_x, int crtc_y, | |
194 | unsigned int crtc_w, unsigned int crtc_h, | |
195 | uint32_t src_x, uint32_t src_y, | |
f5f9454c RC |
196 | uint32_t src_w, uint32_t src_h, |
197 | void (*fxn)(void *), void *arg) | |
bb5c2d9a RC |
198 | { |
199 | struct omap_plane *omap_plane = to_omap_plane(plane); | |
3c810c61 RC |
200 | struct omap_drm_window *win = &omap_plane->win; |
201 | ||
202 | win->crtc_x = crtc_x; | |
203 | win->crtc_y = crtc_y; | |
204 | win->crtc_w = crtc_w; | |
205 | win->crtc_h = crtc_h; | |
bb5c2d9a RC |
206 | |
207 | /* src values are in Q16 fixed point, convert to integer: */ | |
3c810c61 RC |
208 | win->src_x = src_x >> 16; |
209 | win->src_y = src_y >> 16; | |
210 | win->src_w = src_w >> 16; | |
211 | win->src_h = src_h >> 16; | |
bb5c2d9a | 212 | |
f5f9454c RC |
213 | if (fxn) { |
214 | /* omap_crtc should ensure that a new page flip | |
215 | * isn't permitted while there is one pending: | |
216 | */ | |
217 | BUG_ON(omap_plane->apply_done_cb.fxn); | |
218 | ||
219 | omap_plane->apply_done_cb.fxn = fxn; | |
220 | omap_plane->apply_done_cb.arg = arg; | |
221 | } | |
222 | ||
f2d022aa TV |
223 | if (plane->fb) |
224 | drm_framebuffer_unreference(plane->fb); | |
225 | ||
226 | drm_framebuffer_reference(fb); | |
227 | ||
bb5c2d9a RC |
228 | plane->fb = fb; |
229 | plane->crtc = crtc; | |
230 | ||
f5f9454c | 231 | return apply(plane); |
bb5c2d9a RC |
232 | } |
233 | ||
2f53700d RC |
234 | static int omap_plane_update(struct drm_plane *plane, |
235 | struct drm_crtc *crtc, struct drm_framebuffer *fb, | |
236 | int crtc_x, int crtc_y, | |
237 | unsigned int crtc_w, unsigned int crtc_h, | |
238 | uint32_t src_x, uint32_t src_y, | |
239 | uint32_t src_w, uint32_t src_h) | |
240 | { | |
f5f9454c RC |
241 | struct omap_plane *omap_plane = to_omap_plane(plane); |
242 | omap_plane->enabled = true; | |
b03e14fd | 243 | |
d4586604 GI |
244 | /* omap_plane_mode_set() takes adjusted src */ |
245 | switch (omap_plane->win.rotation & 0xf) { | |
246 | case BIT(DRM_ROTATE_90): | |
247 | case BIT(DRM_ROTATE_270): | |
248 | swap(src_w, src_h); | |
249 | break; | |
250 | } | |
251 | ||
f5f9454c RC |
252 | return omap_plane_mode_set(plane, crtc, fb, |
253 | crtc_x, crtc_y, crtc_w, crtc_h, | |
254 | src_x, src_y, src_w, src_h, | |
255 | NULL, NULL); | |
2f53700d RC |
256 | } |
257 | ||
bb5c2d9a RC |
258 | static int omap_plane_disable(struct drm_plane *plane) |
259 | { | |
3c810c61 RC |
260 | struct omap_plane *omap_plane = to_omap_plane(plane); |
261 | omap_plane->win.rotation = BIT(DRM_ROTATE_0); | |
bb5c2d9a RC |
262 | return omap_plane_dpms(plane, DRM_MODE_DPMS_OFF); |
263 | } | |
264 | ||
265 | static void omap_plane_destroy(struct drm_plane *plane) | |
266 | { | |
267 | struct omap_plane *omap_plane = to_omap_plane(plane); | |
f5f9454c RC |
268 | |
269 | DBG("%s", omap_plane->name); | |
270 | ||
271 | omap_irq_unregister(plane->dev, &omap_plane->error_irq); | |
272 | ||
bb5c2d9a RC |
273 | omap_plane_disable(plane); |
274 | drm_plane_cleanup(plane); | |
f5f9454c | 275 | |
5833bd2f | 276 | drm_flip_work_cleanup(&omap_plane->unpin_work); |
f5f9454c | 277 | |
bb5c2d9a RC |
278 | kfree(omap_plane); |
279 | } | |
280 | ||
281 | int omap_plane_dpms(struct drm_plane *plane, int mode) | |
282 | { | |
283 | struct omap_plane *omap_plane = to_omap_plane(plane); | |
f5f9454c RC |
284 | bool enabled = (mode == DRM_MODE_DPMS_ON); |
285 | int ret = 0; | |
bb5c2d9a | 286 | |
f5f9454c RC |
287 | if (enabled != omap_plane->enabled) { |
288 | omap_plane->enabled = enabled; | |
289 | ret = apply(plane); | |
bb5c2d9a RC |
290 | } |
291 | ||
f5f9454c | 292 | return ret; |
72d0c336 RC |
293 | } |
294 | ||
3c810c61 RC |
295 | /* helper to install properties which are common to planes and crtcs */ |
296 | void omap_plane_install_properties(struct drm_plane *plane, | |
297 | struct drm_mode_object *obj) | |
298 | { | |
299 | struct drm_device *dev = plane->dev; | |
300 | struct omap_drm_private *priv = dev->dev_private; | |
301 | struct drm_property *prop; | |
302 | ||
c2a6a552 RC |
303 | if (priv->has_dmm) { |
304 | prop = priv->rotation_prop; | |
305 | if (!prop) { | |
a4969dd7 VS |
306 | prop = drm_mode_create_rotation_property(dev, |
307 | BIT(DRM_ROTATE_0) | | |
308 | BIT(DRM_ROTATE_90) | | |
309 | BIT(DRM_ROTATE_180) | | |
310 | BIT(DRM_ROTATE_270) | | |
311 | BIT(DRM_REFLECT_X) | | |
312 | BIT(DRM_REFLECT_Y)); | |
c2a6a552 RC |
313 | if (prop == NULL) |
314 | return; | |
315 | priv->rotation_prop = prop; | |
316 | } | |
317 | drm_object_attach_property(obj, prop, 0); | |
3c810c61 | 318 | } |
8451b5ad | 319 | |
c17d37df YT |
320 | prop = priv->zorder_prop; |
321 | if (!prop) { | |
8451b5ad AR |
322 | prop = drm_property_create_range(dev, 0, "zorder", 0, 3); |
323 | if (prop == NULL) | |
324 | return; | |
325 | priv->zorder_prop = prop; | |
326 | } | |
327 | drm_object_attach_property(obj, prop, 0); | |
3c810c61 RC |
328 | } |
329 | ||
330 | int omap_plane_set_property(struct drm_plane *plane, | |
331 | struct drm_property *property, uint64_t val) | |
332 | { | |
333 | struct omap_plane *omap_plane = to_omap_plane(plane); | |
334 | struct omap_drm_private *priv = plane->dev->dev_private; | |
335 | int ret = -EINVAL; | |
336 | ||
337 | if (property == priv->rotation_prop) { | |
f5f9454c | 338 | DBG("%s: rotation: %02x", omap_plane->name, (uint32_t)val); |
3c810c61 | 339 | omap_plane->win.rotation = val; |
f5f9454c | 340 | ret = apply(plane); |
8451b5ad | 341 | } else if (property == priv->zorder_prop) { |
f5f9454c | 342 | DBG("%s: zorder: %02x", omap_plane->name, (uint32_t)val); |
8451b5ad | 343 | omap_plane->info.zorder = val; |
f5f9454c | 344 | ret = apply(plane); |
3c810c61 RC |
345 | } |
346 | ||
347 | return ret; | |
348 | } | |
349 | ||
bb5c2d9a | 350 | static const struct drm_plane_funcs omap_plane_funcs = { |
222025e4 LP |
351 | .update_plane = omap_plane_update, |
352 | .disable_plane = omap_plane_disable, | |
353 | .destroy = omap_plane_destroy, | |
354 | .set_property = omap_plane_set_property, | |
bb5c2d9a RC |
355 | }; |
356 | ||
f5f9454c RC |
357 | static void omap_plane_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus) |
358 | { | |
359 | struct omap_plane *omap_plane = | |
360 | container_of(irq, struct omap_plane, error_irq); | |
361 | DRM_ERROR("%s: errors: %08x\n", omap_plane->name, irqstatus); | |
362 | } | |
363 | ||
364 | static const char *plane_names[] = { | |
222025e4 LP |
365 | [OMAP_DSS_GFX] = "gfx", |
366 | [OMAP_DSS_VIDEO1] = "vid1", | |
367 | [OMAP_DSS_VIDEO2] = "vid2", | |
368 | [OMAP_DSS_VIDEO3] = "vid3", | |
f5f9454c RC |
369 | }; |
370 | ||
371 | static const uint32_t error_irqs[] = { | |
222025e4 LP |
372 | [OMAP_DSS_GFX] = DISPC_IRQ_GFX_FIFO_UNDERFLOW, |
373 | [OMAP_DSS_VIDEO1] = DISPC_IRQ_VID1_FIFO_UNDERFLOW, | |
374 | [OMAP_DSS_VIDEO2] = DISPC_IRQ_VID2_FIFO_UNDERFLOW, | |
375 | [OMAP_DSS_VIDEO3] = DISPC_IRQ_VID3_FIFO_UNDERFLOW, | |
f5f9454c RC |
376 | }; |
377 | ||
bb5c2d9a RC |
378 | /* initialize plane */ |
379 | struct drm_plane *omap_plane_init(struct drm_device *dev, | |
f5f9454c | 380 | int id, bool private_plane) |
bb5c2d9a | 381 | { |
f5f9454c | 382 | struct omap_drm_private *priv = dev->dev_private; |
bb5c2d9a RC |
383 | struct drm_plane *plane = NULL; |
384 | struct omap_plane *omap_plane; | |
f5f9454c | 385 | struct omap_overlay_info *info; |
bb5c2d9a | 386 | |
f5f9454c | 387 | DBG("%s: priv=%d", plane_names[id], private_plane); |
b33f34d3 | 388 | |
bb5c2d9a | 389 | omap_plane = kzalloc(sizeof(*omap_plane), GFP_KERNEL); |
78110bb8 | 390 | if (!omap_plane) |
fb9a35f8 | 391 | return ERR_PTR(-ENOMEM); |
bb5c2d9a | 392 | |
d7f8db53 | 393 | drm_flip_work_init(&omap_plane->unpin_work, |
5833bd2f | 394 | "unpin", unpin_worker); |
b33f34d3 | 395 | |
a890e662 RC |
396 | omap_plane->nformats = omap_framebuffer_get_formats( |
397 | omap_plane->formats, ARRAY_SIZE(omap_plane->formats), | |
f5f9454c RC |
398 | dss_feat_get_supported_color_modes(id)); |
399 | omap_plane->id = id; | |
400 | omap_plane->name = plane_names[id]; | |
401 | ||
bb5c2d9a RC |
402 | plane = &omap_plane->base; |
403 | ||
f5f9454c RC |
404 | omap_plane->apply.pre_apply = omap_plane_pre_apply; |
405 | omap_plane->apply.post_apply = omap_plane_post_apply; | |
406 | ||
407 | omap_plane->error_irq.irqmask = error_irqs[id]; | |
408 | omap_plane->error_irq.irq = omap_plane_error_irq; | |
409 | omap_irq_register(dev, &omap_plane->error_irq); | |
410 | ||
411 | drm_plane_init(dev, plane, (1 << priv->num_crtcs) - 1, &omap_plane_funcs, | |
412 | omap_plane->formats, omap_plane->nformats, private_plane); | |
bb5c2d9a | 413 | |
3c810c61 RC |
414 | omap_plane_install_properties(plane, &plane->base); |
415 | ||
bb5c2d9a RC |
416 | /* get our starting configuration, set defaults for parameters |
417 | * we don't currently use, etc: | |
418 | */ | |
f5f9454c RC |
419 | info = &omap_plane->info; |
420 | info->rotation_type = OMAP_DSS_ROT_DMA; | |
421 | info->rotation = OMAP_DSS_ROT_0; | |
422 | info->global_alpha = 0xff; | |
423 | info->mirror = 0; | |
bb5c2d9a RC |
424 | |
425 | /* Set defaults depending on whether we are a CRTC or overlay | |
426 | * layer. | |
427 | * TODO add ioctl to give userspace an API to change this.. this | |
428 | * will come in a subsequent patch. | |
429 | */ | |
f5f9454c | 430 | if (private_plane) |
bb5c2d9a RC |
431 | omap_plane->info.zorder = 0; |
432 | else | |
f5f9454c | 433 | omap_plane->info.zorder = id; |
bb5c2d9a RC |
434 | |
435 | return plane; | |
bb5c2d9a | 436 | } |