drm/radeon: init atpx at switcheroo register time v2
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_atpx_handler.c
CommitLineData
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1/*
2 * Copyright (c) 2010 Red Hat Inc.
3 * Author : Dave Airlie <airlied@redhat.com>
4 *
5 * Licensed under GPLv2
6 *
7 * ATPX support for both Intel/ATI
8 */
6a9ee8af 9#include <linux/vga_switcheroo.h>
5a0e3ad6 10#include <linux/slab.h>
7b199811 11#include <linux/acpi.h>
6a9ee8af 12#include <linux/pci.h>
d814b24f 13#include <linux/delay.h>
6a9ee8af 14
9e05b2f4 15#include "radeon_acpi.h"
6a9ee8af 16
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17struct radeon_atpx_functions {
18 bool px_params;
19 bool power_cntl;
20 bool disp_mux_cntl;
21 bool i2c_mux_cntl;
22 bool switch_start;
23 bool switch_end;
24 bool disp_connectors_mapping;
25 bool disp_detetion_ports;
26};
27
28struct radeon_atpx {
492b49a2 29 acpi_handle handle;
48fa412b 30 struct radeon_atpx_functions functions;
b8c9fd5a 31 bool is_hybrid;
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32};
33
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34static struct radeon_atpx_priv {
35 bool atpx_detected;
36 /* handle for device - and atpx */
37 acpi_handle dhandle;
48fa412b 38 struct radeon_atpx atpx;
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39} radeon_atpx_priv;
40
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41struct atpx_verify_interface {
42 u16 size; /* structure size in bytes (includes size field) */
43 u16 version; /* version */
44 u32 function_bits; /* supported functions bit vector */
45} __packed;
46
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47struct atpx_px_params {
48 u16 size; /* structure size in bytes (includes size field) */
49 u32 valid_flags; /* which flags are valid */
50 u32 flags; /* flags */
51} __packed;
52
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AD
53struct atpx_power_control {
54 u16 size;
55 u8 dgpu_state;
56} __packed;
57
58struct atpx_mux {
59 u16 size;
60 u16 mux;
61} __packed;
62
90c4cde9 63bool radeon_has_atpx(void) {
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64 return radeon_atpx_priv.atpx_detected;
65}
66
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67bool radeon_has_atpx_dgpu_power_cntl(void) {
68 return radeon_atpx_priv.atpx.functions.power_cntl;
69}
70
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71bool radeon_is_atpx_hybrid(void) {
72 return radeon_atpx_priv.atpx.is_hybrid;
73}
74
48fa412b
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75/**
76 * radeon_atpx_call - call an ATPX method
77 *
78 * @handle: acpi handle
79 * @function: the ATPX function to execute
80 * @params: ATPX function params
81 *
82 * Executes the requested ATPX function (all asics).
83 * Returns a pointer to the acpi output buffer.
84 */
85static union acpi_object *radeon_atpx_call(acpi_handle handle, int function,
86 struct acpi_buffer *params)
6a9ee8af
DA
87{
88 acpi_status status;
48fa412b 89 union acpi_object atpx_arg_elements[2];
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90 struct acpi_object_list atpx_arg;
91 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
92
93 atpx_arg.count = 2;
94 atpx_arg.pointer = &atpx_arg_elements[0];
95
96 atpx_arg_elements[0].type = ACPI_TYPE_INTEGER;
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97 atpx_arg_elements[0].integer.value = function;
98
99 if (params) {
100 atpx_arg_elements[1].type = ACPI_TYPE_BUFFER;
101 atpx_arg_elements[1].buffer.length = params->length;
102 atpx_arg_elements[1].buffer.pointer = params->pointer;
103 } else {
104 /* We need a second fake parameter */
105 atpx_arg_elements[1].type = ACPI_TYPE_INTEGER;
106 atpx_arg_elements[1].integer.value = 0;
107 }
6a9ee8af 108
0b90365e 109 status = acpi_evaluate_object(handle, NULL, &atpx_arg, &buffer);
6a9ee8af 110
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111 /* Fail only if calling the method fails and ATPX is supported */
112 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
113 printk("failed to evaluate ATPX got %s\n",
114 acpi_format_exception(status));
115 kfree(buffer.pointer);
116 return NULL;
6a9ee8af 117 }
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118
119 return buffer.pointer;
120}
121
122/**
123 * radeon_atpx_parse_functions - parse supported functions
124 *
125 * @f: supported functions struct
126 * @mask: supported functions mask from ATPX
127 *
128 * Use the supported functions mask from ATPX function
129 * ATPX_FUNCTION_VERIFY_INTERFACE to determine what functions
130 * are supported (all asics).
131 */
132static void radeon_atpx_parse_functions(struct radeon_atpx_functions *f, u32 mask)
133{
134 f->px_params = mask & ATPX_GET_PX_PARAMETERS_SUPPORTED;
135 f->power_cntl = mask & ATPX_POWER_CONTROL_SUPPORTED;
136 f->disp_mux_cntl = mask & ATPX_DISPLAY_MUX_CONTROL_SUPPORTED;
137 f->i2c_mux_cntl = mask & ATPX_I2C_MUX_CONTROL_SUPPORTED;
138 f->switch_start = mask & ATPX_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION_SUPPORTED;
139 f->switch_end = mask & ATPX_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION_SUPPORTED;
140 f->disp_connectors_mapping = mask & ATPX_GET_DISPLAY_CONNECTORS_MAPPING_SUPPORTED;
141 f->disp_detetion_ports = mask & ATPX_GET_DISPLAY_DETECTION_PORTS_SUPPORTED;
142}
143
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144/**
145 * radeon_atpx_validate_functions - validate ATPX functions
146 *
147 * @atpx: radeon atpx struct
148 *
149 * Validate that required functions are enabled (all asics).
150 * returns 0 on success, error on failure.
151 */
152static int radeon_atpx_validate(struct radeon_atpx *atpx)
153{
305e12d0 154 u32 valid_bits = 0;
bfaddd9f 155
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156 if (atpx->functions.px_params) {
157 union acpi_object *info;
158 struct atpx_px_params output;
159 size_t size;
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160
161 info = radeon_atpx_call(atpx->handle, ATPX_FUNCTION_GET_PX_PARAMETERS, NULL);
162 if (!info)
163 return -EIO;
164
165 memset(&output, 0, sizeof(output));
166
167 size = *(u16 *) info->buffer.pointer;
168 if (size < 10) {
169 printk("ATPX buffer is too small: %zu\n", size);
170 kfree(info);
171 return -EINVAL;
172 }
173 size = min(sizeof(output), size);
174
175 memcpy(&output, info->buffer.pointer, size);
176
177 valid_bits = output.flags & output.valid_flags;
cf26f908 178
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179 kfree(info);
180 }
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181
182 /* if separate mux flag is set, mux controls are required */
183 if (valid_bits & ATPX_SEPARATE_MUX_FOR_I2C) {
184 atpx->functions.i2c_mux_cntl = true;
185 atpx->functions.disp_mux_cntl = true;
186 }
187 /* if any outputs are muxed, mux controls are required */
188 if (valid_bits & (ATPX_CRT1_RGB_SIGNAL_MUXED |
189 ATPX_TV_SIGNAL_MUXED |
190 ATPX_DFP_SIGNAL_MUXED))
191 atpx->functions.disp_mux_cntl = true;
192
193 /* some bioses set these bits rather than flagging power_cntl as supported */
194 if (valid_bits & (ATPX_DYNAMIC_PX_SUPPORTED |
195 ATPX_DYNAMIC_DGPU_POWER_OFF_SUPPORTED))
196 atpx->functions.power_cntl = true;
197
b8c9fd5a 198 atpx->is_hybrid = false;
305e12d0 199 if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
b8c9fd5a 200 printk("ATPX Hybrid Graphics\n");
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201#if 1
202 /* This is a temporary hack until the D3 cold support
203 * makes it upstream. The ATPX power_control method seems
204 * to still work on even if the system should be using
205 * the new standardized hybrid D3 cold ACPI interface.
206 */
207 atpx->functions.power_cntl = true;
208#else
305e12d0 209 atpx->functions.power_cntl = false;
bdfb7604 210#endif
b8c9fd5a 211 atpx->is_hybrid = true;
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212 }
213
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214 return 0;
215}
216
48fa412b
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217/**
218 * radeon_atpx_verify_interface - verify ATPX
219 *
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220 * @atpx: radeon atpx struct
221 *
222 * Execute the ATPX_FUNCTION_VERIFY_INTERFACE ATPX function
223 * to initialize ATPX and determine what features are supported
224 * (all asics).
225 * returns 0 on success, error on failure.
226 */
492b49a2 227static int radeon_atpx_verify_interface(struct radeon_atpx *atpx)
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228{
229 union acpi_object *info;
230 struct atpx_verify_interface output;
231 size_t size;
232 int err = 0;
233
492b49a2 234 info = radeon_atpx_call(atpx->handle, ATPX_FUNCTION_VERIFY_INTERFACE, NULL);
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235 if (!info)
236 return -EIO;
237
238 memset(&output, 0, sizeof(output));
239
240 size = *(u16 *) info->buffer.pointer;
241 if (size < 8) {
bd6126bd 242 printk("ATPX buffer is too small: %zu\n", size);
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243 err = -EINVAL;
244 goto out;
245 }
246 size = min(sizeof(output), size);
247
248 memcpy(&output, info->buffer.pointer, size);
249
250 /* TODO: check version? */
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251 printk("ATPX version %u, functions 0x%08x\n",
252 output.version, output.function_bits);
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253
254 radeon_atpx_parse_functions(&atpx->functions, output.function_bits);
255
256out:
257 kfree(info);
258 return err;
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259}
260
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261/**
262 * radeon_atpx_set_discrete_state - power up/down discrete GPU
263 *
264 * @atpx: atpx info struct
265 * @state: discrete GPU state (0 = power down, 1 = power up)
266 *
267 * Execute the ATPX_FUNCTION_POWER_CONTROL ATPX function to
268 * power down/up the discrete GPU (all asics).
269 * Returns 0 on success, error on failure.
270 */
492b49a2 271static int radeon_atpx_set_discrete_state(struct radeon_atpx *atpx, u8 state)
6a9ee8af 272{
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273 struct acpi_buffer params;
274 union acpi_object *info;
275 struct atpx_power_control input;
276
277 if (atpx->functions.power_cntl) {
278 input.size = 3;
279 input.dgpu_state = state;
280 params.length = input.size;
281 params.pointer = &input;
282 info = radeon_atpx_call(atpx->handle,
283 ATPX_FUNCTION_POWER_CONTROL,
284 &params);
285 if (!info)
286 return -EIO;
287 kfree(info);
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288
289 /* 200ms delay is required after off */
290 if (state == 0)
291 msleep(200);
6a9ee8af 292 }
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293 return 0;
294}
295
82e02935
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296/**
297 * radeon_atpx_switch_disp_mux - switch display mux
298 *
299 * @atpx: atpx info struct
300 * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU)
301 *
302 * Execute the ATPX_FUNCTION_DISPLAY_MUX_CONTROL ATPX function to
303 * switch the display mux between the discrete GPU and integrated GPU
304 * (all asics).
305 * Returns 0 on success, error on failure.
306 */
492b49a2 307static int radeon_atpx_switch_disp_mux(struct radeon_atpx *atpx, u16 mux_id)
6a9ee8af 308{
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309 struct acpi_buffer params;
310 union acpi_object *info;
311 struct atpx_mux input;
312
313 if (atpx->functions.disp_mux_cntl) {
314 input.size = 4;
315 input.mux = mux_id;
316 params.length = input.size;
317 params.pointer = &input;
318 info = radeon_atpx_call(atpx->handle,
319 ATPX_FUNCTION_DISPLAY_MUX_CONTROL,
320 &params);
321 if (!info)
322 return -EIO;
323 kfree(info);
324 }
325 return 0;
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326}
327
82e02935
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328/**
329 * radeon_atpx_switch_i2c_mux - switch i2c/hpd mux
330 *
331 * @atpx: atpx info struct
332 * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU)
333 *
334 * Execute the ATPX_FUNCTION_I2C_MUX_CONTROL ATPX function to
335 * switch the i2c/hpd mux between the discrete GPU and integrated GPU
336 * (all asics).
337 * Returns 0 on success, error on failure.
338 */
492b49a2 339static int radeon_atpx_switch_i2c_mux(struct radeon_atpx *atpx, u16 mux_id)
58e73811 340{
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341 struct acpi_buffer params;
342 union acpi_object *info;
343 struct atpx_mux input;
344
345 if (atpx->functions.i2c_mux_cntl) {
346 input.size = 4;
347 input.mux = mux_id;
348 params.length = input.size;
349 params.pointer = &input;
350 info = radeon_atpx_call(atpx->handle,
351 ATPX_FUNCTION_I2C_MUX_CONTROL,
352 &params);
353 if (!info)
354 return -EIO;
355 kfree(info);
356 }
357 return 0;
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358}
359
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360/**
361 * radeon_atpx_switch_start - notify the sbios of a GPU switch
362 *
363 * @atpx: atpx info struct
364 * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU)
365 *
366 * Execute the ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION ATPX
367 * function to notify the sbios that a switch between the discrete GPU and
368 * integrated GPU has begun (all asics).
369 * Returns 0 on success, error on failure.
370 */
492b49a2 371static int radeon_atpx_switch_start(struct radeon_atpx *atpx, u16 mux_id)
58e73811 372{
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373 struct acpi_buffer params;
374 union acpi_object *info;
375 struct atpx_mux input;
376
377 if (atpx->functions.switch_start) {
378 input.size = 4;
379 input.mux = mux_id;
380 params.length = input.size;
381 params.pointer = &input;
382 info = radeon_atpx_call(atpx->handle,
383 ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION,
384 &params);
385 if (!info)
386 return -EIO;
387 kfree(info);
388 }
389 return 0;
58e73811
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390}
391
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392/**
393 * radeon_atpx_switch_end - notify the sbios of a GPU switch
394 *
395 * @atpx: atpx info struct
396 * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU)
397 *
398 * Execute the ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION ATPX
399 * function to notify the sbios that a switch between the discrete GPU and
400 * integrated GPU has ended (all asics).
401 * Returns 0 on success, error on failure.
402 */
492b49a2 403static int radeon_atpx_switch_end(struct radeon_atpx *atpx, u16 mux_id)
58e73811 404{
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405 struct acpi_buffer params;
406 union acpi_object *info;
407 struct atpx_mux input;
408
409 if (atpx->functions.switch_end) {
410 input.size = 4;
411 input.mux = mux_id;
412 params.length = input.size;
413 params.pointer = &input;
414 info = radeon_atpx_call(atpx->handle,
415 ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION,
416 &params);
417 if (!info)
418 return -EIO;
419 kfree(info);
420 }
421 return 0;
58e73811 422}
6a9ee8af 423
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424/**
425 * radeon_atpx_switchto - switch to the requested GPU
426 *
427 * @id: GPU to switch to
428 *
429 * Execute the necessary ATPX functions to switch between the discrete GPU and
430 * integrated GPU (all asics).
431 * Returns 0 on success, error on failure.
432 */
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433static int radeon_atpx_switchto(enum vga_switcheroo_client_id id)
434{
492b49a2 435 u16 gpu_id;
58e73811 436
6a9ee8af 437 if (id == VGA_SWITCHEROO_IGD)
9e05b2f4 438 gpu_id = ATPX_INTEGRATED_GPU;
6a9ee8af 439 else
9e05b2f4 440 gpu_id = ATPX_DISCRETE_GPU;
58e73811 441
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442 radeon_atpx_switch_start(&radeon_atpx_priv.atpx, gpu_id);
443 radeon_atpx_switch_disp_mux(&radeon_atpx_priv.atpx, gpu_id);
444 radeon_atpx_switch_i2c_mux(&radeon_atpx_priv.atpx, gpu_id);
445 radeon_atpx_switch_end(&radeon_atpx_priv.atpx, gpu_id);
58e73811 446
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447 return 0;
448}
449
82e02935 450/**
dfdcbebc 451 * radeon_atpx_power_state - power down/up the requested GPU
82e02935 452 *
dfdcbebc 453 * @id: GPU to power down/up
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454 * @state: requested power state (0 = off, 1 = on)
455 *
456 * Execute the necessary ATPX function to power down/up the discrete GPU
457 * (all asics).
458 * Returns 0 on success, error on failure.
459 */
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460static int radeon_atpx_power_state(enum vga_switcheroo_client_id id,
461 enum vga_switcheroo_state state)
462{
463 /* on w500 ACPI can't change intel gpu state */
464 if (id == VGA_SWITCHEROO_IGD)
465 return 0;
466
492b49a2 467 radeon_atpx_set_discrete_state(&radeon_atpx_priv.atpx, state);
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DA
468 return 0;
469}
470
82e02935 471/**
c9bd773c 472 * radeon_atpx_pci_probe_handle - look up the ATPX handle
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473 *
474 * @pdev: pci device
475 *
c9bd773c 476 * Look up the ATPX handles (all asics).
82e02935
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477 * Returns true if the handles are found, false if not.
478 */
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DA
479static bool radeon_atpx_pci_probe_handle(struct pci_dev *pdev)
480{
c61e2775 481 acpi_handle dhandle, atpx_handle;
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482 acpi_status status;
483
3a83f992 484 dhandle = ACPI_HANDLE(&pdev->dev);
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DA
485 if (!dhandle)
486 return false;
487
488 status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
f91ce35e 489 if (ACPI_FAILURE(status))
6a9ee8af 490 return false;
f91ce35e 491
6a9ee8af 492 radeon_atpx_priv.dhandle = dhandle;
492b49a2 493 radeon_atpx_priv.atpx.handle = atpx_handle;
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DA
494 return true;
495}
496
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497/**
498 * radeon_atpx_init - verify the ATPX interface
499 *
500 * Verify the ATPX interface (all asics).
501 * Returns 0 on success, error on failure.
502 */
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DA
503static int radeon_atpx_init(void)
504{
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505 int r;
506
6a9ee8af 507 /* set up the ATPX handle */
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508 r = radeon_atpx_verify_interface(&radeon_atpx_priv.atpx);
509 if (r)
510 return r;
511
512 /* validate the atpx setup */
513 r = radeon_atpx_validate(&radeon_atpx_priv.atpx);
514 if (r)
515 return r;
516
517 return 0;
6a9ee8af
DA
518}
519
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520/**
521 * radeon_atpx_get_client_id - get the client id
522 *
523 * @pdev: pci device
524 *
525 * look up whether we are the integrated or discrete GPU (all asics).
526 * Returns the client id.
527 */
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528static int radeon_atpx_get_client_id(struct pci_dev *pdev)
529{
3a83f992 530 if (radeon_atpx_priv.dhandle == ACPI_HANDLE(&pdev->dev))
6a9ee8af
DA
531 return VGA_SWITCHEROO_IGD;
532 else
533 return VGA_SWITCHEROO_DIS;
534}
535
5d170139 536static const struct vga_switcheroo_handler radeon_atpx_handler = {
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DA
537 .switchto = radeon_atpx_switchto,
538 .power_state = radeon_atpx_power_state,
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539 .get_client_id = radeon_atpx_get_client_id,
540};
541
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542/**
543 * radeon_atpx_detect - detect whether we have PX
544 *
545 * Check if we have a PX system (all asics).
546 * Returns true if we have a PX system, false if not.
547 */
6a9ee8af
DA
548static bool radeon_atpx_detect(void)
549{
550 char acpi_method_name[255] = { 0 };
551 struct acpi_buffer buffer = {sizeof(acpi_method_name), acpi_method_name};
552 struct pci_dev *pdev = NULL;
553 bool has_atpx = false;
554 int vga_count = 0;
555
556 while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
557 vga_count++;
558
559 has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true);
560 }
561
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562 /* some newer PX laptops mark the dGPU as a non-VGA display device */
563 while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
564 vga_count++;
565
566 has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true);
567 }
568
6a9ee8af 569 if (has_atpx && vga_count == 2) {
492b49a2 570 acpi_get_name(radeon_atpx_priv.atpx.handle, ACPI_FULL_PATHNAME, &buffer);
8e5de1d8 571 printk(KERN_INFO "vga_switcheroo: detected switching method %s handle\n",
6a9ee8af
DA
572 acpi_method_name);
573 radeon_atpx_priv.atpx_detected = true;
69ee9742 574 radeon_atpx_init();
6a9ee8af
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575 return true;
576 }
577 return false;
578}
579
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580/**
581 * radeon_register_atpx_handler - register with vga_switcheroo
582 *
583 * Register the PX callbacks with vga_switcheroo (all asics).
584 */
6a9ee8af
DA
585void radeon_register_atpx_handler(void)
586{
587 bool r;
156d7d41 588 enum vga_switcheroo_handler_flags_t handler_flags = 0;
6a9ee8af
DA
589
590 /* detect if we have any ATPX + 2 VGA in the system */
591 r = radeon_atpx_detect();
592 if (!r)
593 return;
594
156d7d41 595 vga_switcheroo_register_handler(&radeon_atpx_handler, handler_flags);
6a9ee8af
DA
596}
597
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598/**
599 * radeon_unregister_atpx_handler - unregister with vga_switcheroo
600 *
601 * Unregister the PX callbacks with vga_switcheroo (all asics).
602 */
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603void radeon_unregister_atpx_handler(void)
604{
605 vga_switcheroo_unregister_handler();
606}
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