Commit | Line | Data |
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771fe6b9 JG |
1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice shall be included in | |
13 | * all copies or substantial portions of the Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
21 | * OTHER DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: Dave Airlie | |
24 | * Alex Deucher | |
25 | */ | |
26 | #include "drmP.h" | |
27 | #include "drm_edid.h" | |
28 | #include "drm_crtc_helper.h" | |
d50ba256 | 29 | #include "drm_fb_helper.h" |
771fe6b9 JG |
30 | #include "radeon_drm.h" |
31 | #include "radeon.h" | |
923f6848 | 32 | #include "atom.h" |
771fe6b9 JG |
33 | |
34 | extern void | |
35 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |
36 | struct drm_encoder *encoder, | |
37 | bool connected); | |
38 | extern void | |
39 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |
40 | struct drm_encoder *encoder, | |
41 | bool connected); | |
42 | ||
d4877cf2 AD |
43 | void radeon_connector_hotplug(struct drm_connector *connector) |
44 | { | |
45 | struct drm_device *dev = connector->dev; | |
46 | struct radeon_device *rdev = dev->dev_private; | |
47 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
48 | ||
49 | if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) | |
50 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); | |
51 | ||
196c58d2 AD |
52 | if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) || |
53 | (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { | |
54 | if ((radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
55 | (radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_eDP)) { | |
d4877cf2 AD |
56 | if (radeon_dp_needs_link_train(radeon_connector)) { |
57 | if (connector->encoder) | |
58 | dp_link_train(connector->encoder, connector); | |
59 | } | |
60 | } | |
61 | } | |
62 | ||
63 | } | |
64 | ||
445282db DA |
65 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
66 | { | |
67 | struct drm_crtc *crtc = encoder->crtc; | |
68 | ||
69 | if (crtc && crtc->enabled) { | |
70 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
71 | crtc->x, crtc->y, crtc->fb); | |
72 | } | |
73 | } | |
771fe6b9 JG |
74 | static void |
75 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) | |
76 | { | |
77 | struct drm_device *dev = connector->dev; | |
78 | struct radeon_device *rdev = dev->dev_private; | |
79 | struct drm_encoder *best_encoder = NULL; | |
80 | struct drm_encoder *encoder = NULL; | |
81 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
82 | struct drm_mode_object *obj; | |
83 | bool connected; | |
84 | int i; | |
85 | ||
86 | best_encoder = connector_funcs->best_encoder(connector); | |
87 | ||
88 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
89 | if (connector->encoder_ids[i] == 0) | |
90 | break; | |
91 | ||
92 | obj = drm_mode_object_find(connector->dev, | |
93 | connector->encoder_ids[i], | |
94 | DRM_MODE_OBJECT_ENCODER); | |
95 | if (!obj) | |
96 | continue; | |
97 | ||
98 | encoder = obj_to_encoder(obj); | |
99 | ||
100 | if ((encoder == best_encoder) && (status == connector_status_connected)) | |
101 | connected = true; | |
102 | else | |
103 | connected = false; | |
104 | ||
105 | if (rdev->is_atom_bios) | |
106 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); | |
107 | else | |
108 | radeon_combios_connected_scratch_regs(connector, encoder, connected); | |
109 | ||
110 | } | |
111 | } | |
112 | ||
445282db DA |
113 | struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
114 | { | |
115 | struct drm_mode_object *obj; | |
116 | struct drm_encoder *encoder; | |
117 | int i; | |
118 | ||
119 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
120 | if (connector->encoder_ids[i] == 0) | |
121 | break; | |
122 | ||
123 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
124 | if (!obj) | |
125 | continue; | |
126 | ||
127 | encoder = obj_to_encoder(obj); | |
128 | if (encoder->encoder_type == encoder_type) | |
129 | return encoder; | |
130 | } | |
131 | return NULL; | |
132 | } | |
133 | ||
771fe6b9 JG |
134 | struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
135 | { | |
136 | int enc_id = connector->encoder_ids[0]; | |
137 | struct drm_mode_object *obj; | |
138 | struct drm_encoder *encoder; | |
139 | ||
140 | /* pick the encoder ids */ | |
141 | if (enc_id) { | |
142 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
143 | if (!obj) | |
144 | return NULL; | |
145 | encoder = obj_to_encoder(obj); | |
146 | return encoder; | |
147 | } | |
148 | return NULL; | |
149 | } | |
150 | ||
4ce001ab DA |
151 | /* |
152 | * radeon_connector_analog_encoder_conflict_solve | |
153 | * - search for other connectors sharing this encoder | |
154 | * if priority is true, then set them disconnected if this is connected | |
155 | * if priority is false, set us disconnected if they are connected | |
156 | */ | |
157 | static enum drm_connector_status | |
158 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |
159 | struct drm_encoder *encoder, | |
160 | enum drm_connector_status current_status, | |
161 | bool priority) | |
162 | { | |
163 | struct drm_device *dev = connector->dev; | |
164 | struct drm_connector *conflict; | |
08d07511 | 165 | struct radeon_connector *radeon_conflict; |
4ce001ab DA |
166 | int i; |
167 | ||
168 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | |
169 | if (conflict == connector) | |
170 | continue; | |
171 | ||
08d07511 | 172 | radeon_conflict = to_radeon_connector(conflict); |
4ce001ab DA |
173 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
174 | if (conflict->encoder_ids[i] == 0) | |
175 | break; | |
176 | ||
177 | /* if the IDs match */ | |
178 | if (conflict->encoder_ids[i] == encoder->base.id) { | |
179 | if (conflict->status != connector_status_connected) | |
180 | continue; | |
08d07511 AD |
181 | |
182 | if (radeon_conflict->use_digital) | |
183 | continue; | |
4ce001ab DA |
184 | |
185 | if (priority == true) { | |
c5d46b4e AD |
186 | DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); |
187 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector)); | |
4ce001ab DA |
188 | conflict->status = connector_status_disconnected; |
189 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); | |
190 | } else { | |
c5d46b4e AD |
191 | DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector)); |
192 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict)); | |
4ce001ab DA |
193 | current_status = connector_status_disconnected; |
194 | } | |
195 | break; | |
196 | } | |
197 | } | |
198 | } | |
199 | return current_status; | |
200 | ||
201 | } | |
202 | ||
771fe6b9 JG |
203 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
204 | { | |
205 | struct drm_device *dev = encoder->dev; | |
206 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
207 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 208 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
771fe6b9 | 209 | |
de2103e4 AD |
210 | if (native_mode->hdisplay != 0 && |
211 | native_mode->vdisplay != 0 && | |
212 | native_mode->clock != 0) { | |
fb06ca8f | 213 | mode = drm_mode_duplicate(dev, native_mode); |
771fe6b9 JG |
214 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
215 | drm_mode_set_name(mode); | |
216 | ||
d9fdaafb | 217 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
d2efdf6d AD |
218 | } else if (native_mode->hdisplay != 0 && |
219 | native_mode->vdisplay != 0) { | |
220 | /* mac laptops without an edid */ | |
221 | /* Note that this is not necessarily the exact panel mode, | |
222 | * but an approximation based on the cvt formula. For these | |
223 | * systems we should ideally read the mode info out of the | |
224 | * registers or add a mode table, but this works and is much | |
225 | * simpler. | |
226 | */ | |
227 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | |
228 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
d9fdaafb | 229 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
771fe6b9 JG |
230 | } |
231 | return mode; | |
232 | } | |
233 | ||
923f6848 AD |
234 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
235 | { | |
236 | struct drm_device *dev = encoder->dev; | |
237 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
238 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 239 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
923f6848 AD |
240 | int i; |
241 | struct mode_size { | |
242 | int w; | |
243 | int h; | |
244 | } common_modes[17] = { | |
245 | { 640, 480}, | |
246 | { 720, 480}, | |
247 | { 800, 600}, | |
248 | { 848, 480}, | |
249 | {1024, 768}, | |
250 | {1152, 768}, | |
251 | {1280, 720}, | |
252 | {1280, 800}, | |
253 | {1280, 854}, | |
254 | {1280, 960}, | |
255 | {1280, 1024}, | |
256 | {1440, 900}, | |
257 | {1400, 1050}, | |
258 | {1680, 1050}, | |
259 | {1600, 1200}, | |
260 | {1920, 1080}, | |
261 | {1920, 1200} | |
262 | }; | |
263 | ||
264 | for (i = 0; i < 17; i++) { | |
dfdd6467 AD |
265 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { |
266 | if (common_modes[i].w > 1024 || | |
267 | common_modes[i].h > 768) | |
268 | continue; | |
269 | } | |
923f6848 | 270 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
de2103e4 AD |
271 | if (common_modes[i].w > native_mode->hdisplay || |
272 | common_modes[i].h > native_mode->vdisplay || | |
273 | (common_modes[i].w == native_mode->hdisplay && | |
274 | common_modes[i].h == native_mode->vdisplay)) | |
923f6848 AD |
275 | continue; |
276 | } | |
277 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | |
278 | continue; | |
279 | ||
d50ba256 | 280 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); |
923f6848 AD |
281 | drm_mode_probed_add(connector, mode); |
282 | } | |
283 | } | |
284 | ||
771fe6b9 JG |
285 | int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
286 | uint64_t val) | |
287 | { | |
445282db DA |
288 | struct drm_device *dev = connector->dev; |
289 | struct radeon_device *rdev = dev->dev_private; | |
290 | struct drm_encoder *encoder; | |
291 | struct radeon_encoder *radeon_encoder; | |
292 | ||
293 | if (property == rdev->mode_info.coherent_mode_property) { | |
294 | struct radeon_encoder_atom_dig *dig; | |
ce227c41 | 295 | bool new_coherent_mode; |
445282db DA |
296 | |
297 | /* need to find digital encoder on connector */ | |
298 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
299 | if (!encoder) | |
300 | return 0; | |
301 | ||
302 | radeon_encoder = to_radeon_encoder(encoder); | |
303 | ||
304 | if (!radeon_encoder->enc_priv) | |
305 | return 0; | |
306 | ||
307 | dig = radeon_encoder->enc_priv; | |
ce227c41 DA |
308 | new_coherent_mode = val ? true : false; |
309 | if (dig->coherent_mode != new_coherent_mode) { | |
310 | dig->coherent_mode = new_coherent_mode; | |
311 | radeon_property_change_mode(&radeon_encoder->base); | |
312 | } | |
445282db DA |
313 | } |
314 | ||
5b1714d3 AD |
315 | if (property == rdev->mode_info.underscan_property) { |
316 | /* need to find digital encoder on connector */ | |
317 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
318 | if (!encoder) | |
319 | return 0; | |
320 | ||
321 | radeon_encoder = to_radeon_encoder(encoder); | |
322 | ||
323 | if (radeon_encoder->underscan_type != val) { | |
324 | radeon_encoder->underscan_type = val; | |
325 | radeon_property_change_mode(&radeon_encoder->base); | |
326 | } | |
327 | } | |
328 | ||
5bccf5e3 MG |
329 | if (property == rdev->mode_info.underscan_hborder_property) { |
330 | /* need to find digital encoder on connector */ | |
331 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
332 | if (!encoder) | |
333 | return 0; | |
334 | ||
335 | radeon_encoder = to_radeon_encoder(encoder); | |
336 | ||
337 | if (radeon_encoder->underscan_hborder != val) { | |
338 | radeon_encoder->underscan_hborder = val; | |
339 | radeon_property_change_mode(&radeon_encoder->base); | |
340 | } | |
341 | } | |
342 | ||
343 | if (property == rdev->mode_info.underscan_vborder_property) { | |
344 | /* need to find digital encoder on connector */ | |
345 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
346 | if (!encoder) | |
347 | return 0; | |
348 | ||
349 | radeon_encoder = to_radeon_encoder(encoder); | |
350 | ||
351 | if (radeon_encoder->underscan_vborder != val) { | |
352 | radeon_encoder->underscan_vborder = val; | |
353 | radeon_property_change_mode(&radeon_encoder->base); | |
354 | } | |
355 | } | |
356 | ||
445282db DA |
357 | if (property == rdev->mode_info.tv_std_property) { |
358 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); | |
359 | if (!encoder) { | |
360 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); | |
361 | } | |
362 | ||
363 | if (!encoder) | |
364 | return 0; | |
365 | ||
366 | radeon_encoder = to_radeon_encoder(encoder); | |
367 | if (!radeon_encoder->enc_priv) | |
368 | return 0; | |
643acacf | 369 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
445282db DA |
370 | struct radeon_encoder_atom_dac *dac_int; |
371 | dac_int = radeon_encoder->enc_priv; | |
372 | dac_int->tv_std = val; | |
373 | } else { | |
374 | struct radeon_encoder_tv_dac *dac_int; | |
375 | dac_int = radeon_encoder->enc_priv; | |
376 | dac_int->tv_std = val; | |
377 | } | |
378 | radeon_property_change_mode(&radeon_encoder->base); | |
379 | } | |
380 | ||
381 | if (property == rdev->mode_info.load_detect_property) { | |
382 | struct radeon_connector *radeon_connector = | |
383 | to_radeon_connector(connector); | |
384 | ||
385 | if (val == 0) | |
386 | radeon_connector->dac_load_detect = false; | |
387 | else | |
388 | radeon_connector->dac_load_detect = true; | |
389 | } | |
390 | ||
391 | if (property == rdev->mode_info.tmds_pll_property) { | |
392 | struct radeon_encoder_int_tmds *tmds = NULL; | |
393 | bool ret = false; | |
394 | /* need to find digital encoder on connector */ | |
395 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
396 | if (!encoder) | |
397 | return 0; | |
398 | ||
399 | radeon_encoder = to_radeon_encoder(encoder); | |
400 | ||
401 | tmds = radeon_encoder->enc_priv; | |
402 | if (!tmds) | |
403 | return 0; | |
404 | ||
405 | if (val == 0) { | |
406 | if (rdev->is_atom_bios) | |
407 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); | |
408 | else | |
409 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); | |
410 | } | |
411 | if (val == 1 || ret == false) { | |
412 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); | |
413 | } | |
414 | radeon_property_change_mode(&radeon_encoder->base); | |
415 | } | |
416 | ||
771fe6b9 JG |
417 | return 0; |
418 | } | |
419 | ||
8dfaa8a7 MD |
420 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
421 | struct drm_connector *connector) | |
422 | { | |
423 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 424 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
8dfaa8a7 MD |
425 | |
426 | /* Try to get native mode details from EDID if necessary */ | |
de2103e4 | 427 | if (!native_mode->clock) { |
8dfaa8a7 MD |
428 | struct drm_display_mode *t, *mode; |
429 | ||
430 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | |
de2103e4 AD |
431 | if (mode->hdisplay == native_mode->hdisplay && |
432 | mode->vdisplay == native_mode->vdisplay) { | |
433 | *native_mode = *mode; | |
434 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); | |
c5d46b4e | 435 | DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n"); |
8dfaa8a7 MD |
436 | break; |
437 | } | |
438 | } | |
439 | } | |
de2103e4 | 440 | if (!native_mode->clock) { |
c5d46b4e | 441 | DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n"); |
8dfaa8a7 MD |
442 | radeon_encoder->rmx_type = RMX_OFF; |
443 | } | |
444 | } | |
771fe6b9 JG |
445 | |
446 | static int radeon_lvds_get_modes(struct drm_connector *connector) | |
447 | { | |
448 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
449 | struct drm_encoder *encoder; | |
450 | int ret = 0; | |
451 | struct drm_display_mode *mode; | |
452 | ||
453 | if (radeon_connector->ddc_bus) { | |
454 | ret = radeon_ddc_get_modes(radeon_connector); | |
455 | if (ret > 0) { | |
7747b713 | 456 | encoder = radeon_best_single_encoder(connector); |
8dfaa8a7 MD |
457 | if (encoder) { |
458 | radeon_fixup_lvds_native_mode(encoder, connector); | |
7747b713 AD |
459 | /* add scaled modes */ |
460 | radeon_add_common_modes(encoder, connector); | |
8dfaa8a7 | 461 | } |
771fe6b9 JG |
462 | return ret; |
463 | } | |
464 | } | |
465 | ||
466 | encoder = radeon_best_single_encoder(connector); | |
467 | if (!encoder) | |
468 | return 0; | |
469 | ||
470 | /* we have no EDID modes */ | |
471 | mode = radeon_fp_native_mode(encoder); | |
472 | if (mode) { | |
473 | ret = 1; | |
474 | drm_mode_probed_add(connector, mode); | |
7747b713 AD |
475 | /* add scaled modes */ |
476 | radeon_add_common_modes(encoder, connector); | |
771fe6b9 | 477 | } |
923f6848 | 478 | |
771fe6b9 JG |
479 | return ret; |
480 | } | |
481 | ||
482 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | |
483 | struct drm_display_mode *mode) | |
484 | { | |
a3fa6320 AD |
485 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
486 | ||
487 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
488 | return MODE_PANEL; | |
489 | ||
490 | if (encoder) { | |
491 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
492 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
493 | ||
494 | /* AVIVO hardware supports downscaling modes larger than the panel | |
495 | * to the panel size, but I'm not sure this is desirable. | |
496 | */ | |
497 | if ((mode->hdisplay > native_mode->hdisplay) || | |
498 | (mode->vdisplay > native_mode->vdisplay)) | |
499 | return MODE_PANEL; | |
500 | ||
501 | /* if scaling is disabled, block non-native modes */ | |
502 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
503 | if ((mode->hdisplay != native_mode->hdisplay) || | |
504 | (mode->vdisplay != native_mode->vdisplay)) | |
505 | return MODE_PANEL; | |
506 | } | |
507 | } | |
508 | ||
771fe6b9 JG |
509 | return MODE_OK; |
510 | } | |
511 | ||
7b334fcb | 512 | static enum drm_connector_status |
930a9e28 | 513 | radeon_lvds_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 514 | { |
0549a061 | 515 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
2ffb8429 | 516 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
0549a061 | 517 | enum drm_connector_status ret = connector_status_disconnected; |
2ffb8429 AD |
518 | |
519 | if (encoder) { | |
520 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 521 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
2ffb8429 AD |
522 | |
523 | /* check if panel is valid */ | |
de2103e4 | 524 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
2ffb8429 AD |
525 | ret = connector_status_connected; |
526 | ||
527 | } | |
0549a061 AD |
528 | |
529 | /* check for edid as well */ | |
0294cf4f AD |
530 | if (radeon_connector->edid) |
531 | ret = connector_status_connected; | |
532 | else { | |
533 | if (radeon_connector->ddc_bus) { | |
0294cf4f AD |
534 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
535 | &radeon_connector->ddc_bus->adapter); | |
0294cf4f AD |
536 | if (radeon_connector->edid) |
537 | ret = connector_status_connected; | |
538 | } | |
0549a061 | 539 | } |
771fe6b9 | 540 | /* check acpi lid status ??? */ |
2ffb8429 | 541 | |
771fe6b9 JG |
542 | radeon_connector_update_scratch_regs(connector, ret); |
543 | return ret; | |
544 | } | |
545 | ||
546 | static void radeon_connector_destroy(struct drm_connector *connector) | |
547 | { | |
548 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
549 | ||
0294cf4f AD |
550 | if (radeon_connector->edid) |
551 | kfree(radeon_connector->edid); | |
771fe6b9 JG |
552 | kfree(radeon_connector->con_priv); |
553 | drm_sysfs_connector_remove(connector); | |
554 | drm_connector_cleanup(connector); | |
555 | kfree(connector); | |
556 | } | |
557 | ||
445282db DA |
558 | static int radeon_lvds_set_property(struct drm_connector *connector, |
559 | struct drm_property *property, | |
560 | uint64_t value) | |
561 | { | |
562 | struct drm_device *dev = connector->dev; | |
563 | struct radeon_encoder *radeon_encoder; | |
564 | enum radeon_rmx_type rmx_type; | |
565 | ||
d9fdaafb | 566 | DRM_DEBUG_KMS("\n"); |
445282db DA |
567 | if (property != dev->mode_config.scaling_mode_property) |
568 | return 0; | |
569 | ||
570 | if (connector->encoder) | |
571 | radeon_encoder = to_radeon_encoder(connector->encoder); | |
572 | else { | |
573 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
574 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); | |
575 | } | |
576 | ||
577 | switch (value) { | |
578 | case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; | |
579 | case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; | |
580 | case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; | |
581 | default: | |
582 | case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; | |
583 | } | |
584 | if (radeon_encoder->rmx_type == rmx_type) | |
585 | return 0; | |
586 | ||
587 | radeon_encoder->rmx_type = rmx_type; | |
588 | ||
589 | radeon_property_change_mode(&radeon_encoder->base); | |
590 | return 0; | |
591 | } | |
592 | ||
593 | ||
771fe6b9 JG |
594 | struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
595 | .get_modes = radeon_lvds_get_modes, | |
596 | .mode_valid = radeon_lvds_mode_valid, | |
597 | .best_encoder = radeon_best_single_encoder, | |
598 | }; | |
599 | ||
600 | struct drm_connector_funcs radeon_lvds_connector_funcs = { | |
601 | .dpms = drm_helper_connector_dpms, | |
602 | .detect = radeon_lvds_detect, | |
603 | .fill_modes = drm_helper_probe_single_connector_modes, | |
604 | .destroy = radeon_connector_destroy, | |
445282db | 605 | .set_property = radeon_lvds_set_property, |
771fe6b9 JG |
606 | }; |
607 | ||
608 | static int radeon_vga_get_modes(struct drm_connector *connector) | |
609 | { | |
610 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
611 | int ret; | |
612 | ||
613 | ret = radeon_ddc_get_modes(radeon_connector); | |
614 | ||
615 | return ret; | |
616 | } | |
617 | ||
618 | static int radeon_vga_mode_valid(struct drm_connector *connector, | |
619 | struct drm_display_mode *mode) | |
620 | { | |
a3fa6320 AD |
621 | /* XXX check mode bandwidth */ |
622 | /* XXX verify against max DAC output frequency */ | |
771fe6b9 JG |
623 | return MODE_OK; |
624 | } | |
625 | ||
7b334fcb | 626 | static enum drm_connector_status |
930a9e28 | 627 | radeon_vga_detect(struct drm_connector *connector, bool force) |
771fe6b9 JG |
628 | { |
629 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
630 | struct drm_encoder *encoder; | |
631 | struct drm_encoder_helper_funcs *encoder_funcs; | |
4b9d2a21 | 632 | bool dret = false; |
771fe6b9 JG |
633 | enum drm_connector_status ret = connector_status_disconnected; |
634 | ||
4ce001ab DA |
635 | encoder = radeon_best_single_encoder(connector); |
636 | if (!encoder) | |
637 | ret = connector_status_disconnected; | |
638 | ||
eb6b6d7c | 639 | if (radeon_connector->ddc_bus) |
4b9d2a21 | 640 | dret = radeon_ddc_probe(radeon_connector); |
0294cf4f AD |
641 | if (dret) { |
642 | if (radeon_connector->edid) { | |
643 | kfree(radeon_connector->edid); | |
644 | radeon_connector->edid = NULL; | |
645 | } | |
0294cf4f | 646 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
0294cf4f AD |
647 | |
648 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
649 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
650 | drm_get_connector_name(connector)); | |
651 | ret = connector_status_connected; | |
0294cf4f AD |
652 | } else { |
653 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
654 | ||
655 | /* some oems have boards with separate digital and analog connectors | |
656 | * with a shared ddc line (often vga + hdmi) | |
657 | */ | |
658 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | |
659 | kfree(radeon_connector->edid); | |
660 | radeon_connector->edid = NULL; | |
661 | ret = connector_status_disconnected; | |
662 | } else | |
663 | ret = connector_status_connected; | |
664 | } | |
665 | } else { | |
c3cceedd DA |
666 | |
667 | /* if we aren't forcing don't do destructive polling */ | |
668 | if (!force) | |
669 | return connector->status; | |
670 | ||
d8a7f792 | 671 | if (radeon_connector->dac_load_detect && encoder) { |
445282db DA |
672 | encoder_funcs = encoder->helper_private; |
673 | ret = encoder_funcs->detect(encoder, connector); | |
674 | } | |
771fe6b9 JG |
675 | } |
676 | ||
4ce001ab DA |
677 | if (ret == connector_status_connected) |
678 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
771fe6b9 JG |
679 | radeon_connector_update_scratch_regs(connector, ret); |
680 | return ret; | |
681 | } | |
682 | ||
683 | struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { | |
684 | .get_modes = radeon_vga_get_modes, | |
685 | .mode_valid = radeon_vga_mode_valid, | |
686 | .best_encoder = radeon_best_single_encoder, | |
687 | }; | |
688 | ||
689 | struct drm_connector_funcs radeon_vga_connector_funcs = { | |
690 | .dpms = drm_helper_connector_dpms, | |
691 | .detect = radeon_vga_detect, | |
692 | .fill_modes = drm_helper_probe_single_connector_modes, | |
693 | .destroy = radeon_connector_destroy, | |
694 | .set_property = radeon_connector_set_property, | |
695 | }; | |
696 | ||
4ce001ab DA |
697 | static int radeon_tv_get_modes(struct drm_connector *connector) |
698 | { | |
699 | struct drm_device *dev = connector->dev; | |
923f6848 | 700 | struct radeon_device *rdev = dev->dev_private; |
4ce001ab | 701 | struct drm_display_mode *tv_mode; |
923f6848 | 702 | struct drm_encoder *encoder; |
4ce001ab | 703 | |
923f6848 AD |
704 | encoder = radeon_best_single_encoder(connector); |
705 | if (!encoder) | |
706 | return 0; | |
4ce001ab | 707 | |
923f6848 AD |
708 | /* avivo chips can scale any mode */ |
709 | if (rdev->family >= CHIP_RS600) | |
710 | /* add scaled modes */ | |
711 | radeon_add_common_modes(encoder, connector); | |
712 | else { | |
713 | /* only 800x600 is supported right now on pre-avivo chips */ | |
d50ba256 | 714 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); |
923f6848 AD |
715 | tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
716 | drm_mode_probed_add(connector, tv_mode); | |
717 | } | |
4ce001ab DA |
718 | return 1; |
719 | } | |
720 | ||
721 | static int radeon_tv_mode_valid(struct drm_connector *connector, | |
722 | struct drm_display_mode *mode) | |
723 | { | |
a3fa6320 AD |
724 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
725 | return MODE_CLOCK_RANGE; | |
4ce001ab DA |
726 | return MODE_OK; |
727 | } | |
728 | ||
7b334fcb | 729 | static enum drm_connector_status |
930a9e28 | 730 | radeon_tv_detect(struct drm_connector *connector, bool force) |
4ce001ab DA |
731 | { |
732 | struct drm_encoder *encoder; | |
733 | struct drm_encoder_helper_funcs *encoder_funcs; | |
445282db DA |
734 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
735 | enum drm_connector_status ret = connector_status_disconnected; | |
736 | ||
737 | if (!radeon_connector->dac_load_detect) | |
738 | return ret; | |
4ce001ab DA |
739 | |
740 | encoder = radeon_best_single_encoder(connector); | |
741 | if (!encoder) | |
742 | ret = connector_status_disconnected; | |
743 | else { | |
744 | encoder_funcs = encoder->helper_private; | |
745 | ret = encoder_funcs->detect(encoder, connector); | |
746 | } | |
747 | if (ret == connector_status_connected) | |
748 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); | |
749 | radeon_connector_update_scratch_regs(connector, ret); | |
750 | return ret; | |
751 | } | |
752 | ||
753 | struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { | |
754 | .get_modes = radeon_tv_get_modes, | |
755 | .mode_valid = radeon_tv_mode_valid, | |
756 | .best_encoder = radeon_best_single_encoder, | |
757 | }; | |
758 | ||
759 | struct drm_connector_funcs radeon_tv_connector_funcs = { | |
760 | .dpms = drm_helper_connector_dpms, | |
761 | .detect = radeon_tv_detect, | |
762 | .fill_modes = drm_helper_probe_single_connector_modes, | |
763 | .destroy = radeon_connector_destroy, | |
764 | .set_property = radeon_connector_set_property, | |
765 | }; | |
766 | ||
771fe6b9 JG |
767 | static int radeon_dvi_get_modes(struct drm_connector *connector) |
768 | { | |
769 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
770 | int ret; | |
771 | ||
772 | ret = radeon_ddc_get_modes(radeon_connector); | |
771fe6b9 JG |
773 | return ret; |
774 | } | |
775 | ||
4ce001ab DA |
776 | /* |
777 | * DVI is complicated | |
778 | * Do a DDC probe, if DDC probe passes, get the full EDID so | |
779 | * we can do analog/digital monitor detection at this point. | |
780 | * If the monitor is an analog monitor or we got no DDC, | |
781 | * we need to find the DAC encoder object for this connector. | |
782 | * If we got no DDC, we do load detection on the DAC encoder object. | |
783 | * If we got analog DDC or load detection passes on the DAC encoder | |
784 | * we have to check if this analog encoder is shared with anyone else (TV) | |
785 | * if its shared we have to set the other connector to disconnected. | |
786 | */ | |
7b334fcb | 787 | static enum drm_connector_status |
930a9e28 | 788 | radeon_dvi_detect(struct drm_connector *connector, bool force) |
771fe6b9 JG |
789 | { |
790 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
4ce001ab | 791 | struct drm_encoder *encoder = NULL; |
771fe6b9 JG |
792 | struct drm_encoder_helper_funcs *encoder_funcs; |
793 | struct drm_mode_object *obj; | |
794 | int i; | |
795 | enum drm_connector_status ret = connector_status_disconnected; | |
4b9d2a21 | 796 | bool dret = false; |
771fe6b9 | 797 | |
eb6b6d7c | 798 | if (radeon_connector->ddc_bus) |
4b9d2a21 | 799 | dret = radeon_ddc_probe(radeon_connector); |
4ce001ab | 800 | if (dret) { |
0294cf4f AD |
801 | if (radeon_connector->edid) { |
802 | kfree(radeon_connector->edid); | |
803 | radeon_connector->edid = NULL; | |
804 | } | |
4ce001ab | 805 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
4ce001ab DA |
806 | |
807 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
808 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
809 | drm_get_connector_name(connector)); | |
4ce001ab DA |
810 | } else { |
811 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
812 | ||
0294cf4f AD |
813 | /* some oems have boards with separate digital and analog connectors |
814 | * with a shared ddc line (often vga + hdmi) | |
815 | */ | |
816 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { | |
817 | kfree(radeon_connector->edid); | |
818 | radeon_connector->edid = NULL; | |
819 | ret = connector_status_disconnected; | |
820 | } else | |
821 | ret = connector_status_connected; | |
71407c46 | 822 | |
42f14c4b AD |
823 | /* This gets complicated. We have boards with VGA + HDMI with a |
824 | * shared DDC line and we have boards with DVI-D + HDMI with a shared | |
825 | * DDC line. The latter is more complex because with DVI<->HDMI adapters | |
826 | * you don't really know what's connected to which port as both are digital. | |
71407c46 | 827 | */ |
d3932d6c | 828 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
71407c46 | 829 | struct drm_device *dev = connector->dev; |
42f14c4b | 830 | struct radeon_device *rdev = dev->dev_private; |
71407c46 AD |
831 | struct drm_connector *list_connector; |
832 | struct radeon_connector *list_radeon_connector; | |
833 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { | |
834 | if (connector == list_connector) | |
835 | continue; | |
836 | list_radeon_connector = to_radeon_connector(list_connector); | |
b2ea4aa6 AD |
837 | if (list_radeon_connector->shared_ddc && |
838 | (list_radeon_connector->ddc_bus->rec.i2c_id == | |
839 | radeon_connector->ddc_bus->rec.i2c_id)) { | |
42f14c4b AD |
840 | /* cases where both connectors are digital */ |
841 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { | |
842 | /* hpd is our only option in this case */ | |
843 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | |
71407c46 AD |
844 | kfree(radeon_connector->edid); |
845 | radeon_connector->edid = NULL; | |
846 | ret = connector_status_disconnected; | |
847 | } | |
848 | } | |
849 | } | |
850 | } | |
851 | } | |
4ce001ab DA |
852 | } |
853 | } | |
854 | ||
855 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) | |
856 | goto out; | |
857 | ||
c3cceedd DA |
858 | if (!force) { |
859 | ret = connector->status; | |
860 | goto out; | |
861 | } | |
862 | ||
4ce001ab | 863 | /* find analog encoder */ |
445282db DA |
864 | if (radeon_connector->dac_load_detect) { |
865 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
866 | if (connector->encoder_ids[i] == 0) | |
867 | break; | |
771fe6b9 | 868 | |
445282db DA |
869 | obj = drm_mode_object_find(connector->dev, |
870 | connector->encoder_ids[i], | |
871 | DRM_MODE_OBJECT_ENCODER); | |
872 | if (!obj) | |
873 | continue; | |
771fe6b9 | 874 | |
445282db | 875 | encoder = obj_to_encoder(obj); |
771fe6b9 | 876 | |
445282db DA |
877 | encoder_funcs = encoder->helper_private; |
878 | if (encoder_funcs->detect) { | |
879 | if (ret != connector_status_connected) { | |
880 | ret = encoder_funcs->detect(encoder, connector); | |
881 | if (ret == connector_status_connected) { | |
882 | radeon_connector->use_digital = false; | |
883 | } | |
771fe6b9 | 884 | } |
445282db | 885 | break; |
771fe6b9 JG |
886 | } |
887 | } | |
888 | } | |
889 | ||
4ce001ab DA |
890 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && |
891 | encoder) { | |
892 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
893 | } | |
894 | ||
895 | out: | |
771fe6b9 JG |
896 | /* updated in get modes as well since we need to know if it's analog or digital */ |
897 | radeon_connector_update_scratch_regs(connector, ret); | |
898 | return ret; | |
899 | } | |
900 | ||
901 | /* okay need to be smart in here about which encoder to pick */ | |
902 | struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) | |
903 | { | |
904 | int enc_id = connector->encoder_ids[0]; | |
905 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
906 | struct drm_mode_object *obj; | |
907 | struct drm_encoder *encoder; | |
908 | int i; | |
909 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
910 | if (connector->encoder_ids[i] == 0) | |
911 | break; | |
912 | ||
913 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
914 | if (!obj) | |
915 | continue; | |
916 | ||
917 | encoder = obj_to_encoder(obj); | |
918 | ||
4ce001ab | 919 | if (radeon_connector->use_digital == true) { |
771fe6b9 JG |
920 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) |
921 | return encoder; | |
922 | } else { | |
923 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || | |
924 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) | |
925 | return encoder; | |
926 | } | |
927 | } | |
928 | ||
929 | /* see if we have a default encoder TODO */ | |
930 | ||
931 | /* then check use digitial */ | |
932 | /* pick the first one */ | |
933 | if (enc_id) { | |
934 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
935 | if (!obj) | |
936 | return NULL; | |
937 | encoder = obj_to_encoder(obj); | |
938 | return encoder; | |
939 | } | |
940 | return NULL; | |
941 | } | |
942 | ||
d50ba256 DA |
943 | static void radeon_dvi_force(struct drm_connector *connector) |
944 | { | |
945 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
946 | if (connector->force == DRM_FORCE_ON) | |
947 | radeon_connector->use_digital = false; | |
948 | if (connector->force == DRM_FORCE_ON_DIGITAL) | |
949 | radeon_connector->use_digital = true; | |
950 | } | |
951 | ||
a3fa6320 AD |
952 | static int radeon_dvi_mode_valid(struct drm_connector *connector, |
953 | struct drm_display_mode *mode) | |
954 | { | |
1b24203e AD |
955 | struct drm_device *dev = connector->dev; |
956 | struct radeon_device *rdev = dev->dev_private; | |
a3fa6320 AD |
957 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
958 | ||
959 | /* XXX check mode bandwidth */ | |
960 | ||
1b24203e AD |
961 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
962 | if (radeon_connector->use_digital && | |
963 | (rdev->family == CHIP_RV100) && | |
964 | (mode->clock > 135000)) | |
965 | return MODE_CLOCK_HIGH; | |
966 | ||
a3fa6320 AD |
967 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
968 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | |
969 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | |
970 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | |
971 | return MODE_OK; | |
972 | else | |
973 | return MODE_CLOCK_HIGH; | |
974 | } | |
975 | return MODE_OK; | |
976 | } | |
977 | ||
771fe6b9 JG |
978 | struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
979 | .get_modes = radeon_dvi_get_modes, | |
a3fa6320 | 980 | .mode_valid = radeon_dvi_mode_valid, |
771fe6b9 JG |
981 | .best_encoder = radeon_dvi_encoder, |
982 | }; | |
983 | ||
984 | struct drm_connector_funcs radeon_dvi_connector_funcs = { | |
985 | .dpms = drm_helper_connector_dpms, | |
986 | .detect = radeon_dvi_detect, | |
987 | .fill_modes = drm_helper_probe_single_connector_modes, | |
988 | .set_property = radeon_connector_set_property, | |
989 | .destroy = radeon_connector_destroy, | |
d50ba256 | 990 | .force = radeon_dvi_force, |
771fe6b9 JG |
991 | }; |
992 | ||
ffd09c64 AD |
993 | static void radeon_dp_connector_destroy(struct drm_connector *connector) |
994 | { | |
995 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
996 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
997 | ||
ffd09c64 AD |
998 | if (radeon_connector->edid) |
999 | kfree(radeon_connector->edid); | |
1000 | if (radeon_dig_connector->dp_i2c_bus) | |
ac1aade6 | 1001 | radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); |
ffd09c64 AD |
1002 | kfree(radeon_connector->con_priv); |
1003 | drm_sysfs_connector_remove(connector); | |
1004 | drm_connector_cleanup(connector); | |
1005 | kfree(connector); | |
1006 | } | |
1007 | ||
746c1aa4 DA |
1008 | static int radeon_dp_get_modes(struct drm_connector *connector) |
1009 | { | |
1010 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
8b834852 | 1011 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
746c1aa4 DA |
1012 | int ret; |
1013 | ||
8b834852 AD |
1014 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1015 | if (!radeon_dig_connector->edp_on) | |
1016 | atombios_set_edp_panel_power(connector, | |
1017 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
1018 | } | |
746c1aa4 | 1019 | ret = radeon_ddc_get_modes(radeon_connector); |
8b834852 AD |
1020 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1021 | if (!radeon_dig_connector->edp_on) | |
1022 | atombios_set_edp_panel_power(connector, | |
1023 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1024 | } | |
1025 | ||
746c1aa4 DA |
1026 | return ret; |
1027 | } | |
1028 | ||
7b334fcb | 1029 | static enum drm_connector_status |
930a9e28 | 1030 | radeon_dp_detect(struct drm_connector *connector, bool force) |
746c1aa4 DA |
1031 | { |
1032 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
746c1aa4 | 1033 | enum drm_connector_status ret = connector_status_disconnected; |
4143e919 | 1034 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
746c1aa4 DA |
1035 | |
1036 | if (radeon_connector->edid) { | |
1037 | kfree(radeon_connector->edid); | |
1038 | radeon_connector->edid = NULL; | |
1039 | } | |
1040 | ||
6f50eae7 AD |
1041 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1042 | /* eDP is always DP */ | |
1043 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
8b834852 AD |
1044 | if (!radeon_dig_connector->edp_on) |
1045 | atombios_set_edp_panel_power(connector, | |
1046 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
6f50eae7 | 1047 | if (radeon_dp_getdpcd(radeon_connector)) |
9fa05c98 | 1048 | ret = connector_status_connected; |
8b834852 AD |
1049 | if (!radeon_dig_connector->edp_on) |
1050 | atombios_set_edp_panel_power(connector, | |
1051 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
4143e919 | 1052 | } else { |
6f50eae7 AD |
1053 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
1054 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { | |
1055 | if (radeon_dp_getdpcd(radeon_connector)) | |
1056 | ret = connector_status_connected; | |
1057 | } else { | |
1058 | if (radeon_ddc_probe(radeon_connector)) | |
1059 | ret = connector_status_connected; | |
4143e919 | 1060 | } |
746c1aa4 | 1061 | } |
4143e919 | 1062 | |
30f44372 | 1063 | radeon_connector_update_scratch_regs(connector, ret); |
746c1aa4 DA |
1064 | return ret; |
1065 | } | |
1066 | ||
5801ead6 AD |
1067 | static int radeon_dp_mode_valid(struct drm_connector *connector, |
1068 | struct drm_display_mode *mode) | |
1069 | { | |
1070 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1071 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1072 | ||
1073 | /* XXX check mode bandwidth */ | |
1074 | ||
196c58d2 AD |
1075 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || |
1076 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | |
5801ead6 AD |
1077 | return radeon_dp_mode_valid_helper(radeon_connector, mode); |
1078 | else | |
1079 | return MODE_OK; | |
1080 | } | |
1081 | ||
746c1aa4 DA |
1082 | struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
1083 | .get_modes = radeon_dp_get_modes, | |
5801ead6 | 1084 | .mode_valid = radeon_dp_mode_valid, |
746c1aa4 DA |
1085 | .best_encoder = radeon_dvi_encoder, |
1086 | }; | |
1087 | ||
1088 | struct drm_connector_funcs radeon_dp_connector_funcs = { | |
1089 | .dpms = drm_helper_connector_dpms, | |
1090 | .detect = radeon_dp_detect, | |
1091 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1092 | .set_property = radeon_connector_set_property, | |
ffd09c64 | 1093 | .destroy = radeon_dp_connector_destroy, |
746c1aa4 DA |
1094 | .force = radeon_dvi_force, |
1095 | }; | |
1096 | ||
771fe6b9 JG |
1097 | void |
1098 | radeon_add_atom_connector(struct drm_device *dev, | |
1099 | uint32_t connector_id, | |
1100 | uint32_t supported_device, | |
1101 | int connector_type, | |
1102 | struct radeon_i2c_bus_rec *i2c_bus, | |
b75fad06 | 1103 | uint32_t igp_lane_info, |
eed45b30 | 1104 | uint16_t connector_object_id, |
26b5bc98 AD |
1105 | struct radeon_hpd *hpd, |
1106 | struct radeon_router *router) | |
771fe6b9 | 1107 | { |
445282db | 1108 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1109 | struct drm_connector *connector; |
1110 | struct radeon_connector *radeon_connector; | |
1111 | struct radeon_connector_atom_dig *radeon_dig_connector; | |
1112 | uint32_t subpixel_order = SubPixelNone; | |
0294cf4f | 1113 | bool shared_ddc = false; |
771fe6b9 | 1114 | |
4ce001ab | 1115 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1116 | return; |
1117 | ||
cf4c12f9 AD |
1118 | /* if the user selected tv=0 don't try and add the connector */ |
1119 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1120 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1121 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1122 | (radeon_tv == 0)) | |
1123 | return; | |
1124 | ||
771fe6b9 JG |
1125 | /* see if we already added it */ |
1126 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1127 | radeon_connector = to_radeon_connector(connector); | |
1128 | if (radeon_connector->connector_id == connector_id) { | |
1129 | radeon_connector->devices |= supported_device; | |
1130 | return; | |
1131 | } | |
0294cf4f | 1132 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
d3932d6c | 1133 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
0294cf4f AD |
1134 | radeon_connector->shared_ddc = true; |
1135 | shared_ddc = true; | |
1136 | } | |
fb939dfc | 1137 | if (radeon_connector->router_bus && router->ddc_valid && |
26b5bc98 AD |
1138 | (radeon_connector->router.router_id == router->router_id)) { |
1139 | radeon_connector->shared_ddc = false; | |
1140 | shared_ddc = false; | |
1141 | } | |
0294cf4f | 1142 | } |
771fe6b9 JG |
1143 | } |
1144 | ||
1145 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1146 | if (!radeon_connector) | |
1147 | return; | |
1148 | ||
1149 | connector = &radeon_connector->base; | |
1150 | ||
1151 | radeon_connector->connector_id = connector_id; | |
1152 | radeon_connector->devices = supported_device; | |
0294cf4f | 1153 | radeon_connector->shared_ddc = shared_ddc; |
b75fad06 | 1154 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1155 | radeon_connector->hpd = *hpd; |
26b5bc98 | 1156 | radeon_connector->router = *router; |
fb939dfc | 1157 | if (router->ddc_valid || router->cd_valid) { |
26b5bc98 AD |
1158 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); |
1159 | if (!radeon_connector->router_bus) | |
1160 | goto failed; | |
1161 | } | |
771fe6b9 JG |
1162 | switch (connector_type) { |
1163 | case DRM_MODE_CONNECTOR_VGA: | |
1164 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1165 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1166 | if (i2c_bus->valid) { |
f376b94f | 1167 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1168 | if (!radeon_connector->ddc_bus) |
1169 | goto failed; | |
1170 | } | |
35e4b7af | 1171 | radeon_connector->dac_load_detect = true; |
445282db DA |
1172 | drm_connector_attach_property(&radeon_connector->base, |
1173 | rdev->mode_info.load_detect_property, | |
1174 | 1); | |
2581afcc AD |
1175 | /* no HPD on analog connectors */ |
1176 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1177 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
c49948f4 AD |
1178 | connector->interlace_allowed = true; |
1179 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1180 | break; |
1181 | case DRM_MODE_CONNECTOR_DVIA: | |
1182 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1183 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1184 | if (i2c_bus->valid) { |
f376b94f | 1185 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1186 | if (!radeon_connector->ddc_bus) |
1187 | goto failed; | |
1188 | } | |
35e4b7af | 1189 | radeon_connector->dac_load_detect = true; |
445282db DA |
1190 | drm_connector_attach_property(&radeon_connector->base, |
1191 | rdev->mode_info.load_detect_property, | |
1192 | 1); | |
2581afcc AD |
1193 | /* no HPD on analog connectors */ |
1194 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1195 | connector->interlace_allowed = true; |
1196 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1197 | break; |
1198 | case DRM_MODE_CONNECTOR_DVII: | |
1199 | case DRM_MODE_CONNECTOR_DVID: | |
1200 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1201 | if (!radeon_dig_connector) | |
1202 | goto failed; | |
771fe6b9 JG |
1203 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1204 | radeon_connector->con_priv = radeon_dig_connector; | |
1205 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1206 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1207 | if (i2c_bus->valid) { |
f376b94f | 1208 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1209 | if (!radeon_connector->ddc_bus) |
1210 | goto failed; | |
1211 | } | |
1212 | subpixel_order = SubPixelHorizontalRGB; | |
445282db DA |
1213 | drm_connector_attach_property(&radeon_connector->base, |
1214 | rdev->mode_info.coherent_mode_property, | |
1215 | 1); | |
5bccf5e3 | 1216 | if (ASIC_IS_AVIVO(rdev)) { |
430f70d5 AD |
1217 | drm_connector_attach_property(&radeon_connector->base, |
1218 | rdev->mode_info.underscan_property, | |
1219 | UNDERSCAN_AUTO); | |
5bccf5e3 MG |
1220 | drm_connector_attach_property(&radeon_connector->base, |
1221 | rdev->mode_info.underscan_hborder_property, | |
1222 | 0); | |
1223 | drm_connector_attach_property(&radeon_connector->base, | |
1224 | rdev->mode_info.underscan_vborder_property, | |
1225 | 0); | |
1226 | } | |
390d0bbe AD |
1227 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
1228 | radeon_connector->dac_load_detect = true; | |
1229 | drm_connector_attach_property(&radeon_connector->base, | |
1230 | rdev->mode_info.load_detect_property, | |
1231 | 1); | |
1232 | } | |
c49948f4 AD |
1233 | connector->interlace_allowed = true; |
1234 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1235 | connector->doublescan_allowed = true; | |
1236 | else | |
1237 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1238 | break; |
1239 | case DRM_MODE_CONNECTOR_HDMIA: | |
1240 | case DRM_MODE_CONNECTOR_HDMIB: | |
1241 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1242 | if (!radeon_dig_connector) | |
1243 | goto failed; | |
771fe6b9 JG |
1244 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1245 | radeon_connector->con_priv = radeon_dig_connector; | |
1246 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1247 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1248 | if (i2c_bus->valid) { |
f376b94f | 1249 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1250 | if (!radeon_connector->ddc_bus) |
1251 | goto failed; | |
1252 | } | |
445282db DA |
1253 | drm_connector_attach_property(&radeon_connector->base, |
1254 | rdev->mode_info.coherent_mode_property, | |
1255 | 1); | |
5bccf5e3 | 1256 | if (ASIC_IS_AVIVO(rdev)) { |
430f70d5 AD |
1257 | drm_connector_attach_property(&radeon_connector->base, |
1258 | rdev->mode_info.underscan_property, | |
1259 | UNDERSCAN_AUTO); | |
5bccf5e3 MG |
1260 | drm_connector_attach_property(&radeon_connector->base, |
1261 | rdev->mode_info.underscan_hborder_property, | |
1262 | 0); | |
1263 | drm_connector_attach_property(&radeon_connector->base, | |
1264 | rdev->mode_info.underscan_vborder_property, | |
1265 | 0); | |
1266 | } | |
771fe6b9 | 1267 | subpixel_order = SubPixelHorizontalRGB; |
c49948f4 AD |
1268 | connector->interlace_allowed = true; |
1269 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1270 | connector->doublescan_allowed = true; | |
1271 | else | |
1272 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1273 | break; |
1274 | case DRM_MODE_CONNECTOR_DisplayPort: | |
196c58d2 | 1275 | case DRM_MODE_CONNECTOR_eDP: |
771fe6b9 JG |
1276 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1277 | if (!radeon_dig_connector) | |
1278 | goto failed; | |
771fe6b9 JG |
1279 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1280 | radeon_connector->con_priv = radeon_dig_connector; | |
746c1aa4 | 1281 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); |
0b4c0f3f | 1282 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); |
771fe6b9 | 1283 | if (i2c_bus->valid) { |
390d0bbe | 1284 | /* add DP i2c bus */ |
196c58d2 AD |
1285 | if (connector_type == DRM_MODE_CONNECTOR_eDP) |
1286 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1287 | else | |
1288 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
390d0bbe AD |
1289 | if (!radeon_dig_connector->dp_i2c_bus) |
1290 | goto failed; | |
f376b94f | 1291 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1292 | if (!radeon_connector->ddc_bus) |
1293 | goto failed; | |
1294 | } | |
1295 | subpixel_order = SubPixelHorizontalRGB; | |
390d0bbe AD |
1296 | drm_connector_attach_property(&radeon_connector->base, |
1297 | rdev->mode_info.coherent_mode_property, | |
1298 | 1); | |
5bccf5e3 | 1299 | if (ASIC_IS_AVIVO(rdev)) { |
430f70d5 AD |
1300 | drm_connector_attach_property(&radeon_connector->base, |
1301 | rdev->mode_info.underscan_property, | |
1302 | UNDERSCAN_AUTO); | |
5bccf5e3 MG |
1303 | drm_connector_attach_property(&radeon_connector->base, |
1304 | rdev->mode_info.underscan_hborder_property, | |
1305 | 0); | |
1306 | drm_connector_attach_property(&radeon_connector->base, | |
1307 | rdev->mode_info.underscan_vborder_property, | |
1308 | 0); | |
1309 | } | |
c49948f4 AD |
1310 | connector->interlace_allowed = true; |
1311 | /* in theory with a DP to VGA converter... */ | |
1312 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1313 | break; |
1314 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1315 | case DRM_MODE_CONNECTOR_Composite: | |
1316 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
1317 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
1318 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1319 | radeon_connector->dac_load_detect = true; | |
1320 | drm_connector_attach_property(&radeon_connector->base, | |
1321 | rdev->mode_info.load_detect_property, | |
1322 | 1); | |
1323 | drm_connector_attach_property(&radeon_connector->base, | |
1324 | rdev->mode_info.tv_std_property, | |
1325 | radeon_atombios_get_tv_info(rdev)); | |
1326 | /* no HPD on analog connectors */ | |
1327 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1328 | connector->interlace_allowed = false; |
1329 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1330 | break; |
1331 | case DRM_MODE_CONNECTOR_LVDS: | |
1332 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1333 | if (!radeon_dig_connector) | |
1334 | goto failed; | |
771fe6b9 JG |
1335 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1336 | radeon_connector->con_priv = radeon_dig_connector; | |
1337 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 1338 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 1339 | if (i2c_bus->valid) { |
f376b94f | 1340 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1341 | if (!radeon_connector->ddc_bus) |
1342 | goto failed; | |
1343 | } | |
445282db DA |
1344 | drm_connector_attach_property(&radeon_connector->base, |
1345 | dev->mode_config.scaling_mode_property, | |
1346 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 | 1347 | subpixel_order = SubPixelHorizontalRGB; |
c49948f4 AD |
1348 | connector->interlace_allowed = false; |
1349 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1350 | break; |
1351 | } | |
1352 | ||
2581afcc | 1353 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1354 | if (i2c_bus->valid) |
1355 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1356 | } else | |
1357 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
1358 | ||
771fe6b9 JG |
1359 | connector->display_info.subpixel_order = subpixel_order; |
1360 | drm_sysfs_connector_add(connector); | |
1361 | return; | |
1362 | ||
1363 | failed: | |
771fe6b9 JG |
1364 | drm_connector_cleanup(connector); |
1365 | kfree(connector); | |
1366 | } | |
1367 | ||
1368 | void | |
1369 | radeon_add_legacy_connector(struct drm_device *dev, | |
1370 | uint32_t connector_id, | |
1371 | uint32_t supported_device, | |
1372 | int connector_type, | |
b75fad06 | 1373 | struct radeon_i2c_bus_rec *i2c_bus, |
eed45b30 AD |
1374 | uint16_t connector_object_id, |
1375 | struct radeon_hpd *hpd) | |
771fe6b9 | 1376 | { |
445282db | 1377 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1378 | struct drm_connector *connector; |
1379 | struct radeon_connector *radeon_connector; | |
1380 | uint32_t subpixel_order = SubPixelNone; | |
1381 | ||
4ce001ab | 1382 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1383 | return; |
1384 | ||
cf4c12f9 AD |
1385 | /* if the user selected tv=0 don't try and add the connector */ |
1386 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1387 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1388 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1389 | (radeon_tv == 0)) | |
1390 | return; | |
1391 | ||
771fe6b9 JG |
1392 | /* see if we already added it */ |
1393 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1394 | radeon_connector = to_radeon_connector(connector); | |
1395 | if (radeon_connector->connector_id == connector_id) { | |
1396 | radeon_connector->devices |= supported_device; | |
1397 | return; | |
1398 | } | |
1399 | } | |
1400 | ||
1401 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1402 | if (!radeon_connector) | |
1403 | return; | |
1404 | ||
1405 | connector = &radeon_connector->base; | |
1406 | ||
1407 | radeon_connector->connector_id = connector_id; | |
1408 | radeon_connector->devices = supported_device; | |
b75fad06 | 1409 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1410 | radeon_connector->hpd = *hpd; |
771fe6b9 JG |
1411 | switch (connector_type) { |
1412 | case DRM_MODE_CONNECTOR_VGA: | |
1413 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1414 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1415 | if (i2c_bus->valid) { |
f376b94f | 1416 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1417 | if (!radeon_connector->ddc_bus) |
1418 | goto failed; | |
1419 | } | |
35e4b7af | 1420 | radeon_connector->dac_load_detect = true; |
445282db DA |
1421 | drm_connector_attach_property(&radeon_connector->base, |
1422 | rdev->mode_info.load_detect_property, | |
1423 | 1); | |
2581afcc AD |
1424 | /* no HPD on analog connectors */ |
1425 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1426 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
c49948f4 AD |
1427 | connector->interlace_allowed = true; |
1428 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1429 | break; |
1430 | case DRM_MODE_CONNECTOR_DVIA: | |
1431 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1432 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1433 | if (i2c_bus->valid) { |
f376b94f | 1434 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1435 | if (!radeon_connector->ddc_bus) |
1436 | goto failed; | |
1437 | } | |
35e4b7af | 1438 | radeon_connector->dac_load_detect = true; |
445282db DA |
1439 | drm_connector_attach_property(&radeon_connector->base, |
1440 | rdev->mode_info.load_detect_property, | |
1441 | 1); | |
2581afcc AD |
1442 | /* no HPD on analog connectors */ |
1443 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1444 | connector->interlace_allowed = true; |
1445 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1446 | break; |
1447 | case DRM_MODE_CONNECTOR_DVII: | |
1448 | case DRM_MODE_CONNECTOR_DVID: | |
1449 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1450 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1451 | if (i2c_bus->valid) { |
f376b94f | 1452 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1453 | if (!radeon_connector->ddc_bus) |
1454 | goto failed; | |
68b3adb4 AD |
1455 | } |
1456 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
35e4b7af | 1457 | radeon_connector->dac_load_detect = true; |
445282db DA |
1458 | drm_connector_attach_property(&radeon_connector->base, |
1459 | rdev->mode_info.load_detect_property, | |
1460 | 1); | |
771fe6b9 JG |
1461 | } |
1462 | subpixel_order = SubPixelHorizontalRGB; | |
c49948f4 AD |
1463 | connector->interlace_allowed = true; |
1464 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1465 | connector->doublescan_allowed = true; | |
1466 | else | |
1467 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1468 | break; |
1469 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1470 | case DRM_MODE_CONNECTOR_Composite: | |
1471 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
1472 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
1473 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1474 | radeon_connector->dac_load_detect = true; | |
1475 | /* RS400,RC410,RS480 chipset seems to report a lot | |
1476 | * of false positive on load detect, we haven't yet | |
1477 | * found a way to make load detect reliable on those | |
1478 | * chipset, thus just disable it for TV. | |
1479 | */ | |
1480 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) | |
1481 | radeon_connector->dac_load_detect = false; | |
1482 | drm_connector_attach_property(&radeon_connector->base, | |
1483 | rdev->mode_info.load_detect_property, | |
1484 | radeon_connector->dac_load_detect); | |
1485 | drm_connector_attach_property(&radeon_connector->base, | |
1486 | rdev->mode_info.tv_std_property, | |
1487 | radeon_combios_get_tv_info(rdev)); | |
1488 | /* no HPD on analog connectors */ | |
1489 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1490 | connector->interlace_allowed = false; |
1491 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1492 | break; |
1493 | case DRM_MODE_CONNECTOR_LVDS: | |
1494 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 1495 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 1496 | if (i2c_bus->valid) { |
f376b94f | 1497 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1498 | if (!radeon_connector->ddc_bus) |
1499 | goto failed; | |
1500 | } | |
445282db DA |
1501 | drm_connector_attach_property(&radeon_connector->base, |
1502 | dev->mode_config.scaling_mode_property, | |
1503 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 | 1504 | subpixel_order = SubPixelHorizontalRGB; |
c49948f4 AD |
1505 | connector->interlace_allowed = false; |
1506 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1507 | break; |
1508 | } | |
1509 | ||
2581afcc | 1510 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1511 | if (i2c_bus->valid) |
1512 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1513 | } else | |
1514 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
771fe6b9 JG |
1515 | connector->display_info.subpixel_order = subpixel_order; |
1516 | drm_sysfs_connector_add(connector); | |
1517 | return; | |
1518 | ||
1519 | failed: | |
771fe6b9 JG |
1520 | drm_connector_cleanup(connector); |
1521 | kfree(connector); | |
1522 | } |