Commit | Line | Data |
---|---|---|
771fe6b9 JG |
1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice shall be included in | |
13 | * all copies or substantial portions of the Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
21 | * OTHER DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: Dave Airlie | |
24 | * Alex Deucher | |
25 | */ | |
26 | #include "drmP.h" | |
27 | #include "drm_edid.h" | |
28 | #include "drm_crtc_helper.h" | |
d50ba256 | 29 | #include "drm_fb_helper.h" |
771fe6b9 JG |
30 | #include "radeon_drm.h" |
31 | #include "radeon.h" | |
923f6848 | 32 | #include "atom.h" |
771fe6b9 JG |
33 | |
34 | extern void | |
35 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |
36 | struct drm_encoder *encoder, | |
37 | bool connected); | |
38 | extern void | |
39 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |
40 | struct drm_encoder *encoder, | |
41 | bool connected); | |
42 | ||
d4877cf2 AD |
43 | void radeon_connector_hotplug(struct drm_connector *connector) |
44 | { | |
45 | struct drm_device *dev = connector->dev; | |
46 | struct radeon_device *rdev = dev->dev_private; | |
47 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
48 | ||
49 | if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) | |
50 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); | |
51 | ||
196c58d2 AD |
52 | if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) || |
53 | (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { | |
54 | if ((radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
55 | (radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_eDP)) { | |
d4877cf2 AD |
56 | if (radeon_dp_needs_link_train(radeon_connector)) { |
57 | if (connector->encoder) | |
58 | dp_link_train(connector->encoder, connector); | |
59 | } | |
60 | } | |
61 | } | |
62 | ||
63 | } | |
64 | ||
445282db DA |
65 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
66 | { | |
67 | struct drm_crtc *crtc = encoder->crtc; | |
68 | ||
69 | if (crtc && crtc->enabled) { | |
70 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
71 | crtc->x, crtc->y, crtc->fb); | |
72 | } | |
73 | } | |
771fe6b9 JG |
74 | static void |
75 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) | |
76 | { | |
77 | struct drm_device *dev = connector->dev; | |
78 | struct radeon_device *rdev = dev->dev_private; | |
79 | struct drm_encoder *best_encoder = NULL; | |
80 | struct drm_encoder *encoder = NULL; | |
81 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
82 | struct drm_mode_object *obj; | |
83 | bool connected; | |
84 | int i; | |
85 | ||
86 | best_encoder = connector_funcs->best_encoder(connector); | |
87 | ||
88 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
89 | if (connector->encoder_ids[i] == 0) | |
90 | break; | |
91 | ||
92 | obj = drm_mode_object_find(connector->dev, | |
93 | connector->encoder_ids[i], | |
94 | DRM_MODE_OBJECT_ENCODER); | |
95 | if (!obj) | |
96 | continue; | |
97 | ||
98 | encoder = obj_to_encoder(obj); | |
99 | ||
100 | if ((encoder == best_encoder) && (status == connector_status_connected)) | |
101 | connected = true; | |
102 | else | |
103 | connected = false; | |
104 | ||
105 | if (rdev->is_atom_bios) | |
106 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); | |
107 | else | |
108 | radeon_combios_connected_scratch_regs(connector, encoder, connected); | |
109 | ||
110 | } | |
111 | } | |
112 | ||
445282db DA |
113 | struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
114 | { | |
115 | struct drm_mode_object *obj; | |
116 | struct drm_encoder *encoder; | |
117 | int i; | |
118 | ||
119 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
120 | if (connector->encoder_ids[i] == 0) | |
121 | break; | |
122 | ||
123 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
124 | if (!obj) | |
125 | continue; | |
126 | ||
127 | encoder = obj_to_encoder(obj); | |
128 | if (encoder->encoder_type == encoder_type) | |
129 | return encoder; | |
130 | } | |
131 | return NULL; | |
132 | } | |
133 | ||
771fe6b9 JG |
134 | struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
135 | { | |
136 | int enc_id = connector->encoder_ids[0]; | |
137 | struct drm_mode_object *obj; | |
138 | struct drm_encoder *encoder; | |
139 | ||
140 | /* pick the encoder ids */ | |
141 | if (enc_id) { | |
142 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
143 | if (!obj) | |
144 | return NULL; | |
145 | encoder = obj_to_encoder(obj); | |
146 | return encoder; | |
147 | } | |
148 | return NULL; | |
149 | } | |
150 | ||
4ce001ab DA |
151 | /* |
152 | * radeon_connector_analog_encoder_conflict_solve | |
153 | * - search for other connectors sharing this encoder | |
154 | * if priority is true, then set them disconnected if this is connected | |
155 | * if priority is false, set us disconnected if they are connected | |
156 | */ | |
157 | static enum drm_connector_status | |
158 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |
159 | struct drm_encoder *encoder, | |
160 | enum drm_connector_status current_status, | |
161 | bool priority) | |
162 | { | |
163 | struct drm_device *dev = connector->dev; | |
164 | struct drm_connector *conflict; | |
08d07511 | 165 | struct radeon_connector *radeon_conflict; |
4ce001ab DA |
166 | int i; |
167 | ||
168 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | |
169 | if (conflict == connector) | |
170 | continue; | |
171 | ||
08d07511 | 172 | radeon_conflict = to_radeon_connector(conflict); |
4ce001ab DA |
173 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
174 | if (conflict->encoder_ids[i] == 0) | |
175 | break; | |
176 | ||
177 | /* if the IDs match */ | |
178 | if (conflict->encoder_ids[i] == encoder->base.id) { | |
179 | if (conflict->status != connector_status_connected) | |
180 | continue; | |
08d07511 AD |
181 | |
182 | if (radeon_conflict->use_digital) | |
183 | continue; | |
4ce001ab DA |
184 | |
185 | if (priority == true) { | |
186 | DRM_INFO("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); | |
187 | DRM_INFO("in favor of %s\n", drm_get_connector_name(connector)); | |
188 | conflict->status = connector_status_disconnected; | |
189 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); | |
190 | } else { | |
191 | DRM_INFO("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector)); | |
192 | DRM_INFO("in favor of %s\n", drm_get_connector_name(conflict)); | |
193 | current_status = connector_status_disconnected; | |
194 | } | |
195 | break; | |
196 | } | |
197 | } | |
198 | } | |
199 | return current_status; | |
200 | ||
201 | } | |
202 | ||
771fe6b9 JG |
203 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
204 | { | |
205 | struct drm_device *dev = encoder->dev; | |
206 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
207 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 208 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
771fe6b9 | 209 | |
de2103e4 AD |
210 | if (native_mode->hdisplay != 0 && |
211 | native_mode->vdisplay != 0 && | |
212 | native_mode->clock != 0) { | |
fb06ca8f | 213 | mode = drm_mode_duplicate(dev, native_mode); |
771fe6b9 JG |
214 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
215 | drm_mode_set_name(mode); | |
216 | ||
d9fdaafb | 217 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
d2efdf6d AD |
218 | } else if (native_mode->hdisplay != 0 && |
219 | native_mode->vdisplay != 0) { | |
220 | /* mac laptops without an edid */ | |
221 | /* Note that this is not necessarily the exact panel mode, | |
222 | * but an approximation based on the cvt formula. For these | |
223 | * systems we should ideally read the mode info out of the | |
224 | * registers or add a mode table, but this works and is much | |
225 | * simpler. | |
226 | */ | |
227 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | |
228 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
d9fdaafb | 229 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
771fe6b9 JG |
230 | } |
231 | return mode; | |
232 | } | |
233 | ||
923f6848 AD |
234 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
235 | { | |
236 | struct drm_device *dev = encoder->dev; | |
237 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
238 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 239 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
923f6848 AD |
240 | int i; |
241 | struct mode_size { | |
242 | int w; | |
243 | int h; | |
244 | } common_modes[17] = { | |
245 | { 640, 480}, | |
246 | { 720, 480}, | |
247 | { 800, 600}, | |
248 | { 848, 480}, | |
249 | {1024, 768}, | |
250 | {1152, 768}, | |
251 | {1280, 720}, | |
252 | {1280, 800}, | |
253 | {1280, 854}, | |
254 | {1280, 960}, | |
255 | {1280, 1024}, | |
256 | {1440, 900}, | |
257 | {1400, 1050}, | |
258 | {1680, 1050}, | |
259 | {1600, 1200}, | |
260 | {1920, 1080}, | |
261 | {1920, 1200} | |
262 | }; | |
263 | ||
264 | for (i = 0; i < 17; i++) { | |
dfdd6467 AD |
265 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { |
266 | if (common_modes[i].w > 1024 || | |
267 | common_modes[i].h > 768) | |
268 | continue; | |
269 | } | |
923f6848 | 270 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
de2103e4 AD |
271 | if (common_modes[i].w > native_mode->hdisplay || |
272 | common_modes[i].h > native_mode->vdisplay || | |
273 | (common_modes[i].w == native_mode->hdisplay && | |
274 | common_modes[i].h == native_mode->vdisplay)) | |
923f6848 AD |
275 | continue; |
276 | } | |
277 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | |
278 | continue; | |
279 | ||
d50ba256 | 280 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); |
923f6848 AD |
281 | drm_mode_probed_add(connector, mode); |
282 | } | |
283 | } | |
284 | ||
771fe6b9 JG |
285 | int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
286 | uint64_t val) | |
287 | { | |
445282db DA |
288 | struct drm_device *dev = connector->dev; |
289 | struct radeon_device *rdev = dev->dev_private; | |
290 | struct drm_encoder *encoder; | |
291 | struct radeon_encoder *radeon_encoder; | |
292 | ||
293 | if (property == rdev->mode_info.coherent_mode_property) { | |
294 | struct radeon_encoder_atom_dig *dig; | |
ce227c41 | 295 | bool new_coherent_mode; |
445282db DA |
296 | |
297 | /* need to find digital encoder on connector */ | |
298 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
299 | if (!encoder) | |
300 | return 0; | |
301 | ||
302 | radeon_encoder = to_radeon_encoder(encoder); | |
303 | ||
304 | if (!radeon_encoder->enc_priv) | |
305 | return 0; | |
306 | ||
307 | dig = radeon_encoder->enc_priv; | |
ce227c41 DA |
308 | new_coherent_mode = val ? true : false; |
309 | if (dig->coherent_mode != new_coherent_mode) { | |
310 | dig->coherent_mode = new_coherent_mode; | |
311 | radeon_property_change_mode(&radeon_encoder->base); | |
312 | } | |
445282db DA |
313 | } |
314 | ||
5b1714d3 AD |
315 | if (property == rdev->mode_info.underscan_property) { |
316 | /* need to find digital encoder on connector */ | |
317 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
318 | if (!encoder) | |
319 | return 0; | |
320 | ||
321 | radeon_encoder = to_radeon_encoder(encoder); | |
322 | ||
323 | if (radeon_encoder->underscan_type != val) { | |
324 | radeon_encoder->underscan_type = val; | |
325 | radeon_property_change_mode(&radeon_encoder->base); | |
326 | } | |
327 | } | |
328 | ||
445282db DA |
329 | if (property == rdev->mode_info.tv_std_property) { |
330 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); | |
331 | if (!encoder) { | |
332 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); | |
333 | } | |
334 | ||
335 | if (!encoder) | |
336 | return 0; | |
337 | ||
338 | radeon_encoder = to_radeon_encoder(encoder); | |
339 | if (!radeon_encoder->enc_priv) | |
340 | return 0; | |
643acacf | 341 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
445282db DA |
342 | struct radeon_encoder_atom_dac *dac_int; |
343 | dac_int = radeon_encoder->enc_priv; | |
344 | dac_int->tv_std = val; | |
345 | } else { | |
346 | struct radeon_encoder_tv_dac *dac_int; | |
347 | dac_int = radeon_encoder->enc_priv; | |
348 | dac_int->tv_std = val; | |
349 | } | |
350 | radeon_property_change_mode(&radeon_encoder->base); | |
351 | } | |
352 | ||
353 | if (property == rdev->mode_info.load_detect_property) { | |
354 | struct radeon_connector *radeon_connector = | |
355 | to_radeon_connector(connector); | |
356 | ||
357 | if (val == 0) | |
358 | radeon_connector->dac_load_detect = false; | |
359 | else | |
360 | radeon_connector->dac_load_detect = true; | |
361 | } | |
362 | ||
363 | if (property == rdev->mode_info.tmds_pll_property) { | |
364 | struct radeon_encoder_int_tmds *tmds = NULL; | |
365 | bool ret = false; | |
366 | /* need to find digital encoder on connector */ | |
367 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
368 | if (!encoder) | |
369 | return 0; | |
370 | ||
371 | radeon_encoder = to_radeon_encoder(encoder); | |
372 | ||
373 | tmds = radeon_encoder->enc_priv; | |
374 | if (!tmds) | |
375 | return 0; | |
376 | ||
377 | if (val == 0) { | |
378 | if (rdev->is_atom_bios) | |
379 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); | |
380 | else | |
381 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); | |
382 | } | |
383 | if (val == 1 || ret == false) { | |
384 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); | |
385 | } | |
386 | radeon_property_change_mode(&radeon_encoder->base); | |
387 | } | |
388 | ||
771fe6b9 JG |
389 | return 0; |
390 | } | |
391 | ||
8dfaa8a7 MD |
392 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
393 | struct drm_connector *connector) | |
394 | { | |
395 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 396 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
8dfaa8a7 MD |
397 | |
398 | /* Try to get native mode details from EDID if necessary */ | |
de2103e4 | 399 | if (!native_mode->clock) { |
8dfaa8a7 MD |
400 | struct drm_display_mode *t, *mode; |
401 | ||
402 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | |
de2103e4 AD |
403 | if (mode->hdisplay == native_mode->hdisplay && |
404 | mode->vdisplay == native_mode->vdisplay) { | |
405 | *native_mode = *mode; | |
406 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); | |
8dfaa8a7 MD |
407 | DRM_INFO("Determined LVDS native mode details from EDID\n"); |
408 | break; | |
409 | } | |
410 | } | |
411 | } | |
de2103e4 | 412 | if (!native_mode->clock) { |
8dfaa8a7 MD |
413 | DRM_INFO("No LVDS native mode details, disabling RMX\n"); |
414 | radeon_encoder->rmx_type = RMX_OFF; | |
415 | } | |
416 | } | |
771fe6b9 JG |
417 | |
418 | static int radeon_lvds_get_modes(struct drm_connector *connector) | |
419 | { | |
420 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
421 | struct drm_encoder *encoder; | |
422 | int ret = 0; | |
423 | struct drm_display_mode *mode; | |
424 | ||
425 | if (radeon_connector->ddc_bus) { | |
426 | ret = radeon_ddc_get_modes(radeon_connector); | |
427 | if (ret > 0) { | |
7747b713 | 428 | encoder = radeon_best_single_encoder(connector); |
8dfaa8a7 MD |
429 | if (encoder) { |
430 | radeon_fixup_lvds_native_mode(encoder, connector); | |
7747b713 AD |
431 | /* add scaled modes */ |
432 | radeon_add_common_modes(encoder, connector); | |
8dfaa8a7 | 433 | } |
771fe6b9 JG |
434 | return ret; |
435 | } | |
436 | } | |
437 | ||
438 | encoder = radeon_best_single_encoder(connector); | |
439 | if (!encoder) | |
440 | return 0; | |
441 | ||
442 | /* we have no EDID modes */ | |
443 | mode = radeon_fp_native_mode(encoder); | |
444 | if (mode) { | |
445 | ret = 1; | |
446 | drm_mode_probed_add(connector, mode); | |
7747b713 AD |
447 | /* add scaled modes */ |
448 | radeon_add_common_modes(encoder, connector); | |
771fe6b9 | 449 | } |
923f6848 | 450 | |
771fe6b9 JG |
451 | return ret; |
452 | } | |
453 | ||
454 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | |
455 | struct drm_display_mode *mode) | |
456 | { | |
a3fa6320 AD |
457 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
458 | ||
459 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
460 | return MODE_PANEL; | |
461 | ||
462 | if (encoder) { | |
463 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
464 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
465 | ||
466 | /* AVIVO hardware supports downscaling modes larger than the panel | |
467 | * to the panel size, but I'm not sure this is desirable. | |
468 | */ | |
469 | if ((mode->hdisplay > native_mode->hdisplay) || | |
470 | (mode->vdisplay > native_mode->vdisplay)) | |
471 | return MODE_PANEL; | |
472 | ||
473 | /* if scaling is disabled, block non-native modes */ | |
474 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
475 | if ((mode->hdisplay != native_mode->hdisplay) || | |
476 | (mode->vdisplay != native_mode->vdisplay)) | |
477 | return MODE_PANEL; | |
478 | } | |
479 | } | |
480 | ||
771fe6b9 JG |
481 | return MODE_OK; |
482 | } | |
483 | ||
484 | static enum drm_connector_status radeon_lvds_detect(struct drm_connector *connector) | |
485 | { | |
0549a061 | 486 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
2ffb8429 | 487 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
0549a061 | 488 | enum drm_connector_status ret = connector_status_disconnected; |
2ffb8429 AD |
489 | |
490 | if (encoder) { | |
491 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 492 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
2ffb8429 AD |
493 | |
494 | /* check if panel is valid */ | |
de2103e4 | 495 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
2ffb8429 AD |
496 | ret = connector_status_connected; |
497 | ||
498 | } | |
0549a061 AD |
499 | |
500 | /* check for edid as well */ | |
0294cf4f AD |
501 | if (radeon_connector->edid) |
502 | ret = connector_status_connected; | |
503 | else { | |
504 | if (radeon_connector->ddc_bus) { | |
0294cf4f AD |
505 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
506 | &radeon_connector->ddc_bus->adapter); | |
0294cf4f AD |
507 | if (radeon_connector->edid) |
508 | ret = connector_status_connected; | |
509 | } | |
0549a061 | 510 | } |
771fe6b9 | 511 | /* check acpi lid status ??? */ |
2ffb8429 | 512 | |
771fe6b9 JG |
513 | radeon_connector_update_scratch_regs(connector, ret); |
514 | return ret; | |
515 | } | |
516 | ||
517 | static void radeon_connector_destroy(struct drm_connector *connector) | |
518 | { | |
519 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
520 | ||
0294cf4f AD |
521 | if (radeon_connector->edid) |
522 | kfree(radeon_connector->edid); | |
771fe6b9 JG |
523 | kfree(radeon_connector->con_priv); |
524 | drm_sysfs_connector_remove(connector); | |
525 | drm_connector_cleanup(connector); | |
526 | kfree(connector); | |
527 | } | |
528 | ||
445282db DA |
529 | static int radeon_lvds_set_property(struct drm_connector *connector, |
530 | struct drm_property *property, | |
531 | uint64_t value) | |
532 | { | |
533 | struct drm_device *dev = connector->dev; | |
534 | struct radeon_encoder *radeon_encoder; | |
535 | enum radeon_rmx_type rmx_type; | |
536 | ||
d9fdaafb | 537 | DRM_DEBUG_KMS("\n"); |
445282db DA |
538 | if (property != dev->mode_config.scaling_mode_property) |
539 | return 0; | |
540 | ||
541 | if (connector->encoder) | |
542 | radeon_encoder = to_radeon_encoder(connector->encoder); | |
543 | else { | |
544 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
545 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); | |
546 | } | |
547 | ||
548 | switch (value) { | |
549 | case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; | |
550 | case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; | |
551 | case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; | |
552 | default: | |
553 | case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; | |
554 | } | |
555 | if (radeon_encoder->rmx_type == rmx_type) | |
556 | return 0; | |
557 | ||
558 | radeon_encoder->rmx_type = rmx_type; | |
559 | ||
560 | radeon_property_change_mode(&radeon_encoder->base); | |
561 | return 0; | |
562 | } | |
563 | ||
564 | ||
771fe6b9 JG |
565 | struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
566 | .get_modes = radeon_lvds_get_modes, | |
567 | .mode_valid = radeon_lvds_mode_valid, | |
568 | .best_encoder = radeon_best_single_encoder, | |
569 | }; | |
570 | ||
571 | struct drm_connector_funcs radeon_lvds_connector_funcs = { | |
572 | .dpms = drm_helper_connector_dpms, | |
573 | .detect = radeon_lvds_detect, | |
574 | .fill_modes = drm_helper_probe_single_connector_modes, | |
575 | .destroy = radeon_connector_destroy, | |
445282db | 576 | .set_property = radeon_lvds_set_property, |
771fe6b9 JG |
577 | }; |
578 | ||
579 | static int radeon_vga_get_modes(struct drm_connector *connector) | |
580 | { | |
581 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
582 | int ret; | |
583 | ||
584 | ret = radeon_ddc_get_modes(radeon_connector); | |
585 | ||
586 | return ret; | |
587 | } | |
588 | ||
589 | static int radeon_vga_mode_valid(struct drm_connector *connector, | |
590 | struct drm_display_mode *mode) | |
591 | { | |
a3fa6320 AD |
592 | /* XXX check mode bandwidth */ |
593 | /* XXX verify against max DAC output frequency */ | |
771fe6b9 JG |
594 | return MODE_OK; |
595 | } | |
596 | ||
597 | static enum drm_connector_status radeon_vga_detect(struct drm_connector *connector) | |
598 | { | |
599 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
600 | struct drm_encoder *encoder; | |
601 | struct drm_encoder_helper_funcs *encoder_funcs; | |
4b9d2a21 | 602 | bool dret = false; |
771fe6b9 JG |
603 | enum drm_connector_status ret = connector_status_disconnected; |
604 | ||
4ce001ab DA |
605 | encoder = radeon_best_single_encoder(connector); |
606 | if (!encoder) | |
607 | ret = connector_status_disconnected; | |
608 | ||
eb6b6d7c | 609 | if (radeon_connector->ddc_bus) |
4b9d2a21 | 610 | dret = radeon_ddc_probe(radeon_connector); |
0294cf4f AD |
611 | if (dret) { |
612 | if (radeon_connector->edid) { | |
613 | kfree(radeon_connector->edid); | |
614 | radeon_connector->edid = NULL; | |
615 | } | |
0294cf4f | 616 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
0294cf4f AD |
617 | |
618 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
619 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
620 | drm_get_connector_name(connector)); | |
621 | ret = connector_status_connected; | |
0294cf4f AD |
622 | } else { |
623 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
624 | ||
625 | /* some oems have boards with separate digital and analog connectors | |
626 | * with a shared ddc line (often vga + hdmi) | |
627 | */ | |
628 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | |
629 | kfree(radeon_connector->edid); | |
630 | radeon_connector->edid = NULL; | |
631 | ret = connector_status_disconnected; | |
632 | } else | |
633 | ret = connector_status_connected; | |
634 | } | |
635 | } else { | |
d8a7f792 | 636 | if (radeon_connector->dac_load_detect && encoder) { |
445282db DA |
637 | encoder_funcs = encoder->helper_private; |
638 | ret = encoder_funcs->detect(encoder, connector); | |
639 | } | |
771fe6b9 JG |
640 | } |
641 | ||
4ce001ab DA |
642 | if (ret == connector_status_connected) |
643 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
771fe6b9 JG |
644 | radeon_connector_update_scratch_regs(connector, ret); |
645 | return ret; | |
646 | } | |
647 | ||
648 | struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { | |
649 | .get_modes = radeon_vga_get_modes, | |
650 | .mode_valid = radeon_vga_mode_valid, | |
651 | .best_encoder = radeon_best_single_encoder, | |
652 | }; | |
653 | ||
654 | struct drm_connector_funcs radeon_vga_connector_funcs = { | |
655 | .dpms = drm_helper_connector_dpms, | |
656 | .detect = radeon_vga_detect, | |
657 | .fill_modes = drm_helper_probe_single_connector_modes, | |
658 | .destroy = radeon_connector_destroy, | |
659 | .set_property = radeon_connector_set_property, | |
660 | }; | |
661 | ||
4ce001ab DA |
662 | static int radeon_tv_get_modes(struct drm_connector *connector) |
663 | { | |
664 | struct drm_device *dev = connector->dev; | |
923f6848 | 665 | struct radeon_device *rdev = dev->dev_private; |
4ce001ab | 666 | struct drm_display_mode *tv_mode; |
923f6848 | 667 | struct drm_encoder *encoder; |
4ce001ab | 668 | |
923f6848 AD |
669 | encoder = radeon_best_single_encoder(connector); |
670 | if (!encoder) | |
671 | return 0; | |
4ce001ab | 672 | |
923f6848 AD |
673 | /* avivo chips can scale any mode */ |
674 | if (rdev->family >= CHIP_RS600) | |
675 | /* add scaled modes */ | |
676 | radeon_add_common_modes(encoder, connector); | |
677 | else { | |
678 | /* only 800x600 is supported right now on pre-avivo chips */ | |
d50ba256 | 679 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); |
923f6848 AD |
680 | tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
681 | drm_mode_probed_add(connector, tv_mode); | |
682 | } | |
4ce001ab DA |
683 | return 1; |
684 | } | |
685 | ||
686 | static int radeon_tv_mode_valid(struct drm_connector *connector, | |
687 | struct drm_display_mode *mode) | |
688 | { | |
a3fa6320 AD |
689 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
690 | return MODE_CLOCK_RANGE; | |
4ce001ab DA |
691 | return MODE_OK; |
692 | } | |
693 | ||
694 | static enum drm_connector_status radeon_tv_detect(struct drm_connector *connector) | |
695 | { | |
696 | struct drm_encoder *encoder; | |
697 | struct drm_encoder_helper_funcs *encoder_funcs; | |
445282db DA |
698 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
699 | enum drm_connector_status ret = connector_status_disconnected; | |
700 | ||
701 | if (!radeon_connector->dac_load_detect) | |
702 | return ret; | |
4ce001ab DA |
703 | |
704 | encoder = radeon_best_single_encoder(connector); | |
705 | if (!encoder) | |
706 | ret = connector_status_disconnected; | |
707 | else { | |
708 | encoder_funcs = encoder->helper_private; | |
709 | ret = encoder_funcs->detect(encoder, connector); | |
710 | } | |
711 | if (ret == connector_status_connected) | |
712 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); | |
713 | radeon_connector_update_scratch_regs(connector, ret); | |
714 | return ret; | |
715 | } | |
716 | ||
717 | struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { | |
718 | .get_modes = radeon_tv_get_modes, | |
719 | .mode_valid = radeon_tv_mode_valid, | |
720 | .best_encoder = radeon_best_single_encoder, | |
721 | }; | |
722 | ||
723 | struct drm_connector_funcs radeon_tv_connector_funcs = { | |
724 | .dpms = drm_helper_connector_dpms, | |
725 | .detect = radeon_tv_detect, | |
726 | .fill_modes = drm_helper_probe_single_connector_modes, | |
727 | .destroy = radeon_connector_destroy, | |
728 | .set_property = radeon_connector_set_property, | |
729 | }; | |
730 | ||
771fe6b9 JG |
731 | static int radeon_dvi_get_modes(struct drm_connector *connector) |
732 | { | |
733 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
734 | int ret; | |
735 | ||
736 | ret = radeon_ddc_get_modes(radeon_connector); | |
771fe6b9 JG |
737 | return ret; |
738 | } | |
739 | ||
4ce001ab DA |
740 | /* |
741 | * DVI is complicated | |
742 | * Do a DDC probe, if DDC probe passes, get the full EDID so | |
743 | * we can do analog/digital monitor detection at this point. | |
744 | * If the monitor is an analog monitor or we got no DDC, | |
745 | * we need to find the DAC encoder object for this connector. | |
746 | * If we got no DDC, we do load detection on the DAC encoder object. | |
747 | * If we got analog DDC or load detection passes on the DAC encoder | |
748 | * we have to check if this analog encoder is shared with anyone else (TV) | |
749 | * if its shared we have to set the other connector to disconnected. | |
750 | */ | |
771fe6b9 JG |
751 | static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connector) |
752 | { | |
753 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
4ce001ab | 754 | struct drm_encoder *encoder = NULL; |
771fe6b9 JG |
755 | struct drm_encoder_helper_funcs *encoder_funcs; |
756 | struct drm_mode_object *obj; | |
757 | int i; | |
758 | enum drm_connector_status ret = connector_status_disconnected; | |
4b9d2a21 | 759 | bool dret = false; |
771fe6b9 | 760 | |
eb6b6d7c | 761 | if (radeon_connector->ddc_bus) |
4b9d2a21 | 762 | dret = radeon_ddc_probe(radeon_connector); |
4ce001ab | 763 | if (dret) { |
0294cf4f AD |
764 | if (radeon_connector->edid) { |
765 | kfree(radeon_connector->edid); | |
766 | radeon_connector->edid = NULL; | |
767 | } | |
4ce001ab | 768 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
4ce001ab DA |
769 | |
770 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
771 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
772 | drm_get_connector_name(connector)); | |
4ce001ab DA |
773 | } else { |
774 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
775 | ||
0294cf4f AD |
776 | /* some oems have boards with separate digital and analog connectors |
777 | * with a shared ddc line (often vga + hdmi) | |
778 | */ | |
779 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { | |
780 | kfree(radeon_connector->edid); | |
781 | radeon_connector->edid = NULL; | |
782 | ret = connector_status_disconnected; | |
783 | } else | |
784 | ret = connector_status_connected; | |
71407c46 | 785 | |
42f14c4b AD |
786 | /* This gets complicated. We have boards with VGA + HDMI with a |
787 | * shared DDC line and we have boards with DVI-D + HDMI with a shared | |
788 | * DDC line. The latter is more complex because with DVI<->HDMI adapters | |
789 | * you don't really know what's connected to which port as both are digital. | |
71407c46 | 790 | */ |
d3932d6c | 791 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
71407c46 | 792 | struct drm_device *dev = connector->dev; |
42f14c4b | 793 | struct radeon_device *rdev = dev->dev_private; |
71407c46 AD |
794 | struct drm_connector *list_connector; |
795 | struct radeon_connector *list_radeon_connector; | |
796 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { | |
797 | if (connector == list_connector) | |
798 | continue; | |
799 | list_radeon_connector = to_radeon_connector(list_connector); | |
b2ea4aa6 AD |
800 | if (list_radeon_connector->shared_ddc && |
801 | (list_radeon_connector->ddc_bus->rec.i2c_id == | |
802 | radeon_connector->ddc_bus->rec.i2c_id)) { | |
42f14c4b AD |
803 | /* cases where both connectors are digital */ |
804 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { | |
805 | /* hpd is our only option in this case */ | |
806 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | |
71407c46 AD |
807 | kfree(radeon_connector->edid); |
808 | radeon_connector->edid = NULL; | |
809 | ret = connector_status_disconnected; | |
810 | } | |
811 | } | |
812 | } | |
813 | } | |
814 | } | |
4ce001ab DA |
815 | } |
816 | } | |
817 | ||
818 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) | |
819 | goto out; | |
820 | ||
821 | /* find analog encoder */ | |
445282db DA |
822 | if (radeon_connector->dac_load_detect) { |
823 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
824 | if (connector->encoder_ids[i] == 0) | |
825 | break; | |
771fe6b9 | 826 | |
445282db DA |
827 | obj = drm_mode_object_find(connector->dev, |
828 | connector->encoder_ids[i], | |
829 | DRM_MODE_OBJECT_ENCODER); | |
830 | if (!obj) | |
831 | continue; | |
771fe6b9 | 832 | |
445282db | 833 | encoder = obj_to_encoder(obj); |
771fe6b9 | 834 | |
445282db DA |
835 | encoder_funcs = encoder->helper_private; |
836 | if (encoder_funcs->detect) { | |
837 | if (ret != connector_status_connected) { | |
838 | ret = encoder_funcs->detect(encoder, connector); | |
839 | if (ret == connector_status_connected) { | |
840 | radeon_connector->use_digital = false; | |
841 | } | |
771fe6b9 | 842 | } |
445282db | 843 | break; |
771fe6b9 JG |
844 | } |
845 | } | |
846 | } | |
847 | ||
4ce001ab DA |
848 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && |
849 | encoder) { | |
850 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
851 | } | |
852 | ||
853 | out: | |
771fe6b9 JG |
854 | /* updated in get modes as well since we need to know if it's analog or digital */ |
855 | radeon_connector_update_scratch_regs(connector, ret); | |
856 | return ret; | |
857 | } | |
858 | ||
859 | /* okay need to be smart in here about which encoder to pick */ | |
860 | struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) | |
861 | { | |
862 | int enc_id = connector->encoder_ids[0]; | |
863 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
864 | struct drm_mode_object *obj; | |
865 | struct drm_encoder *encoder; | |
866 | int i; | |
867 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
868 | if (connector->encoder_ids[i] == 0) | |
869 | break; | |
870 | ||
871 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
872 | if (!obj) | |
873 | continue; | |
874 | ||
875 | encoder = obj_to_encoder(obj); | |
876 | ||
4ce001ab | 877 | if (radeon_connector->use_digital == true) { |
771fe6b9 JG |
878 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) |
879 | return encoder; | |
880 | } else { | |
881 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || | |
882 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) | |
883 | return encoder; | |
884 | } | |
885 | } | |
886 | ||
887 | /* see if we have a default encoder TODO */ | |
888 | ||
889 | /* then check use digitial */ | |
890 | /* pick the first one */ | |
891 | if (enc_id) { | |
892 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
893 | if (!obj) | |
894 | return NULL; | |
895 | encoder = obj_to_encoder(obj); | |
896 | return encoder; | |
897 | } | |
898 | return NULL; | |
899 | } | |
900 | ||
d50ba256 DA |
901 | static void radeon_dvi_force(struct drm_connector *connector) |
902 | { | |
903 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
904 | if (connector->force == DRM_FORCE_ON) | |
905 | radeon_connector->use_digital = false; | |
906 | if (connector->force == DRM_FORCE_ON_DIGITAL) | |
907 | radeon_connector->use_digital = true; | |
908 | } | |
909 | ||
a3fa6320 AD |
910 | static int radeon_dvi_mode_valid(struct drm_connector *connector, |
911 | struct drm_display_mode *mode) | |
912 | { | |
1b24203e AD |
913 | struct drm_device *dev = connector->dev; |
914 | struct radeon_device *rdev = dev->dev_private; | |
a3fa6320 AD |
915 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
916 | ||
917 | /* XXX check mode bandwidth */ | |
918 | ||
1b24203e AD |
919 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
920 | if (radeon_connector->use_digital && | |
921 | (rdev->family == CHIP_RV100) && | |
922 | (mode->clock > 135000)) | |
923 | return MODE_CLOCK_HIGH; | |
924 | ||
a3fa6320 AD |
925 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
926 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | |
927 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | |
928 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | |
929 | return MODE_OK; | |
930 | else | |
931 | return MODE_CLOCK_HIGH; | |
932 | } | |
933 | return MODE_OK; | |
934 | } | |
935 | ||
771fe6b9 JG |
936 | struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
937 | .get_modes = radeon_dvi_get_modes, | |
a3fa6320 | 938 | .mode_valid = radeon_dvi_mode_valid, |
771fe6b9 JG |
939 | .best_encoder = radeon_dvi_encoder, |
940 | }; | |
941 | ||
942 | struct drm_connector_funcs radeon_dvi_connector_funcs = { | |
943 | .dpms = drm_helper_connector_dpms, | |
944 | .detect = radeon_dvi_detect, | |
945 | .fill_modes = drm_helper_probe_single_connector_modes, | |
946 | .set_property = radeon_connector_set_property, | |
947 | .destroy = radeon_connector_destroy, | |
d50ba256 | 948 | .force = radeon_dvi_force, |
771fe6b9 JG |
949 | }; |
950 | ||
ffd09c64 AD |
951 | static void radeon_dp_connector_destroy(struct drm_connector *connector) |
952 | { | |
953 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
954 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
955 | ||
ffd09c64 AD |
956 | if (radeon_connector->edid) |
957 | kfree(radeon_connector->edid); | |
958 | if (radeon_dig_connector->dp_i2c_bus) | |
ac1aade6 | 959 | radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); |
ffd09c64 AD |
960 | kfree(radeon_connector->con_priv); |
961 | drm_sysfs_connector_remove(connector); | |
962 | drm_connector_cleanup(connector); | |
963 | kfree(connector); | |
964 | } | |
965 | ||
746c1aa4 DA |
966 | static int radeon_dp_get_modes(struct drm_connector *connector) |
967 | { | |
968 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
969 | int ret; | |
970 | ||
971 | ret = radeon_ddc_get_modes(radeon_connector); | |
972 | return ret; | |
973 | } | |
974 | ||
975 | static enum drm_connector_status radeon_dp_detect(struct drm_connector *connector) | |
976 | { | |
977 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
746c1aa4 | 978 | enum drm_connector_status ret = connector_status_disconnected; |
4143e919 | 979 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
746c1aa4 DA |
980 | |
981 | if (radeon_connector->edid) { | |
982 | kfree(radeon_connector->edid); | |
983 | radeon_connector->edid = NULL; | |
984 | } | |
985 | ||
6f50eae7 AD |
986 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
987 | /* eDP is always DP */ | |
988 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
989 | if (radeon_dp_getdpcd(radeon_connector)) | |
9fa05c98 | 990 | ret = connector_status_connected; |
4143e919 | 991 | } else { |
6f50eae7 AD |
992 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
993 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { | |
994 | if (radeon_dp_getdpcd(radeon_connector)) | |
995 | ret = connector_status_connected; | |
996 | } else { | |
997 | if (radeon_ddc_probe(radeon_connector)) | |
998 | ret = connector_status_connected; | |
4143e919 | 999 | } |
746c1aa4 | 1000 | } |
4143e919 | 1001 | |
30f44372 | 1002 | radeon_connector_update_scratch_regs(connector, ret); |
746c1aa4 DA |
1003 | return ret; |
1004 | } | |
1005 | ||
5801ead6 AD |
1006 | static int radeon_dp_mode_valid(struct drm_connector *connector, |
1007 | struct drm_display_mode *mode) | |
1008 | { | |
1009 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1010 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1011 | ||
1012 | /* XXX check mode bandwidth */ | |
1013 | ||
196c58d2 AD |
1014 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || |
1015 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | |
5801ead6 AD |
1016 | return radeon_dp_mode_valid_helper(radeon_connector, mode); |
1017 | else | |
1018 | return MODE_OK; | |
1019 | } | |
1020 | ||
746c1aa4 DA |
1021 | struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
1022 | .get_modes = radeon_dp_get_modes, | |
5801ead6 | 1023 | .mode_valid = radeon_dp_mode_valid, |
746c1aa4 DA |
1024 | .best_encoder = radeon_dvi_encoder, |
1025 | }; | |
1026 | ||
1027 | struct drm_connector_funcs radeon_dp_connector_funcs = { | |
1028 | .dpms = drm_helper_connector_dpms, | |
1029 | .detect = radeon_dp_detect, | |
1030 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1031 | .set_property = radeon_connector_set_property, | |
ffd09c64 | 1032 | .destroy = radeon_dp_connector_destroy, |
746c1aa4 DA |
1033 | .force = radeon_dvi_force, |
1034 | }; | |
1035 | ||
771fe6b9 JG |
1036 | void |
1037 | radeon_add_atom_connector(struct drm_device *dev, | |
1038 | uint32_t connector_id, | |
1039 | uint32_t supported_device, | |
1040 | int connector_type, | |
1041 | struct radeon_i2c_bus_rec *i2c_bus, | |
b75fad06 | 1042 | uint32_t igp_lane_info, |
eed45b30 | 1043 | uint16_t connector_object_id, |
26b5bc98 AD |
1044 | struct radeon_hpd *hpd, |
1045 | struct radeon_router *router) | |
771fe6b9 | 1046 | { |
445282db | 1047 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1048 | struct drm_connector *connector; |
1049 | struct radeon_connector *radeon_connector; | |
1050 | struct radeon_connector_atom_dig *radeon_dig_connector; | |
1051 | uint32_t subpixel_order = SubPixelNone; | |
0294cf4f | 1052 | bool shared_ddc = false; |
771fe6b9 | 1053 | |
4ce001ab | 1054 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1055 | return; |
1056 | ||
cf4c12f9 AD |
1057 | /* if the user selected tv=0 don't try and add the connector */ |
1058 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1059 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1060 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1061 | (radeon_tv == 0)) | |
1062 | return; | |
1063 | ||
771fe6b9 JG |
1064 | /* see if we already added it */ |
1065 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1066 | radeon_connector = to_radeon_connector(connector); | |
1067 | if (radeon_connector->connector_id == connector_id) { | |
1068 | radeon_connector->devices |= supported_device; | |
1069 | return; | |
1070 | } | |
0294cf4f | 1071 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
d3932d6c | 1072 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
0294cf4f AD |
1073 | radeon_connector->shared_ddc = true; |
1074 | shared_ddc = true; | |
1075 | } | |
26b5bc98 AD |
1076 | if (radeon_connector->router_bus && router->valid && |
1077 | (radeon_connector->router.router_id == router->router_id)) { | |
1078 | radeon_connector->shared_ddc = false; | |
1079 | shared_ddc = false; | |
1080 | } | |
0294cf4f | 1081 | } |
771fe6b9 JG |
1082 | } |
1083 | ||
1084 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1085 | if (!radeon_connector) | |
1086 | return; | |
1087 | ||
1088 | connector = &radeon_connector->base; | |
1089 | ||
1090 | radeon_connector->connector_id = connector_id; | |
1091 | radeon_connector->devices = supported_device; | |
0294cf4f | 1092 | radeon_connector->shared_ddc = shared_ddc; |
b75fad06 | 1093 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1094 | radeon_connector->hpd = *hpd; |
26b5bc98 AD |
1095 | radeon_connector->router = *router; |
1096 | if (router->valid) { | |
1097 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); | |
1098 | if (!radeon_connector->router_bus) | |
1099 | goto failed; | |
1100 | } | |
771fe6b9 JG |
1101 | switch (connector_type) { |
1102 | case DRM_MODE_CONNECTOR_VGA: | |
1103 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1104 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1105 | if (i2c_bus->valid) { |
f376b94f | 1106 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1107 | if (!radeon_connector->ddc_bus) |
1108 | goto failed; | |
1109 | } | |
35e4b7af | 1110 | radeon_connector->dac_load_detect = true; |
445282db DA |
1111 | drm_connector_attach_property(&radeon_connector->base, |
1112 | rdev->mode_info.load_detect_property, | |
1113 | 1); | |
2581afcc AD |
1114 | /* no HPD on analog connectors */ |
1115 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1116 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
771fe6b9 JG |
1117 | break; |
1118 | case DRM_MODE_CONNECTOR_DVIA: | |
1119 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1120 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1121 | if (i2c_bus->valid) { |
f376b94f | 1122 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1123 | if (!radeon_connector->ddc_bus) |
1124 | goto failed; | |
1125 | } | |
35e4b7af | 1126 | radeon_connector->dac_load_detect = true; |
445282db DA |
1127 | drm_connector_attach_property(&radeon_connector->base, |
1128 | rdev->mode_info.load_detect_property, | |
1129 | 1); | |
2581afcc AD |
1130 | /* no HPD on analog connectors */ |
1131 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
771fe6b9 JG |
1132 | break; |
1133 | case DRM_MODE_CONNECTOR_DVII: | |
1134 | case DRM_MODE_CONNECTOR_DVID: | |
1135 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1136 | if (!radeon_dig_connector) | |
1137 | goto failed; | |
771fe6b9 JG |
1138 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1139 | radeon_connector->con_priv = radeon_dig_connector; | |
1140 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1141 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1142 | if (i2c_bus->valid) { |
f376b94f | 1143 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1144 | if (!radeon_connector->ddc_bus) |
1145 | goto failed; | |
1146 | } | |
1147 | subpixel_order = SubPixelHorizontalRGB; | |
445282db DA |
1148 | drm_connector_attach_property(&radeon_connector->base, |
1149 | rdev->mode_info.coherent_mode_property, | |
1150 | 1); | |
430f70d5 AD |
1151 | if (ASIC_IS_AVIVO(rdev)) |
1152 | drm_connector_attach_property(&radeon_connector->base, | |
1153 | rdev->mode_info.underscan_property, | |
1154 | UNDERSCAN_AUTO); | |
390d0bbe AD |
1155 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
1156 | radeon_connector->dac_load_detect = true; | |
1157 | drm_connector_attach_property(&radeon_connector->base, | |
1158 | rdev->mode_info.load_detect_property, | |
1159 | 1); | |
1160 | } | |
771fe6b9 JG |
1161 | break; |
1162 | case DRM_MODE_CONNECTOR_HDMIA: | |
1163 | case DRM_MODE_CONNECTOR_HDMIB: | |
1164 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1165 | if (!radeon_dig_connector) | |
1166 | goto failed; | |
771fe6b9 JG |
1167 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1168 | radeon_connector->con_priv = radeon_dig_connector; | |
1169 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1170 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1171 | if (i2c_bus->valid) { |
f376b94f | 1172 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1173 | if (!radeon_connector->ddc_bus) |
1174 | goto failed; | |
1175 | } | |
445282db DA |
1176 | drm_connector_attach_property(&radeon_connector->base, |
1177 | rdev->mode_info.coherent_mode_property, | |
1178 | 1); | |
430f70d5 AD |
1179 | if (ASIC_IS_AVIVO(rdev)) |
1180 | drm_connector_attach_property(&radeon_connector->base, | |
1181 | rdev->mode_info.underscan_property, | |
1182 | UNDERSCAN_AUTO); | |
771fe6b9 JG |
1183 | subpixel_order = SubPixelHorizontalRGB; |
1184 | break; | |
1185 | case DRM_MODE_CONNECTOR_DisplayPort: | |
196c58d2 | 1186 | case DRM_MODE_CONNECTOR_eDP: |
771fe6b9 JG |
1187 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1188 | if (!radeon_dig_connector) | |
1189 | goto failed; | |
771fe6b9 JG |
1190 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1191 | radeon_connector->con_priv = radeon_dig_connector; | |
746c1aa4 | 1192 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); |
0b4c0f3f | 1193 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); |
771fe6b9 | 1194 | if (i2c_bus->valid) { |
390d0bbe | 1195 | /* add DP i2c bus */ |
196c58d2 AD |
1196 | if (connector_type == DRM_MODE_CONNECTOR_eDP) |
1197 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1198 | else | |
1199 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
390d0bbe AD |
1200 | if (!radeon_dig_connector->dp_i2c_bus) |
1201 | goto failed; | |
f376b94f | 1202 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1203 | if (!radeon_connector->ddc_bus) |
1204 | goto failed; | |
1205 | } | |
1206 | subpixel_order = SubPixelHorizontalRGB; | |
390d0bbe AD |
1207 | drm_connector_attach_property(&radeon_connector->base, |
1208 | rdev->mode_info.coherent_mode_property, | |
1209 | 1); | |
430f70d5 AD |
1210 | if (ASIC_IS_AVIVO(rdev)) |
1211 | drm_connector_attach_property(&radeon_connector->base, | |
1212 | rdev->mode_info.underscan_property, | |
1213 | UNDERSCAN_AUTO); | |
771fe6b9 JG |
1214 | break; |
1215 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1216 | case DRM_MODE_CONNECTOR_Composite: | |
1217 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
1218 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
1219 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1220 | radeon_connector->dac_load_detect = true; | |
1221 | drm_connector_attach_property(&radeon_connector->base, | |
1222 | rdev->mode_info.load_detect_property, | |
1223 | 1); | |
1224 | drm_connector_attach_property(&radeon_connector->base, | |
1225 | rdev->mode_info.tv_std_property, | |
1226 | radeon_atombios_get_tv_info(rdev)); | |
1227 | /* no HPD on analog connectors */ | |
1228 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
771fe6b9 JG |
1229 | break; |
1230 | case DRM_MODE_CONNECTOR_LVDS: | |
1231 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1232 | if (!radeon_dig_connector) | |
1233 | goto failed; | |
771fe6b9 JG |
1234 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1235 | radeon_connector->con_priv = radeon_dig_connector; | |
1236 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 1237 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 1238 | if (i2c_bus->valid) { |
f376b94f | 1239 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1240 | if (!radeon_connector->ddc_bus) |
1241 | goto failed; | |
1242 | } | |
445282db DA |
1243 | drm_connector_attach_property(&radeon_connector->base, |
1244 | dev->mode_config.scaling_mode_property, | |
1245 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 JG |
1246 | subpixel_order = SubPixelHorizontalRGB; |
1247 | break; | |
1248 | } | |
1249 | ||
2581afcc | 1250 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1251 | if (i2c_bus->valid) |
1252 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1253 | } else | |
1254 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
1255 | ||
771fe6b9 JG |
1256 | connector->display_info.subpixel_order = subpixel_order; |
1257 | drm_sysfs_connector_add(connector); | |
1258 | return; | |
1259 | ||
1260 | failed: | |
771fe6b9 JG |
1261 | drm_connector_cleanup(connector); |
1262 | kfree(connector); | |
1263 | } | |
1264 | ||
1265 | void | |
1266 | radeon_add_legacy_connector(struct drm_device *dev, | |
1267 | uint32_t connector_id, | |
1268 | uint32_t supported_device, | |
1269 | int connector_type, | |
b75fad06 | 1270 | struct radeon_i2c_bus_rec *i2c_bus, |
eed45b30 AD |
1271 | uint16_t connector_object_id, |
1272 | struct radeon_hpd *hpd) | |
771fe6b9 | 1273 | { |
445282db | 1274 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1275 | struct drm_connector *connector; |
1276 | struct radeon_connector *radeon_connector; | |
1277 | uint32_t subpixel_order = SubPixelNone; | |
1278 | ||
4ce001ab | 1279 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1280 | return; |
1281 | ||
cf4c12f9 AD |
1282 | /* if the user selected tv=0 don't try and add the connector */ |
1283 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1284 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1285 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1286 | (radeon_tv == 0)) | |
1287 | return; | |
1288 | ||
771fe6b9 JG |
1289 | /* see if we already added it */ |
1290 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1291 | radeon_connector = to_radeon_connector(connector); | |
1292 | if (radeon_connector->connector_id == connector_id) { | |
1293 | radeon_connector->devices |= supported_device; | |
1294 | return; | |
1295 | } | |
1296 | } | |
1297 | ||
1298 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1299 | if (!radeon_connector) | |
1300 | return; | |
1301 | ||
1302 | connector = &radeon_connector->base; | |
1303 | ||
1304 | radeon_connector->connector_id = connector_id; | |
1305 | radeon_connector->devices = supported_device; | |
b75fad06 | 1306 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1307 | radeon_connector->hpd = *hpd; |
771fe6b9 JG |
1308 | switch (connector_type) { |
1309 | case DRM_MODE_CONNECTOR_VGA: | |
1310 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1311 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1312 | if (i2c_bus->valid) { |
f376b94f | 1313 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1314 | if (!radeon_connector->ddc_bus) |
1315 | goto failed; | |
1316 | } | |
35e4b7af | 1317 | radeon_connector->dac_load_detect = true; |
445282db DA |
1318 | drm_connector_attach_property(&radeon_connector->base, |
1319 | rdev->mode_info.load_detect_property, | |
1320 | 1); | |
2581afcc AD |
1321 | /* no HPD on analog connectors */ |
1322 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1323 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
771fe6b9 JG |
1324 | break; |
1325 | case DRM_MODE_CONNECTOR_DVIA: | |
1326 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1327 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1328 | if (i2c_bus->valid) { |
f376b94f | 1329 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1330 | if (!radeon_connector->ddc_bus) |
1331 | goto failed; | |
1332 | } | |
35e4b7af | 1333 | radeon_connector->dac_load_detect = true; |
445282db DA |
1334 | drm_connector_attach_property(&radeon_connector->base, |
1335 | rdev->mode_info.load_detect_property, | |
1336 | 1); | |
2581afcc AD |
1337 | /* no HPD on analog connectors */ |
1338 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
771fe6b9 JG |
1339 | break; |
1340 | case DRM_MODE_CONNECTOR_DVII: | |
1341 | case DRM_MODE_CONNECTOR_DVID: | |
1342 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1343 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1344 | if (i2c_bus->valid) { |
f376b94f | 1345 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1346 | if (!radeon_connector->ddc_bus) |
1347 | goto failed; | |
68b3adb4 AD |
1348 | } |
1349 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
35e4b7af | 1350 | radeon_connector->dac_load_detect = true; |
445282db DA |
1351 | drm_connector_attach_property(&radeon_connector->base, |
1352 | rdev->mode_info.load_detect_property, | |
1353 | 1); | |
771fe6b9 JG |
1354 | } |
1355 | subpixel_order = SubPixelHorizontalRGB; | |
1356 | break; | |
1357 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1358 | case DRM_MODE_CONNECTOR_Composite: | |
1359 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
1360 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
1361 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1362 | radeon_connector->dac_load_detect = true; | |
1363 | /* RS400,RC410,RS480 chipset seems to report a lot | |
1364 | * of false positive on load detect, we haven't yet | |
1365 | * found a way to make load detect reliable on those | |
1366 | * chipset, thus just disable it for TV. | |
1367 | */ | |
1368 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) | |
1369 | radeon_connector->dac_load_detect = false; | |
1370 | drm_connector_attach_property(&radeon_connector->base, | |
1371 | rdev->mode_info.load_detect_property, | |
1372 | radeon_connector->dac_load_detect); | |
1373 | drm_connector_attach_property(&radeon_connector->base, | |
1374 | rdev->mode_info.tv_std_property, | |
1375 | radeon_combios_get_tv_info(rdev)); | |
1376 | /* no HPD on analog connectors */ | |
1377 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
771fe6b9 JG |
1378 | break; |
1379 | case DRM_MODE_CONNECTOR_LVDS: | |
1380 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 1381 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 1382 | if (i2c_bus->valid) { |
f376b94f | 1383 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 JG |
1384 | if (!radeon_connector->ddc_bus) |
1385 | goto failed; | |
1386 | } | |
445282db DA |
1387 | drm_connector_attach_property(&radeon_connector->base, |
1388 | dev->mode_config.scaling_mode_property, | |
1389 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 JG |
1390 | subpixel_order = SubPixelHorizontalRGB; |
1391 | break; | |
1392 | } | |
1393 | ||
2581afcc | 1394 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1395 | if (i2c_bus->valid) |
1396 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1397 | } else | |
1398 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
771fe6b9 JG |
1399 | connector->display_info.subpixel_order = subpixel_order; |
1400 | drm_sysfs_connector_add(connector); | |
1401 | return; | |
1402 | ||
1403 | failed: | |
771fe6b9 JG |
1404 | drm_connector_cleanup(connector); |
1405 | kfree(connector); | |
1406 | } |