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drm/radeon: add an output_csc property
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
JG		 1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH		 26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon.h"
1a626b68 32#include "radeon_audio.h"
923f6848 33#include "atom.h"
771fe6b9 34
10ebc0bc
DA		 35#include <linux/pm_runtime.h>
36
d4877cf2
AD		 37void radeon_connector_hotplug(struct drm_connector *connector)
38{
39 struct drm_device *dev = connector->dev;
40 struct radeon_device *rdev = dev->dev_private;
41 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
42
cbac9543
AD		 43 /* bail if the connector does not have hpd pin, e.g.,
44 * VGA, TV, etc.
45 */
46 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
47 return;
48
1e85e1d0 49 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 50
73104b5c 51 /* if the connector is already off, don't turn it back on */
6e9f798d 52 /* FIXME: This access isn't protected by any locks. */
73104b5c
AD		 53 if (connector->dpms != DRM_MODE_DPMS_ON)
54 return;
55
d5811e87
AD		 56 /* just deal with DP (not eDP) here. */
57 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG		 58 struct radeon_connector_atom_dig *dig_connector =
59 radeon_connector->con_priv;
7c3ed0fd 60
266dcba5
JG		 61 /* if existing sink type was not DP no need to retrain */
62 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
63 return;
64
65 /* first get sink type as it may be reset after (un)plug */
66 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
67 /* don't do anything if sink is not display port, i.e.,
68 * passive dp->(dvi|hdmi) adaptor
69 */
70 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
71 int saved_dpms = connector->dpms;
72 /* Only turn off the display if it's physically disconnected */
ca2ccde5 73 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
266dcba5 74 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
ca2ccde5
JG		 75 } else if (radeon_dp_needs_link_train(radeon_connector)) {
76 /* set it to OFF so that drm_helper_connector_dpms()
77 * won't return immediately since the current state
78 * is ON at this point.
79 */
80 connector->dpms = DRM_MODE_DPMS_OFF;
266dcba5 81 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
ca2ccde5 82 }
266dcba5
JG		 83 connector->dpms = saved_dpms;
84 }
d4877cf2 85 }
d4877cf2
AD		 86}
87
445282db
DA		 88static void radeon_property_change_mode(struct drm_encoder *encoder)
89{
90 struct drm_crtc *crtc = encoder->crtc;
91
92 if (crtc && crtc->enabled) {
93 drm_crtc_helper_set_mode(crtc, &crtc->mode,
f4510a27 94 crtc->x, crtc->y, crtc->primary->fb);
445282db
DA		 95 }
96}
eccea792
AD		 97
98int radeon_get_monitor_bpc(struct drm_connector *connector)
99{
100 struct drm_device *dev = connector->dev;
101 struct radeon_device *rdev = dev->dev_private;
102 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
103 struct radeon_connector_atom_dig *dig_connector;
104 int bpc = 8;
ea292861 105 int mode_clock, max_tmds_clock;
eccea792
AD		 106
107 switch (connector->connector_type) {
108 case DRM_MODE_CONNECTOR_DVII:
109 case DRM_MODE_CONNECTOR_HDMIB:
110 if (radeon_connector->use_digital) {
377bd8a9 111 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 112 if (connector->display_info.bpc)
113 bpc = connector->display_info.bpc;
114 }
115 }
116 break;
117 case DRM_MODE_CONNECTOR_DVID:
118 case DRM_MODE_CONNECTOR_HDMIA:
377bd8a9 119 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 120 if (connector->display_info.bpc)
121 bpc = connector->display_info.bpc;
122 }
123 break;
124 case DRM_MODE_CONNECTOR_DisplayPort:
125 dig_connector = radeon_connector->con_priv;
126 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
127 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
377bd8a9 128 drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 129 if (connector->display_info.bpc)
130 bpc = connector->display_info.bpc;
131 }
132 break;
133 case DRM_MODE_CONNECTOR_eDP:
134 case DRM_MODE_CONNECTOR_LVDS:
135 if (connector->display_info.bpc)
136 bpc = connector->display_info.bpc;
137 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
138 struct drm_connector_helper_funcs *connector_funcs =
139 connector->helper_private;
140 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
141 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
142 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
143
144 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
145 bpc = 6;
146 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
147 bpc = 8;
148 }
149 break;
150 }
89b92339 151
377bd8a9 152 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
89b92339
MK		 153 /* hdmi deep color only implemented on DCE4+ */
154 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
155 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
72082093 156 connector->name, bpc);
89b92339
MK		 157 bpc = 8;
158 }
159
160 /*
161 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
162 * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
163 * 12 bpc is always supported on hdmi deep color sinks, as this is
164 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
165 */
166 if (bpc > 12) {
167 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
72082093 168 connector->name, bpc);
89b92339
MK		 169 bpc = 12;
170 }
ea292861
MK		 171
172 /* Any defined maximum tmds clock limit we must not exceed? */
173 if (connector->max_tmds_clock > 0) {
174 /* mode_clock is clock in kHz for mode to be modeset on this connector */
175 mode_clock = radeon_connector->pixelclock_for_modeset;
176
177 /* Maximum allowable input clock in kHz */
178 max_tmds_clock = connector->max_tmds_clock * 1000;
179
180 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
181 connector->name, mode_clock, max_tmds_clock);
182
183 /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
184 if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
185 if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
186 (mode_clock * 5/4 <= max_tmds_clock))
187 bpc = 10;
188 else
189 bpc = 8;
190
191 DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
192 connector->name, bpc);
193 }
194
195 if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
196 bpc = 8;
197 DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
198 connector->name, bpc);
199 }
200 }
9f51e2e0
MK		 201 else if (bpc > 8) {
202 /* max_tmds_clock missing, but hdmi spec mandates it for deep color. */
203 DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n",
204 connector->name);
205 bpc = 8;
206 }
89b92339
MK		 207 }
208
9f51e2e0
MK		 209 if ((radeon_deep_color == 0) && (bpc > 8)) {
210 DRM_DEBUG("%s: Deep color disabled. Set radeon module param deep_color=1 to enable.\n",
211 connector->name);
a624f429 212 bpc = 8;
9f51e2e0 213 }
a624f429 214
89b92339 215 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
72082093 216 connector->name, connector->display_info.bpc, bpc);
89b92339 217
eccea792
AD		 218 return bpc;
219}
220
771fe6b9
JG		 221static void
222radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
223{
224 struct drm_device *dev = connector->dev;
225 struct radeon_device *rdev = dev->dev_private;
226 struct drm_encoder *best_encoder = NULL;
227 struct drm_encoder *encoder = NULL;
228 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
771fe6b9
JG		 229 bool connected;
230 int i;
231
232 best_encoder = connector_funcs->best_encoder(connector);
233
234 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
235 if (connector->encoder_ids[i] == 0)
236 break;
237
b957f457
RC		 238 encoder = drm_encoder_find(connector->dev,
239 connector->encoder_ids[i]);
240 if (!encoder)
771fe6b9
JG		 241 continue;
242
771fe6b9
JG		 243 if ((encoder == best_encoder) && (status == connector_status_connected))
244 connected = true;
245 else
246 connected = false;
247
248 if (rdev->is_atom_bios)
249 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
250 else
251 radeon_combios_connected_scratch_regs(connector, encoder, connected);
252
253 }
254}
255
1109ca09 256static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
445282db 257{
445282db
DA		 258 struct drm_encoder *encoder;
259 int i;
260
261 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
262 if (connector->encoder_ids[i] == 0)
263 break;
264
b957f457
RC		 265 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
266 if (!encoder)
445282db
DA		 267 continue;
268
445282db
DA		 269 if (encoder->encoder_type == encoder_type)
270 return encoder;
271 }
272 return NULL;
273}
274
377bd8a9
AD		 275struct edid *radeon_connector_edid(struct drm_connector *connector)
276{
277 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
278 struct drm_property_blob *edid_blob = connector->edid_blob_ptr;
279
280 if (radeon_connector->edid) {
281 return radeon_connector->edid;
282 } else if (edid_blob) {
283 struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL);
284 if (edid)
285 radeon_connector->edid = edid;
286 }
287 return radeon_connector->edid;
288}
289
72a5c970
AD		 290static void radeon_connector_get_edid(struct drm_connector *connector)
291{
292 struct drm_device *dev = connector->dev;
293 struct radeon_device *rdev = dev->dev_private;
294 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
295
296 if (radeon_connector->edid)
297 return;
298
299 /* on hw with routers, select right port */
300 if (radeon_connector->router.ddc_valid)
301 radeon_router_select_ddc_port(radeon_connector);
302
303 if ((radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
304 ENCODER_OBJECT_ID_NONE) &&
305 radeon_connector->ddc_bus->has_aux) {
306 radeon_connector->edid = drm_get_edid(connector,
307 &radeon_connector->ddc_bus->aux.ddc);
308 } else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
309 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
310 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
311
312 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
313 dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) &&
314 radeon_connector->ddc_bus->has_aux)
315 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
316 &radeon_connector->ddc_bus->aux.ddc);
317 else if (radeon_connector->ddc_bus)
318 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
319 &radeon_connector->ddc_bus->adapter);
320 } else if (radeon_connector->ddc_bus) {
321 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
322 &radeon_connector->ddc_bus->adapter);
323 }
324
325 if (!radeon_connector->edid) {
13485794
AD		 326 /* don't fetch the edid from the vbios if ddc fails and runpm is
327 * enabled so we report disconnected.
328 */
329 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
330 return;
331
72a5c970
AD		 332 if (rdev->is_atom_bios) {
333 /* some laptops provide a hardcoded edid in rom for LCDs */
334 if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS) ||
335 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)))
336 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
337 } else {
338 /* some servers provide a hardcoded edid in rom for KVMs */
339 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
340 }
341 }
342}
343
344static void radeon_connector_free_edid(struct drm_connector *connector)
345{
346 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
347
348 if (radeon_connector->edid) {
349 kfree(radeon_connector->edid);
350 radeon_connector->edid = NULL;
351 }
352}
353
354static int radeon_ddc_get_modes(struct drm_connector *connector)
355{
356 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
357 int ret;
358
359 if (radeon_connector->edid) {
360 drm_mode_connector_update_edid_property(connector, radeon_connector->edid);
361 ret = drm_add_edid_modes(connector, radeon_connector->edid);
362 drm_edid_to_eld(connector, radeon_connector->edid);
363 return ret;
364 }
365 drm_mode_connector_update_edid_property(connector, NULL);
366 return 0;
367}
368
1109ca09 369static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
771fe6b9
JG		 370{
371 int enc_id = connector->encoder_ids[0];
771fe6b9 372 /* pick the encoder ids */
b957f457
RC		 373 if (enc_id)
374 return drm_encoder_find(connector->dev, enc_id);
771fe6b9
JG		 375 return NULL;
376}
377
da997620
AD		 378static void radeon_get_native_mode(struct drm_connector *connector)
379{
380 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
381 struct radeon_encoder *radeon_encoder;
382
383 if (encoder == NULL)
384 return;
385
386 radeon_encoder = to_radeon_encoder(encoder);
387
388 if (!list_empty(&connector->probed_modes)) {
389 struct drm_display_mode *preferred_mode =
390 list_first_entry(&connector->probed_modes,
391 struct drm_display_mode, head);
392
393 radeon_encoder->native_mode = *preferred_mode;
394 } else {
395 radeon_encoder->native_mode.clock = 0;
396 }
397}
398
4ce001ab
DA		 399/*
400 * radeon_connector_analog_encoder_conflict_solve
401 * - search for other connectors sharing this encoder
402 * if priority is true, then set them disconnected if this is connected
403 * if priority is false, set us disconnected if they are connected
404 */
405static enum drm_connector_status
406radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
407 struct drm_encoder *encoder,
408 enum drm_connector_status current_status,
409 bool priority)
410{
411 struct drm_device *dev = connector->dev;
412 struct drm_connector *conflict;
08d07511 413 struct radeon_connector *radeon_conflict;
4ce001ab
DA		 414 int i;
415
416 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
417 if (conflict == connector)
418 continue;
419
08d07511 420 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA		 421 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
422 if (conflict->encoder_ids[i] == 0)
423 break;
424
425 /* if the IDs match */
426 if (conflict->encoder_ids[i] == encoder->base.id) {
427 if (conflict->status != connector_status_connected)
428 continue;
08d07511
AD		 429
430 if (radeon_conflict->use_digital)
431 continue;
4ce001ab
DA		 432
433 if (priority == true) {
72082093
JN		 434 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
435 conflict->name);
436 DRM_DEBUG_KMS("in favor of %s\n",
437 connector->name);
4ce001ab
DA		 438 conflict->status = connector_status_disconnected;
439 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
440 } else {
72082093
JN		 441 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
442 connector->name);
443 DRM_DEBUG_KMS("in favor of %s\n",
444 conflict->name);
4ce001ab
DA		 445 current_status = connector_status_disconnected;
446 }
447 break;
448 }
449 }
450 }
451 return current_status;
452
453}
454
771fe6b9
JG		 455static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
456{
457 struct drm_device *dev = encoder->dev;
458 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
459 struct drm_display_mode *mode = NULL;
de2103e4 460 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 461
de2103e4
AD		 462 if (native_mode->hdisplay != 0 &&
463 native_mode->vdisplay != 0 &&
464 native_mode->clock != 0) {
fb06ca8f 465 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG		 466 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
467 drm_mode_set_name(mode);
468
d9fdaafb 469 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD		 470 } else if (native_mode->hdisplay != 0 &&
471 native_mode->vdisplay != 0) {
472 /* mac laptops without an edid */
473 /* Note that this is not necessarily the exact panel mode,
474 * but an approximation based on the cvt formula. For these
475 * systems we should ideally read the mode info out of the
476 * registers or add a mode table, but this works and is much
477 * simpler.
478 */
479 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
480 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 481 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG		 482 }
483 return mode;
484}
485
923f6848
AD		 486static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
487{
488 struct drm_device *dev = encoder->dev;
489 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
490 struct drm_display_mode *mode = NULL;
de2103e4 491 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD		 492 int i;
493 struct mode_size {
494 int w;
495 int h;
496 } common_modes[17] = {
497 { 640, 480},
498 { 720, 480},
499 { 800, 600},
500 { 848, 480},
501 {1024, 768},
502 {1152, 768},
503 {1280, 720},
504 {1280, 800},
505 {1280, 854},
506 {1280, 960},
507 {1280, 1024},
508 {1440, 900},
509 {1400, 1050},
510 {1680, 1050},
511 {1600, 1200},
512 {1920, 1080},
513 {1920, 1200}
514 };
515
516 for (i = 0; i < 17; i++) {
dfdd6467
AD		 517 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
518 if (common_modes[i].w > 1024 ||
519 common_modes[i].h > 768)
520 continue;
521 }
923f6848 522 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD		 523 if (common_modes[i].w > native_mode->hdisplay ||
524 common_modes[i].h > native_mode->vdisplay ||
525 (common_modes[i].w == native_mode->hdisplay &&
526 common_modes[i].h == native_mode->vdisplay))
923f6848
AD		 527 continue;
528 }
529 if (common_modes[i].w < 320 || common_modes[i].h < 200)
530 continue;
531
d50ba256 532 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD		 533 drm_mode_probed_add(connector, mode);
534 }
535}
536
1109ca09 537static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
771fe6b9
JG		 538 uint64_t val)
539{
445282db
DA		 540 struct drm_device *dev = connector->dev;
541 struct radeon_device *rdev = dev->dev_private;
542 struct drm_encoder *encoder;
543 struct radeon_encoder *radeon_encoder;
544
545 if (property == rdev->mode_info.coherent_mode_property) {
546 struct radeon_encoder_atom_dig *dig;
ce227c41 547 bool new_coherent_mode;
445282db
DA		 548
549 /* need to find digital encoder on connector */
550 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
551 if (!encoder)
552 return 0;
553
554 radeon_encoder = to_radeon_encoder(encoder);
555
556 if (!radeon_encoder->enc_priv)
557 return 0;
558
559 dig = radeon_encoder->enc_priv;
ce227c41
DA		 560 new_coherent_mode = val ? true : false;
561 if (dig->coherent_mode != new_coherent_mode) {
562 dig->coherent_mode = new_coherent_mode;
563 radeon_property_change_mode(&radeon_encoder->base);
564 }
445282db
DA		 565 }
566
8666c076
AD		 567 if (property == rdev->mode_info.audio_property) {
568 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
569 /* need to find digital encoder on connector */
570 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
571 if (!encoder)
572 return 0;
573
574 radeon_encoder = to_radeon_encoder(encoder);
575
576 if (radeon_connector->audio != val) {
577 radeon_connector->audio = val;
578 radeon_property_change_mode(&radeon_encoder->base);
579 }
580 }
581
6214bb74
AD		 582 if (property == rdev->mode_info.dither_property) {
583 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
584 /* need to find digital encoder on connector */
585 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
586 if (!encoder)
587 return 0;
588
589 radeon_encoder = to_radeon_encoder(encoder);
590
591 if (radeon_connector->dither != val) {
592 radeon_connector->dither = val;
593 radeon_property_change_mode(&radeon_encoder->base);
594 }
595 }
596
5b1714d3
AD		 597 if (property == rdev->mode_info.underscan_property) {
598 /* need to find digital encoder on connector */
599 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
600 if (!encoder)
601 return 0;
602
603 radeon_encoder = to_radeon_encoder(encoder);
604
605 if (radeon_encoder->underscan_type != val) {
606 radeon_encoder->underscan_type = val;
607 radeon_property_change_mode(&radeon_encoder->base);
608 }
609 }
610
5bccf5e3
MG		 611 if (property == rdev->mode_info.underscan_hborder_property) {
612 /* need to find digital encoder on connector */
613 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
614 if (!encoder)
615 return 0;
616
617 radeon_encoder = to_radeon_encoder(encoder);
618
619 if (radeon_encoder->underscan_hborder != val) {
620 radeon_encoder->underscan_hborder = val;
621 radeon_property_change_mode(&radeon_encoder->base);
622 }
623 }
624
625 if (property == rdev->mode_info.underscan_vborder_property) {
626 /* need to find digital encoder on connector */
627 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
628 if (!encoder)
629 return 0;
630
631 radeon_encoder = to_radeon_encoder(encoder);
632
633 if (radeon_encoder->underscan_vborder != val) {
634 radeon_encoder->underscan_vborder = val;
635 radeon_property_change_mode(&radeon_encoder->base);
636 }
637 }
638
445282db
DA		 639 if (property == rdev->mode_info.tv_std_property) {
640 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
641 if (!encoder) {
642 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
643 }
644
645 if (!encoder)
646 return 0;
647
648 radeon_encoder = to_radeon_encoder(encoder);
649 if (!radeon_encoder->enc_priv)
650 return 0;
643acacf 651 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA		 652 struct radeon_encoder_atom_dac *dac_int;
653 dac_int = radeon_encoder->enc_priv;
654 dac_int->tv_std = val;
655 } else {
656 struct radeon_encoder_tv_dac *dac_int;
657 dac_int = radeon_encoder->enc_priv;
658 dac_int->tv_std = val;
659 }
660 radeon_property_change_mode(&radeon_encoder->base);
661 }
662
663 if (property == rdev->mode_info.load_detect_property) {
664 struct radeon_connector *radeon_connector =
665 to_radeon_connector(connector);
666
667 if (val == 0)
668 radeon_connector->dac_load_detect = false;
669 else
670 radeon_connector->dac_load_detect = true;
671 }
672
673 if (property == rdev->mode_info.tmds_pll_property) {
674 struct radeon_encoder_int_tmds *tmds = NULL;
675 bool ret = false;
676 /* need to find digital encoder on connector */
677 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
678 if (!encoder)
679 return 0;
680
681 radeon_encoder = to_radeon_encoder(encoder);
682
683 tmds = radeon_encoder->enc_priv;
684 if (!tmds)
685 return 0;
686
687 if (val == 0) {
688 if (rdev->is_atom_bios)
689 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
690 else
691 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
692 }
693 if (val == 1 || ret == false) {
694 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
695 }
696 radeon_property_change_mode(&radeon_encoder->base);
697 }
698
da997620
AD		 699 if (property == dev->mode_config.scaling_mode_property) {
700 enum radeon_rmx_type rmx_type;
701
702 if (connector->encoder)
703 radeon_encoder = to_radeon_encoder(connector->encoder);
704 else {
705 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
706 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
707 }
708
709 switch (val) {
710 default:
711 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
712 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
713 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
714 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
715 }
716 if (radeon_encoder->rmx_type == rmx_type)
717 return 0;
718
719 if ((rmx_type != DRM_MODE_SCALE_NONE) &&
720 (radeon_encoder->native_mode.clock == 0))
721 return 0;
722
723 radeon_encoder->rmx_type = rmx_type;
724
725 radeon_property_change_mode(&radeon_encoder->base);
726 }
727
771fe6b9
JG		 728 return 0;
729}
730
8dfaa8a7
MD		 731static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
732 struct drm_connector *connector)
733{
734 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 735 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG		 736 struct drm_display_mode *t, *mode;
737
738 /* If the EDID preferred mode doesn't match the native mode, use it */
739 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
740 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
741 if (mode->hdisplay != native_mode->hdisplay ||
742 mode->vdisplay != native_mode->vdisplay)
743 memcpy(native_mode, mode, sizeof(*mode));
744 }
745 }
8dfaa8a7
MD		 746
747 /* Try to get native mode details from EDID if necessary */
de2103e4 748 if (!native_mode->clock) {
8dfaa8a7 749 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD		 750 if (mode->hdisplay == native_mode->hdisplay &&
751 mode->vdisplay == native_mode->vdisplay) {
752 *native_mode = *mode;
753 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 754 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD		 755 break;
756 }
757 }
758 }
13bb9430 759
de2103e4 760 if (!native_mode->clock) {
c5d46b4e 761 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD		 762 radeon_encoder->rmx_type = RMX_OFF;
763 }
764}
771fe6b9
JG		 765
766static int radeon_lvds_get_modes(struct drm_connector *connector)
767{
771fe6b9
JG		 768 struct drm_encoder *encoder;
769 int ret = 0;
770 struct drm_display_mode *mode;
771
72a5c970
AD		 772 radeon_connector_get_edid(connector);
773 ret = radeon_ddc_get_modes(connector);
774 if (ret > 0) {
775 encoder = radeon_best_single_encoder(connector);
776 if (encoder) {
777 radeon_fixup_lvds_native_mode(encoder, connector);
778 /* add scaled modes */
779 radeon_add_common_modes(encoder, connector);
771fe6b9 780 }
72a5c970 781 return ret;
771fe6b9
JG		 782 }
783
784 encoder = radeon_best_single_encoder(connector);
785 if (!encoder)
786 return 0;
787
788 /* we have no EDID modes */
789 mode = radeon_fp_native_mode(encoder);
790 if (mode) {
791 ret = 1;
792 drm_mode_probed_add(connector, mode);
7a868e18
AD		 793 /* add the width/height from vbios tables if available */
794 connector->display_info.width_mm = mode->width_mm;
795 connector->display_info.height_mm = mode->height_mm;
7747b713
AD		 796 /* add scaled modes */
797 radeon_add_common_modes(encoder, connector);
771fe6b9 798 }
923f6848 799
771fe6b9
JG		 800 return ret;
801}
802
803static int radeon_lvds_mode_valid(struct drm_connector *connector,
804 struct drm_display_mode *mode)
805{
a3fa6320
AD		 806 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
807
808 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
809 return MODE_PANEL;
810
811 if (encoder) {
812 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
813 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
814
815 /* AVIVO hardware supports downscaling modes larger than the panel
816 * to the panel size, but I'm not sure this is desirable.
817 */
818 if ((mode->hdisplay > native_mode->hdisplay) ||
819 (mode->vdisplay > native_mode->vdisplay))
820 return MODE_PANEL;
821
822 /* if scaling is disabled, block non-native modes */
823 if (radeon_encoder->rmx_type == RMX_OFF) {
824 if ((mode->hdisplay != native_mode->hdisplay) ||
825 (mode->vdisplay != native_mode->vdisplay))
826 return MODE_PANEL;
827 }
828 }
829
771fe6b9
JG		 830 return MODE_OK;
831}
832
7b334fcb 833static enum drm_connector_status
930a9e28 834radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 835{
13485794
AD		 836 struct drm_device *dev = connector->dev;
837 struct radeon_device *rdev = dev->dev_private;
0549a061 838 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 839 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 840 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 841 int r;
842
843 r = pm_runtime_get_sync(connector->dev->dev);
844 if (r < 0)
845 return connector_status_disconnected;
2ffb8429
AD		 846
847 if (encoder) {
848 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 849 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD		 850
851 /* check if panel is valid */
de2103e4 852 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429 853 ret = connector_status_connected;
13485794
AD		 854 /* don't fetch the edid from the vbios if ddc fails and runpm is
855 * enabled so we report disconnected.
856 */
857 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
858 ret = connector_status_disconnected;
2ffb8429 859 }
0549a061
AD		 860
861 /* check for edid as well */
72a5c970 862 radeon_connector_get_edid(connector);
0294cf4f
AD		 863 if (radeon_connector->edid)
864 ret = connector_status_connected;
771fe6b9 865 /* check acpi lid status ??? */
2ffb8429 866
771fe6b9 867 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 868 pm_runtime_mark_last_busy(connector->dev->dev);
869 pm_runtime_put_autosuspend(connector->dev->dev);
771fe6b9
JG		 870 return ret;
871}
872
873static void radeon_connector_destroy(struct drm_connector *connector)
874{
875 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
876
72a5c970 877 radeon_connector_free_edid(connector);
771fe6b9 878 kfree(radeon_connector->con_priv);
34ea3d38 879 drm_connector_unregister(connector);
771fe6b9
JG		 880 drm_connector_cleanup(connector);
881 kfree(connector);
882}
883
445282db
DA		 884static int radeon_lvds_set_property(struct drm_connector *connector,
885 struct drm_property *property,
886 uint64_t value)
887{
888 struct drm_device *dev = connector->dev;
889 struct radeon_encoder *radeon_encoder;
890 enum radeon_rmx_type rmx_type;
891
d9fdaafb 892 DRM_DEBUG_KMS("\n");
445282db
DA		 893 if (property != dev->mode_config.scaling_mode_property)
894 return 0;
895
896 if (connector->encoder)
897 radeon_encoder = to_radeon_encoder(connector->encoder);
898 else {
899 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
900 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
901 }
902
903 switch (value) {
904 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
905 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
906 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
907 default:
908 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
909 }
910 if (radeon_encoder->rmx_type == rmx_type)
911 return 0;
912
913 radeon_encoder->rmx_type = rmx_type;
914
915 radeon_property_change_mode(&radeon_encoder->base);
916 return 0;
917}
918
919
1109ca09 920static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
771fe6b9
JG		 921 .get_modes = radeon_lvds_get_modes,
922 .mode_valid = radeon_lvds_mode_valid,
923 .best_encoder = radeon_best_single_encoder,
924};
925
1109ca09 926static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
771fe6b9
JG		 927 .dpms = drm_helper_connector_dpms,
928 .detect = radeon_lvds_detect,
929 .fill_modes = drm_helper_probe_single_connector_modes,
930 .destroy = radeon_connector_destroy,
445282db 931 .set_property = radeon_lvds_set_property,
771fe6b9
JG		 932};
933
934static int radeon_vga_get_modes(struct drm_connector *connector)
935{
771fe6b9
JG		 936 int ret;
937
72a5c970
AD		 938 radeon_connector_get_edid(connector);
939 ret = radeon_ddc_get_modes(connector);
771fe6b9 940
da997620
AD		 941 radeon_get_native_mode(connector);
942
771fe6b9
JG		 943 return ret;
944}
945
946static int radeon_vga_mode_valid(struct drm_connector *connector,
947 struct drm_display_mode *mode)
948{
b20f9bef
AD		 949 struct drm_device *dev = connector->dev;
950 struct radeon_device *rdev = dev->dev_private;
951
a3fa6320 952 /* XXX check mode bandwidth */
b20f9bef
AD		 953
954 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
955 return MODE_CLOCK_HIGH;
956
771fe6b9
JG		 957 return MODE_OK;
958}
959
7b334fcb 960static enum drm_connector_status
930a9e28 961radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 962{
fafcf94e
AD		 963 struct drm_device *dev = connector->dev;
964 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 965 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
966 struct drm_encoder *encoder;
967 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 968 bool dret = false;
771fe6b9 969 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 970 int r;
971
972 r = pm_runtime_get_sync(connector->dev->dev);
973 if (r < 0)
974 return connector_status_disconnected;
771fe6b9 975
4ce001ab
DA		 976 encoder = radeon_best_single_encoder(connector);
977 if (!encoder)
978 ret = connector_status_disconnected;
979
eb6b6d7c 980 if (radeon_connector->ddc_bus)
0a9069d3 981 dret = radeon_ddc_probe(radeon_connector, false);
0294cf4f 982 if (dret) {
d0d0a225 983 radeon_connector->detected_by_load = false;
72a5c970
AD		 984 radeon_connector_free_edid(connector);
985 radeon_connector_get_edid(connector);
0294cf4f
AD		 986
987 if (!radeon_connector->edid) {
f82f5f3a 988 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 989 connector->name);
f82f5f3a 990 ret = connector_status_connected;
0294cf4f 991 } else {
72a5c970
AD		 992 radeon_connector->use_digital =
993 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
0294cf4f
AD		 994
995 /* some oems have boards with separate digital and analog connectors
996 * with a shared ddc line (often vga + hdmi)
997 */
998 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
72a5c970 999 radeon_connector_free_edid(connector);
0294cf4f 1000 ret = connector_status_disconnected;
72a5c970 1001 } else {
0294cf4f 1002 ret = connector_status_connected;
72a5c970 1003 }
0294cf4f
AD		 1004 }
1005 } else {
c3cceedd
DA		 1006
1007 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD		 1008 if (!force) {
1009 /* only return the previous status if we last
1010 * detected a monitor via load.
1011 */
1012 if (radeon_connector->detected_by_load)
10ebc0bc
DA		 1013 ret = connector->status;
1014 goto out;
d0d0a225 1015 }
c3cceedd 1016
d8a7f792 1017 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA		 1018 encoder_funcs = encoder->helper_private;
1019 ret = encoder_funcs->detect(encoder, connector);
34076446 1020 if (ret != connector_status_disconnected)
d0d0a225 1021 radeon_connector->detected_by_load = true;
445282db 1022 }
771fe6b9
JG		 1023 }
1024
4ce001ab
DA		 1025 if (ret == connector_status_connected)
1026 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD		 1027
1028 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1029 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1030 * by other means, assume the CRT is connected and use that EDID.
1031 */
1032 if ((!rdev->is_atom_bios) &&
1033 (ret == connector_status_disconnected) &&
1034 rdev->mode_info.bios_hardcoded_edid_size) {
1035 ret = connector_status_connected;
1036 }
1037
771fe6b9 1038 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1039
1040out:
1041 pm_runtime_mark_last_busy(connector->dev->dev);
1042 pm_runtime_put_autosuspend(connector->dev->dev);
1043
771fe6b9
JG		 1044 return ret;
1045}
1046
1109ca09 1047static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
771fe6b9
JG		 1048 .get_modes = radeon_vga_get_modes,
1049 .mode_valid = radeon_vga_mode_valid,
1050 .best_encoder = radeon_best_single_encoder,
1051};
1052
1109ca09 1053static const struct drm_connector_funcs radeon_vga_connector_funcs = {
771fe6b9
JG		 1054 .dpms = drm_helper_connector_dpms,
1055 .detect = radeon_vga_detect,
1056 .fill_modes = drm_helper_probe_single_connector_modes,
1057 .destroy = radeon_connector_destroy,
1058 .set_property = radeon_connector_set_property,
1059};
1060
4ce001ab
DA		 1061static int radeon_tv_get_modes(struct drm_connector *connector)
1062{
1063 struct drm_device *dev = connector->dev;
923f6848 1064 struct radeon_device *rdev = dev->dev_private;
4ce001ab 1065 struct drm_display_mode *tv_mode;
923f6848 1066 struct drm_encoder *encoder;
4ce001ab 1067
923f6848
AD		 1068 encoder = radeon_best_single_encoder(connector);
1069 if (!encoder)
1070 return 0;
4ce001ab 1071
923f6848
AD		 1072 /* avivo chips can scale any mode */
1073 if (rdev->family >= CHIP_RS600)
1074 /* add scaled modes */
1075 radeon_add_common_modes(encoder, connector);
1076 else {
1077 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 1078 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD		 1079 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1080 drm_mode_probed_add(connector, tv_mode);
1081 }
4ce001ab
DA		 1082 return 1;
1083}
1084
1085static int radeon_tv_mode_valid(struct drm_connector *connector,
1086 struct drm_display_mode *mode)
1087{
a3fa6320
AD		 1088 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
1089 return MODE_CLOCK_RANGE;
4ce001ab
DA		 1090 return MODE_OK;
1091}
1092
7b334fcb 1093static enum drm_connector_status
930a9e28 1094radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA		 1095{
1096 struct drm_encoder *encoder;
1097 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA		 1098 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1099 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc 1100 int r;
445282db
DA		 1101
1102 if (!radeon_connector->dac_load_detect)
1103 return ret;
4ce001ab 1104
10ebc0bc
DA		 1105 r = pm_runtime_get_sync(connector->dev->dev);
1106 if (r < 0)
1107 return connector_status_disconnected;
1108
4ce001ab
DA		 1109 encoder = radeon_best_single_encoder(connector);
1110 if (!encoder)
1111 ret = connector_status_disconnected;
1112 else {
1113 encoder_funcs = encoder->helper_private;
1114 ret = encoder_funcs->detect(encoder, connector);
1115 }
1116 if (ret == connector_status_connected)
1117 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
1118 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1119 pm_runtime_mark_last_busy(connector->dev->dev);
1120 pm_runtime_put_autosuspend(connector->dev->dev);
4ce001ab
DA		 1121 return ret;
1122}
1123
1109ca09 1124static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
4ce001ab
DA		 1125 .get_modes = radeon_tv_get_modes,
1126 .mode_valid = radeon_tv_mode_valid,
1127 .best_encoder = radeon_best_single_encoder,
1128};
1129
1109ca09 1130static const struct drm_connector_funcs radeon_tv_connector_funcs = {
4ce001ab
DA		 1131 .dpms = drm_helper_connector_dpms,
1132 .detect = radeon_tv_detect,
1133 .fill_modes = drm_helper_probe_single_connector_modes,
1134 .destroy = radeon_connector_destroy,
1135 .set_property = radeon_connector_set_property,
1136};
1137
11fe1266
TU		 1138static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
1139{
1140 struct drm_device *dev = connector->dev;
1141 struct radeon_device *rdev = dev->dev_private;
1142 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1143 enum drm_connector_status status;
1144
1145 /* We only trust HPD on R600 and newer ASICS. */
1146 if (rdev->family >= CHIP_R600
1147 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
1148 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
1149 status = connector_status_connected;
1150 else
1151 status = connector_status_disconnected;
1152 if (connector->status == status)
1153 return true;
1154 }
1155
1156 return false;
1157}
1158
4ce001ab
DA		 1159/*
1160 * DVI is complicated
1161 * Do a DDC probe, if DDC probe passes, get the full EDID so
1162 * we can do analog/digital monitor detection at this point.
1163 * If the monitor is an analog monitor or we got no DDC,
1164 * we need to find the DAC encoder object for this connector.
1165 * If we got no DDC, we do load detection on the DAC encoder object.
1166 * If we got analog DDC or load detection passes on the DAC encoder
1167 * we have to check if this analog encoder is shared with anyone else (TV)
1168 * if its shared we have to set the other connector to disconnected.
1169 */
7b334fcb 1170static enum drm_connector_status
930a9e28 1171radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 1172{
fafcf94e
AD		 1173 struct drm_device *dev = connector->dev;
1174 struct radeon_device *rdev = dev->dev_private;
771fe6b9 1175 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 1176 struct drm_encoder *encoder = NULL;
771fe6b9 1177 struct drm_encoder_helper_funcs *encoder_funcs;
10ebc0bc 1178 int i, r;
771fe6b9 1179 enum drm_connector_status ret = connector_status_disconnected;
fc87f13b 1180 bool dret = false, broken_edid = false;
771fe6b9 1181
10ebc0bc
DA		 1182 r = pm_runtime_get_sync(connector->dev->dev);
1183 if (r < 0)
1184 return connector_status_disconnected;
1185
1186 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1187 ret = connector->status;
1188 goto exit;
1189 }
11fe1266 1190
eb6b6d7c 1191 if (radeon_connector->ddc_bus)
0a9069d3 1192 dret = radeon_ddc_probe(radeon_connector, false);
4ce001ab 1193 if (dret) {
d0d0a225 1194 radeon_connector->detected_by_load = false;
72a5c970
AD		 1195 radeon_connector_free_edid(connector);
1196 radeon_connector_get_edid(connector);
4ce001ab
DA		 1197
1198 if (!radeon_connector->edid) {
f82f5f3a 1199 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1200 connector->name);
4a9a8b71
DA		 1201 /* rs690 seems to have a problem with connectors not existing and always
1202 * return a block of 0's. If we see this just stop polling on this output */
72a5c970
AD		 1203 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) &&
1204 radeon_connector->base.null_edid_counter) {
4a9a8b71 1205 ret = connector_status_disconnected;
72082093
JN		 1206 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1207 connector->name);
4a9a8b71 1208 radeon_connector->ddc_bus = NULL;
fc87f13b
EE		 1209 } else {
1210 ret = connector_status_connected;
1211 broken_edid = true; /* defer use_digital to later */
4a9a8b71 1212 }
4ce001ab 1213 } else {
72a5c970
AD		 1214 radeon_connector->use_digital =
1215 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
4ce001ab 1216
0294cf4f
AD		 1217 /* some oems have boards with separate digital and analog connectors
1218 * with a shared ddc line (often vga + hdmi)
1219 */
1220 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
72a5c970 1221 radeon_connector_free_edid(connector);
0294cf4f 1222 ret = connector_status_disconnected;
72a5c970 1223 } else {
0294cf4f 1224 ret = connector_status_connected;
72a5c970 1225 }
42f14c4b
AD		 1226 /* This gets complicated. We have boards with VGA + HDMI with a
1227 * shared DDC line and we have boards with DVI-D + HDMI with a shared
1228 * DDC line. The latter is more complex because with DVI<->HDMI adapters
1229 * you don't really know what's connected to which port as both are digital.
71407c46 1230 */
d3932d6c 1231 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD		 1232 struct drm_connector *list_connector;
1233 struct radeon_connector *list_radeon_connector;
1234 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1235 if (connector == list_connector)
1236 continue;
1237 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD		 1238 if (list_radeon_connector->shared_ddc &&
1239 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1240 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD		 1241 /* cases where both connectors are digital */
1242 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1243 /* hpd is our only option in this case */
1244 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
72a5c970 1245 radeon_connector_free_edid(connector);
71407c46
AD		 1246 ret = connector_status_disconnected;
1247 }
1248 }
1249 }
1250 }
1251 }
4ce001ab
DA		 1252 }
1253 }
1254
1255 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1256 goto out;
1257
5f0a2612
AD		 1258 /* DVI-D and HDMI-A are digital only */
1259 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1260 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1261 goto out;
1262
d0d0a225 1263 /* if we aren't forcing don't do destructive polling */
c3cceedd 1264 if (!force) {
d0d0a225
AD		 1265 /* only return the previous status if we last
1266 * detected a monitor via load.
1267 */
1268 if (radeon_connector->detected_by_load)
1269 ret = connector->status;
c3cceedd
DA		 1270 goto out;
1271 }
1272
4ce001ab 1273 /* find analog encoder */
445282db
DA		 1274 if (radeon_connector->dac_load_detect) {
1275 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1276 if (connector->encoder_ids[i] == 0)
1277 break;
771fe6b9 1278
b957f457
RC		 1279 encoder = drm_encoder_find(connector->dev,
1280 connector->encoder_ids[i]);
1281 if (!encoder)
445282db 1282 continue;
771fe6b9 1283
e3632507 1284 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD		 1285 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1286 continue;
1287
445282db
DA		 1288 encoder_funcs = encoder->helper_private;
1289 if (encoder_funcs->detect) {
fc87f13b
EE		 1290 if (!broken_edid) {
1291 if (ret != connector_status_connected) {
1292 /* deal with analog monitors without DDC */
1293 ret = encoder_funcs->detect(encoder, connector);
1294 if (ret == connector_status_connected) {
1295 radeon_connector->use_digital = false;
1296 }
1297 if (ret != connector_status_disconnected)
1298 radeon_connector->detected_by_load = true;
445282db 1299 }
fc87f13b
EE		 1300 } else {
1301 enum drm_connector_status lret;
1302 /* assume digital unless load detected otherwise */
1303 radeon_connector->use_digital = true;
1304 lret = encoder_funcs->detect(encoder, connector);
1305 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1306 if (lret == connector_status_connected)
1307 radeon_connector->use_digital = false;
771fe6b9 1308 }
445282db 1309 break;
771fe6b9
JG		 1310 }
1311 }
1312 }
1313
4ce001ab
DA		 1314 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1315 encoder) {
1316 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1317 }
1318
fafcf94e
AD		 1319 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1320 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1321 * by other means, assume the DFP is connected and use that EDID. In most
1322 * cases the DVI port is actually a virtual KVM port connected to the service
1323 * processor.
1324 */
a09d431f 1325out:
fafcf94e
AD		 1326 if ((!rdev->is_atom_bios) &&
1327 (ret == connector_status_disconnected) &&
1328 rdev->mode_info.bios_hardcoded_edid_size) {
1329 radeon_connector->use_digital = true;
1330 ret = connector_status_connected;
1331 }
1332
771fe6b9
JG		 1333 /* updated in get modes as well since we need to know if it's analog or digital */
1334 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc 1335
1a626b68
SG		 1336 if (radeon_audio != 0)
1337 radeon_audio_detect(connector, ret);
1338
10ebc0bc
DA		 1339exit:
1340 pm_runtime_mark_last_busy(connector->dev->dev);
1341 pm_runtime_put_autosuspend(connector->dev->dev);
1342
771fe6b9
JG		 1343 return ret;
1344}
1345
1346/* okay need to be smart in here about which encoder to pick */
1109ca09 1347static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
771fe6b9
JG		 1348{
1349 int enc_id = connector->encoder_ids[0];
1350 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
771fe6b9
JG		 1351 struct drm_encoder *encoder;
1352 int i;
1353 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1354 if (connector->encoder_ids[i] == 0)
1355 break;
1356
b957f457
RC		 1357 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1358 if (!encoder)
771fe6b9
JG		 1359 continue;
1360
4ce001ab 1361 if (radeon_connector->use_digital == true) {
771fe6b9
JG		 1362 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1363 return encoder;
1364 } else {
1365 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1366 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1367 return encoder;
1368 }
1369 }
1370
1371 /* see if we have a default encoder TODO */
1372
1373 /* then check use digitial */
1374 /* pick the first one */
b957f457
RC		 1375 if (enc_id)
1376 return drm_encoder_find(connector->dev, enc_id);
771fe6b9
JG		 1377 return NULL;
1378}
1379
d50ba256
DA		 1380static void radeon_dvi_force(struct drm_connector *connector)
1381{
1382 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1383 if (connector->force == DRM_FORCE_ON)
1384 radeon_connector->use_digital = false;
1385 if (connector->force == DRM_FORCE_ON_DIGITAL)
1386 radeon_connector->use_digital = true;
1387}
1388
a3fa6320
AD		 1389static int radeon_dvi_mode_valid(struct drm_connector *connector,
1390 struct drm_display_mode *mode)
1391{
1b24203e
AD		 1392 struct drm_device *dev = connector->dev;
1393 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD		 1394 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1395
1396 /* XXX check mode bandwidth */
1397
1b24203e
AD		 1398 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1399 if (radeon_connector->use_digital &&
1400 (rdev->family == CHIP_RV100) &&
1401 (mode->clock > 135000))
1402 return MODE_CLOCK_HIGH;
1403
a3fa6320
AD		 1404 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1405 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1406 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1407 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1408 return MODE_OK;
377bd8a9 1409 else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
f2263fc7
AD		 1410 /* HDMI 1.3+ supports max clock of 340 Mhz */
1411 if (mode->clock > 340000)
e1e84017 1412 return MODE_CLOCK_HIGH;
f2263fc7
AD		 1413 else
1414 return MODE_OK;
1415 } else {
a3fa6320 1416 return MODE_CLOCK_HIGH;
f2263fc7 1417 }
a3fa6320 1418 }
b20f9bef
AD		 1419
1420 /* check against the max pixel clock */
1421 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1422 return MODE_CLOCK_HIGH;
1423
a3fa6320
AD		 1424 return MODE_OK;
1425}
1426
1109ca09 1427static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
3e22920f 1428 .get_modes = radeon_vga_get_modes,
a3fa6320 1429 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG		 1430 .best_encoder = radeon_dvi_encoder,
1431};
1432
1109ca09 1433static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
771fe6b9
JG		 1434 .dpms = drm_helper_connector_dpms,
1435 .detect = radeon_dvi_detect,
1436 .fill_modes = drm_helper_probe_single_connector_modes,
1437 .set_property = radeon_connector_set_property,
1438 .destroy = radeon_connector_destroy,
d50ba256 1439 .force = radeon_dvi_force,
771fe6b9
JG		 1440};
1441
746c1aa4
DA		 1442static int radeon_dp_get_modes(struct drm_connector *connector)
1443{
1444 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1445 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1446 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA		 1447 int ret;
1448
f89931f3
AD		 1449 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1450 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1451 struct drm_display_mode *mode;
1452
2b69ffb9
AD		 1453 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1454 if (!radeon_dig_connector->edp_on)
1455 atombios_set_edp_panel_power(connector,
1456 ATOM_TRANSMITTER_ACTION_POWER_ON);
72a5c970
AD		 1457 radeon_connector_get_edid(connector);
1458 ret = radeon_ddc_get_modes(connector);
2b69ffb9
AD		 1459 if (!radeon_dig_connector->edp_on)
1460 atombios_set_edp_panel_power(connector,
1461 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1462 } else {
1463 /* need to setup ddc on the bridge */
1464 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1465 ENCODER_OBJECT_ID_NONE) {
1466 if (encoder)
1467 radeon_atom_ext_encoder_setup_ddc(encoder);
1468 }
72a5c970
AD		 1469 radeon_connector_get_edid(connector);
1470 ret = radeon_ddc_get_modes(connector);
2b69ffb9 1471 }
d291767b
AD		 1472
1473 if (ret > 0) {
d291767b
AD		 1474 if (encoder) {
1475 radeon_fixup_lvds_native_mode(encoder, connector);
1476 /* add scaled modes */
1477 radeon_add_common_modes(encoder, connector);
1478 }
1479 return ret;
1480 }
1481
d291767b
AD		 1482 if (!encoder)
1483 return 0;
1484
1485 /* we have no EDID modes */
1486 mode = radeon_fp_native_mode(encoder);
1487 if (mode) {
1488 ret = 1;
1489 drm_mode_probed_add(connector, mode);
1490 /* add the width/height from vbios tables if available */
1491 connector->display_info.width_mm = mode->width_mm;
1492 connector->display_info.height_mm = mode->height_mm;
1493 /* add scaled modes */
1494 radeon_add_common_modes(encoder, connector);
1495 }
591a10e1
AD		 1496 } else {
1497 /* need to setup ddc on the bridge */
1d33e1fc
AD		 1498 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1499 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD		 1500 if (encoder)
1501 radeon_atom_ext_encoder_setup_ddc(encoder);
1502 }
72a5c970
AD		 1503 radeon_connector_get_edid(connector);
1504 ret = radeon_ddc_get_modes(connector);
da997620
AD		 1505
1506 radeon_get_native_mode(connector);
591a10e1 1507 }
8b834852 1508
746c1aa4
DA		 1509 return ret;
1510}
1511
1d33e1fc 1512u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3 1513{
d7fa8bb3
AD		 1514 struct drm_encoder *encoder;
1515 struct radeon_encoder *radeon_encoder;
1516 int i;
d7fa8bb3
AD		 1517
1518 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1519 if (connector->encoder_ids[i] == 0)
1520 break;
1521
b957f457
RC		 1522 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1523 if (!encoder)
d7fa8bb3
AD		 1524 continue;
1525
d7fa8bb3
AD		 1526 radeon_encoder = to_radeon_encoder(encoder);
1527
1528 switch (radeon_encoder->encoder_id) {
1529 case ENCODER_OBJECT_ID_TRAVIS:
1530 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1531 return radeon_encoder->encoder_id;
d7fa8bb3
AD		 1532 default:
1533 break;
1534 }
1535 }
1536
1d33e1fc 1537 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD		 1538}
1539
ebdea82d 1540static bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
d7fa8bb3 1541{
d7fa8bb3
AD		 1542 struct drm_encoder *encoder;
1543 struct radeon_encoder *radeon_encoder;
1544 int i;
1545 bool found = false;
1546
1547 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1548 if (connector->encoder_ids[i] == 0)
1549 break;
1550
b957f457
RC		 1551 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1552 if (!encoder)
d7fa8bb3
AD		 1553 continue;
1554
d7fa8bb3
AD		 1555 radeon_encoder = to_radeon_encoder(encoder);
1556 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1557 found = true;
1558 }
1559
1560 return found;
1561}
1562
1563bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1564{
1565 struct drm_device *dev = connector->dev;
1566 struct radeon_device *rdev = dev->dev_private;
1567
1568 if (ASIC_IS_DCE5(rdev) &&
af5d3653 1569 (rdev->clock.default_dispclk >= 53900) &&
d7fa8bb3
AD		 1570 radeon_connector_encoder_is_hbr2(connector)) {
1571 return true;
1572 }
1573
1574 return false;
1575}
1576
7b334fcb 1577static enum drm_connector_status
930a9e28 1578radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1579{
f8d0edde
AD		 1580 struct drm_device *dev = connector->dev;
1581 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1582 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1583 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1584 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1585 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
10ebc0bc 1586 int r;
746c1aa4 1587
10ebc0bc
DA		 1588 r = pm_runtime_get_sync(connector->dev->dev);
1589 if (r < 0)
1590 return connector_status_disconnected;
1591
1592 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1593 ret = connector->status;
1594 goto out;
1595 }
11fe1266 1596
72a5c970 1597 radeon_connector_free_edid(connector);
746c1aa4 1598
f89931f3
AD		 1599 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1600 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1601 if (encoder) {
1602 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1603 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1604
1605 /* check if panel is valid */
1606 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1607 ret = connector_status_connected;
13485794
AD		 1608 /* don't fetch the edid from the vbios if ddc fails and runpm is
1609 * enabled so we report disconnected.
1610 */
1611 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
1612 ret = connector_status_disconnected;
d291767b 1613 }
6f50eae7
AD		 1614 /* eDP is always DP */
1615 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD		 1616 if (!radeon_dig_connector->edp_on)
1617 atombios_set_edp_panel_power(connector,
1618 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1619 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1620 ret = connector_status_connected;
8b834852
AD		 1621 if (!radeon_dig_connector->edp_on)
1622 atombios_set_edp_panel_power(connector,
1623 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD		 1624 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1625 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD		 1626 /* DP bridges are always DP */
1627 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1628 /* get the DPCD from the bridge */
1629 radeon_dp_getdpcd(radeon_connector);
1630
6777a4f6
AD		 1631 if (encoder) {
1632 /* setup ddc on the bridge */
1633 radeon_atom_ext_encoder_setup_ddc(encoder);
0a9069d3
NOS		 1634 /* bridge chips are always aux */
1635 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
b06947b5 1636 ret = connector_status_connected;
6777a4f6
AD		 1637 else if (radeon_connector->dac_load_detect) { /* try load detection */
1638 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD		 1639 ret = encoder_funcs->detect(encoder, connector);
1640 }
591a10e1 1641 }
b06947b5 1642 } else {
6f50eae7 1643 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD		 1644 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1645 ret = connector_status_connected;
1646 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1647 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1648 } else {
f8d0edde
AD		 1649 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1650 if (radeon_dp_getdpcd(radeon_connector))
1651 ret = connector_status_connected;
1652 } else {
d592fca9 1653 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
0a9069d3 1654 if (radeon_ddc_probe(radeon_connector, false))
f8d0edde
AD		 1655 ret = connector_status_connected;
1656 }
4143e919 1657 }
746c1aa4 1658 }
4143e919 1659
30f44372 1660 radeon_connector_update_scratch_regs(connector, ret);
1a626b68
SG		 1661
1662 if (radeon_audio != 0)
1663 radeon_audio_detect(connector, ret);
1664
10ebc0bc
DA		 1665out:
1666 pm_runtime_mark_last_busy(connector->dev->dev);
1667 pm_runtime_put_autosuspend(connector->dev->dev);
1668
746c1aa4
DA		 1669 return ret;
1670}
1671
5801ead6
AD		 1672static int radeon_dp_mode_valid(struct drm_connector *connector,
1673 struct drm_display_mode *mode)
1674{
6536a3a6
AD		 1675 struct drm_device *dev = connector->dev;
1676 struct radeon_device *rdev = dev->dev_private;
5801ead6
AD		 1677 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1678 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1679
1680 /* XXX check mode bandwidth */
1681
f89931f3
AD		 1682 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1683 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1684 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1685
1686 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1687 return MODE_PANEL;
1688
1689 if (encoder) {
1690 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1691 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1692
f89931f3 1693 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD		 1694 * to the panel size, but I'm not sure this is desirable.
1695 */
1696 if ((mode->hdisplay > native_mode->hdisplay) ||
1697 (mode->vdisplay > native_mode->vdisplay))
1698 return MODE_PANEL;
1699
1700 /* if scaling is disabled, block non-native modes */
1701 if (radeon_encoder->rmx_type == RMX_OFF) {
1702 if ((mode->hdisplay != native_mode->hdisplay) ||
1703 (mode->vdisplay != native_mode->vdisplay))
1704 return MODE_PANEL;
1705 }
1706 }
d291767b
AD		 1707 } else {
1708 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
6536a3a6 1709 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
d291767b 1710 return radeon_dp_mode_valid_helper(connector, mode);
6536a3a6 1711 } else {
377bd8a9 1712 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
6536a3a6
AD		 1713 /* HDMI 1.3+ supports max clock of 340 Mhz */
1714 if (mode->clock > 340000)
1715 return MODE_CLOCK_HIGH;
1716 } else {
1717 if (mode->clock > 165000)
1718 return MODE_CLOCK_HIGH;
1719 }
1720 }
d291767b 1721 }
6536a3a6
AD		 1722
1723 return MODE_OK;
5801ead6
AD		 1724}
1725
1109ca09 1726static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
746c1aa4 1727 .get_modes = radeon_dp_get_modes,
5801ead6 1728 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA		 1729 .best_encoder = radeon_dvi_encoder,
1730};
1731
1109ca09 1732static const struct drm_connector_funcs radeon_dp_connector_funcs = {
746c1aa4
DA		 1733 .dpms = drm_helper_connector_dpms,
1734 .detect = radeon_dp_detect,
1735 .fill_modes = drm_helper_probe_single_connector_modes,
1736 .set_property = radeon_connector_set_property,
379dfc25 1737 .destroy = radeon_connector_destroy,
746c1aa4
DA		 1738 .force = radeon_dvi_force,
1739};
1740
855f5f1d
AD		 1741static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1742 .dpms = drm_helper_connector_dpms,
1743 .detect = radeon_dp_detect,
1744 .fill_modes = drm_helper_probe_single_connector_modes,
1745 .set_property = radeon_lvds_set_property,
379dfc25 1746 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1747 .force = radeon_dvi_force,
1748};
1749
1750static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1751 .dpms = drm_helper_connector_dpms,
1752 .detect = radeon_dp_detect,
1753 .fill_modes = drm_helper_probe_single_connector_modes,
1754 .set_property = radeon_lvds_set_property,
379dfc25 1755 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1756 .force = radeon_dvi_force,
1757};
1758
771fe6b9
JG		 1759void
1760radeon_add_atom_connector(struct drm_device *dev,
1761 uint32_t connector_id,
1762 uint32_t supported_device,
1763 int connector_type,
1764 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1765 uint32_t igp_lane_info,
eed45b30 1766 uint16_t connector_object_id,
26b5bc98
AD		 1767 struct radeon_hpd *hpd,
1768 struct radeon_router *router)
771fe6b9 1769{
445282db 1770 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1771 struct drm_connector *connector;
1772 struct radeon_connector *radeon_connector;
1773 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD		 1774 struct drm_encoder *encoder;
1775 struct radeon_encoder *radeon_encoder;
771fe6b9 1776 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1777 bool shared_ddc = false;
eac4dff6 1778 bool is_dp_bridge = false;
496263bf 1779 bool has_aux = false;
771fe6b9 1780
4ce001ab 1781 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 1782 return;
1783
cf4c12f9
AD		 1784 /* if the user selected tv=0 don't try and add the connector */
1785 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1786 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1787 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1788 (radeon_tv == 0))
1789 return;
1790
771fe6b9
JG		 1791 /* see if we already added it */
1792 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1793 radeon_connector = to_radeon_connector(connector);
1794 if (radeon_connector->connector_id == connector_id) {
1795 radeon_connector->devices |= supported_device;
1796 return;
1797 }
0294cf4f 1798 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1799 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD		 1800 radeon_connector->shared_ddc = true;
1801 shared_ddc = true;
1802 }
fb939dfc 1803 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD		 1804 (radeon_connector->router.router_id == router->router_id)) {
1805 radeon_connector->shared_ddc = false;
1806 shared_ddc = false;
1807 }
0294cf4f 1808 }
771fe6b9
JG		 1809 }
1810
eac4dff6
AD		 1811 /* check if it's a dp bridge */
1812 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1813 radeon_encoder = to_radeon_encoder(encoder);
1814 if (radeon_encoder->devices & supported_device) {
1815 switch (radeon_encoder->encoder_id) {
1816 case ENCODER_OBJECT_ID_TRAVIS:
1817 case ENCODER_OBJECT_ID_NUTMEG:
1818 is_dp_bridge = true;
1819 break;
1820 default:
1821 break;
1822 }
1823 }
1824 }
1825
771fe6b9
JG		 1826 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1827 if (!radeon_connector)
1828 return;
1829
1830 connector = &radeon_connector->base;
1831
1832 radeon_connector->connector_id = connector_id;
1833 radeon_connector->devices = supported_device;
0294cf4f 1834 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1835 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1836 radeon_connector->hpd = *hpd;
bc1c4dc3 1837
26b5bc98 1838 radeon_connector->router = *router;
fb939dfc 1839 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD		 1840 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1841 if (!radeon_connector->router_bus)
a70882aa 1842 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1843 }
eac4dff6
AD		 1844
1845 if (is_dp_bridge) {
771fe6b9
JG		 1846 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1847 if (!radeon_dig_connector)
1848 goto failed;
771fe6b9
JG		 1849 radeon_dig_connector->igp_lane_info = igp_lane_info;
1850 radeon_connector->con_priv = radeon_dig_connector;
771fe6b9 1851 if (i2c_bus->valid) {
379dfc25
AD		 1852 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1853 if (radeon_connector->ddc_bus)
496263bf
AD		 1854 has_aux = true;
1855 else
eac4dff6 1856 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1857 }
eac4dff6
AD		 1858 switch (connector_type) {
1859 case DRM_MODE_CONNECTOR_VGA:
1860 case DRM_MODE_CONNECTOR_DVIA:
1861 default:
855f5f1d
AD		 1862 drm_connector_init(dev, &radeon_connector->base,
1863 &radeon_dp_connector_funcs, connector_type);
1864 drm_connector_helper_add(&radeon_connector->base,
1865 &radeon_dp_connector_helper_funcs);
eac4dff6
AD		 1866 connector->interlace_allowed = true;
1867 connector->doublescan_allowed = true;
d629a3ce 1868 radeon_connector->dac_load_detect = true;
e35755fa 1869 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1870 rdev->mode_info.load_detect_property,
1871 1);
da997620
AD		 1872 drm_object_attach_property(&radeon_connector->base.base,
1873 dev->mode_config.scaling_mode_property,
1874 DRM_MODE_SCALE_NONE);
eac4dff6
AD		 1875 break;
1876 case DRM_MODE_CONNECTOR_DVII:
1877 case DRM_MODE_CONNECTOR_DVID:
1878 case DRM_MODE_CONNECTOR_HDMIA:
1879 case DRM_MODE_CONNECTOR_HDMIB:
1880 case DRM_MODE_CONNECTOR_DisplayPort:
855f5f1d
AD		 1881 drm_connector_init(dev, &radeon_connector->base,
1882 &radeon_dp_connector_funcs, connector_type);
1883 drm_connector_helper_add(&radeon_connector->base,
1884 &radeon_dp_connector_helper_funcs);
e35755fa 1885 drm_object_attach_property(&radeon_connector->base.base,
430f70d5 1886 rdev->mode_info.underscan_property,
56bec7c0 1887 UNDERSCAN_OFF);
e35755fa 1888 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1889 rdev->mode_info.underscan_hborder_property,
1890 0);
e35755fa 1891 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1892 rdev->mode_info.underscan_vborder_property,
1893 0);
91915260 1894
da997620
AD		 1895 drm_object_attach_property(&radeon_connector->base.base,
1896 dev->mode_config.scaling_mode_property,
1897 DRM_MODE_SCALE_NONE);
1898
6214bb74
AD		 1899 drm_object_attach_property(&radeon_connector->base.base,
1900 rdev->mode_info.dither_property,
1901 RADEON_FMT_DITHER_DISABLE);
91915260 1902
108dc8e8
AD		 1903 if (radeon_audio != 0)
1904 drm_object_attach_property(&radeon_connector->base.base,
1905 rdev->mode_info.audio_property,
e31fadd3 1906 RADEON_AUDIO_AUTO);
91915260 1907
eac4dff6
AD		 1908 subpixel_order = SubPixelHorizontalRGB;
1909 connector->interlace_allowed = true;
1910 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1911 connector->doublescan_allowed = true;
1912 else
1913 connector->doublescan_allowed = false;
d629a3ce
AD		 1914 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1915 radeon_connector->dac_load_detect = true;
e35755fa 1916 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1917 rdev->mode_info.load_detect_property,
1918 1);
1919 }
eac4dff6
AD		 1920 break;
1921 case DRM_MODE_CONNECTOR_LVDS:
1922 case DRM_MODE_CONNECTOR_eDP:
855f5f1d
AD		 1923 drm_connector_init(dev, &radeon_connector->base,
1924 &radeon_lvds_bridge_connector_funcs, connector_type);
1925 drm_connector_helper_add(&radeon_connector->base,
1926 &radeon_dp_connector_helper_funcs);
e35755fa 1927 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1928 dev->mode_config.scaling_mode_property,
1929 DRM_MODE_SCALE_FULLSCREEN);
1930 subpixel_order = SubPixelHorizontalRGB;
1931 connector->interlace_allowed = false;
1932 connector->doublescan_allowed = false;
1933 break;
5bccf5e3 1934 }
eac4dff6
AD		 1935 } else {
1936 switch (connector_type) {
1937 case DRM_MODE_CONNECTOR_VGA:
1938 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1939 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1940 if (i2c_bus->valid) {
1941 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1942 if (!radeon_connector->ddc_bus)
1943 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1944 }
390d0bbe 1945 radeon_connector->dac_load_detect = true;
e35755fa 1946 drm_object_attach_property(&radeon_connector->base.base,
390d0bbe
AD		 1947 rdev->mode_info.load_detect_property,
1948 1);
da997620
AD		 1949 if (ASIC_IS_AVIVO(rdev))
1950 drm_object_attach_property(&radeon_connector->base.base,
1951 dev->mode_config.scaling_mode_property,
1952 DRM_MODE_SCALE_NONE);
eac4dff6
AD		 1953 /* no HPD on analog connectors */
1954 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1955 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1956 connector->interlace_allowed = true;
c49948f4 1957 connector->doublescan_allowed = true;
eac4dff6
AD		 1958 break;
1959 case DRM_MODE_CONNECTOR_DVIA:
1960 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1961 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1962 if (i2c_bus->valid) {
1963 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1964 if (!radeon_connector->ddc_bus)
1965 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1966 }
1967 radeon_connector->dac_load_detect = true;
e35755fa 1968 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1969 rdev->mode_info.load_detect_property,
1970 1);
da997620
AD		 1971 if (ASIC_IS_AVIVO(rdev))
1972 drm_object_attach_property(&radeon_connector->base.base,
1973 dev->mode_config.scaling_mode_property,
1974 DRM_MODE_SCALE_NONE);
eac4dff6
AD		 1975 /* no HPD on analog connectors */
1976 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1977 connector->interlace_allowed = true;
1978 connector->doublescan_allowed = true;
1979 break;
1980 case DRM_MODE_CONNECTOR_DVII:
1981 case DRM_MODE_CONNECTOR_DVID:
1982 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1983 if (!radeon_dig_connector)
1984 goto failed;
1985 radeon_dig_connector->igp_lane_info = igp_lane_info;
1986 radeon_connector->con_priv = radeon_dig_connector;
1987 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1988 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1989 if (i2c_bus->valid) {
1990 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1991 if (!radeon_connector->ddc_bus)
1992 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1993 }
1994 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1995 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1996 rdev->mode_info.coherent_mode_property,
1997 1);
1998 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1999 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2000 rdev->mode_info.underscan_property,
2001 UNDERSCAN_OFF);
e35755fa 2002 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2003 rdev->mode_info.underscan_hborder_property,
2004 0);
e35755fa 2005 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2006 rdev->mode_info.underscan_vborder_property,
2007 0);
da997620
AD		 2008 drm_object_attach_property(&radeon_connector->base.base,
2009 rdev->mode_info.dither_property,
2010 RADEON_FMT_DITHER_DISABLE);
2011 drm_object_attach_property(&radeon_connector->base.base,
2012 dev->mode_config.scaling_mode_property,
2013 DRM_MODE_SCALE_NONE);
eac4dff6 2014 }
108dc8e8 2015 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2016 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2017 rdev->mode_info.audio_property,
e31fadd3 2018 RADEON_AUDIO_AUTO);
8666c076 2019 }
eac4dff6
AD		 2020 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2021 radeon_connector->dac_load_detect = true;
e35755fa 2022 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2023 rdev->mode_info.load_detect_property,
2024 1);
2025 }
2026 connector->interlace_allowed = true;
2027 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2028 connector->doublescan_allowed = true;
2029 else
2030 connector->doublescan_allowed = false;
2031 break;
2032 case DRM_MODE_CONNECTOR_HDMIA:
2033 case DRM_MODE_CONNECTOR_HDMIB:
2034 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2035 if (!radeon_dig_connector)
2036 goto failed;
2037 radeon_dig_connector->igp_lane_info = igp_lane_info;
2038 radeon_connector->con_priv = radeon_dig_connector;
2039 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2040 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2041 if (i2c_bus->valid) {
2042 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2043 if (!radeon_connector->ddc_bus)
2044 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2045 }
e35755fa 2046 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2047 rdev->mode_info.coherent_mode_property,
2048 1);
2049 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2050 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2051 rdev->mode_info.underscan_property,
2052 UNDERSCAN_OFF);
e35755fa 2053 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2054 rdev->mode_info.underscan_hborder_property,
2055 0);
e35755fa 2056 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2057 rdev->mode_info.underscan_vborder_property,
2058 0);
da997620
AD		 2059 drm_object_attach_property(&radeon_connector->base.base,
2060 rdev->mode_info.dither_property,
2061 RADEON_FMT_DITHER_DISABLE);
2062 drm_object_attach_property(&radeon_connector->base.base,
2063 dev->mode_config.scaling_mode_property,
2064 DRM_MODE_SCALE_NONE);
eac4dff6 2065 }
108dc8e8 2066 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2067 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2068 rdev->mode_info.audio_property,
e31fadd3 2069 RADEON_AUDIO_AUTO);
8666c076 2070 }
eac4dff6
AD		 2071 subpixel_order = SubPixelHorizontalRGB;
2072 connector->interlace_allowed = true;
2073 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
2074 connector->doublescan_allowed = true;
2075 else
2076 connector->doublescan_allowed = false;
2077 break;
2078 case DRM_MODE_CONNECTOR_DisplayPort:
2079 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2080 if (!radeon_dig_connector)
2081 goto failed;
2082 radeon_dig_connector->igp_lane_info = igp_lane_info;
2083 radeon_connector->con_priv = radeon_dig_connector;
2084 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
2085 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2086 if (i2c_bus->valid) {
eac4dff6 2087 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
496263bf
AD		 2088 if (radeon_connector->ddc_bus)
2089 has_aux = true;
2090 else
eac4dff6
AD		 2091 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2092 }
2093 subpixel_order = SubPixelHorizontalRGB;
e35755fa 2094 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2095 rdev->mode_info.coherent_mode_property,
2096 1);
2097 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2098 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2099 rdev->mode_info.underscan_property,
2100 UNDERSCAN_OFF);
e35755fa 2101 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2102 rdev->mode_info.underscan_hborder_property,
2103 0);
e35755fa 2104 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2105 rdev->mode_info.underscan_vborder_property,
2106 0);
da997620
AD		 2107 drm_object_attach_property(&radeon_connector->base.base,
2108 rdev->mode_info.dither_property,
2109 RADEON_FMT_DITHER_DISABLE);
2110 drm_object_attach_property(&radeon_connector->base.base,
2111 dev->mode_config.scaling_mode_property,
2112 DRM_MODE_SCALE_NONE);
eac4dff6 2113 }
108dc8e8 2114 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2115 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2116 rdev->mode_info.audio_property,
e31fadd3 2117 RADEON_AUDIO_AUTO);
8666c076 2118 }
eac4dff6
AD		 2119 connector->interlace_allowed = true;
2120 /* in theory with a DP to VGA converter... */
c49948f4 2121 connector->doublescan_allowed = false;
eac4dff6
AD		 2122 break;
2123 case DRM_MODE_CONNECTOR_eDP:
2124 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2125 if (!radeon_dig_connector)
2126 goto failed;
2127 radeon_dig_connector->igp_lane_info = igp_lane_info;
2128 radeon_connector->con_priv = radeon_dig_connector;
855f5f1d 2129 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
eac4dff6
AD		 2130 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2131 if (i2c_bus->valid) {
379dfc25
AD		 2132 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2133 if (radeon_connector->ddc_bus)
496263bf
AD		 2134 has_aux = true;
2135 else
eac4dff6
AD		 2136 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2137 }
e35755fa 2138 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2139 dev->mode_config.scaling_mode_property,
2140 DRM_MODE_SCALE_FULLSCREEN);
2141 subpixel_order = SubPixelHorizontalRGB;
2142 connector->interlace_allowed = false;
2143 connector->doublescan_allowed = false;
2144 break;
2145 case DRM_MODE_CONNECTOR_SVIDEO:
2146 case DRM_MODE_CONNECTOR_Composite:
2147 case DRM_MODE_CONNECTOR_9PinDIN:
2148 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2149 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2150 radeon_connector->dac_load_detect = true;
e35755fa 2151 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2152 rdev->mode_info.load_detect_property,
2153 1);
e35755fa 2154 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2155 rdev->mode_info.tv_std_property,
2156 radeon_atombios_get_tv_info(rdev));
2157 /* no HPD on analog connectors */
2158 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2159 connector->interlace_allowed = false;
2160 connector->doublescan_allowed = false;
2161 break;
2162 case DRM_MODE_CONNECTOR_LVDS:
2163 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2164 if (!radeon_dig_connector)
2165 goto failed;
2166 radeon_dig_connector->igp_lane_info = igp_lane_info;
2167 radeon_connector->con_priv = radeon_dig_connector;
2168 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
2169 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2170 if (i2c_bus->valid) {
2171 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2172 if (!radeon_connector->ddc_bus)
2173 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2174 }
e35755fa 2175 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2176 dev->mode_config.scaling_mode_property,
2177 DRM_MODE_SCALE_FULLSCREEN);
2178 subpixel_order = SubPixelHorizontalRGB;
2179 connector->interlace_allowed = false;
2180 connector->doublescan_allowed = false;
2181 break;
771fe6b9 2182 }
771fe6b9
JG		 2183 }
2184
2581afcc 2185 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2186 if (i2c_bus->valid)
2187 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2188 } else
2189 connector->polled = DRM_CONNECTOR_POLL_HPD;
2190
771fe6b9 2191 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2192 drm_connector_register(connector);
496263bf
AD		 2193
2194 if (has_aux)
2195 radeon_dp_aux_init(radeon_connector);
2196
771fe6b9
JG		 2197 return;
2198
2199failed:
771fe6b9
JG		 2200 drm_connector_cleanup(connector);
2201 kfree(connector);
2202}
2203
2204void
2205radeon_add_legacy_connector(struct drm_device *dev,
2206 uint32_t connector_id,
2207 uint32_t supported_device,
2208 int connector_type,
b75fad06 2209 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD		 2210 uint16_t connector_object_id,
2211 struct radeon_hpd *hpd)
771fe6b9 2212{
445282db 2213 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 2214 struct drm_connector *connector;
2215 struct radeon_connector *radeon_connector;
2216 uint32_t subpixel_order = SubPixelNone;
2217
4ce001ab 2218 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 2219 return;
2220
cf4c12f9
AD		 2221 /* if the user selected tv=0 don't try and add the connector */
2222 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2223 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2224 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2225 (radeon_tv == 0))
2226 return;
2227
771fe6b9
JG		 2228 /* see if we already added it */
2229 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2230 radeon_connector = to_radeon_connector(connector);
2231 if (radeon_connector->connector_id == connector_id) {
2232 radeon_connector->devices |= supported_device;
2233 return;
2234 }
2235 }
2236
2237 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2238 if (!radeon_connector)
2239 return;
2240
2241 connector = &radeon_connector->base;
2242
2243 radeon_connector->connector_id = connector_id;
2244 radeon_connector->devices = supported_device;
b75fad06 2245 radeon_connector->connector_object_id = connector_object_id;
eed45b30 2246 radeon_connector->hpd = *hpd;
bc1c4dc3 2247
771fe6b9
JG		 2248 switch (connector_type) {
2249 case DRM_MODE_CONNECTOR_VGA:
2250 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2251 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2252 if (i2c_bus->valid) {
f376b94f 2253 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2254 if (!radeon_connector->ddc_bus)
a70882aa 2255 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2256 }
35e4b7af 2257 radeon_connector->dac_load_detect = true;
e35755fa 2258 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2259 rdev->mode_info.load_detect_property,
2260 1);
2581afcc
AD		 2261 /* no HPD on analog connectors */
2262 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 2263 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD		 2264 connector->interlace_allowed = true;
2265 connector->doublescan_allowed = true;
771fe6b9
JG		 2266 break;
2267 case DRM_MODE_CONNECTOR_DVIA:
2268 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2269 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2270 if (i2c_bus->valid) {
f376b94f 2271 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2272 if (!radeon_connector->ddc_bus)
a70882aa 2273 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2274 }
35e4b7af 2275 radeon_connector->dac_load_detect = true;
e35755fa 2276 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2277 rdev->mode_info.load_detect_property,
2278 1);
2581afcc
AD		 2279 /* no HPD on analog connectors */
2280 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2281 connector->interlace_allowed = true;
2282 connector->doublescan_allowed = true;
771fe6b9
JG		 2283 break;
2284 case DRM_MODE_CONNECTOR_DVII:
2285 case DRM_MODE_CONNECTOR_DVID:
2286 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 2287 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 2288 if (i2c_bus->valid) {
f376b94f 2289 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2290 if (!radeon_connector->ddc_bus)
a70882aa 2291 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD		 2292 }
2293 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 2294 radeon_connector->dac_load_detect = true;
e35755fa 2295 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2296 rdev->mode_info.load_detect_property,
2297 1);
771fe6b9
JG		 2298 }
2299 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2300 connector->interlace_allowed = true;
2301 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2302 connector->doublescan_allowed = true;
2303 else
2304 connector->doublescan_allowed = false;
771fe6b9
JG		 2305 break;
2306 case DRM_MODE_CONNECTOR_SVIDEO:
2307 case DRM_MODE_CONNECTOR_Composite:
2308 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD		 2309 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2310 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2311 radeon_connector->dac_load_detect = true;
2312 /* RS400,RC410,RS480 chipset seems to report a lot
2313 * of false positive on load detect, we haven't yet
2314 * found a way to make load detect reliable on those
2315 * chipset, thus just disable it for TV.
2316 */
2317 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2318 radeon_connector->dac_load_detect = false;
e35755fa 2319 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2320 rdev->mode_info.load_detect_property,
2321 radeon_connector->dac_load_detect);
e35755fa 2322 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2323 rdev->mode_info.tv_std_property,
2324 radeon_combios_get_tv_info(rdev));
2325 /* no HPD on analog connectors */
2326 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2327 connector->interlace_allowed = false;
2328 connector->doublescan_allowed = false;
771fe6b9
JG		 2329 break;
2330 case DRM_MODE_CONNECTOR_LVDS:
2331 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 2332 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 2333 if (i2c_bus->valid) {
f376b94f 2334 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2335 if (!radeon_connector->ddc_bus)
a70882aa 2336 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2337 }
e35755fa 2338 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2339 dev->mode_config.scaling_mode_property,
2340 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 2341 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2342 connector->interlace_allowed = false;
2343 connector->doublescan_allowed = false;
771fe6b9
JG		 2344 break;
2345 }
2346
2581afcc 2347 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2348 if (i2c_bus->valid)
2349 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2350 } else
2351 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9 2352 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2353 drm_connector_register(connector);
771fe6b9 2354}
Linux kernel - Deliverables
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