drm/radeon: Add MSI quirk for gateway RS690
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_irq_kms.c
CommitLineData
771fe6b9
JG
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28#include "drmP.h"
eb1f8e4f 29#include "drm_crtc_helper.h"
771fe6b9
JG
30#include "radeon_drm.h"
31#include "radeon_reg.h"
771fe6b9
JG
32#include "radeon.h"
33#include "atom.h"
34
fb98257a
CK
35#define RADEON_WAIT_IDLE_TIMEOUT 200
36
b73ba98d
AD
37/**
38 * radeon_driver_irq_handler_kms - irq handler for KMS
39 *
40 * @DRM_IRQ_ARGS: args
41 *
42 * This is the irq handler for the radeon KMS driver (all asics).
43 * radeon_irq_process is a macro that points to the per-asic
44 * irq handler callback.
45 */
771fe6b9
JG
46irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
47{
48 struct drm_device *dev = (struct drm_device *) arg;
49 struct radeon_device *rdev = dev->dev_private;
50
51 return radeon_irq_process(rdev);
52}
53
d4877cf2
AD
54/*
55 * Handle hotplug events outside the interrupt handler proper.
56 */
b73ba98d
AD
57/**
58 * radeon_hotplug_work_func - display hotplug work handler
59 *
60 * @work: work struct
61 *
62 * This is the hot plug event work handler (all asics).
63 * The work gets scheduled from the irq handler if there
64 * was a hot plug interrupt. It walks the connector table
65 * and calls the hotplug handler for each one, then sends
66 * a drm hotplug event to alert userspace.
67 */
d4877cf2
AD
68static void radeon_hotplug_work_func(struct work_struct *work)
69{
70 struct radeon_device *rdev = container_of(work, struct radeon_device,
71 hotplug_work);
72 struct drm_device *dev = rdev->ddev;
73 struct drm_mode_config *mode_config = &dev->mode_config;
74 struct drm_connector *connector;
75
76 if (mode_config->num_connector) {
77 list_for_each_entry(connector, &mode_config->connector_list, head)
78 radeon_connector_hotplug(connector);
79 }
80 /* Just fire off a uevent and let userspace tell us what to do */
eb1f8e4f 81 drm_helper_hpd_irq_event(dev);
d4877cf2
AD
82}
83
b73ba98d
AD
84/**
85 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
86 *
87 * @dev: drm dev pointer
88 *
89 * Gets the hw ready to enable irqs (all asics).
90 * This function disables all interrupt sources on the GPU.
91 */
771fe6b9
JG
92void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
93{
94 struct radeon_device *rdev = dev->dev_private;
fb98257a 95 unsigned long irqflags;
771fe6b9
JG
96 unsigned i;
97
fb98257a 98 spin_lock_irqsave(&rdev->irq.lock, irqflags);
771fe6b9 99 /* Disable *all* interrupts */
1b37078b 100 for (i = 0; i < RADEON_NUM_RINGS; i++)
736fc37f 101 atomic_set(&rdev->irq.ring_int[i], 0);
54bd5206 102 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
9e7b414e 103 rdev->irq.hpd[i] = false;
54bd5206
IH
104 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
105 rdev->irq.crtc_vblank_int[i] = false;
736fc37f 106 atomic_set(&rdev->irq.pflip[i], 0);
f122c610 107 rdev->irq.afmt[i] = false;
6f34be50 108 }
771fe6b9 109 radeon_irq_set(rdev);
fb98257a 110 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
771fe6b9
JG
111 /* Clear bits */
112 radeon_irq_process(rdev);
113}
114
b73ba98d
AD
115/**
116 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
117 *
118 * @dev: drm dev pointer
119 *
120 * Handles stuff to be done after enabling irqs (all asics).
121 * Returns 0 on success.
122 */
771fe6b9
JG
123int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
124{
771fe6b9 125 dev->max_vblank_count = 0x001fffff;
771fe6b9
JG
126 return 0;
127}
128
b73ba98d
AD
129/**
130 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
131 *
132 * @dev: drm dev pointer
133 *
134 * This function disables all interrupt sources on the GPU (all asics).
135 */
771fe6b9
JG
136void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
137{
138 struct radeon_device *rdev = dev->dev_private;
fb98257a 139 unsigned long irqflags;
771fe6b9
JG
140 unsigned i;
141
142 if (rdev == NULL) {
143 return;
144 }
fb98257a 145 spin_lock_irqsave(&rdev->irq.lock, irqflags);
771fe6b9 146 /* Disable *all* interrupts */
1b37078b 147 for (i = 0; i < RADEON_NUM_RINGS; i++)
736fc37f 148 atomic_set(&rdev->irq.ring_int[i], 0);
54bd5206 149 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
003e69f9 150 rdev->irq.hpd[i] = false;
54bd5206
IH
151 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
152 rdev->irq.crtc_vblank_int[i] = false;
736fc37f 153 atomic_set(&rdev->irq.pflip[i], 0);
f122c610 154 rdev->irq.afmt[i] = false;
6f34be50 155 }
771fe6b9 156 radeon_irq_set(rdev);
fb98257a 157 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
771fe6b9
JG
158}
159
b73ba98d
AD
160/**
161 * radeon_msi_ok - asic specific msi checks
162 *
163 * @rdev: radeon device pointer
164 *
165 * Handles asic specific MSI checks to determine if
166 * MSIs should be enabled on a particular chip (all asics).
167 * Returns true if MSIs should be enabled, false if MSIs
168 * should not be enabled.
169 */
8f6c25c5
AD
170static bool radeon_msi_ok(struct radeon_device *rdev)
171{
172 /* RV370/RV380 was first asic with MSI support */
173 if (rdev->family < CHIP_RV380)
174 return false;
175
176 /* MSIs don't work on AGP */
177 if (rdev->flags & RADEON_IS_AGP)
178 return false;
179
a18cee15
AD
180 /* force MSI on */
181 if (radeon_msi == 1)
182 return true;
183 else if (radeon_msi == 0)
184 return false;
185
b362105f
AD
186 /* Quirks */
187 /* HP RS690 only seems to work with MSIs. */
188 if ((rdev->pdev->device == 0x791f) &&
189 (rdev->pdev->subsystem_vendor == 0x103c) &&
190 (rdev->pdev->subsystem_device == 0x30c2))
191 return true;
192
44517c44
AD
193 /* Dell RS690 only seems to work with MSIs. */
194 if ((rdev->pdev->device == 0x791f) &&
195 (rdev->pdev->subsystem_vendor == 0x1028) &&
196 (rdev->pdev->subsystem_device == 0x01fc))
197 return true;
198
01e718ec
AD
199 /* Dell RS690 only seems to work with MSIs. */
200 if ((rdev->pdev->device == 0x791f) &&
201 (rdev->pdev->subsystem_vendor == 0x1028) &&
202 (rdev->pdev->subsystem_device == 0x01fd))
203 return true;
204
3a6d59df
AD
205 /* Gateway RS690 only seems to work with MSIs. */
206 if ((rdev->pdev->device == 0x791f) &&
207 (rdev->pdev->subsystem_vendor == 0x107b) &&
208 (rdev->pdev->subsystem_device == 0x0185))
209 return true;
210
16a5e32b
DA
211 /* RV515 seems to have MSI issues where it loses
212 * MSI rearms occasionally. This leads to lockups and freezes.
213 * disable it by default.
214 */
215 if (rdev->family == CHIP_RV515)
216 return false;
8f6c25c5
AD
217 if (rdev->flags & RADEON_IS_IGP) {
218 /* APUs work fine with MSIs */
219 if (rdev->family >= CHIP_PALM)
220 return true;
221 /* lots of IGPs have problems with MSIs */
222 return false;
223 }
224
225 return true;
226}
227
b73ba98d
AD
228/**
229 * radeon_irq_kms_init - init driver interrupt info
230 *
231 * @rdev: radeon device pointer
232 *
233 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
234 * Returns 0 for success, error for failure.
235 */
771fe6b9
JG
236int radeon_irq_kms_init(struct radeon_device *rdev)
237{
238 int r = 0;
239
32c87fca 240 INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
f122c610 241 INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
32c87fca 242
fb98257a 243 spin_lock_init(&rdev->irq.lock);
9e7b414e 244 r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
771fe6b9
JG
245 if (r) {
246 return r;
247 }
3e5cb98d
AD
248 /* enable msi */
249 rdev->msi_enabled = 0;
8f6c25c5
AD
250
251 if (radeon_msi_ok(rdev)) {
3e5cb98d 252 int ret = pci_enable_msi(rdev->pdev);
d8f60cfc 253 if (!ret) {
3e5cb98d 254 rdev->msi_enabled = 1;
da7be684 255 dev_info(rdev->dev, "radeon: using MSI.\n");
d8f60cfc 256 }
3e5cb98d 257 }
771fe6b9 258 rdev->irq.installed = true;
003e69f9
JG
259 r = drm_irq_install(rdev->ddev);
260 if (r) {
261 rdev->irq.installed = false;
262 return r;
263 }
771fe6b9
JG
264 DRM_INFO("radeon: irq initialized.\n");
265 return 0;
266}
267
b73ba98d
AD
268/**
269 * radeon_irq_kms_fini - tear down driver interrrupt info
270 *
271 * @rdev: radeon device pointer
272 *
273 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
274 */
771fe6b9
JG
275void radeon_irq_kms_fini(struct radeon_device *rdev)
276{
003e69f9 277 drm_vblank_cleanup(rdev->ddev);
771fe6b9 278 if (rdev->irq.installed) {
771fe6b9 279 drm_irq_uninstall(rdev->ddev);
003e69f9 280 rdev->irq.installed = false;
3e5cb98d
AD
281 if (rdev->msi_enabled)
282 pci_disable_msi(rdev->pdev);
771fe6b9 283 }
32c87fca 284 flush_work_sync(&rdev->hotplug_work);
771fe6b9 285}
1614f8b1 286
b73ba98d
AD
287/**
288 * radeon_irq_kms_sw_irq_get - enable software interrupt
289 *
290 * @rdev: radeon device pointer
291 * @ring: ring whose interrupt you want to enable
292 *
293 * Enables the software interrupt for a specific ring (all asics).
294 * The software interrupt is generally used to signal a fence on
295 * a particular ring.
296 */
1b37078b 297void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
1614f8b1
DA
298{
299 unsigned long irqflags;
300
736fc37f
CK
301 if (!rdev->ddev->irq_enabled)
302 return;
303
304 if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
305 spin_lock_irqsave(&rdev->irq.lock, irqflags);
1614f8b1 306 radeon_irq_set(rdev);
736fc37f 307 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
1614f8b1 308 }
1614f8b1
DA
309}
310
b73ba98d
AD
311/**
312 * radeon_irq_kms_sw_irq_put - disable software interrupt
313 *
314 * @rdev: radeon device pointer
315 * @ring: ring whose interrupt you want to disable
316 *
317 * Disables the software interrupt for a specific ring (all asics).
318 * The software interrupt is generally used to signal a fence on
319 * a particular ring.
320 */
1b37078b 321void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
1614f8b1
DA
322{
323 unsigned long irqflags;
324
736fc37f
CK
325 if (!rdev->ddev->irq_enabled)
326 return;
327
328 if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
329 spin_lock_irqsave(&rdev->irq.lock, irqflags);
1614f8b1 330 radeon_irq_set(rdev);
736fc37f 331 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
1614f8b1 332 }
1614f8b1
DA
333}
334
b73ba98d
AD
335/**
336 * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
337 *
338 * @rdev: radeon device pointer
339 * @crtc: crtc whose interrupt you want to enable
340 *
341 * Enables the pageflip interrupt for a specific crtc (all asics).
342 * For pageflips we use the vblank interrupt source.
343 */
6f34be50
AD
344void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
345{
346 unsigned long irqflags;
347
348 if (crtc < 0 || crtc >= rdev->num_crtc)
349 return;
350
736fc37f
CK
351 if (!rdev->ddev->irq_enabled)
352 return;
353
354 if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
355 spin_lock_irqsave(&rdev->irq.lock, irqflags);
6f34be50 356 radeon_irq_set(rdev);
736fc37f 357 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
6f34be50 358 }
6f34be50
AD
359}
360
b73ba98d
AD
361/**
362 * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
363 *
364 * @rdev: radeon device pointer
365 * @crtc: crtc whose interrupt you want to disable
366 *
367 * Disables the pageflip interrupt for a specific crtc (all asics).
368 * For pageflips we use the vblank interrupt source.
369 */
6f34be50
AD
370void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
371{
372 unsigned long irqflags;
373
374 if (crtc < 0 || crtc >= rdev->num_crtc)
375 return;
376
736fc37f
CK
377 if (!rdev->ddev->irq_enabled)
378 return;
379
380 if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
381 spin_lock_irqsave(&rdev->irq.lock, irqflags);
6f34be50 382 radeon_irq_set(rdev);
736fc37f 383 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
6f34be50 384 }
6f34be50
AD
385}
386
b73ba98d
AD
387/**
388 * radeon_irq_kms_enable_afmt - enable audio format change interrupt
389 *
390 * @rdev: radeon device pointer
391 * @block: afmt block whose interrupt you want to enable
392 *
393 * Enables the afmt change interrupt for a specific afmt block (all asics).
394 */
fb98257a
CK
395void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
396{
397 unsigned long irqflags;
398
399 spin_lock_irqsave(&rdev->irq.lock, irqflags);
400 rdev->irq.afmt[block] = true;
401 radeon_irq_set(rdev);
402 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
403
404}
405
b73ba98d
AD
406/**
407 * radeon_irq_kms_disable_afmt - disable audio format change interrupt
408 *
409 * @rdev: radeon device pointer
410 * @block: afmt block whose interrupt you want to disable
411 *
412 * Disables the afmt change interrupt for a specific afmt block (all asics).
413 */
fb98257a
CK
414void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
415{
416 unsigned long irqflags;
417
418 spin_lock_irqsave(&rdev->irq.lock, irqflags);
419 rdev->irq.afmt[block] = false;
420 radeon_irq_set(rdev);
421 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
422}
423
b73ba98d
AD
424/**
425 * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
426 *
427 * @rdev: radeon device pointer
428 * @hpd_mask: mask of hpd pins you want to enable.
429 *
430 * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
431 */
fb98257a
CK
432void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
433{
434 unsigned long irqflags;
435 int i;
436
437 spin_lock_irqsave(&rdev->irq.lock, irqflags);
438 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
439 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
440 radeon_irq_set(rdev);
441 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
442}
443
b73ba98d
AD
444/**
445 * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
446 *
447 * @rdev: radeon device pointer
448 * @hpd_mask: mask of hpd pins you want to disable.
449 *
450 * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
451 */
fb98257a
CK
452void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
453{
454 unsigned long irqflags;
455 int i;
456
457 spin_lock_irqsave(&rdev->irq.lock, irqflags);
458 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
459 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
460 radeon_irq_set(rdev);
461 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
462}
463
This page took 0.494521 seconds and 5 git commands to generate.