drm/tegra: Move tegra_drm_mode_funcs to the core
[deliverable/linux.git] / drivers / gpu / drm / tegra / drm.c
CommitLineData
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1/*
2 * Copyright (C) 2012 Avionic Design GmbH
d43f81cb 3 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
d8f4a9ed
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4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
776dc384 10#include <linux/host1x.h>
df06b759 11#include <linux/iommu.h>
776dc384 12
d8f4a9ed 13#include "drm.h"
de2ba664 14#include "gem.h"
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15
16#define DRIVER_NAME "tegra"
17#define DRIVER_DESC "NVIDIA Tegra graphics"
18#define DRIVER_DATE "20120330"
19#define DRIVER_MAJOR 0
20#define DRIVER_MINOR 0
21#define DRIVER_PATCHLEVEL 0
22
08943e6c
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23struct tegra_drm_file {
24 struct list_head contexts;
25};
26
f9914214
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27static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
28 .fb_create = tegra_fb_create,
29#ifdef CONFIG_DRM_TEGRA_FBDEV
30 .output_poll_changed = tegra_fb_output_poll_changed,
31#endif
32};
33
776dc384 34static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
692e6d7b 35{
776dc384 36 struct host1x_device *device = to_host1x_device(drm->dev);
386a2a71 37 struct tegra_drm *tegra;
692e6d7b
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38 int err;
39
776dc384 40 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
386a2a71 41 if (!tegra)
692e6d7b
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42 return -ENOMEM;
43
df06b759
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44 if (iommu_present(&platform_bus_type)) {
45 tegra->domain = iommu_domain_alloc(&platform_bus_type);
bf19b885
DC
46 if (!tegra->domain) {
47 err = -ENOMEM;
df06b759
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48 goto free;
49 }
50
51 DRM_DEBUG("IOMMU context initialized\n");
52 drm_mm_init(&tegra->mm, 0, SZ_2G);
53 }
54
386a2a71
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55 mutex_init(&tegra->clients_lock);
56 INIT_LIST_HEAD(&tegra->clients);
386a2a71
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57 drm->dev_private = tegra;
58 tegra->drm = drm;
d8f4a9ed
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59
60 drm_mode_config_init(drm);
61
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62 drm->mode_config.min_width = 0;
63 drm->mode_config.min_height = 0;
64
65 drm->mode_config.max_width = 4096;
66 drm->mode_config.max_height = 4096;
67
68 drm->mode_config.funcs = &tegra_drm_mode_funcs;
69
e2215321
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70 err = tegra_drm_fb_prepare(drm);
71 if (err < 0)
1d1e6fe9 72 goto config;
e2215321
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73
74 drm_kms_helper_poll_init(drm);
75
776dc384 76 err = host1x_device_init(device);
d8f4a9ed 77 if (err < 0)
1d1e6fe9 78 goto fbdev;
d8f4a9ed 79
603f0cc9
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80 /*
81 * We don't use the drm_irq_install() helpers provided by the DRM
82 * core, so we need to set this manually in order to allow the
83 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
84 */
4423843c 85 drm->irq_enabled = true;
603f0cc9 86
6e5ff998
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87 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
88 if (err < 0)
1d1e6fe9 89 goto device;
6e5ff998 90
d8f4a9ed
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91 err = tegra_drm_fb_init(drm);
92 if (err < 0)
1d1e6fe9 93 goto vblank;
d8f4a9ed 94
d8f4a9ed 95 return 0;
1d1e6fe9
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96
97vblank:
98 drm_vblank_cleanup(drm);
99device:
100 host1x_device_exit(device);
101fbdev:
102 drm_kms_helper_poll_fini(drm);
103 tegra_drm_fb_free(drm);
104config:
105 drm_mode_config_cleanup(drm);
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106
107 if (tegra->domain) {
108 iommu_domain_free(tegra->domain);
109 drm_mm_takedown(&tegra->mm);
110 }
111free:
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112 kfree(tegra);
113 return err;
d8f4a9ed
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114}
115
116static int tegra_drm_unload(struct drm_device *drm)
117{
776dc384 118 struct host1x_device *device = to_host1x_device(drm->dev);
df06b759 119 struct tegra_drm *tegra = drm->dev_private;
776dc384
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120 int err;
121
d8f4a9ed
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122 drm_kms_helper_poll_fini(drm);
123 tegra_drm_fb_exit(drm);
f002abc1
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124 drm_vblank_cleanup(drm);
125 drm_mode_config_cleanup(drm);
d8f4a9ed 126
776dc384
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127 err = host1x_device_exit(device);
128 if (err < 0)
129 return err;
130
df06b759
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131 if (tegra->domain) {
132 iommu_domain_free(tegra->domain);
133 drm_mm_takedown(&tegra->mm);
134 }
135
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136 kfree(tegra);
137
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138 return 0;
139}
140
141static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
142{
08943e6c 143 struct tegra_drm_file *fpriv;
d43f81cb
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144
145 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
146 if (!fpriv)
147 return -ENOMEM;
148
149 INIT_LIST_HEAD(&fpriv->contexts);
150 filp->driver_priv = fpriv;
151
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152 return 0;
153}
154
c88c3630 155static void tegra_drm_context_free(struct tegra_drm_context *context)
d43f81cb
TB
156{
157 context->client->ops->close_channel(context);
158 kfree(context);
159}
160
d8f4a9ed
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161static void tegra_drm_lastclose(struct drm_device *drm)
162{
6e60163b 163#ifdef CONFIG_DRM_TEGRA_FBDEV
386a2a71 164 struct tegra_drm *tegra = drm->dev_private;
d8f4a9ed 165
386a2a71 166 tegra_fbdev_restore_mode(tegra->fbdev);
60c2f709 167#endif
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168}
169
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170static struct host1x_bo *
171host1x_bo_lookup(struct drm_device *drm, struct drm_file *file, u32 handle)
172{
173 struct drm_gem_object *gem;
174 struct tegra_bo *bo;
175
176 gem = drm_gem_object_lookup(drm, file, handle);
177 if (!gem)
178 return NULL;
179
180 mutex_lock(&drm->struct_mutex);
181 drm_gem_object_unreference(gem);
182 mutex_unlock(&drm->struct_mutex);
183
184 bo = to_tegra_bo(gem);
185 return &bo->base;
186}
187
961e3bea
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188static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
189 struct drm_tegra_reloc __user *src,
190 struct drm_device *drm,
191 struct drm_file *file)
192{
193 u32 cmdbuf, target;
194 int err;
195
196 err = get_user(cmdbuf, &src->cmdbuf.handle);
197 if (err < 0)
198 return err;
199
200 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
201 if (err < 0)
202 return err;
203
204 err = get_user(target, &src->target.handle);
205 if (err < 0)
206 return err;
207
208 err = get_user(dest->target.offset, &src->cmdbuf.offset);
209 if (err < 0)
210 return err;
211
212 err = get_user(dest->shift, &src->shift);
213 if (err < 0)
214 return err;
215
216 dest->cmdbuf.bo = host1x_bo_lookup(drm, file, cmdbuf);
217 if (!dest->cmdbuf.bo)
218 return -ENOENT;
219
220 dest->target.bo = host1x_bo_lookup(drm, file, target);
221 if (!dest->target.bo)
222 return -ENOENT;
223
224 return 0;
225}
226
c40f0f1a
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227int tegra_drm_submit(struct tegra_drm_context *context,
228 struct drm_tegra_submit *args, struct drm_device *drm,
229 struct drm_file *file)
230{
231 unsigned int num_cmdbufs = args->num_cmdbufs;
232 unsigned int num_relocs = args->num_relocs;
233 unsigned int num_waitchks = args->num_waitchks;
234 struct drm_tegra_cmdbuf __user *cmdbufs =
a7ed68fc 235 (void __user *)(uintptr_t)args->cmdbufs;
c40f0f1a 236 struct drm_tegra_reloc __user *relocs =
a7ed68fc 237 (void __user *)(uintptr_t)args->relocs;
c40f0f1a 238 struct drm_tegra_waitchk __user *waitchks =
a7ed68fc 239 (void __user *)(uintptr_t)args->waitchks;
c40f0f1a
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240 struct drm_tegra_syncpt syncpt;
241 struct host1x_job *job;
242 int err;
243
244 /* We don't yet support other than one syncpt_incr struct per submit */
245 if (args->num_syncpts != 1)
246 return -EINVAL;
247
248 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
249 args->num_relocs, args->num_waitchks);
250 if (!job)
251 return -ENOMEM;
252
253 job->num_relocs = args->num_relocs;
254 job->num_waitchk = args->num_waitchks;
255 job->client = (u32)args->context;
256 job->class = context->client->base.class;
257 job->serialize = true;
258
259 while (num_cmdbufs) {
260 struct drm_tegra_cmdbuf cmdbuf;
261 struct host1x_bo *bo;
262
9a991600
DC
263 if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
264 err = -EFAULT;
c40f0f1a 265 goto fail;
9a991600 266 }
c40f0f1a
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267
268 bo = host1x_bo_lookup(drm, file, cmdbuf.handle);
269 if (!bo) {
270 err = -ENOENT;
271 goto fail;
272 }
273
274 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
275 num_cmdbufs--;
276 cmdbufs++;
277 }
278
961e3bea 279 /* copy and resolve relocations from submit */
c40f0f1a 280 while (num_relocs--) {
961e3bea
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281 err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
282 &relocs[num_relocs], drm,
283 file);
284 if (err < 0)
c40f0f1a 285 goto fail;
c40f0f1a
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286 }
287
9a991600
DC
288 if (copy_from_user(job->waitchk, waitchks,
289 sizeof(*waitchks) * num_waitchks)) {
290 err = -EFAULT;
c40f0f1a 291 goto fail;
9a991600 292 }
c40f0f1a 293
9a991600
DC
294 if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
295 sizeof(syncpt))) {
296 err = -EFAULT;
c40f0f1a 297 goto fail;
9a991600 298 }
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299
300 job->is_addr_reg = context->client->ops->is_addr_reg;
301 job->syncpt_incrs = syncpt.incrs;
302 job->syncpt_id = syncpt.id;
303 job->timeout = 10000;
304
305 if (args->timeout && args->timeout < 10000)
306 job->timeout = args->timeout;
307
308 err = host1x_job_pin(job, context->client->base.dev);
309 if (err)
310 goto fail;
311
312 err = host1x_job_submit(job);
313 if (err)
314 goto fail_submit;
315
316 args->fence = job->syncpt_end;
317
318 host1x_job_put(job);
319 return 0;
320
321fail_submit:
322 host1x_job_unpin(job);
323fail:
324 host1x_job_put(job);
325 return err;
326}
327
328
d43f81cb 329#ifdef CONFIG_DRM_TEGRA_STAGING
c88c3630
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330static struct tegra_drm_context *tegra_drm_get_context(__u64 context)
331{
332 return (struct tegra_drm_context *)(uintptr_t)context;
333}
334
08943e6c 335static bool tegra_drm_file_owns_context(struct tegra_drm_file *file,
c88c3630 336 struct tegra_drm_context *context)
d43f81cb 337{
c88c3630 338 struct tegra_drm_context *ctx;
d43f81cb
TB
339
340 list_for_each_entry(ctx, &file->contexts, list)
341 if (ctx == context)
342 return true;
343
344 return false;
345}
346
347static int tegra_gem_create(struct drm_device *drm, void *data,
348 struct drm_file *file)
349{
350 struct drm_tegra_gem_create *args = data;
351 struct tegra_bo *bo;
352
773af77f 353 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
d43f81cb
TB
354 &args->handle);
355 if (IS_ERR(bo))
356 return PTR_ERR(bo);
357
358 return 0;
359}
360
361static int tegra_gem_mmap(struct drm_device *drm, void *data,
362 struct drm_file *file)
363{
364 struct drm_tegra_gem_mmap *args = data;
365 struct drm_gem_object *gem;
366 struct tegra_bo *bo;
367
368 gem = drm_gem_object_lookup(drm, file, args->handle);
369 if (!gem)
370 return -EINVAL;
371
372 bo = to_tegra_bo(gem);
373
2bc7b0ca 374 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
d43f81cb
TB
375
376 drm_gem_object_unreference(gem);
377
378 return 0;
379}
380
381static int tegra_syncpt_read(struct drm_device *drm, void *data,
382 struct drm_file *file)
383{
776dc384 384 struct host1x *host = dev_get_drvdata(drm->dev->parent);
d43f81cb 385 struct drm_tegra_syncpt_read *args = data;
776dc384 386 struct host1x_syncpt *sp;
d43f81cb 387
776dc384 388 sp = host1x_syncpt_get(host, args->id);
d43f81cb
TB
389 if (!sp)
390 return -EINVAL;
391
392 args->value = host1x_syncpt_read_min(sp);
393 return 0;
394}
395
396static int tegra_syncpt_incr(struct drm_device *drm, void *data,
397 struct drm_file *file)
398{
776dc384 399 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
d43f81cb 400 struct drm_tegra_syncpt_incr *args = data;
776dc384 401 struct host1x_syncpt *sp;
d43f81cb 402
776dc384 403 sp = host1x_syncpt_get(host1x, args->id);
d43f81cb
TB
404 if (!sp)
405 return -EINVAL;
406
ebae30b1 407 return host1x_syncpt_incr(sp);
d43f81cb
TB
408}
409
410static int tegra_syncpt_wait(struct drm_device *drm, void *data,
411 struct drm_file *file)
412{
776dc384 413 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
d43f81cb 414 struct drm_tegra_syncpt_wait *args = data;
776dc384 415 struct host1x_syncpt *sp;
d43f81cb 416
776dc384 417 sp = host1x_syncpt_get(host1x, args->id);
d43f81cb
TB
418 if (!sp)
419 return -EINVAL;
420
421 return host1x_syncpt_wait(sp, args->thresh, args->timeout,
422 &args->value);
423}
424
425static int tegra_open_channel(struct drm_device *drm, void *data,
426 struct drm_file *file)
427{
08943e6c 428 struct tegra_drm_file *fpriv = file->driver_priv;
386a2a71 429 struct tegra_drm *tegra = drm->dev_private;
d43f81cb 430 struct drm_tegra_open_channel *args = data;
c88c3630 431 struct tegra_drm_context *context;
53fa7f72 432 struct tegra_drm_client *client;
d43f81cb
TB
433 int err = -ENODEV;
434
435 context = kzalloc(sizeof(*context), GFP_KERNEL);
436 if (!context)
437 return -ENOMEM;
438
776dc384 439 list_for_each_entry(client, &tegra->clients, list)
53fa7f72 440 if (client->base.class == args->client) {
d43f81cb
TB
441 err = client->ops->open_channel(client, context);
442 if (err)
443 break;
444
d43f81cb
TB
445 list_add(&context->list, &fpriv->contexts);
446 args->context = (uintptr_t)context;
53fa7f72 447 context->client = client;
d43f81cb
TB
448 return 0;
449 }
450
451 kfree(context);
452 return err;
453}
454
455static int tegra_close_channel(struct drm_device *drm, void *data,
456 struct drm_file *file)
457{
08943e6c 458 struct tegra_drm_file *fpriv = file->driver_priv;
776dc384 459 struct drm_tegra_close_channel *args = data;
c88c3630
TR
460 struct tegra_drm_context *context;
461
462 context = tegra_drm_get_context(args->context);
d43f81cb 463
08943e6c 464 if (!tegra_drm_file_owns_context(fpriv, context))
d43f81cb
TB
465 return -EINVAL;
466
467 list_del(&context->list);
c88c3630 468 tegra_drm_context_free(context);
d43f81cb
TB
469
470 return 0;
471}
472
473static int tegra_get_syncpt(struct drm_device *drm, void *data,
474 struct drm_file *file)
475{
08943e6c 476 struct tegra_drm_file *fpriv = file->driver_priv;
d43f81cb 477 struct drm_tegra_get_syncpt *args = data;
c88c3630 478 struct tegra_drm_context *context;
d43f81cb
TB
479 struct host1x_syncpt *syncpt;
480
c88c3630
TR
481 context = tegra_drm_get_context(args->context);
482
08943e6c 483 if (!tegra_drm_file_owns_context(fpriv, context))
d43f81cb
TB
484 return -ENODEV;
485
53fa7f72 486 if (args->index >= context->client->base.num_syncpts)
d43f81cb
TB
487 return -EINVAL;
488
53fa7f72 489 syncpt = context->client->base.syncpts[args->index];
d43f81cb
TB
490 args->id = host1x_syncpt_id(syncpt);
491
492 return 0;
493}
494
495static int tegra_submit(struct drm_device *drm, void *data,
496 struct drm_file *file)
497{
08943e6c 498 struct tegra_drm_file *fpriv = file->driver_priv;
d43f81cb 499 struct drm_tegra_submit *args = data;
c88c3630
TR
500 struct tegra_drm_context *context;
501
502 context = tegra_drm_get_context(args->context);
d43f81cb 503
08943e6c 504 if (!tegra_drm_file_owns_context(fpriv, context))
d43f81cb
TB
505 return -ENODEV;
506
507 return context->client->ops->submit(context, args, drm, file);
508}
c54a169b
AM
509
510static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
511 struct drm_file *file)
512{
513 struct tegra_drm_file *fpriv = file->driver_priv;
514 struct drm_tegra_get_syncpt_base *args = data;
515 struct tegra_drm_context *context;
516 struct host1x_syncpt_base *base;
517 struct host1x_syncpt *syncpt;
518
519 context = tegra_drm_get_context(args->context);
520
521 if (!tegra_drm_file_owns_context(fpriv, context))
522 return -ENODEV;
523
524 if (args->syncpt >= context->client->base.num_syncpts)
525 return -EINVAL;
526
527 syncpt = context->client->base.syncpts[args->syncpt];
528
529 base = host1x_syncpt_get_base(syncpt);
530 if (!base)
531 return -ENXIO;
532
533 args->id = host1x_syncpt_base_id(base);
534
535 return 0;
536}
7678d71f
TR
537
538static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
539 struct drm_file *file)
540{
541 struct drm_tegra_gem_set_tiling *args = data;
542 enum tegra_bo_tiling_mode mode;
543 struct drm_gem_object *gem;
544 unsigned long value = 0;
545 struct tegra_bo *bo;
546
547 switch (args->mode) {
548 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
549 mode = TEGRA_BO_TILING_MODE_PITCH;
550
551 if (args->value != 0)
552 return -EINVAL;
553
554 break;
555
556 case DRM_TEGRA_GEM_TILING_MODE_TILED:
557 mode = TEGRA_BO_TILING_MODE_TILED;
558
559 if (args->value != 0)
560 return -EINVAL;
561
562 break;
563
564 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
565 mode = TEGRA_BO_TILING_MODE_BLOCK;
566
567 if (args->value > 5)
568 return -EINVAL;
569
570 value = args->value;
571 break;
572
573 default:
574 return -EINVAL;
575 }
576
577 gem = drm_gem_object_lookup(drm, file, args->handle);
578 if (!gem)
579 return -ENOENT;
580
581 bo = to_tegra_bo(gem);
582
583 bo->tiling.mode = mode;
584 bo->tiling.value = value;
585
586 drm_gem_object_unreference(gem);
587
588 return 0;
589}
590
591static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
592 struct drm_file *file)
593{
594 struct drm_tegra_gem_get_tiling *args = data;
595 struct drm_gem_object *gem;
596 struct tegra_bo *bo;
597 int err = 0;
598
599 gem = drm_gem_object_lookup(drm, file, args->handle);
600 if (!gem)
601 return -ENOENT;
602
603 bo = to_tegra_bo(gem);
604
605 switch (bo->tiling.mode) {
606 case TEGRA_BO_TILING_MODE_PITCH:
607 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
608 args->value = 0;
609 break;
610
611 case TEGRA_BO_TILING_MODE_TILED:
612 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
613 args->value = 0;
614 break;
615
616 case TEGRA_BO_TILING_MODE_BLOCK:
617 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
618 args->value = bo->tiling.value;
619 break;
620
621 default:
622 err = -EINVAL;
623 break;
624 }
625
626 drm_gem_object_unreference(gem);
627
628 return err;
629}
7b129087
TR
630
631static int tegra_gem_set_flags(struct drm_device *drm, void *data,
632 struct drm_file *file)
633{
634 struct drm_tegra_gem_set_flags *args = data;
635 struct drm_gem_object *gem;
636 struct tegra_bo *bo;
637
638 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
639 return -EINVAL;
640
641 gem = drm_gem_object_lookup(drm, file, args->handle);
642 if (!gem)
643 return -ENOENT;
644
645 bo = to_tegra_bo(gem);
646 bo->flags = 0;
647
648 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
649 bo->flags |= TEGRA_BO_BOTTOM_UP;
650
651 drm_gem_object_unreference(gem);
652
653 return 0;
654}
655
656static int tegra_gem_get_flags(struct drm_device *drm, void *data,
657 struct drm_file *file)
658{
659 struct drm_tegra_gem_get_flags *args = data;
660 struct drm_gem_object *gem;
661 struct tegra_bo *bo;
662
663 gem = drm_gem_object_lookup(drm, file, args->handle);
664 if (!gem)
665 return -ENOENT;
666
667 bo = to_tegra_bo(gem);
668 args->flags = 0;
669
670 if (bo->flags & TEGRA_BO_BOTTOM_UP)
671 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
672
673 drm_gem_object_unreference(gem);
674
675 return 0;
676}
d43f81cb
TB
677#endif
678
baa70943 679static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
d43f81cb 680#ifdef CONFIG_DRM_TEGRA_STAGING
bd4f2360 681 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, DRM_UNLOCKED),
d43f81cb
TB
682 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, DRM_UNLOCKED),
683 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, DRM_UNLOCKED),
684 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, DRM_UNLOCKED),
685 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, DRM_UNLOCKED),
686 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, DRM_UNLOCKED),
687 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, DRM_UNLOCKED),
688 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, DRM_UNLOCKED),
689 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, DRM_UNLOCKED),
c54a169b 690 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, DRM_UNLOCKED),
7678d71f
TR
691 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, DRM_UNLOCKED),
692 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, DRM_UNLOCKED),
7b129087
TR
693 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, DRM_UNLOCKED),
694 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, DRM_UNLOCKED),
d43f81cb 695#endif
d8f4a9ed
TR
696};
697
698static const struct file_operations tegra_drm_fops = {
699 .owner = THIS_MODULE,
700 .open = drm_open,
701 .release = drm_release,
702 .unlocked_ioctl = drm_ioctl,
de2ba664 703 .mmap = tegra_drm_mmap,
d8f4a9ed 704 .poll = drm_poll,
d8f4a9ed
TR
705 .read = drm_read,
706#ifdef CONFIG_COMPAT
707 .compat_ioctl = drm_compat_ioctl,
708#endif
709 .llseek = noop_llseek,
710};
711
ed7dae58
TR
712static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm,
713 unsigned int pipe)
6e5ff998
TR
714{
715 struct drm_crtc *crtc;
716
717 list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) {
ed7dae58 718 if (pipe == drm_crtc_index(crtc))
6e5ff998
TR
719 return crtc;
720 }
721
722 return NULL;
723}
724
ed7dae58 725static u32 tegra_drm_get_vblank_counter(struct drm_device *drm, int pipe)
6e5ff998 726{
ed7dae58
TR
727 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
728
729 if (!crtc)
730 return 0;
731
6e5ff998 732 /* TODO: implement real hardware counter using syncpoints */
ed7dae58 733 return drm_crtc_vblank_count(crtc);
6e5ff998
TR
734}
735
736static int tegra_drm_enable_vblank(struct drm_device *drm, int pipe)
737{
738 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
739 struct tegra_dc *dc = to_tegra_dc(crtc);
740
741 if (!crtc)
742 return -ENODEV;
743
744 tegra_dc_enable_vblank(dc);
745
746 return 0;
747}
748
749static void tegra_drm_disable_vblank(struct drm_device *drm, int pipe)
750{
751 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
752 struct tegra_dc *dc = to_tegra_dc(crtc);
753
754 if (crtc)
755 tegra_dc_disable_vblank(dc);
756}
757
3c03c46a
TR
758static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
759{
08943e6c 760 struct tegra_drm_file *fpriv = file->driver_priv;
c88c3630 761 struct tegra_drm_context *context, *tmp;
3c03c46a
TR
762 struct drm_crtc *crtc;
763
764 list_for_each_entry(crtc, &drm->mode_config.crtc_list, head)
765 tegra_dc_cancel_page_flip(crtc, file);
d43f81cb
TB
766
767 list_for_each_entry_safe(context, tmp, &fpriv->contexts, list)
c88c3630 768 tegra_drm_context_free(context);
d43f81cb
TB
769
770 kfree(fpriv);
3c03c46a
TR
771}
772
e450fcc6
TR
773#ifdef CONFIG_DEBUG_FS
774static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
775{
776 struct drm_info_node *node = (struct drm_info_node *)s->private;
777 struct drm_device *drm = node->minor->dev;
778 struct drm_framebuffer *fb;
779
780 mutex_lock(&drm->mode_config.fb_lock);
781
782 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
783 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
784 fb->base.id, fb->width, fb->height, fb->depth,
785 fb->bits_per_pixel,
786 atomic_read(&fb->refcount.refcount));
787 }
788
789 mutex_unlock(&drm->mode_config.fb_lock);
790
791 return 0;
792}
793
794static struct drm_info_list tegra_debugfs_list[] = {
795 { "framebuffers", tegra_debugfs_framebuffers, 0 },
796};
797
798static int tegra_debugfs_init(struct drm_minor *minor)
799{
800 return drm_debugfs_create_files(tegra_debugfs_list,
801 ARRAY_SIZE(tegra_debugfs_list),
802 minor->debugfs_root, minor);
803}
804
805static void tegra_debugfs_cleanup(struct drm_minor *minor)
806{
807 drm_debugfs_remove_files(tegra_debugfs_list,
808 ARRAY_SIZE(tegra_debugfs_list), minor);
809}
810#endif
811
9b57f5f2 812static struct drm_driver tegra_drm_driver = {
3800391d 813 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
d8f4a9ed
TR
814 .load = tegra_drm_load,
815 .unload = tegra_drm_unload,
816 .open = tegra_drm_open,
3c03c46a 817 .preclose = tegra_drm_preclose,
d8f4a9ed
TR
818 .lastclose = tegra_drm_lastclose,
819
6e5ff998
TR
820 .get_vblank_counter = tegra_drm_get_vblank_counter,
821 .enable_vblank = tegra_drm_enable_vblank,
822 .disable_vblank = tegra_drm_disable_vblank,
823
e450fcc6
TR
824#if defined(CONFIG_DEBUG_FS)
825 .debugfs_init = tegra_debugfs_init,
826 .debugfs_cleanup = tegra_debugfs_cleanup,
827#endif
828
de2ba664
AM
829 .gem_free_object = tegra_bo_free_object,
830 .gem_vm_ops = &tegra_bo_vm_ops,
3800391d
TR
831
832 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
833 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
834 .gem_prime_export = tegra_gem_prime_export,
835 .gem_prime_import = tegra_gem_prime_import,
836
de2ba664
AM
837 .dumb_create = tegra_bo_dumb_create,
838 .dumb_map_offset = tegra_bo_dumb_map_offset,
43387b37 839 .dumb_destroy = drm_gem_dumb_destroy,
d8f4a9ed
TR
840
841 .ioctls = tegra_drm_ioctls,
842 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
843 .fops = &tegra_drm_fops,
844
845 .name = DRIVER_NAME,
846 .desc = DRIVER_DESC,
847 .date = DRIVER_DATE,
848 .major = DRIVER_MAJOR,
849 .minor = DRIVER_MINOR,
850 .patchlevel = DRIVER_PATCHLEVEL,
851};
776dc384
TR
852
853int tegra_drm_register_client(struct tegra_drm *tegra,
854 struct tegra_drm_client *client)
855{
856 mutex_lock(&tegra->clients_lock);
857 list_add_tail(&client->list, &tegra->clients);
858 mutex_unlock(&tegra->clients_lock);
859
860 return 0;
861}
862
863int tegra_drm_unregister_client(struct tegra_drm *tegra,
864 struct tegra_drm_client *client)
865{
866 mutex_lock(&tegra->clients_lock);
867 list_del_init(&client->list);
868 mutex_unlock(&tegra->clients_lock);
869
870 return 0;
871}
872
9910f5c4 873static int host1x_drm_probe(struct host1x_device *dev)
776dc384 874{
9910f5c4
TR
875 struct drm_driver *driver = &tegra_drm_driver;
876 struct drm_device *drm;
877 int err;
878
879 drm = drm_dev_alloc(driver, &dev->dev);
880 if (!drm)
881 return -ENOMEM;
882
883 drm_dev_set_unique(drm, dev_name(&dev->dev));
884 dev_set_drvdata(&dev->dev, drm);
885
886 err = drm_dev_register(drm, 0);
887 if (err < 0)
888 goto unref;
889
890 DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name,
891 driver->major, driver->minor, driver->patchlevel,
892 driver->date, drm->primary->index);
893
894 return 0;
895
896unref:
897 drm_dev_unref(drm);
898 return err;
776dc384
TR
899}
900
9910f5c4 901static int host1x_drm_remove(struct host1x_device *dev)
776dc384 902{
9910f5c4
TR
903 struct drm_device *drm = dev_get_drvdata(&dev->dev);
904
905 drm_dev_unregister(drm);
906 drm_dev_unref(drm);
776dc384
TR
907
908 return 0;
909}
910
911static const struct of_device_id host1x_drm_subdevs[] = {
912 { .compatible = "nvidia,tegra20-dc", },
913 { .compatible = "nvidia,tegra20-hdmi", },
914 { .compatible = "nvidia,tegra20-gr2d", },
5f60ed0d 915 { .compatible = "nvidia,tegra20-gr3d", },
776dc384
TR
916 { .compatible = "nvidia,tegra30-dc", },
917 { .compatible = "nvidia,tegra30-hdmi", },
918 { .compatible = "nvidia,tegra30-gr2d", },
5f60ed0d 919 { .compatible = "nvidia,tegra30-gr3d", },
dec72739 920 { .compatible = "nvidia,tegra114-dsi", },
7d1d28ac 921 { .compatible = "nvidia,tegra114-hdmi", },
5f60ed0d 922 { .compatible = "nvidia,tegra114-gr3d", },
8620fc62 923 { .compatible = "nvidia,tegra124-dc", },
6b6b6042 924 { .compatible = "nvidia,tegra124-sor", },
fb7be70e 925 { .compatible = "nvidia,tegra124-hdmi", },
776dc384
TR
926 { /* sentinel */ }
927};
928
929static struct host1x_driver host1x_drm_driver = {
f4c5cf88
TR
930 .driver = {
931 .name = "drm",
932 },
776dc384
TR
933 .probe = host1x_drm_probe,
934 .remove = host1x_drm_remove,
935 .subdevs = host1x_drm_subdevs,
936};
937
938static int __init host1x_drm_init(void)
939{
940 int err;
941
942 err = host1x_driver_register(&host1x_drm_driver);
943 if (err < 0)
944 return err;
945
946 err = platform_driver_register(&tegra_dc_driver);
947 if (err < 0)
948 goto unregister_host1x;
949
dec72739 950 err = platform_driver_register(&tegra_dsi_driver);
776dc384
TR
951 if (err < 0)
952 goto unregister_dc;
953
6b6b6042 954 err = platform_driver_register(&tegra_sor_driver);
dec72739
TR
955 if (err < 0)
956 goto unregister_dsi;
957
6b6b6042
TR
958 err = platform_driver_register(&tegra_hdmi_driver);
959 if (err < 0)
960 goto unregister_sor;
961
962 err = platform_driver_register(&tegra_dpaux_driver);
776dc384
TR
963 if (err < 0)
964 goto unregister_hdmi;
965
6b6b6042
TR
966 err = platform_driver_register(&tegra_gr2d_driver);
967 if (err < 0)
968 goto unregister_dpaux;
969
5f60ed0d
TR
970 err = platform_driver_register(&tegra_gr3d_driver);
971 if (err < 0)
972 goto unregister_gr2d;
973
776dc384
TR
974 return 0;
975
5f60ed0d
TR
976unregister_gr2d:
977 platform_driver_unregister(&tegra_gr2d_driver);
6b6b6042
TR
978unregister_dpaux:
979 platform_driver_unregister(&tegra_dpaux_driver);
776dc384
TR
980unregister_hdmi:
981 platform_driver_unregister(&tegra_hdmi_driver);
6b6b6042
TR
982unregister_sor:
983 platform_driver_unregister(&tegra_sor_driver);
dec72739
TR
984unregister_dsi:
985 platform_driver_unregister(&tegra_dsi_driver);
776dc384
TR
986unregister_dc:
987 platform_driver_unregister(&tegra_dc_driver);
988unregister_host1x:
989 host1x_driver_unregister(&host1x_drm_driver);
990 return err;
991}
992module_init(host1x_drm_init);
993
994static void __exit host1x_drm_exit(void)
995{
5f60ed0d 996 platform_driver_unregister(&tegra_gr3d_driver);
776dc384 997 platform_driver_unregister(&tegra_gr2d_driver);
6b6b6042 998 platform_driver_unregister(&tegra_dpaux_driver);
776dc384 999 platform_driver_unregister(&tegra_hdmi_driver);
6b6b6042 1000 platform_driver_unregister(&tegra_sor_driver);
dec72739 1001 platform_driver_unregister(&tegra_dsi_driver);
776dc384
TR
1002 platform_driver_unregister(&tegra_dc_driver);
1003 host1x_driver_unregister(&host1x_drm_driver);
1004}
1005module_exit(host1x_drm_exit);
1006
1007MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1008MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1009MODULE_LICENSE("GPL v2");
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