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fb1d9738 JB |
1 | /************************************************************************** |
2 | * | |
3 | * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA | |
4 | * All Rights Reserved. | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | |
7 | * copy of this software and associated documentation files (the | |
8 | * "Software"), to deal in the Software without restriction, including | |
9 | * without limitation the rights to use, copy, modify, merge, publish, | |
10 | * distribute, sub license, and/or sell copies of the Software, and to | |
11 | * permit persons to whom the Software is furnished to do so, subject to | |
12 | * the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice (including the | |
15 | * next paragraph) shall be included in all copies or substantial portions | |
16 | * of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | |
22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | |
23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | |
24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | |
25 | * | |
26 | **************************************************************************/ | |
27 | ||
28 | #include "vmwgfx_drv.h" | |
760285e7 | 29 | #include <drm/vmwgfx_drm.h> |
2fcd5a73 | 30 | #include "vmwgfx_kms.h" |
fb1d9738 | 31 | |
a6fc955f TH |
32 | struct svga_3d_compat_cap { |
33 | SVGA3dCapsRecordHeader header; | |
34 | SVGA3dCapPair pairs[SVGA3D_DEVCAP_MAX]; | |
35 | }; | |
36 | ||
fb1d9738 JB |
37 | int vmw_getparam_ioctl(struct drm_device *dev, void *data, |
38 | struct drm_file *file_priv) | |
39 | { | |
40 | struct vmw_private *dev_priv = vmw_priv(dev); | |
41 | struct drm_vmw_getparam_arg *param = | |
42 | (struct drm_vmw_getparam_arg *)data; | |
a6fc955f | 43 | struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv); |
fb1d9738 JB |
44 | |
45 | switch (param->param) { | |
46 | case DRM_VMW_PARAM_NUM_STREAMS: | |
47 | param->value = vmw_overlay_num_overlays(dev_priv); | |
48 | break; | |
49 | case DRM_VMW_PARAM_NUM_FREE_STREAMS: | |
50 | param->value = vmw_overlay_num_free_overlays(dev_priv); | |
51 | break; | |
52 | case DRM_VMW_PARAM_3D: | |
8e19a951 | 53 | param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0; |
fb1d9738 | 54 | break; |
f77cef3d TH |
55 | case DRM_VMW_PARAM_HW_CAPS: |
56 | param->value = dev_priv->capabilities; | |
57 | break; | |
58 | case DRM_VMW_PARAM_FIFO_CAPS: | |
59 | param->value = dev_priv->fifo.capabilities; | |
60 | break; | |
30f47fc8 | 61 | case DRM_VMW_PARAM_MAX_FB_SIZE: |
bc2d6508 | 62 | param->value = dev_priv->prim_bb_mem; |
30f47fc8 | 63 | break; |
f63f6a59 TH |
64 | case DRM_VMW_PARAM_FIFO_HW_VERSION: |
65 | { | |
66 | __le32 __iomem *fifo_mem = dev_priv->mmio_virt; | |
ebd4c6f6 | 67 | const struct vmw_fifo_state *fifo = &dev_priv->fifo; |
f63f6a59 | 68 | |
a6fc955f TH |
69 | if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) { |
70 | param->value = SVGA3D_HWVERSION_WS8_B1; | |
71 | break; | |
72 | } | |
73 | ||
ebd4c6f6 TH |
74 | param->value = |
75 | ioread32(fifo_mem + | |
76 | ((fifo->capabilities & | |
77 | SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ? | |
78 | SVGA_FIFO_3D_HWVERSION_REVISED : | |
79 | SVGA_FIFO_3D_HWVERSION)); | |
f63f6a59 TH |
80 | break; |
81 | } | |
716a2fd6 | 82 | case DRM_VMW_PARAM_MAX_SURF_MEMORY: |
a6fc955f TH |
83 | if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) && |
84 | !vmw_fp->gb_aware) | |
85 | param->value = dev_priv->max_mob_pages * PAGE_SIZE / 2; | |
86 | else | |
87 | param->value = dev_priv->memory_size; | |
716a2fd6 TH |
88 | break; |
89 | case DRM_VMW_PARAM_3D_CAPS_SIZE: | |
a6fc955f TH |
90 | if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) && |
91 | vmw_fp->gb_aware) | |
92 | param->value = SVGA3D_DEVCAP_MAX * sizeof(uint32_t); | |
93 | else if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) | |
94 | param->value = sizeof(struct svga_3d_compat_cap) + | |
95 | sizeof(uint32_t); | |
716a2fd6 TH |
96 | else |
97 | param->value = (SVGA_FIFO_3D_CAPS_LAST - | |
a6fc955f TH |
98 | SVGA_FIFO_3D_CAPS + 1) * |
99 | sizeof(uint32_t); | |
716a2fd6 | 100 | break; |
311474db | 101 | case DRM_VMW_PARAM_MAX_MOB_MEMORY: |
a6fc955f | 102 | vmw_fp->gb_aware = true; |
311474db TH |
103 | param->value = dev_priv->max_mob_pages * PAGE_SIZE; |
104 | break; | |
857aea1c CL |
105 | case DRM_VMW_PARAM_MAX_MOB_SIZE: |
106 | param->value = dev_priv->max_mob_size; | |
107 | break; | |
fb1d9738 JB |
108 | default: |
109 | DRM_ERROR("Illegal vmwgfx get param request: %d\n", | |
110 | param->param); | |
111 | return -EINVAL; | |
112 | } | |
113 | ||
114 | return 0; | |
115 | } | |
f63f6a59 | 116 | |
a6fc955f TH |
117 | static int vmw_fill_compat_cap(struct vmw_private *dev_priv, void *bounce, |
118 | size_t size) | |
119 | { | |
120 | struct svga_3d_compat_cap *compat_cap = | |
121 | (struct svga_3d_compat_cap *) bounce; | |
122 | unsigned int i; | |
123 | size_t pair_offset = offsetof(struct svga_3d_compat_cap, pairs); | |
124 | unsigned int max_size; | |
125 | ||
126 | if (size < pair_offset) | |
127 | return -EINVAL; | |
128 | ||
129 | max_size = (size - pair_offset) / sizeof(SVGA3dCapPair); | |
130 | ||
131 | if (max_size > SVGA3D_DEVCAP_MAX) | |
132 | max_size = SVGA3D_DEVCAP_MAX; | |
133 | ||
134 | compat_cap->header.length = | |
135 | (pair_offset + max_size * sizeof(SVGA3dCapPair)) / sizeof(u32); | |
136 | compat_cap->header.type = SVGA3DCAPS_RECORD_DEVCAPS; | |
137 | ||
138 | mutex_lock(&dev_priv->hw_mutex); | |
139 | for (i = 0; i < max_size; ++i) { | |
140 | vmw_write(dev_priv, SVGA_REG_DEV_CAP, i); | |
141 | compat_cap->pairs[i][0] = i; | |
142 | compat_cap->pairs[i][1] = vmw_read(dev_priv, SVGA_REG_DEV_CAP); | |
143 | } | |
144 | mutex_unlock(&dev_priv->hw_mutex); | |
145 | ||
146 | return 0; | |
147 | } | |
148 | ||
f63f6a59 TH |
149 | |
150 | int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data, | |
151 | struct drm_file *file_priv) | |
152 | { | |
153 | struct drm_vmw_get_3d_cap_arg *arg = | |
154 | (struct drm_vmw_get_3d_cap_arg *) data; | |
155 | struct vmw_private *dev_priv = vmw_priv(dev); | |
156 | uint32_t size; | |
157 | __le32 __iomem *fifo_mem; | |
158 | void __user *buffer = (void __user *)((unsigned long)(arg->buffer)); | |
159 | void *bounce; | |
160 | int ret; | |
716a2fd6 | 161 | bool gb_objects = !!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS); |
a6fc955f | 162 | struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv); |
f63f6a59 TH |
163 | |
164 | if (unlikely(arg->pad64 != 0)) { | |
165 | DRM_ERROR("Illegal GET_3D_CAP argument.\n"); | |
166 | return -EINVAL; | |
167 | } | |
168 | ||
a6fc955f TH |
169 | if (gb_objects && vmw_fp->gb_aware) |
170 | size = SVGA3D_DEVCAP_MAX * sizeof(uint32_t); | |
171 | else if (gb_objects) | |
172 | size = sizeof(struct svga_3d_compat_cap) + sizeof(uint32_t); | |
716a2fd6 | 173 | else |
a6fc955f TH |
174 | size = (SVGA_FIFO_3D_CAPS_LAST - SVGA_FIFO_3D_CAPS + 1) * |
175 | sizeof(uint32_t); | |
f63f6a59 TH |
176 | |
177 | if (arg->max_size < size) | |
178 | size = arg->max_size; | |
179 | ||
a6fc955f | 180 | bounce = vzalloc(size); |
f63f6a59 TH |
181 | if (unlikely(bounce == NULL)) { |
182 | DRM_ERROR("Failed to allocate bounce buffer for 3D caps.\n"); | |
183 | return -ENOMEM; | |
184 | } | |
185 | ||
a6fc955f TH |
186 | if (gb_objects && vmw_fp->gb_aware) { |
187 | int i, num; | |
716a2fd6 TH |
188 | uint32_t *bounce32 = (uint32_t *) bounce; |
189 | ||
a6fc955f TH |
190 | num = size / sizeof(uint32_t); |
191 | if (num > SVGA3D_DEVCAP_MAX) | |
192 | num = SVGA3D_DEVCAP_MAX; | |
193 | ||
716a2fd6 | 194 | mutex_lock(&dev_priv->hw_mutex); |
a6fc955f | 195 | for (i = 0; i < num; ++i) { |
716a2fd6 TH |
196 | vmw_write(dev_priv, SVGA_REG_DEV_CAP, i); |
197 | *bounce32++ = vmw_read(dev_priv, SVGA_REG_DEV_CAP); | |
198 | } | |
199 | mutex_unlock(&dev_priv->hw_mutex); | |
a6fc955f TH |
200 | } else if (gb_objects) { |
201 | ret = vmw_fill_compat_cap(dev_priv, bounce, size); | |
202 | if (unlikely(ret != 0)) | |
203 | goto out_err; | |
716a2fd6 | 204 | } else { |
716a2fd6 TH |
205 | fifo_mem = dev_priv->mmio_virt; |
206 | memcpy_fromio(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size); | |
207 | } | |
f63f6a59 TH |
208 | |
209 | ret = copy_to_user(buffer, bounce, size); | |
888155bb DC |
210 | if (ret) |
211 | ret = -EFAULT; | |
a6fc955f | 212 | out_err: |
f63f6a59 TH |
213 | vfree(bounce); |
214 | ||
215 | if (unlikely(ret != 0)) | |
216 | DRM_ERROR("Failed to report 3D caps info.\n"); | |
217 | ||
218 | return ret; | |
219 | } | |
2fcd5a73 JB |
220 | |
221 | int vmw_present_ioctl(struct drm_device *dev, void *data, | |
222 | struct drm_file *file_priv) | |
223 | { | |
224 | struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; | |
225 | struct vmw_private *dev_priv = vmw_priv(dev); | |
226 | struct drm_vmw_present_arg *arg = | |
227 | (struct drm_vmw_present_arg *)data; | |
228 | struct vmw_surface *surface; | |
229 | struct vmw_master *vmaster = vmw_master(file_priv->master); | |
230 | struct drm_vmw_rect __user *clips_ptr; | |
231 | struct drm_vmw_rect *clips = NULL; | |
786b99ed | 232 | struct drm_framebuffer *fb; |
2fcd5a73 | 233 | struct vmw_framebuffer *vfb; |
c0951b79 | 234 | struct vmw_resource *res; |
2fcd5a73 JB |
235 | uint32_t num_clips; |
236 | int ret; | |
237 | ||
238 | num_clips = arg->num_clips; | |
239 | clips_ptr = (struct drm_vmw_rect *)(unsigned long)arg->clips_ptr; | |
240 | ||
241 | if (unlikely(num_clips == 0)) | |
242 | return 0; | |
243 | ||
244 | if (clips_ptr == NULL) { | |
245 | DRM_ERROR("Variable clips_ptr must be specified.\n"); | |
246 | ret = -EINVAL; | |
247 | goto out_clips; | |
248 | } | |
249 | ||
24bb5a0c | 250 | clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL); |
2fcd5a73 JB |
251 | if (clips == NULL) { |
252 | DRM_ERROR("Failed to allocate clip rect list.\n"); | |
253 | ret = -ENOMEM; | |
254 | goto out_clips; | |
255 | } | |
256 | ||
257 | ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips)); | |
258 | if (ret) { | |
259 | DRM_ERROR("Failed to copy clip rects from userspace.\n"); | |
d2c184fb | 260 | ret = -EFAULT; |
2fcd5a73 JB |
261 | goto out_no_copy; |
262 | } | |
263 | ||
bbe4b99f | 264 | drm_modeset_lock_all(dev); |
2fcd5a73 | 265 | |
786b99ed DV |
266 | fb = drm_framebuffer_lookup(dev, arg->fb_id); |
267 | if (!fb) { | |
2fcd5a73 | 268 | DRM_ERROR("Invalid framebuffer id.\n"); |
43789b9e | 269 | ret = -ENOENT; |
2fcd5a73 JB |
270 | goto out_no_fb; |
271 | } | |
786b99ed | 272 | vfb = vmw_framebuffer_to_vfb(fb); |
2fcd5a73 JB |
273 | |
274 | ret = ttm_read_lock(&vmaster->lock, true); | |
275 | if (unlikely(ret != 0)) | |
276 | goto out_no_ttm_lock; | |
277 | ||
c0951b79 TH |
278 | ret = vmw_user_resource_lookup_handle(dev_priv, tfile, arg->sid, |
279 | user_surface_converter, | |
280 | &res); | |
2fcd5a73 JB |
281 | if (ret) |
282 | goto out_no_surface; | |
283 | ||
c0951b79 | 284 | surface = vmw_res_to_srf(res); |
2fcd5a73 JB |
285 | ret = vmw_kms_present(dev_priv, file_priv, |
286 | vfb, surface, arg->sid, | |
287 | arg->dest_x, arg->dest_y, | |
288 | clips, num_clips); | |
289 | ||
290 | /* vmw_user_surface_lookup takes one ref so does new_fb */ | |
291 | vmw_surface_unreference(&surface); | |
292 | ||
293 | out_no_surface: | |
294 | ttm_read_unlock(&vmaster->lock); | |
295 | out_no_ttm_lock: | |
2fd5eaba | 296 | drm_framebuffer_unreference(fb); |
2fcd5a73 | 297 | out_no_fb: |
bbe4b99f | 298 | drm_modeset_unlock_all(dev); |
2fcd5a73 JB |
299 | out_no_copy: |
300 | kfree(clips); | |
301 | out_clips: | |
302 | return ret; | |
303 | } | |
304 | ||
305 | int vmw_present_readback_ioctl(struct drm_device *dev, void *data, | |
306 | struct drm_file *file_priv) | |
307 | { | |
308 | struct vmw_private *dev_priv = vmw_priv(dev); | |
309 | struct drm_vmw_present_readback_arg *arg = | |
310 | (struct drm_vmw_present_readback_arg *)data; | |
311 | struct drm_vmw_fence_rep __user *user_fence_rep = | |
312 | (struct drm_vmw_fence_rep __user *) | |
313 | (unsigned long)arg->fence_rep; | |
314 | struct vmw_master *vmaster = vmw_master(file_priv->master); | |
315 | struct drm_vmw_rect __user *clips_ptr; | |
316 | struct drm_vmw_rect *clips = NULL; | |
786b99ed | 317 | struct drm_framebuffer *fb; |
2fcd5a73 JB |
318 | struct vmw_framebuffer *vfb; |
319 | uint32_t num_clips; | |
320 | int ret; | |
321 | ||
322 | num_clips = arg->num_clips; | |
323 | clips_ptr = (struct drm_vmw_rect *)(unsigned long)arg->clips_ptr; | |
324 | ||
325 | if (unlikely(num_clips == 0)) | |
326 | return 0; | |
327 | ||
328 | if (clips_ptr == NULL) { | |
329 | DRM_ERROR("Argument clips_ptr must be specified.\n"); | |
330 | ret = -EINVAL; | |
331 | goto out_clips; | |
332 | } | |
333 | ||
24bb5a0c | 334 | clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL); |
2fcd5a73 JB |
335 | if (clips == NULL) { |
336 | DRM_ERROR("Failed to allocate clip rect list.\n"); | |
337 | ret = -ENOMEM; | |
338 | goto out_clips; | |
339 | } | |
340 | ||
341 | ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips)); | |
342 | if (ret) { | |
343 | DRM_ERROR("Failed to copy clip rects from userspace.\n"); | |
d2c184fb | 344 | ret = -EFAULT; |
2fcd5a73 JB |
345 | goto out_no_copy; |
346 | } | |
347 | ||
bbe4b99f | 348 | drm_modeset_lock_all(dev); |
2fcd5a73 | 349 | |
786b99ed DV |
350 | fb = drm_framebuffer_lookup(dev, arg->fb_id); |
351 | if (!fb) { | |
2fcd5a73 | 352 | DRM_ERROR("Invalid framebuffer id.\n"); |
43789b9e | 353 | ret = -ENOENT; |
2fcd5a73 JB |
354 | goto out_no_fb; |
355 | } | |
356 | ||
786b99ed | 357 | vfb = vmw_framebuffer_to_vfb(fb); |
2fcd5a73 JB |
358 | if (!vfb->dmabuf) { |
359 | DRM_ERROR("Framebuffer not dmabuf backed.\n"); | |
360 | ret = -EINVAL; | |
2fd5eaba | 361 | goto out_no_ttm_lock; |
2fcd5a73 JB |
362 | } |
363 | ||
364 | ret = ttm_read_lock(&vmaster->lock, true); | |
365 | if (unlikely(ret != 0)) | |
366 | goto out_no_ttm_lock; | |
367 | ||
368 | ret = vmw_kms_readback(dev_priv, file_priv, | |
369 | vfb, user_fence_rep, | |
370 | clips, num_clips); | |
371 | ||
372 | ttm_read_unlock(&vmaster->lock); | |
373 | out_no_ttm_lock: | |
2fd5eaba | 374 | drm_framebuffer_unreference(fb); |
2fcd5a73 | 375 | out_no_fb: |
bbe4b99f | 376 | drm_modeset_unlock_all(dev); |
2fcd5a73 JB |
377 | out_no_copy: |
378 | kfree(clips); | |
379 | out_clips: | |
380 | return ret; | |
381 | } | |
5438ae88 TH |
382 | |
383 | ||
384 | /** | |
385 | * vmw_fops_poll - wrapper around the drm_poll function | |
386 | * | |
387 | * @filp: See the linux fops poll documentation. | |
388 | * @wait: See the linux fops poll documentation. | |
389 | * | |
390 | * Wrapper around the drm_poll function that makes sure the device is | |
391 | * processing the fifo if drm_poll decides to wait. | |
392 | */ | |
393 | unsigned int vmw_fops_poll(struct file *filp, struct poll_table_struct *wait) | |
394 | { | |
395 | struct drm_file *file_priv = filp->private_data; | |
396 | struct vmw_private *dev_priv = | |
397 | vmw_priv(file_priv->minor->dev); | |
398 | ||
399 | vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC); | |
400 | return drm_poll(filp, wait); | |
401 | } | |
402 | ||
403 | ||
404 | /** | |
405 | * vmw_fops_read - wrapper around the drm_read function | |
406 | * | |
407 | * @filp: See the linux fops read documentation. | |
408 | * @buffer: See the linux fops read documentation. | |
409 | * @count: See the linux fops read documentation. | |
410 | * offset: See the linux fops read documentation. | |
411 | * | |
412 | * Wrapper around the drm_read function that makes sure the device is | |
413 | * processing the fifo if drm_read decides to wait. | |
414 | */ | |
415 | ssize_t vmw_fops_read(struct file *filp, char __user *buffer, | |
416 | size_t count, loff_t *offset) | |
417 | { | |
418 | struct drm_file *file_priv = filp->private_data; | |
419 | struct vmw_private *dev_priv = | |
420 | vmw_priv(file_priv->minor->dev); | |
421 | ||
422 | vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC); | |
423 | return drm_read(filp, buffer, count, offset); | |
424 | } |