Commit | Line | Data |
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d8f4a9ed TR |
1 | /* |
2 | * Copyright (C) 2012 Avionic Design GmbH | |
d43f81cb | 3 | * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved. |
d8f4a9ed TR |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | ||
4231c6b0 TB |
10 | #ifndef HOST1X_DRM_H |
11 | #define HOST1X_DRM_H 1 | |
d8f4a9ed | 12 | |
e1e90644 TR |
13 | #include <uapi/drm/tegra_drm.h> |
14 | #include <linux/host1x.h> | |
15 | ||
d8f4a9ed TR |
16 | #include <drm/drmP.h> |
17 | #include <drm/drm_crtc_helper.h> | |
18 | #include <drm/drm_edid.h> | |
19 | #include <drm/drm_fb_helper.h> | |
d8f4a9ed TR |
20 | #include <drm/drm_fixed.h> |
21 | ||
de2ba664 AM |
22 | struct tegra_fb { |
23 | struct drm_framebuffer base; | |
24 | struct tegra_bo **planes; | |
25 | unsigned int num_planes; | |
26 | }; | |
27 | ||
28 | struct tegra_fbdev { | |
29 | struct drm_fb_helper base; | |
30 | struct tegra_fb *fb; | |
31 | }; | |
32 | ||
386a2a71 | 33 | struct tegra_drm { |
d8f4a9ed | 34 | struct drm_device *drm; |
d8f4a9ed TR |
35 | |
36 | struct mutex clients_lock; | |
37 | struct list_head clients; | |
38 | ||
de2ba664 | 39 | struct tegra_fbdev *fbdev; |
d8f4a9ed TR |
40 | }; |
41 | ||
53fa7f72 | 42 | struct tegra_drm_client; |
d8f4a9ed | 43 | |
c88c3630 | 44 | struct tegra_drm_context { |
53fa7f72 | 45 | struct tegra_drm_client *client; |
d43f81cb TB |
46 | struct host1x_channel *channel; |
47 | struct list_head list; | |
48 | }; | |
49 | ||
53fa7f72 TR |
50 | struct tegra_drm_client_ops { |
51 | int (*open_channel)(struct tegra_drm_client *client, | |
c88c3630 TR |
52 | struct tegra_drm_context *context); |
53 | void (*close_channel)(struct tegra_drm_context *context); | |
54 | int (*submit)(struct tegra_drm_context *context, | |
d43f81cb TB |
55 | struct drm_tegra_submit *args, struct drm_device *drm, |
56 | struct drm_file *file); | |
57 | }; | |
58 | ||
53fa7f72 TR |
59 | struct tegra_drm_client { |
60 | struct host1x_client base; | |
776dc384 | 61 | struct list_head list; |
d43f81cb | 62 | |
53fa7f72 | 63 | const struct tegra_drm_client_ops *ops; |
d8f4a9ed TR |
64 | }; |
65 | ||
53fa7f72 | 66 | static inline struct tegra_drm_client * |
776dc384 | 67 | host1x_to_drm_client(struct host1x_client *client) |
53fa7f72 TR |
68 | { |
69 | return container_of(client, struct tegra_drm_client, base); | |
70 | } | |
71 | ||
776dc384 TR |
72 | extern int tegra_drm_register_client(struct tegra_drm *tegra, |
73 | struct tegra_drm_client *client); | |
74 | extern int tegra_drm_unregister_client(struct tegra_drm *tegra, | |
75 | struct tegra_drm_client *client); | |
76 | ||
386a2a71 TR |
77 | extern int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm); |
78 | extern int tegra_drm_exit(struct tegra_drm *tegra); | |
d8f4a9ed | 79 | |
d8f4a9ed TR |
80 | struct tegra_output; |
81 | ||
82 | struct tegra_dc { | |
776dc384 | 83 | struct host1x_client client; |
d8f4a9ed | 84 | struct device *dev; |
d18d3033 | 85 | spinlock_t lock; |
d8f4a9ed TR |
86 | |
87 | struct drm_crtc base; | |
88 | int pipe; | |
89 | ||
90 | struct clk *clk; | |
d8f4a9ed TR |
91 | void __iomem *regs; |
92 | int irq; | |
93 | ||
94 | struct tegra_output *rgb; | |
95 | ||
96 | struct list_head list; | |
97 | ||
98 | struct drm_info_list *debugfs_files; | |
99 | struct drm_minor *minor; | |
100 | struct dentry *debugfs; | |
3c03c46a TR |
101 | |
102 | /* page-flip handling */ | |
103 | struct drm_pending_vblank_event *event; | |
d8f4a9ed TR |
104 | }; |
105 | ||
53fa7f72 | 106 | static inline struct tegra_dc * |
776dc384 | 107 | host1x_client_to_dc(struct host1x_client *client) |
d8f4a9ed TR |
108 | { |
109 | return container_of(client, struct tegra_dc, client); | |
110 | } | |
111 | ||
112 | static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc) | |
113 | { | |
114 | return container_of(crtc, struct tegra_dc, base); | |
115 | } | |
116 | ||
117 | static inline void tegra_dc_writel(struct tegra_dc *dc, unsigned long value, | |
118 | unsigned long reg) | |
119 | { | |
120 | writel(value, dc->regs + (reg << 2)); | |
121 | } | |
122 | ||
123 | static inline unsigned long tegra_dc_readl(struct tegra_dc *dc, | |
124 | unsigned long reg) | |
125 | { | |
126 | return readl(dc->regs + (reg << 2)); | |
127 | } | |
128 | ||
f34bc787 TR |
129 | struct tegra_dc_window { |
130 | struct { | |
131 | unsigned int x; | |
132 | unsigned int y; | |
133 | unsigned int w; | |
134 | unsigned int h; | |
135 | } src; | |
136 | struct { | |
137 | unsigned int x; | |
138 | unsigned int y; | |
139 | unsigned int w; | |
140 | unsigned int h; | |
141 | } dst; | |
142 | unsigned int bits_per_pixel; | |
143 | unsigned int format; | |
144 | unsigned int stride[2]; | |
145 | unsigned long base[3]; | |
146 | }; | |
147 | ||
148 | /* from dc.c */ | |
149 | extern unsigned int tegra_dc_format(uint32_t format); | |
150 | extern int tegra_dc_setup_window(struct tegra_dc *dc, unsigned int index, | |
151 | const struct tegra_dc_window *window); | |
6e5ff998 TR |
152 | extern void tegra_dc_enable_vblank(struct tegra_dc *dc); |
153 | extern void tegra_dc_disable_vblank(struct tegra_dc *dc); | |
3c03c46a TR |
154 | extern void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, |
155 | struct drm_file *file); | |
f34bc787 | 156 | |
d8f4a9ed TR |
157 | struct tegra_output_ops { |
158 | int (*enable)(struct tegra_output *output); | |
159 | int (*disable)(struct tegra_output *output); | |
160 | int (*setup_clock)(struct tegra_output *output, struct clk *clk, | |
161 | unsigned long pclk); | |
162 | int (*check_mode)(struct tegra_output *output, | |
163 | struct drm_display_mode *mode, | |
164 | enum drm_mode_status *status); | |
165 | }; | |
166 | ||
167 | enum tegra_output_type { | |
168 | TEGRA_OUTPUT_RGB, | |
edec4af4 | 169 | TEGRA_OUTPUT_HDMI, |
d8f4a9ed TR |
170 | }; |
171 | ||
172 | struct tegra_output { | |
173 | struct device_node *of_node; | |
174 | struct device *dev; | |
175 | ||
176 | const struct tegra_output_ops *ops; | |
177 | enum tegra_output_type type; | |
178 | ||
179 | struct i2c_adapter *ddc; | |
180 | const struct edid *edid; | |
181 | unsigned int hpd_irq; | |
182 | int hpd_gpio; | |
183 | ||
184 | struct drm_encoder encoder; | |
185 | struct drm_connector connector; | |
186 | }; | |
187 | ||
188 | static inline struct tegra_output *encoder_to_output(struct drm_encoder *e) | |
189 | { | |
190 | return container_of(e, struct tegra_output, encoder); | |
191 | } | |
192 | ||
193 | static inline struct tegra_output *connector_to_output(struct drm_connector *c) | |
194 | { | |
195 | return container_of(c, struct tegra_output, connector); | |
196 | } | |
197 | ||
198 | static inline int tegra_output_enable(struct tegra_output *output) | |
199 | { | |
200 | if (output && output->ops && output->ops->enable) | |
201 | return output->ops->enable(output); | |
202 | ||
203 | return output ? -ENOSYS : -EINVAL; | |
204 | } | |
205 | ||
206 | static inline int tegra_output_disable(struct tegra_output *output) | |
207 | { | |
208 | if (output && output->ops && output->ops->disable) | |
209 | return output->ops->disable(output); | |
210 | ||
211 | return output ? -ENOSYS : -EINVAL; | |
212 | } | |
213 | ||
214 | static inline int tegra_output_setup_clock(struct tegra_output *output, | |
215 | struct clk *clk, unsigned long pclk) | |
216 | { | |
217 | if (output && output->ops && output->ops->setup_clock) | |
218 | return output->ops->setup_clock(output, clk, pclk); | |
219 | ||
220 | return output ? -ENOSYS : -EINVAL; | |
221 | } | |
222 | ||
223 | static inline int tegra_output_check_mode(struct tegra_output *output, | |
224 | struct drm_display_mode *mode, | |
225 | enum drm_mode_status *status) | |
226 | { | |
227 | if (output && output->ops && output->ops->check_mode) | |
228 | return output->ops->check_mode(output, mode, status); | |
229 | ||
230 | return output ? -ENOSYS : -EINVAL; | |
231 | } | |
232 | ||
776dc384 TR |
233 | /* from bus.c */ |
234 | int drm_host1x_init(struct drm_driver *driver, struct host1x_device *device); | |
235 | void drm_host1x_exit(struct drm_driver *driver, struct host1x_device *device); | |
236 | ||
d8f4a9ed TR |
237 | /* from rgb.c */ |
238 | extern int tegra_dc_rgb_probe(struct tegra_dc *dc); | |
239 | extern int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc); | |
240 | extern int tegra_dc_rgb_exit(struct tegra_dc *dc); | |
241 | ||
242 | /* from output.c */ | |
243 | extern int tegra_output_parse_dt(struct tegra_output *output); | |
244 | extern int tegra_output_init(struct drm_device *drm, struct tegra_output *output); | |
245 | extern int tegra_output_exit(struct tegra_output *output); | |
246 | ||
d8f4a9ed | 247 | /* from fb.c */ |
de2ba664 AM |
248 | struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer, |
249 | unsigned int index); | |
d8f4a9ed TR |
250 | extern int tegra_drm_fb_init(struct drm_device *drm); |
251 | extern void tegra_drm_fb_exit(struct drm_device *drm); | |
de2ba664 | 252 | extern void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev); |
d8f4a9ed | 253 | |
776dc384 TR |
254 | extern struct platform_driver tegra_dc_driver; |
255 | extern struct platform_driver tegra_hdmi_driver; | |
256 | extern struct platform_driver tegra_gr2d_driver; | |
d8f4a9ed | 257 | |
4231c6b0 | 258 | #endif /* HOST1X_DRM_H */ |