Commit | Line | Data |
---|---|---|
bebe4678 RM |
1 | /* |
2 | * coretemp.c - Linux kernel module for hardware monitoring | |
3 | * | |
4 | * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> | |
5 | * | |
6 | * Inspired from many hwmon drivers | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
20 | * 02110-1301 USA. | |
21 | */ | |
22 | ||
f8bb8925 JP |
23 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
24 | ||
bebe4678 | 25 | #include <linux/module.h> |
bebe4678 RM |
26 | #include <linux/init.h> |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/hwmon.h> | |
30 | #include <linux/sysfs.h> | |
31 | #include <linux/hwmon-sysfs.h> | |
32 | #include <linux/err.h> | |
33 | #include <linux/mutex.h> | |
34 | #include <linux/list.h> | |
35 | #include <linux/platform_device.h> | |
36 | #include <linux/cpu.h> | |
1fe63ab4 | 37 | #include <linux/pci.h> |
bebe4678 RM |
38 | #include <asm/msr.h> |
39 | #include <asm/processor.h> | |
fff20173 | 40 | #include <asm/smp.h> |
bebe4678 RM |
41 | |
42 | #define DRVNAME "coretemp" | |
43 | ||
199e0de7 D |
44 | #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ |
45 | #define NUM_REAL_CORES 16 /* Number of Real cores per cpu */ | |
46 | #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */ | |
47 | #define MAX_ATTRS 5 /* Maximum no of per-core attrs */ | |
48 | #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) | |
49 | ||
50 | #ifdef CONFIG_SMP | |
51 | #define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id | |
52 | #define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id | |
53 | #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO) | |
54 | #else | |
55 | #define TO_PHYS_ID(cpu) (cpu) | |
56 | #define TO_CORE_ID(cpu) (cpu) | |
57 | #define TO_ATTR_NO(cpu) (cpu) | |
58 | #endif | |
bebe4678 RM |
59 | |
60 | /* | |
199e0de7 D |
61 | * Per-Core Temperature Data |
62 | * @last_updated: The time when the current temperature value was updated | |
63 | * earlier (in jiffies). | |
64 | * @cpu_core_id: The CPU Core from which temperature values should be read | |
65 | * This value is passed as "id" field to rdmsr/wrmsr functions. | |
66 | * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS, | |
67 | * from where the temperature values should be read. | |
68 | * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data. | |
69 | * Otherwise, temp_data holds coretemp data. | |
70 | * @valid: If this is 1, the current temperature is valid. | |
bebe4678 | 71 | */ |
199e0de7 | 72 | struct temp_data { |
bebe4678 | 73 | int temp; |
6369a288 | 74 | int ttarget; |
199e0de7 D |
75 | int tjmax; |
76 | unsigned long last_updated; | |
77 | unsigned int cpu; | |
78 | u32 cpu_core_id; | |
79 | u32 status_reg; | |
80 | bool is_pkg_data; | |
81 | bool valid; | |
82 | struct sensor_device_attribute sd_attrs[MAX_ATTRS]; | |
83 | char attr_name[MAX_ATTRS][CORETEMP_NAME_LENGTH]; | |
84 | struct mutex update_lock; | |
bebe4678 RM |
85 | }; |
86 | ||
199e0de7 D |
87 | /* Platform Data per Physical CPU */ |
88 | struct platform_data { | |
89 | struct device *hwmon_dev; | |
90 | u16 phys_proc_id; | |
91 | struct temp_data *core_data[MAX_CORE_DATA]; | |
92 | struct device_attribute name_attr; | |
93 | }; | |
bebe4678 | 94 | |
199e0de7 D |
95 | struct pdev_entry { |
96 | struct list_head list; | |
97 | struct platform_device *pdev; | |
98 | unsigned int cpu; | |
99 | u16 phys_proc_id; | |
100 | u16 cpu_core_id; | |
101 | }; | |
102 | ||
103 | static LIST_HEAD(pdev_list); | |
104 | static DEFINE_MUTEX(pdev_list_mutex); | |
105 | ||
106 | static ssize_t show_name(struct device *dev, | |
107 | struct device_attribute *devattr, char *buf) | |
108 | { | |
109 | return sprintf(buf, "%s\n", DRVNAME); | |
110 | } | |
111 | ||
112 | static ssize_t show_label(struct device *dev, | |
113 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 114 | { |
bebe4678 | 115 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
199e0de7 D |
116 | struct platform_data *pdata = dev_get_drvdata(dev); |
117 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
118 | ||
119 | if (tdata->is_pkg_data) | |
120 | return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id); | |
bebe4678 | 121 | |
199e0de7 | 122 | return sprintf(buf, "Core %u\n", tdata->cpu_core_id); |
bebe4678 RM |
123 | } |
124 | ||
199e0de7 D |
125 | static ssize_t show_crit_alarm(struct device *dev, |
126 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 127 | { |
199e0de7 D |
128 | u32 eax, edx; |
129 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
130 | struct platform_data *pdata = dev_get_drvdata(dev); | |
131 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
132 | ||
133 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
134 | ||
135 | return sprintf(buf, "%d\n", (eax >> 5) & 1); | |
bebe4678 RM |
136 | } |
137 | ||
199e0de7 D |
138 | static ssize_t show_tjmax(struct device *dev, |
139 | struct device_attribute *devattr, char *buf) | |
bebe4678 RM |
140 | { |
141 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
199e0de7 | 142 | struct platform_data *pdata = dev_get_drvdata(dev); |
bebe4678 | 143 | |
199e0de7 | 144 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax); |
bebe4678 RM |
145 | } |
146 | ||
199e0de7 D |
147 | static ssize_t show_ttarget(struct device *dev, |
148 | struct device_attribute *devattr, char *buf) | |
149 | { | |
150 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
151 | struct platform_data *pdata = dev_get_drvdata(dev); | |
bebe4678 | 152 | |
199e0de7 D |
153 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget); |
154 | } | |
bebe4678 | 155 | |
199e0de7 D |
156 | static ssize_t show_temp(struct device *dev, |
157 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 158 | { |
199e0de7 D |
159 | u32 eax, edx; |
160 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
161 | struct platform_data *pdata = dev_get_drvdata(dev); | |
162 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
bebe4678 | 163 | |
199e0de7 | 164 | mutex_lock(&tdata->update_lock); |
bebe4678 | 165 | |
199e0de7 D |
166 | /* Check whether the time interval has elapsed */ |
167 | if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) { | |
168 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
169 | tdata->valid = 0; | |
170 | /* Check whether the data is valid */ | |
bebe4678 | 171 | if (eax & 0x80000000) { |
199e0de7 D |
172 | tdata->temp = tdata->tjmax - |
173 | (((eax >> 16) & 0x7f) * 1000); | |
174 | tdata->valid = 1; | |
bebe4678 | 175 | } |
199e0de7 | 176 | tdata->last_updated = jiffies; |
bebe4678 RM |
177 | } |
178 | ||
199e0de7 D |
179 | mutex_unlock(&tdata->update_lock); |
180 | return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN; | |
bebe4678 RM |
181 | } |
182 | ||
199e0de7 | 183 | static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
118a8871 RM |
184 | { |
185 | /* The 100C is default for both mobile and non mobile CPUs */ | |
186 | ||
187 | int tjmax = 100000; | |
eccfed42 | 188 | int tjmax_ee = 85000; |
708a62bc | 189 | int usemsr_ee = 1; |
118a8871 RM |
190 | int err; |
191 | u32 eax, edx; | |
1fe63ab4 | 192 | struct pci_dev *host_bridge; |
118a8871 RM |
193 | |
194 | /* Early chips have no MSR for TjMax */ | |
195 | ||
196 | if ((c->x86_model == 0xf) && (c->x86_mask < 4)) { | |
708a62bc | 197 | usemsr_ee = 0; |
118a8871 RM |
198 | } |
199 | ||
1fe63ab4 | 200 | /* Atom CPUs */ |
708a62bc RM |
201 | |
202 | if (c->x86_model == 0x1c) { | |
203 | usemsr_ee = 0; | |
1fe63ab4 YW |
204 | |
205 | host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); | |
206 | ||
207 | if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL | |
208 | && (host_bridge->device == 0xa000 /* NM10 based nettop */ | |
209 | || host_bridge->device == 0xa010)) /* NM10 based netbook */ | |
210 | tjmax = 100000; | |
211 | else | |
212 | tjmax = 90000; | |
213 | ||
214 | pci_dev_put(host_bridge); | |
708a62bc RM |
215 | } |
216 | ||
217 | if ((c->x86_model > 0xe) && (usemsr_ee)) { | |
eccfed42 | 218 | u8 platform_id; |
118a8871 RM |
219 | |
220 | /* Now we can detect the mobile CPU using Intel provided table | |
221 | http://softwarecommunity.intel.com/Wiki/Mobility/720.htm | |
222 | For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU | |
223 | */ | |
224 | ||
225 | err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); | |
226 | if (err) { | |
227 | dev_warn(dev, | |
228 | "Unable to access MSR 0x17, assuming desktop" | |
229 | " CPU\n"); | |
708a62bc | 230 | usemsr_ee = 0; |
eccfed42 RM |
231 | } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { |
232 | /* Trust bit 28 up to Penryn, I could not find any | |
233 | documentation on that; if you happen to know | |
234 | someone at Intel please ask */ | |
708a62bc | 235 | usemsr_ee = 0; |
eccfed42 RM |
236 | } else { |
237 | /* Platform ID bits 52:50 (EDX starts at bit 32) */ | |
238 | platform_id = (edx >> 18) & 0x7; | |
239 | ||
240 | /* Mobile Penryn CPU seems to be platform ID 7 or 5 | |
241 | (guesswork) */ | |
242 | if ((c->x86_model == 0x17) && | |
243 | ((platform_id == 5) || (platform_id == 7))) { | |
244 | /* If MSR EE bit is set, set it to 90 degrees C, | |
245 | otherwise 105 degrees C */ | |
246 | tjmax_ee = 90000; | |
247 | tjmax = 105000; | |
248 | } | |
118a8871 RM |
249 | } |
250 | } | |
251 | ||
708a62bc | 252 | if (usemsr_ee) { |
118a8871 RM |
253 | |
254 | err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); | |
255 | if (err) { | |
256 | dev_warn(dev, | |
257 | "Unable to access MSR 0xEE, for Tjmax, left" | |
4d7a5644 | 258 | " at default\n"); |
118a8871 | 259 | } else if (eax & 0x40000000) { |
eccfed42 | 260 | tjmax = tjmax_ee; |
118a8871 | 261 | } |
708a62bc RM |
262 | /* if we dont use msr EE it means we are desktop CPU (with exeception |
263 | of Atom) */ | |
264 | } else if (tjmax == 100000) { | |
118a8871 RM |
265 | dev_warn(dev, "Using relative temperature scale!\n"); |
266 | } | |
267 | ||
268 | return tjmax; | |
269 | } | |
270 | ||
199e0de7 | 271 | static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
a321cedb CE |
272 | { |
273 | /* The 100C is default for both mobile and non mobile CPUs */ | |
274 | int err; | |
275 | u32 eax, edx; | |
276 | u32 val; | |
277 | ||
278 | /* A new feature of current Intel(R) processors, the | |
279 | IA32_TEMPERATURE_TARGET contains the TjMax value */ | |
280 | err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); | |
281 | if (err) { | |
282 | dev_warn(dev, "Unable to read TjMax from CPU.\n"); | |
283 | } else { | |
284 | val = (eax >> 16) & 0xff; | |
285 | /* | |
286 | * If the TjMax is not plausible, an assumption | |
287 | * will be used | |
288 | */ | |
289 | if ((val > 80) && (val < 120)) { | |
290 | dev_info(dev, "TjMax is %d C.\n", val); | |
291 | return val * 1000; | |
292 | } | |
293 | } | |
294 | ||
295 | /* | |
296 | * An assumption is made for early CPUs and unreadable MSR. | |
297 | * NOTE: the given value may not be correct. | |
298 | */ | |
299 | ||
300 | switch (c->x86_model) { | |
301 | case 0xe: | |
302 | case 0xf: | |
303 | case 0x16: | |
304 | case 0x1a: | |
305 | dev_warn(dev, "TjMax is assumed as 100 C!\n"); | |
306 | return 100000; | |
a321cedb CE |
307 | case 0x17: |
308 | case 0x1c: /* Atom CPUs */ | |
309 | return adjust_tjmax(c, id, dev); | |
a321cedb CE |
310 | default: |
311 | dev_warn(dev, "CPU (model=0x%x) is not supported yet," | |
312 | " using default TjMax of 100C.\n", c->x86_model); | |
313 | return 100000; | |
314 | } | |
315 | } | |
316 | ||
32478006 JB |
317 | static void __devinit get_ucode_rev_on_cpu(void *edx) |
318 | { | |
319 | u32 eax; | |
320 | ||
321 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); | |
322 | sync_core(); | |
323 | rdmsr(MSR_IA32_UCODE_REV, eax, *(u32 *)edx); | |
324 | } | |
325 | ||
199e0de7 | 326 | static int get_pkg_tjmax(unsigned int cpu, struct device *dev) |
bebe4678 | 327 | { |
bebe4678 | 328 | int err; |
199e0de7 | 329 | u32 eax, edx, val; |
bebe4678 | 330 | |
199e0de7 D |
331 | err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); |
332 | if (!err) { | |
333 | val = (eax >> 16) & 0xff; | |
334 | if ((val > 80) && (val < 120)) | |
335 | return val * 1000; | |
bebe4678 | 336 | } |
199e0de7 D |
337 | dev_warn(dev, "Unable to read Pkg-TjMax from CPU:%u\n", cpu); |
338 | return 100000; /* Default TjMax: 100 degree celsius */ | |
339 | } | |
bebe4678 | 340 | |
199e0de7 D |
341 | static int create_name_attr(struct platform_data *pdata, struct device *dev) |
342 | { | |
343 | pdata->name_attr.attr.name = "name"; | |
344 | pdata->name_attr.attr.mode = S_IRUGO; | |
345 | pdata->name_attr.show = show_name; | |
346 | return device_create_file(dev, &pdata->name_attr); | |
347 | } | |
bebe4678 | 348 | |
199e0de7 D |
349 | static int create_core_attrs(struct temp_data *tdata, struct device *dev, |
350 | int attr_no) | |
351 | { | |
352 | int err, i; | |
353 | static ssize_t (*rd_ptr[MAX_ATTRS]) (struct device *dev, | |
354 | struct device_attribute *devattr, char *buf) = { | |
355 | show_label, show_crit_alarm, show_ttarget, | |
356 | show_temp, show_tjmax }; | |
357 | static const char *names[MAX_ATTRS] = { | |
358 | "temp%d_label", "temp%d_crit_alarm", | |
359 | "temp%d_max", "temp%d_input", | |
360 | "temp%d_crit" }; | |
361 | ||
362 | for (i = 0; i < MAX_ATTRS; i++) { | |
363 | snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i], | |
364 | attr_no); | |
365 | tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i]; | |
366 | tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO; | |
367 | tdata->sd_attrs[i].dev_attr.show = rd_ptr[i]; | |
368 | tdata->sd_attrs[i].dev_attr.store = NULL; | |
369 | tdata->sd_attrs[i].index = attr_no; | |
370 | err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr); | |
371 | if (err) | |
372 | goto exit_free; | |
bebe4678 | 373 | } |
199e0de7 D |
374 | return 0; |
375 | ||
376 | exit_free: | |
377 | while (--i >= 0) | |
378 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); | |
379 | return err; | |
380 | } | |
381 | ||
382 | static void update_ttarget(__u8 cpu_model, struct temp_data *tdata, | |
383 | struct device *dev) | |
384 | { | |
385 | int err; | |
386 | u32 eax, edx; | |
387 | ||
388 | /* | |
389 | * Initialize ttarget value. Eventually this will be | |
390 | * initialized with the value from MSR_IA32_THERM_INTERRUPT | |
391 | * register. If IA32_TEMPERATURE_TARGET is supported, this | |
392 | * value will be over written below. | |
393 | * To Do: Patch to initialize ttarget from MSR_IA32_THERM_INTERRUPT | |
394 | */ | |
395 | tdata->ttarget = tdata->tjmax - 20000; | |
bebe4678 | 396 | |
199e0de7 D |
397 | /* |
398 | * Read the still undocumented IA32_TEMPERATURE_TARGET. It exists | |
399 | * on older CPUs but not in this register, | |
400 | * Atoms don't have it either. | |
401 | */ | |
402 | if ((cpu_model > 0xe) && (cpu_model != 0x1c)) { | |
403 | err = rdmsr_safe_on_cpu(tdata->cpu, | |
404 | MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); | |
405 | if (err) { | |
406 | dev_warn(dev, | |
407 | "Unable to read IA32_TEMPERATURE_TARGET MSR\n"); | |
408 | } else { | |
409 | tdata->ttarget = tdata->tjmax - | |
410 | (((eax >> 8) & 0xff) * 1000); | |
411 | } | |
412 | } | |
413 | } | |
414 | ||
415 | static int chk_ucode_version(struct platform_device *pdev) | |
416 | { | |
417 | struct cpuinfo_x86 *c = &cpu_data(pdev->id); | |
418 | int err; | |
419 | u32 edx; | |
67f363b1 | 420 | |
199e0de7 D |
421 | /* |
422 | * Check if we have problem with errata AE18 of Core processors: | |
423 | * Readings might stop update when processor visited too deep sleep, | |
424 | * fixed for stepping D0 (6EC). | |
425 | */ | |
67f363b1 RM |
426 | if ((c->x86_model == 0xe) && (c->x86_mask < 0xc)) { |
427 | /* check for microcode update */ | |
199e0de7 | 428 | err = smp_call_function_single(pdev->id, get_ucode_rev_on_cpu, |
32478006 JB |
429 | &edx, 1); |
430 | if (err) { | |
431 | dev_err(&pdev->dev, | |
432 | "Cannot determine microcode revision of " | |
199e0de7 D |
433 | "CPU#%u (%d)!\n", pdev->id, err); |
434 | return -ENODEV; | |
32478006 | 435 | } else if (edx < 0x39) { |
67f363b1 RM |
436 | dev_err(&pdev->dev, |
437 | "Errata AE18 not fixed, update BIOS or " | |
438 | "microcode of the CPU!\n"); | |
199e0de7 | 439 | return -ENODEV; |
67f363b1 RM |
440 | } |
441 | } | |
199e0de7 D |
442 | return 0; |
443 | } | |
444 | ||
445 | static struct platform_device *coretemp_get_pdev(unsigned int cpu) | |
446 | { | |
447 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
448 | struct pdev_entry *p; | |
449 | ||
450 | mutex_lock(&pdev_list_mutex); | |
451 | ||
452 | list_for_each_entry(p, &pdev_list, list) | |
453 | if (p->phys_proc_id == phys_proc_id) { | |
454 | mutex_unlock(&pdev_list_mutex); | |
455 | return p->pdev; | |
456 | } | |
457 | ||
458 | mutex_unlock(&pdev_list_mutex); | |
459 | return NULL; | |
460 | } | |
461 | ||
462 | static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag) | |
463 | { | |
464 | struct temp_data *tdata; | |
465 | ||
466 | tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL); | |
467 | if (!tdata) | |
468 | return NULL; | |
469 | ||
470 | tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS : | |
471 | MSR_IA32_THERM_STATUS; | |
472 | tdata->is_pkg_data = pkg_flag; | |
473 | tdata->cpu = cpu; | |
474 | tdata->cpu_core_id = TO_CORE_ID(cpu); | |
475 | mutex_init(&tdata->update_lock); | |
476 | return tdata; | |
477 | } | |
67f363b1 | 478 | |
199e0de7 D |
479 | static int create_core_data(struct platform_data *pdata, |
480 | struct platform_device *pdev, | |
481 | unsigned int cpu, int pkg_flag) | |
482 | { | |
483 | struct temp_data *tdata; | |
484 | struct cpuinfo_x86 *c = &cpu_data(cpu); | |
485 | u32 eax, edx; | |
486 | int err, attr_no; | |
bebe4678 | 487 | |
a321cedb | 488 | /* |
199e0de7 D |
489 | * Find attr number for sysfs: |
490 | * We map the attr number to core id of the CPU | |
491 | * The attr number is always core id + 2 | |
492 | * The Pkgtemp will always show up as temp1_*, if available | |
a321cedb | 493 | */ |
199e0de7 | 494 | attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu); |
6369a288 | 495 | |
199e0de7 D |
496 | if (attr_no > MAX_CORE_DATA - 1) |
497 | return -ERANGE; | |
498 | ||
499 | /* Skip if it is a HT core, Not an error */ | |
500 | if (pdata->core_data[attr_no] != NULL) | |
501 | return 0; | |
6369a288 | 502 | |
199e0de7 D |
503 | tdata = init_temp_data(cpu, pkg_flag); |
504 | if (!tdata) | |
505 | return -ENOMEM; | |
bebe4678 | 506 | |
199e0de7 D |
507 | /* Test if we can access the status register */ |
508 | err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); | |
509 | if (err) | |
510 | goto exit_free; | |
511 | ||
512 | /* We can access status register. Get Critical Temperature */ | |
513 | if (pkg_flag) | |
514 | tdata->tjmax = get_pkg_tjmax(pdev->id, &pdev->dev); | |
515 | else | |
516 | tdata->tjmax = get_tjmax(c, cpu, &pdev->dev); | |
517 | ||
518 | update_ttarget(c->x86_model, tdata, &pdev->dev); | |
519 | pdata->core_data[attr_no] = tdata; | |
520 | ||
521 | /* Create sysfs interfaces */ | |
522 | err = create_core_attrs(tdata, &pdev->dev, attr_no); | |
523 | if (err) | |
524 | goto exit_free; | |
bebe4678 RM |
525 | |
526 | return 0; | |
199e0de7 D |
527 | exit_free: |
528 | kfree(tdata); | |
529 | return err; | |
530 | } | |
531 | ||
532 | static void coretemp_add_core(unsigned int cpu, int pkg_flag) | |
533 | { | |
534 | struct platform_data *pdata; | |
535 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
536 | int err; | |
537 | ||
538 | if (!pdev) | |
539 | return; | |
540 | ||
541 | pdata = platform_get_drvdata(pdev); | |
542 | ||
543 | err = create_core_data(pdata, pdev, cpu, pkg_flag); | |
544 | if (err) | |
545 | dev_err(&pdev->dev, "Adding Core %u failed\n", cpu); | |
546 | } | |
547 | ||
548 | static void coretemp_remove_core(struct platform_data *pdata, | |
549 | struct device *dev, int indx) | |
550 | { | |
551 | int i; | |
552 | struct temp_data *tdata = pdata->core_data[indx]; | |
553 | ||
554 | /* Remove the sysfs attributes */ | |
555 | for (i = 0; i < MAX_ATTRS; i++) | |
556 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); | |
557 | ||
558 | kfree(pdata->core_data[indx]); | |
559 | pdata->core_data[indx] = NULL; | |
560 | } | |
561 | ||
562 | static int __devinit coretemp_probe(struct platform_device *pdev) | |
563 | { | |
564 | struct platform_data *pdata; | |
565 | int err; | |
bebe4678 | 566 | |
199e0de7 D |
567 | /* Check the microcode version of the CPU */ |
568 | err = chk_ucode_version(pdev); | |
569 | if (err) | |
570 | return err; | |
571 | ||
572 | /* Initialize the per-package data structures */ | |
573 | pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL); | |
574 | if (!pdata) | |
575 | return -ENOMEM; | |
576 | ||
577 | err = create_name_attr(pdata, &pdev->dev); | |
578 | if (err) | |
579 | goto exit_free; | |
580 | ||
581 | pdata->phys_proc_id = TO_PHYS_ID(pdev->id); | |
582 | platform_set_drvdata(pdev, pdata); | |
583 | ||
584 | pdata->hwmon_dev = hwmon_device_register(&pdev->dev); | |
585 | if (IS_ERR(pdata->hwmon_dev)) { | |
586 | err = PTR_ERR(pdata->hwmon_dev); | |
587 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); | |
588 | goto exit_name; | |
589 | } | |
590 | return 0; | |
591 | ||
592 | exit_name: | |
593 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
594 | platform_set_drvdata(pdev, NULL); | |
bebe4678 | 595 | exit_free: |
199e0de7 | 596 | kfree(pdata); |
bebe4678 RM |
597 | return err; |
598 | } | |
599 | ||
600 | static int __devexit coretemp_remove(struct platform_device *pdev) | |
601 | { | |
199e0de7 D |
602 | struct platform_data *pdata = platform_get_drvdata(pdev); |
603 | int i; | |
bebe4678 | 604 | |
199e0de7 D |
605 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) |
606 | if (pdata->core_data[i]) | |
607 | coretemp_remove_core(pdata, &pdev->dev, i); | |
608 | ||
609 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
610 | hwmon_device_unregister(pdata->hwmon_dev); | |
bebe4678 | 611 | platform_set_drvdata(pdev, NULL); |
199e0de7 | 612 | kfree(pdata); |
bebe4678 RM |
613 | return 0; |
614 | } | |
615 | ||
616 | static struct platform_driver coretemp_driver = { | |
617 | .driver = { | |
618 | .owner = THIS_MODULE, | |
619 | .name = DRVNAME, | |
620 | }, | |
621 | .probe = coretemp_probe, | |
622 | .remove = __devexit_p(coretemp_remove), | |
623 | }; | |
624 | ||
bebe4678 RM |
625 | static int __cpuinit coretemp_device_add(unsigned int cpu) |
626 | { | |
627 | int err; | |
628 | struct platform_device *pdev; | |
629 | struct pdev_entry *pdev_entry; | |
d883b9f0 JD |
630 | |
631 | mutex_lock(&pdev_list_mutex); | |
632 | ||
bebe4678 RM |
633 | pdev = platform_device_alloc(DRVNAME, cpu); |
634 | if (!pdev) { | |
635 | err = -ENOMEM; | |
f8bb8925 | 636 | pr_err("Device allocation failed\n"); |
bebe4678 RM |
637 | goto exit; |
638 | } | |
639 | ||
640 | pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); | |
641 | if (!pdev_entry) { | |
642 | err = -ENOMEM; | |
643 | goto exit_device_put; | |
644 | } | |
645 | ||
646 | err = platform_device_add(pdev); | |
647 | if (err) { | |
f8bb8925 | 648 | pr_err("Device addition failed (%d)\n", err); |
bebe4678 RM |
649 | goto exit_device_free; |
650 | } | |
651 | ||
652 | pdev_entry->pdev = pdev; | |
653 | pdev_entry->cpu = cpu; | |
199e0de7 D |
654 | pdev_entry->phys_proc_id = TO_PHYS_ID(cpu); |
655 | pdev_entry->cpu_core_id = TO_CORE_ID(cpu); | |
656 | ||
bebe4678 RM |
657 | list_add_tail(&pdev_entry->list, &pdev_list); |
658 | mutex_unlock(&pdev_list_mutex); | |
659 | ||
660 | return 0; | |
661 | ||
662 | exit_device_free: | |
663 | kfree(pdev_entry); | |
664 | exit_device_put: | |
665 | platform_device_put(pdev); | |
666 | exit: | |
d883b9f0 | 667 | mutex_unlock(&pdev_list_mutex); |
bebe4678 RM |
668 | return err; |
669 | } | |
670 | ||
199e0de7 | 671 | static void coretemp_device_remove(unsigned int cpu) |
bebe4678 | 672 | { |
199e0de7 D |
673 | struct pdev_entry *p, *n; |
674 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
e40cc4bd | 675 | |
bebe4678 | 676 | mutex_lock(&pdev_list_mutex); |
199e0de7 D |
677 | list_for_each_entry_safe(p, n, &pdev_list, list) { |
678 | if (p->phys_proc_id != phys_proc_id) | |
e40cc4bd | 679 | continue; |
e40cc4bd JB |
680 | platform_device_unregister(p->pdev); |
681 | list_del(&p->list); | |
e40cc4bd | 682 | kfree(p); |
bebe4678 RM |
683 | } |
684 | mutex_unlock(&pdev_list_mutex); | |
685 | } | |
686 | ||
199e0de7 D |
687 | static bool is_any_core_online(struct platform_data *pdata) |
688 | { | |
689 | int i; | |
690 | ||
691 | /* Find online cores, except pkgtemp data */ | |
692 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) { | |
693 | if (pdata->core_data[i] && | |
694 | !pdata->core_data[i]->is_pkg_data) { | |
695 | return true; | |
696 | } | |
697 | } | |
698 | return false; | |
699 | } | |
700 | ||
701 | static void __cpuinit get_core_online(unsigned int cpu) | |
702 | { | |
703 | struct cpuinfo_x86 *c = &cpu_data(cpu); | |
704 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
705 | int err; | |
706 | ||
707 | /* | |
708 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal | |
709 | * sensors. We check this bit only, all the early CPUs | |
710 | * without thermal sensors will be filtered out. | |
711 | */ | |
712 | if (!cpu_has(c, X86_FEATURE_DTS)) | |
713 | return; | |
714 | ||
715 | if (!pdev) { | |
716 | /* | |
717 | * Alright, we have DTS support. | |
718 | * We are bringing the _first_ core in this pkg | |
719 | * online. So, initialize per-pkg data structures and | |
720 | * then bring this core online. | |
721 | */ | |
722 | err = coretemp_device_add(cpu); | |
723 | if (err) | |
724 | return; | |
725 | /* | |
726 | * Check whether pkgtemp support is available. | |
727 | * If so, add interfaces for pkgtemp. | |
728 | */ | |
729 | if (cpu_has(c, X86_FEATURE_PTS)) | |
730 | coretemp_add_core(cpu, 1); | |
731 | } | |
732 | /* | |
733 | * Physical CPU device already exists. | |
734 | * So, just add interfaces for this core. | |
735 | */ | |
736 | coretemp_add_core(cpu, 0); | |
737 | } | |
738 | ||
739 | static void __cpuinit put_core_offline(unsigned int cpu) | |
740 | { | |
741 | int i, indx; | |
742 | struct platform_data *pdata; | |
743 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
744 | ||
745 | /* If the physical CPU device does not exist, just return */ | |
746 | if (!pdev) | |
747 | return; | |
748 | ||
749 | pdata = platform_get_drvdata(pdev); | |
750 | ||
751 | indx = TO_ATTR_NO(cpu); | |
752 | ||
753 | if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu) | |
754 | coretemp_remove_core(pdata, &pdev->dev, indx); | |
755 | ||
756 | /* Online the HT version of this core, if any */ | |
757 | for_each_cpu(i, cpu_sibling_mask(cpu)) { | |
758 | if (i != cpu) { | |
759 | get_core_online(i); | |
760 | break; | |
761 | } | |
762 | } | |
763 | /* | |
764 | * If all cores in this pkg are offline, remove the device. | |
765 | * coretemp_device_remove calls unregister_platform_device, | |
766 | * which in turn calls coretemp_remove. This removes the | |
767 | * pkgtemp entry and does other clean ups. | |
768 | */ | |
769 | if (!is_any_core_online(pdata)) | |
770 | coretemp_device_remove(cpu); | |
771 | } | |
772 | ||
ba7c1927 | 773 | static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb, |
bebe4678 RM |
774 | unsigned long action, void *hcpu) |
775 | { | |
776 | unsigned int cpu = (unsigned long) hcpu; | |
777 | ||
778 | switch (action) { | |
779 | case CPU_ONLINE: | |
561d9a96 | 780 | case CPU_DOWN_FAILED: |
199e0de7 | 781 | get_core_online(cpu); |
bebe4678 | 782 | break; |
561d9a96 | 783 | case CPU_DOWN_PREPARE: |
199e0de7 | 784 | put_core_offline(cpu); |
bebe4678 RM |
785 | break; |
786 | } | |
787 | return NOTIFY_OK; | |
788 | } | |
789 | ||
ba7c1927 | 790 | static struct notifier_block coretemp_cpu_notifier __refdata = { |
bebe4678 RM |
791 | .notifier_call = coretemp_cpu_callback, |
792 | }; | |
bebe4678 | 793 | |
199e0de7 | 794 | |
bebe4678 RM |
795 | static int __init coretemp_init(void) |
796 | { | |
797 | int i, err = -ENODEV; | |
bebe4678 | 798 | |
bebe4678 | 799 | /* quick check if we run Intel */ |
92cb7612 | 800 | if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL) |
bebe4678 RM |
801 | goto exit; |
802 | ||
803 | err = platform_driver_register(&coretemp_driver); | |
804 | if (err) | |
805 | goto exit; | |
806 | ||
a4659053 | 807 | for_each_online_cpu(i) |
199e0de7 | 808 | get_core_online(i); |
89a3fd35 JB |
809 | |
810 | #ifndef CONFIG_HOTPLUG_CPU | |
bebe4678 RM |
811 | if (list_empty(&pdev_list)) { |
812 | err = -ENODEV; | |
813 | goto exit_driver_unreg; | |
814 | } | |
89a3fd35 | 815 | #endif |
bebe4678 | 816 | |
bebe4678 | 817 | register_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
818 | return 0; |
819 | ||
0dca94ba | 820 | #ifndef CONFIG_HOTPLUG_CPU |
89a3fd35 | 821 | exit_driver_unreg: |
bebe4678 | 822 | platform_driver_unregister(&coretemp_driver); |
0dca94ba | 823 | #endif |
bebe4678 RM |
824 | exit: |
825 | return err; | |
826 | } | |
827 | ||
828 | static void __exit coretemp_exit(void) | |
829 | { | |
830 | struct pdev_entry *p, *n; | |
17c10d61 | 831 | |
bebe4678 | 832 | unregister_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
833 | mutex_lock(&pdev_list_mutex); |
834 | list_for_each_entry_safe(p, n, &pdev_list, list) { | |
835 | platform_device_unregister(p->pdev); | |
836 | list_del(&p->list); | |
837 | kfree(p); | |
838 | } | |
839 | mutex_unlock(&pdev_list_mutex); | |
840 | platform_driver_unregister(&coretemp_driver); | |
841 | } | |
842 | ||
843 | MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); | |
844 | MODULE_DESCRIPTION("Intel Core temperature monitor"); | |
845 | MODULE_LICENSE("GPL"); | |
846 | ||
847 | module_init(coretemp_init) | |
848 | module_exit(coretemp_exit) |