Commit | Line | Data |
---|---|---|
e53004e2 | 1 | /* |
51c997d8 JD |
2 | * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O |
3 | * chips integrated hardware monitoring features | |
2d45771e | 4 | * Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org> |
e53004e2 JD |
5 | * |
6 | * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates | |
7 | * complete hardware monitoring features: voltage, fan and temperature | |
8 | * sensors, and manual and automatic fan speed control. | |
9 | * | |
51c997d8 JD |
10 | * The F71872F/FG is almost the same, with two more voltages monitored, |
11 | * and 6 VID inputs. | |
12 | * | |
9cab0217 JD |
13 | * The F71806F/FG is essentially the same as the F71872F/FG. It even has |
14 | * the same chip ID, so the driver can't differentiate between. | |
15 | * | |
e53004e2 JD |
16 | * This program is free software; you can redistribute it and/or modify |
17 | * it under the terms of the GNU General Public License as published by | |
18 | * the Free Software Foundation; either version 2 of the License, or | |
19 | * (at your option) any later version. | |
20 | * | |
21 | * This program is distributed in the hope that it will be useful, | |
22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
24 | * GNU General Public License for more details. | |
25 | * | |
26 | * You should have received a copy of the GNU General Public License | |
27 | * along with this program; if not, write to the Free Software | |
28 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
29 | */ | |
30 | ||
e54c5ad6 JP |
31 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
32 | ||
e53004e2 JD |
33 | #include <linux/module.h> |
34 | #include <linux/init.h> | |
35 | #include <linux/slab.h> | |
36 | #include <linux/jiffies.h> | |
37 | #include <linux/platform_device.h> | |
38 | #include <linux/hwmon.h> | |
39 | #include <linux/hwmon-sysfs.h> | |
40 | #include <linux/err.h> | |
f0819184 | 41 | #include <linux/mutex.h> |
0e39e01c | 42 | #include <linux/sysfs.h> |
ce7ee4e8 | 43 | #include <linux/ioport.h> |
b9acb64a | 44 | #include <linux/acpi.h> |
6055fae8 | 45 | #include <linux/io.h> |
e53004e2 | 46 | |
67b671bc JD |
47 | static unsigned short force_id; |
48 | module_param(force_id, ushort, 0); | |
49 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
50 | ||
e53004e2 JD |
51 | static struct platform_device *pdev; |
52 | ||
53 | #define DRVNAME "f71805f" | |
51c997d8 | 54 | enum kinds { f71805f, f71872f }; |
e53004e2 JD |
55 | |
56 | /* | |
57 | * Super-I/O constants and functions | |
58 | */ | |
59 | ||
60 | #define F71805F_LD_HWM 0x04 | |
61 | ||
62 | #define SIO_REG_LDSEL 0x07 /* Logical device select */ | |
63 | #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ | |
64 | #define SIO_REG_DEVREV 0x22 /* Device revision */ | |
65 | #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ | |
51c997d8 | 66 | #define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */ |
e53004e2 JD |
67 | #define SIO_REG_ENABLE 0x30 /* Logical device enable */ |
68 | #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ | |
69 | ||
70 | #define SIO_FINTEK_ID 0x1934 | |
71 | #define SIO_F71805F_ID 0x0406 | |
51c997d8 | 72 | #define SIO_F71872F_ID 0x0341 |
e53004e2 JD |
73 | |
74 | static inline int | |
75 | superio_inb(int base, int reg) | |
76 | { | |
77 | outb(reg, base); | |
78 | return inb(base + 1); | |
79 | } | |
80 | ||
81 | static int | |
82 | superio_inw(int base, int reg) | |
83 | { | |
84 | int val; | |
85 | outb(reg++, base); | |
86 | val = inb(base + 1) << 8; | |
87 | outb(reg, base); | |
88 | val |= inb(base + 1); | |
89 | return val; | |
90 | } | |
91 | ||
92 | static inline void | |
93 | superio_select(int base, int ld) | |
94 | { | |
95 | outb(SIO_REG_LDSEL, base); | |
96 | outb(ld, base + 1); | |
97 | } | |
98 | ||
99 | static inline void | |
100 | superio_enter(int base) | |
101 | { | |
102 | outb(0x87, base); | |
103 | outb(0x87, base); | |
104 | } | |
105 | ||
106 | static inline void | |
107 | superio_exit(int base) | |
108 | { | |
109 | outb(0xaa, base); | |
110 | } | |
111 | ||
112 | /* | |
113 | * ISA constants | |
114 | */ | |
115 | ||
75c99029 JD |
116 | #define REGION_LENGTH 8 |
117 | #define ADDR_REG_OFFSET 5 | |
118 | #define DATA_REG_OFFSET 6 | |
e53004e2 | 119 | |
e53004e2 JD |
120 | /* |
121 | * Registers | |
122 | */ | |
123 | ||
51c997d8 | 124 | /* in nr from 0 to 10 (8-bit values) */ |
e53004e2 | 125 | #define F71805F_REG_IN(nr) (0x10 + (nr)) |
51c997d8 JD |
126 | #define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E) |
127 | #define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F) | |
e53004e2 JD |
128 | /* fan nr from 0 to 2 (12-bit values, two registers) */ |
129 | #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr)) | |
130 | #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr)) | |
315c7113 | 131 | #define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr)) |
e53004e2 | 132 | #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr)) |
6e2bc17b | 133 | #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr)) |
95e35312 | 134 | #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr)) |
e53004e2 JD |
135 | /* temp nr from 0 to 2 (8-bit values) */ |
136 | #define F71805F_REG_TEMP(nr) (0x1B + (nr)) | |
137 | #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr)) | |
138 | #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr)) | |
139 | #define F71805F_REG_TEMP_MODE 0x01 | |
aba5073d PE |
140 | /* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */ |
141 | /* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */ | |
142 | #define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \ | |
143 | (0xA0 + 0x10 * (pwmnr) + (2 - (apnr))) | |
144 | #define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \ | |
145 | (0xA4 + 0x10 * (pwmnr) + \ | |
146 | 2 * (2 - (apnr))) | |
e53004e2 JD |
147 | |
148 | #define F71805F_REG_START 0x00 | |
149 | /* status nr from 0 to 2 */ | |
150 | #define F71805F_REG_STATUS(nr) (0x36 + (nr)) | |
151 | ||
6b14a546 | 152 | /* individual register bits */ |
e196783d | 153 | #define FAN_CTRL_DC_MODE 0x10 |
315c7113 | 154 | #define FAN_CTRL_LATCH_FULL 0x08 |
95e35312 JD |
155 | #define FAN_CTRL_MODE_MASK 0x03 |
156 | #define FAN_CTRL_MODE_SPEED 0x00 | |
157 | #define FAN_CTRL_MODE_TEMPERATURE 0x01 | |
158 | #define FAN_CTRL_MODE_MANUAL 0x02 | |
6b14a546 | 159 | |
e53004e2 JD |
160 | /* |
161 | * Data structures and manipulation thereof | |
162 | */ | |
163 | ||
aba5073d PE |
164 | struct f71805f_auto_point { |
165 | u8 temp[3]; | |
166 | u16 fan[3]; | |
167 | }; | |
168 | ||
e53004e2 JD |
169 | struct f71805f_data { |
170 | unsigned short addr; | |
171 | const char *name; | |
1beeffe4 | 172 | struct device *hwmon_dev; |
e53004e2 | 173 | |
f0819184 | 174 | struct mutex update_lock; |
e53004e2 JD |
175 | char valid; /* !=0 if following fields are valid */ |
176 | unsigned long last_updated; /* In jiffies */ | |
177 | unsigned long last_limits; /* In jiffies */ | |
178 | ||
179 | /* Register values */ | |
51c997d8 JD |
180 | u8 in[11]; |
181 | u8 in_high[11]; | |
182 | u8 in_low[11]; | |
183 | u16 has_in; | |
e53004e2 JD |
184 | u16 fan[3]; |
185 | u16 fan_low[3]; | |
315c7113 | 186 | u16 fan_target[3]; |
6b14a546 | 187 | u8 fan_ctrl[3]; |
95e35312 | 188 | u8 pwm[3]; |
6e2bc17b | 189 | u8 pwm_freq[3]; |
e53004e2 JD |
190 | u8 temp[3]; |
191 | u8 temp_high[3]; | |
192 | u8 temp_hyst[3]; | |
193 | u8 temp_mode; | |
2d45771e | 194 | unsigned long alarms; |
aba5073d | 195 | struct f71805f_auto_point auto_points[3]; |
e53004e2 JD |
196 | }; |
197 | ||
51c997d8 JD |
198 | struct f71805f_sio_data { |
199 | enum kinds kind; | |
200 | u8 fnsel1; | |
201 | }; | |
202 | ||
e53004e2 JD |
203 | static inline long in_from_reg(u8 reg) |
204 | { | |
205 | return (reg * 8); | |
206 | } | |
207 | ||
208 | /* The 2 least significant bits are not used */ | |
209 | static inline u8 in_to_reg(long val) | |
210 | { | |
211 | if (val <= 0) | |
212 | return 0; | |
213 | if (val >= 2016) | |
214 | return 0xfc; | |
215 | return (((val + 16) / 32) << 2); | |
216 | } | |
217 | ||
218 | /* in0 is downscaled by a factor 2 internally */ | |
219 | static inline long in0_from_reg(u8 reg) | |
220 | { | |
221 | return (reg * 16); | |
222 | } | |
223 | ||
224 | static inline u8 in0_to_reg(long val) | |
225 | { | |
226 | if (val <= 0) | |
227 | return 0; | |
228 | if (val >= 4032) | |
229 | return 0xfc; | |
230 | return (((val + 32) / 64) << 2); | |
231 | } | |
232 | ||
233 | /* The 4 most significant bits are not used */ | |
234 | static inline long fan_from_reg(u16 reg) | |
235 | { | |
236 | reg &= 0xfff; | |
237 | if (!reg || reg == 0xfff) | |
238 | return 0; | |
239 | return (1500000 / reg); | |
240 | } | |
241 | ||
242 | static inline u16 fan_to_reg(long rpm) | |
243 | { | |
244 | /* If the low limit is set below what the chip can measure, | |
245 | store the largest possible 12-bit value in the registers, | |
246 | so that no alarm will ever trigger. */ | |
247 | if (rpm < 367) | |
248 | return 0xfff; | |
249 | return (1500000 / rpm); | |
250 | } | |
251 | ||
6e2bc17b JD |
252 | static inline unsigned long pwm_freq_from_reg(u8 reg) |
253 | { | |
254 | unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL; | |
255 | ||
256 | reg &= 0x7f; | |
257 | if (reg == 0) | |
258 | reg++; | |
259 | return clock / (reg << 8); | |
260 | } | |
261 | ||
262 | static inline u8 pwm_freq_to_reg(unsigned long val) | |
263 | { | |
264 | if (val >= 187500) /* The highest we can do */ | |
265 | return 0x80; | |
266 | if (val >= 1475) /* Use 48 MHz clock */ | |
267 | return 0x80 | (48000000UL / (val << 8)); | |
268 | if (val < 31) /* The lowest we can do */ | |
269 | return 0x7f; | |
270 | else /* Use 1 MHz clock */ | |
271 | return 1000000UL / (val << 8); | |
272 | } | |
273 | ||
e196783d JD |
274 | static inline int pwm_mode_from_reg(u8 reg) |
275 | { | |
276 | return !(reg & FAN_CTRL_DC_MODE); | |
277 | } | |
278 | ||
e53004e2 JD |
279 | static inline long temp_from_reg(u8 reg) |
280 | { | |
281 | return (reg * 1000); | |
282 | } | |
283 | ||
284 | static inline u8 temp_to_reg(long val) | |
285 | { | |
286 | if (val < 0) | |
287 | val = 0; | |
288 | else if (val > 1000 * 0xff) | |
289 | val = 0xff; | |
290 | return ((val + 500) / 1000); | |
291 | } | |
292 | ||
293 | /* | |
294 | * Device I/O access | |
295 | */ | |
296 | ||
7f999aa7 | 297 | /* Must be called with data->update_lock held, except during initialization */ |
e53004e2 JD |
298 | static u8 f71805f_read8(struct f71805f_data *data, u8 reg) |
299 | { | |
e53004e2 | 300 | outb(reg, data->addr + ADDR_REG_OFFSET); |
7f999aa7 | 301 | return inb(data->addr + DATA_REG_OFFSET); |
e53004e2 JD |
302 | } |
303 | ||
7f999aa7 | 304 | /* Must be called with data->update_lock held, except during initialization */ |
e53004e2 JD |
305 | static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val) |
306 | { | |
e53004e2 JD |
307 | outb(reg, data->addr + ADDR_REG_OFFSET); |
308 | outb(val, data->addr + DATA_REG_OFFSET); | |
e53004e2 JD |
309 | } |
310 | ||
311 | /* It is important to read the MSB first, because doing so latches the | |
7f999aa7 JD |
312 | value of the LSB, so we are sure both bytes belong to the same value. |
313 | Must be called with data->update_lock held, except during initialization */ | |
e53004e2 JD |
314 | static u16 f71805f_read16(struct f71805f_data *data, u8 reg) |
315 | { | |
316 | u16 val; | |
317 | ||
e53004e2 JD |
318 | outb(reg, data->addr + ADDR_REG_OFFSET); |
319 | val = inb(data->addr + DATA_REG_OFFSET) << 8; | |
320 | outb(++reg, data->addr + ADDR_REG_OFFSET); | |
321 | val |= inb(data->addr + DATA_REG_OFFSET); | |
e53004e2 JD |
322 | |
323 | return val; | |
324 | } | |
325 | ||
7f999aa7 | 326 | /* Must be called with data->update_lock held, except during initialization */ |
e53004e2 JD |
327 | static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val) |
328 | { | |
e53004e2 JD |
329 | outb(reg, data->addr + ADDR_REG_OFFSET); |
330 | outb(val >> 8, data->addr + DATA_REG_OFFSET); | |
331 | outb(++reg, data->addr + ADDR_REG_OFFSET); | |
332 | outb(val & 0xff, data->addr + DATA_REG_OFFSET); | |
e53004e2 JD |
333 | } |
334 | ||
335 | static struct f71805f_data *f71805f_update_device(struct device *dev) | |
336 | { | |
337 | struct f71805f_data *data = dev_get_drvdata(dev); | |
aba5073d | 338 | int nr, apnr; |
e53004e2 | 339 | |
f0819184 | 340 | mutex_lock(&data->update_lock); |
e53004e2 JD |
341 | |
342 | /* Limit registers cache is refreshed after 60 seconds */ | |
343 | if (time_after(jiffies, data->last_updated + 60 * HZ) | |
344 | || !data->valid) { | |
51c997d8 JD |
345 | for (nr = 0; nr < 11; nr++) { |
346 | if (!(data->has_in & (1 << nr))) | |
347 | continue; | |
e53004e2 JD |
348 | data->in_high[nr] = f71805f_read8(data, |
349 | F71805F_REG_IN_HIGH(nr)); | |
350 | data->in_low[nr] = f71805f_read8(data, | |
351 | F71805F_REG_IN_LOW(nr)); | |
352 | } | |
353 | for (nr = 0; nr < 3; nr++) { | |
6b14a546 JD |
354 | data->fan_low[nr] = f71805f_read16(data, |
355 | F71805F_REG_FAN_LOW(nr)); | |
315c7113 JD |
356 | data->fan_target[nr] = f71805f_read16(data, |
357 | F71805F_REG_FAN_TARGET(nr)); | |
6e2bc17b JD |
358 | data->pwm_freq[nr] = f71805f_read8(data, |
359 | F71805F_REG_PWM_FREQ(nr)); | |
e53004e2 JD |
360 | } |
361 | for (nr = 0; nr < 3; nr++) { | |
362 | data->temp_high[nr] = f71805f_read8(data, | |
363 | F71805F_REG_TEMP_HIGH(nr)); | |
364 | data->temp_hyst[nr] = f71805f_read8(data, | |
365 | F71805F_REG_TEMP_HYST(nr)); | |
366 | } | |
367 | data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE); | |
aba5073d PE |
368 | for (nr = 0; nr < 3; nr++) { |
369 | for (apnr = 0; apnr < 3; apnr++) { | |
370 | data->auto_points[nr].temp[apnr] = | |
371 | f71805f_read8(data, | |
372 | F71805F_REG_PWM_AUTO_POINT_TEMP(nr, | |
373 | apnr)); | |
374 | data->auto_points[nr].fan[apnr] = | |
375 | f71805f_read16(data, | |
376 | F71805F_REG_PWM_AUTO_POINT_FAN(nr, | |
377 | apnr)); | |
378 | } | |
379 | } | |
e53004e2 JD |
380 | |
381 | data->last_limits = jiffies; | |
382 | } | |
383 | ||
384 | /* Measurement registers cache is refreshed after 1 second */ | |
385 | if (time_after(jiffies, data->last_updated + HZ) | |
386 | || !data->valid) { | |
51c997d8 JD |
387 | for (nr = 0; nr < 11; nr++) { |
388 | if (!(data->has_in & (1 << nr))) | |
389 | continue; | |
e53004e2 JD |
390 | data->in[nr] = f71805f_read8(data, |
391 | F71805F_REG_IN(nr)); | |
392 | } | |
393 | for (nr = 0; nr < 3; nr++) { | |
6b14a546 JD |
394 | data->fan[nr] = f71805f_read16(data, |
395 | F71805F_REG_FAN(nr)); | |
95e35312 JD |
396 | data->fan_ctrl[nr] = f71805f_read8(data, |
397 | F71805F_REG_FAN_CTRL(nr)); | |
398 | data->pwm[nr] = f71805f_read8(data, | |
399 | F71805F_REG_PWM_DUTY(nr)); | |
e53004e2 JD |
400 | } |
401 | for (nr = 0; nr < 3; nr++) { | |
402 | data->temp[nr] = f71805f_read8(data, | |
403 | F71805F_REG_TEMP(nr)); | |
404 | } | |
2d45771e JD |
405 | data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0)) |
406 | + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8) | |
407 | + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16); | |
e53004e2 JD |
408 | |
409 | data->last_updated = jiffies; | |
410 | data->valid = 1; | |
411 | } | |
412 | ||
f0819184 | 413 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
414 | |
415 | return data; | |
416 | } | |
417 | ||
418 | /* | |
419 | * Sysfs interface | |
420 | */ | |
421 | ||
422 | static ssize_t show_in0(struct device *dev, struct device_attribute *devattr, | |
423 | char *buf) | |
424 | { | |
425 | struct f71805f_data *data = f71805f_update_device(dev); | |
51c997d8 JD |
426 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
427 | int nr = attr->index; | |
e53004e2 | 428 | |
51c997d8 | 429 | return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr])); |
e53004e2 JD |
430 | } |
431 | ||
432 | static ssize_t show_in0_max(struct device *dev, struct device_attribute | |
433 | *devattr, char *buf) | |
434 | { | |
435 | struct f71805f_data *data = f71805f_update_device(dev); | |
51c997d8 JD |
436 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
437 | int nr = attr->index; | |
e53004e2 | 438 | |
51c997d8 | 439 | return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr])); |
e53004e2 JD |
440 | } |
441 | ||
442 | static ssize_t show_in0_min(struct device *dev, struct device_attribute | |
443 | *devattr, char *buf) | |
444 | { | |
445 | struct f71805f_data *data = f71805f_update_device(dev); | |
51c997d8 JD |
446 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
447 | int nr = attr->index; | |
e53004e2 | 448 | |
51c997d8 | 449 | return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr])); |
e53004e2 JD |
450 | } |
451 | ||
452 | static ssize_t set_in0_max(struct device *dev, struct device_attribute | |
453 | *devattr, const char *buf, size_t count) | |
454 | { | |
455 | struct f71805f_data *data = dev_get_drvdata(dev); | |
51c997d8 JD |
456 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
457 | int nr = attr->index; | |
e53004e2 JD |
458 | long val = simple_strtol(buf, NULL, 10); |
459 | ||
f0819184 | 460 | mutex_lock(&data->update_lock); |
51c997d8 JD |
461 | data->in_high[nr] = in0_to_reg(val); |
462 | f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); | |
f0819184 | 463 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
464 | |
465 | return count; | |
466 | } | |
467 | ||
468 | static ssize_t set_in0_min(struct device *dev, struct device_attribute | |
469 | *devattr, const char *buf, size_t count) | |
470 | { | |
471 | struct f71805f_data *data = dev_get_drvdata(dev); | |
51c997d8 JD |
472 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
473 | int nr = attr->index; | |
e53004e2 JD |
474 | long val = simple_strtol(buf, NULL, 10); |
475 | ||
f0819184 | 476 | mutex_lock(&data->update_lock); |
51c997d8 JD |
477 | data->in_low[nr] = in0_to_reg(val); |
478 | f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); | |
f0819184 | 479 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
480 | |
481 | return count; | |
482 | } | |
483 | ||
e53004e2 JD |
484 | static ssize_t show_in(struct device *dev, struct device_attribute *devattr, |
485 | char *buf) | |
486 | { | |
487 | struct f71805f_data *data = f71805f_update_device(dev); | |
488 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
489 | int nr = attr->index; | |
490 | ||
491 | return sprintf(buf, "%ld\n", in_from_reg(data->in[nr])); | |
492 | } | |
493 | ||
494 | static ssize_t show_in_max(struct device *dev, struct device_attribute | |
495 | *devattr, char *buf) | |
496 | { | |
497 | struct f71805f_data *data = f71805f_update_device(dev); | |
498 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
499 | int nr = attr->index; | |
500 | ||
501 | return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr])); | |
502 | } | |
503 | ||
504 | static ssize_t show_in_min(struct device *dev, struct device_attribute | |
505 | *devattr, char *buf) | |
506 | { | |
507 | struct f71805f_data *data = f71805f_update_device(dev); | |
508 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
509 | int nr = attr->index; | |
510 | ||
511 | return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr])); | |
512 | } | |
513 | ||
514 | static ssize_t set_in_max(struct device *dev, struct device_attribute | |
515 | *devattr, const char *buf, size_t count) | |
516 | { | |
517 | struct f71805f_data *data = dev_get_drvdata(dev); | |
518 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
519 | int nr = attr->index; | |
520 | long val = simple_strtol(buf, NULL, 10); | |
521 | ||
f0819184 | 522 | mutex_lock(&data->update_lock); |
e53004e2 JD |
523 | data->in_high[nr] = in_to_reg(val); |
524 | f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); | |
f0819184 | 525 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
526 | |
527 | return count; | |
528 | } | |
529 | ||
530 | static ssize_t set_in_min(struct device *dev, struct device_attribute | |
531 | *devattr, const char *buf, size_t count) | |
532 | { | |
533 | struct f71805f_data *data = dev_get_drvdata(dev); | |
534 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
535 | int nr = attr->index; | |
536 | long val = simple_strtol(buf, NULL, 10); | |
537 | ||
f0819184 | 538 | mutex_lock(&data->update_lock); |
e53004e2 JD |
539 | data->in_low[nr] = in_to_reg(val); |
540 | f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); | |
f0819184 | 541 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
542 | |
543 | return count; | |
544 | } | |
545 | ||
e53004e2 JD |
546 | static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, |
547 | char *buf) | |
548 | { | |
549 | struct f71805f_data *data = f71805f_update_device(dev); | |
550 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
551 | int nr = attr->index; | |
552 | ||
553 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr])); | |
554 | } | |
555 | ||
556 | static ssize_t show_fan_min(struct device *dev, struct device_attribute | |
557 | *devattr, char *buf) | |
558 | { | |
559 | struct f71805f_data *data = f71805f_update_device(dev); | |
560 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
561 | int nr = attr->index; | |
562 | ||
563 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr])); | |
564 | } | |
565 | ||
315c7113 JD |
566 | static ssize_t show_fan_target(struct device *dev, struct device_attribute |
567 | *devattr, char *buf) | |
568 | { | |
569 | struct f71805f_data *data = f71805f_update_device(dev); | |
570 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
571 | int nr = attr->index; | |
572 | ||
573 | return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr])); | |
574 | } | |
575 | ||
e53004e2 JD |
576 | static ssize_t set_fan_min(struct device *dev, struct device_attribute |
577 | *devattr, const char *buf, size_t count) | |
578 | { | |
579 | struct f71805f_data *data = dev_get_drvdata(dev); | |
580 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
581 | int nr = attr->index; | |
582 | long val = simple_strtol(buf, NULL, 10); | |
583 | ||
f0819184 | 584 | mutex_lock(&data->update_lock); |
e53004e2 JD |
585 | data->fan_low[nr] = fan_to_reg(val); |
586 | f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]); | |
f0819184 | 587 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
588 | |
589 | return count; | |
590 | } | |
591 | ||
315c7113 JD |
592 | static ssize_t set_fan_target(struct device *dev, struct device_attribute |
593 | *devattr, const char *buf, size_t count) | |
594 | { | |
595 | struct f71805f_data *data = dev_get_drvdata(dev); | |
596 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
597 | int nr = attr->index; | |
598 | long val = simple_strtol(buf, NULL, 10); | |
599 | ||
600 | mutex_lock(&data->update_lock); | |
601 | data->fan_target[nr] = fan_to_reg(val); | |
602 | f71805f_write16(data, F71805F_REG_FAN_TARGET(nr), | |
603 | data->fan_target[nr]); | |
604 | mutex_unlock(&data->update_lock); | |
605 | ||
606 | return count; | |
607 | } | |
608 | ||
95e35312 JD |
609 | static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, |
610 | char *buf) | |
611 | { | |
612 | struct f71805f_data *data = f71805f_update_device(dev); | |
613 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
614 | int nr = attr->index; | |
615 | ||
616 | return sprintf(buf, "%d\n", (int)data->pwm[nr]); | |
617 | } | |
618 | ||
619 | static ssize_t show_pwm_enable(struct device *dev, struct device_attribute | |
620 | *devattr, char *buf) | |
621 | { | |
622 | struct f71805f_data *data = f71805f_update_device(dev); | |
623 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
624 | int nr = attr->index; | |
625 | int mode; | |
626 | ||
627 | switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) { | |
628 | case FAN_CTRL_MODE_SPEED: | |
629 | mode = 3; | |
630 | break; | |
631 | case FAN_CTRL_MODE_TEMPERATURE: | |
632 | mode = 2; | |
633 | break; | |
634 | default: /* MANUAL */ | |
635 | mode = 1; | |
636 | } | |
637 | ||
638 | return sprintf(buf, "%d\n", mode); | |
639 | } | |
640 | ||
6e2bc17b JD |
641 | static ssize_t show_pwm_freq(struct device *dev, struct device_attribute |
642 | *devattr, char *buf) | |
643 | { | |
644 | struct f71805f_data *data = f71805f_update_device(dev); | |
645 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
646 | int nr = attr->index; | |
647 | ||
648 | return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr])); | |
649 | } | |
650 | ||
e196783d JD |
651 | static ssize_t show_pwm_mode(struct device *dev, struct device_attribute |
652 | *devattr, char *buf) | |
653 | { | |
654 | struct f71805f_data *data = f71805f_update_device(dev); | |
655 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
656 | int nr = attr->index; | |
657 | ||
658 | return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr])); | |
659 | } | |
660 | ||
95e35312 JD |
661 | static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, |
662 | const char *buf, size_t count) | |
663 | { | |
664 | struct f71805f_data *data = dev_get_drvdata(dev); | |
665 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
666 | int nr = attr->index; | |
667 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
668 | ||
669 | if (val > 255) | |
670 | return -EINVAL; | |
671 | ||
672 | mutex_lock(&data->update_lock); | |
673 | data->pwm[nr] = val; | |
674 | f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]); | |
675 | mutex_unlock(&data->update_lock); | |
676 | ||
677 | return count; | |
678 | } | |
679 | ||
680 | static struct attribute *f71805f_attr_pwm[]; | |
681 | ||
682 | static ssize_t set_pwm_enable(struct device *dev, struct device_attribute | |
683 | *devattr, const char *buf, size_t count) | |
684 | { | |
685 | struct f71805f_data *data = dev_get_drvdata(dev); | |
686 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
687 | int nr = attr->index; | |
688 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
689 | u8 reg; | |
690 | ||
691 | if (val < 1 || val > 3) | |
692 | return -EINVAL; | |
693 | ||
694 | if (val > 1) { /* Automatic mode, user can't set PWM value */ | |
695 | if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr], | |
696 | S_IRUGO)) | |
697 | dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1); | |
698 | } | |
699 | ||
700 | mutex_lock(&data->update_lock); | |
701 | reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr)) | |
702 | & ~FAN_CTRL_MODE_MASK; | |
703 | switch (val) { | |
704 | case 1: | |
705 | reg |= FAN_CTRL_MODE_MANUAL; | |
706 | break; | |
707 | case 2: | |
708 | reg |= FAN_CTRL_MODE_TEMPERATURE; | |
709 | break; | |
710 | case 3: | |
711 | reg |= FAN_CTRL_MODE_SPEED; | |
712 | break; | |
713 | } | |
714 | data->fan_ctrl[nr] = reg; | |
715 | f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg); | |
716 | mutex_unlock(&data->update_lock); | |
717 | ||
718 | if (val == 1) { /* Manual mode, user can set PWM value */ | |
719 | if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr], | |
720 | S_IRUGO | S_IWUSR)) | |
721 | dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1); | |
722 | } | |
723 | ||
724 | return count; | |
725 | } | |
726 | ||
6e2bc17b JD |
727 | static ssize_t set_pwm_freq(struct device *dev, struct device_attribute |
728 | *devattr, const char *buf, size_t count) | |
729 | { | |
730 | struct f71805f_data *data = dev_get_drvdata(dev); | |
731 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
732 | int nr = attr->index; | |
733 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
734 | ||
735 | mutex_lock(&data->update_lock); | |
736 | data->pwm_freq[nr] = pwm_freq_to_reg(val); | |
737 | f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]); | |
738 | mutex_unlock(&data->update_lock); | |
739 | ||
740 | return count; | |
741 | } | |
742 | ||
aba5073d PE |
743 | static ssize_t show_pwm_auto_point_temp(struct device *dev, |
744 | struct device_attribute *devattr, | |
745 | char* buf) | |
746 | { | |
747 | struct f71805f_data *data = dev_get_drvdata(dev); | |
748 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | |
749 | int pwmnr = attr->nr; | |
750 | int apnr = attr->index; | |
751 | ||
752 | return sprintf(buf, "%ld\n", | |
753 | temp_from_reg(data->auto_points[pwmnr].temp[apnr])); | |
754 | } | |
755 | ||
756 | static ssize_t set_pwm_auto_point_temp(struct device *dev, | |
757 | struct device_attribute *devattr, | |
758 | const char* buf, size_t count) | |
759 | { | |
760 | struct f71805f_data *data = dev_get_drvdata(dev); | |
761 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | |
762 | int pwmnr = attr->nr; | |
763 | int apnr = attr->index; | |
764 | unsigned long val = simple_strtol(buf, NULL, 10); | |
765 | ||
766 | mutex_lock(&data->update_lock); | |
767 | data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val); | |
768 | f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr), | |
769 | data->auto_points[pwmnr].temp[apnr]); | |
770 | mutex_unlock(&data->update_lock); | |
771 | ||
772 | return count; | |
773 | } | |
774 | ||
775 | static ssize_t show_pwm_auto_point_fan(struct device *dev, | |
776 | struct device_attribute *devattr, | |
777 | char* buf) | |
778 | { | |
779 | struct f71805f_data *data = dev_get_drvdata(dev); | |
780 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | |
781 | int pwmnr = attr->nr; | |
782 | int apnr = attr->index; | |
783 | ||
784 | return sprintf(buf, "%ld\n", | |
785 | fan_from_reg(data->auto_points[pwmnr].fan[apnr])); | |
786 | } | |
787 | ||
788 | static ssize_t set_pwm_auto_point_fan(struct device *dev, | |
789 | struct device_attribute *devattr, | |
790 | const char* buf, size_t count) | |
791 | { | |
792 | struct f71805f_data *data = dev_get_drvdata(dev); | |
793 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | |
794 | int pwmnr = attr->nr; | |
795 | int apnr = attr->index; | |
796 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
797 | ||
798 | mutex_lock(&data->update_lock); | |
799 | data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val); | |
800 | f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr), | |
801 | data->auto_points[pwmnr].fan[apnr]); | |
802 | mutex_unlock(&data->update_lock); | |
803 | ||
804 | return count; | |
805 | } | |
806 | ||
e53004e2 JD |
807 | static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, |
808 | char *buf) | |
809 | { | |
810 | struct f71805f_data *data = f71805f_update_device(dev); | |
811 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
812 | int nr = attr->index; | |
813 | ||
814 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr])); | |
815 | } | |
816 | ||
817 | static ssize_t show_temp_max(struct device *dev, struct device_attribute | |
818 | *devattr, char *buf) | |
819 | { | |
820 | struct f71805f_data *data = f71805f_update_device(dev); | |
821 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
822 | int nr = attr->index; | |
823 | ||
824 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr])); | |
825 | } | |
826 | ||
827 | static ssize_t show_temp_hyst(struct device *dev, struct device_attribute | |
828 | *devattr, char *buf) | |
829 | { | |
830 | struct f71805f_data *data = f71805f_update_device(dev); | |
831 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
832 | int nr = attr->index; | |
833 | ||
834 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr])); | |
835 | } | |
836 | ||
837 | static ssize_t show_temp_type(struct device *dev, struct device_attribute | |
838 | *devattr, char *buf) | |
839 | { | |
840 | struct f71805f_data *data = f71805f_update_device(dev); | |
841 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
842 | int nr = attr->index; | |
843 | ||
844 | /* 3 is diode, 4 is thermistor */ | |
845 | return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4); | |
846 | } | |
847 | ||
848 | static ssize_t set_temp_max(struct device *dev, struct device_attribute | |
849 | *devattr, const char *buf, size_t count) | |
850 | { | |
851 | struct f71805f_data *data = dev_get_drvdata(dev); | |
852 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
853 | int nr = attr->index; | |
854 | long val = simple_strtol(buf, NULL, 10); | |
855 | ||
f0819184 | 856 | mutex_lock(&data->update_lock); |
e53004e2 JD |
857 | data->temp_high[nr] = temp_to_reg(val); |
858 | f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]); | |
f0819184 | 859 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
860 | |
861 | return count; | |
862 | } | |
863 | ||
864 | static ssize_t set_temp_hyst(struct device *dev, struct device_attribute | |
865 | *devattr, const char *buf, size_t count) | |
866 | { | |
867 | struct f71805f_data *data = dev_get_drvdata(dev); | |
868 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
869 | int nr = attr->index; | |
870 | long val = simple_strtol(buf, NULL, 10); | |
871 | ||
f0819184 | 872 | mutex_lock(&data->update_lock); |
e53004e2 JD |
873 | data->temp_hyst[nr] = temp_to_reg(val); |
874 | f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]); | |
f0819184 | 875 | mutex_unlock(&data->update_lock); |
e53004e2 JD |
876 | |
877 | return count; | |
878 | } | |
879 | ||
e53004e2 JD |
880 | static ssize_t show_alarms_in(struct device *dev, struct device_attribute |
881 | *devattr, char *buf) | |
882 | { | |
883 | struct f71805f_data *data = f71805f_update_device(dev); | |
884 | ||
51c997d8 | 885 | return sprintf(buf, "%lu\n", data->alarms & 0x7ff); |
e53004e2 JD |
886 | } |
887 | ||
888 | static ssize_t show_alarms_fan(struct device *dev, struct device_attribute | |
889 | *devattr, char *buf) | |
890 | { | |
891 | struct f71805f_data *data = f71805f_update_device(dev); | |
892 | ||
2d45771e | 893 | return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07); |
e53004e2 JD |
894 | } |
895 | ||
896 | static ssize_t show_alarms_temp(struct device *dev, struct device_attribute | |
897 | *devattr, char *buf) | |
898 | { | |
899 | struct f71805f_data *data = f71805f_update_device(dev); | |
900 | ||
2d45771e JD |
901 | return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07); |
902 | } | |
903 | ||
904 | static ssize_t show_alarm(struct device *dev, struct device_attribute | |
905 | *devattr, char *buf) | |
906 | { | |
907 | struct f71805f_data *data = f71805f_update_device(dev); | |
908 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
909 | int bitnr = attr->index; | |
910 | ||
911 | return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1); | |
e53004e2 JD |
912 | } |
913 | ||
e53004e2 JD |
914 | static ssize_t show_name(struct device *dev, struct device_attribute |
915 | *devattr, char *buf) | |
916 | { | |
917 | struct f71805f_data *data = dev_get_drvdata(dev); | |
918 | ||
919 | return sprintf(buf, "%s\n", data->name); | |
920 | } | |
921 | ||
51c997d8 JD |
922 | static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0); |
923 | static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO| S_IWUSR, | |
924 | show_in0_max, set_in0_max, 0); | |
925 | static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO| S_IWUSR, | |
926 | show_in0_min, set_in0_min, 0); | |
0e39e01c JD |
927 | static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1); |
928 | static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR, | |
929 | show_in_max, set_in_max, 1); | |
930 | static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR, | |
931 | show_in_min, set_in_min, 1); | |
932 | static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2); | |
933 | static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR, | |
934 | show_in_max, set_in_max, 2); | |
935 | static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR, | |
936 | show_in_min, set_in_min, 2); | |
937 | static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3); | |
938 | static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR, | |
939 | show_in_max, set_in_max, 3); | |
940 | static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR, | |
941 | show_in_min, set_in_min, 3); | |
942 | static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4); | |
943 | static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR, | |
944 | show_in_max, set_in_max, 4); | |
945 | static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR, | |
946 | show_in_min, set_in_min, 4); | |
947 | static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5); | |
948 | static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR, | |
949 | show_in_max, set_in_max, 5); | |
950 | static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR, | |
951 | show_in_min, set_in_min, 5); | |
952 | static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6); | |
953 | static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR, | |
954 | show_in_max, set_in_max, 6); | |
955 | static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR, | |
956 | show_in_min, set_in_min, 6); | |
957 | static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7); | |
958 | static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR, | |
959 | show_in_max, set_in_max, 7); | |
960 | static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR, | |
961 | show_in_min, set_in_min, 7); | |
962 | static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8); | |
963 | static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR, | |
964 | show_in_max, set_in_max, 8); | |
965 | static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR, | |
966 | show_in_min, set_in_min, 8); | |
51c997d8 JD |
967 | static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9); |
968 | static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR, | |
969 | show_in0_max, set_in0_max, 9); | |
970 | static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR, | |
971 | show_in0_min, set_in0_min, 9); | |
972 | static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10); | |
973 | static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR, | |
974 | show_in0_max, set_in0_max, 10); | |
975 | static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR, | |
976 | show_in0_min, set_in0_min, 10); | |
0e39e01c JD |
977 | |
978 | static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); | |
979 | static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR, | |
980 | show_fan_min, set_fan_min, 0); | |
315c7113 JD |
981 | static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR, |
982 | show_fan_target, set_fan_target, 0); | |
0e39e01c JD |
983 | static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); |
984 | static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR, | |
985 | show_fan_min, set_fan_min, 1); | |
315c7113 JD |
986 | static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR, |
987 | show_fan_target, set_fan_target, 1); | |
0e39e01c JD |
988 | static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); |
989 | static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR, | |
990 | show_fan_min, set_fan_min, 2); | |
315c7113 JD |
991 | static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR, |
992 | show_fan_target, set_fan_target, 2); | |
0e39e01c JD |
993 | |
994 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0); | |
995 | static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, | |
996 | show_temp_max, set_temp_max, 0); | |
997 | static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, | |
998 | show_temp_hyst, set_temp_hyst, 0); | |
999 | static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0); | |
1000 | static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1); | |
1001 | static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR, | |
1002 | show_temp_max, set_temp_max, 1); | |
1003 | static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, | |
1004 | show_temp_hyst, set_temp_hyst, 1); | |
1005 | static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1); | |
1006 | static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2); | |
1007 | static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR, | |
1008 | show_temp_max, set_temp_max, 2); | |
1009 | static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, | |
1010 | show_temp_hyst, set_temp_hyst, 2); | |
1011 | static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2); | |
1012 | ||
95e35312 JD |
1013 | /* pwm (value) files are created read-only, write permission is |
1014 | then added or removed dynamically as needed */ | |
1015 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0); | |
1016 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, | |
1017 | show_pwm_enable, set_pwm_enable, 0); | |
6e2bc17b JD |
1018 | static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, |
1019 | show_pwm_freq, set_pwm_freq, 0); | |
e196783d | 1020 | static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0); |
95e35312 JD |
1021 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1); |
1022 | static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, | |
1023 | show_pwm_enable, set_pwm_enable, 1); | |
6e2bc17b JD |
1024 | static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR, |
1025 | show_pwm_freq, set_pwm_freq, 1); | |
e196783d | 1026 | static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1); |
95e35312 JD |
1027 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2); |
1028 | static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, | |
1029 | show_pwm_enable, set_pwm_enable, 2); | |
6e2bc17b JD |
1030 | static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR, |
1031 | show_pwm_freq, set_pwm_freq, 2); | |
e196783d | 1032 | static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2); |
95e35312 | 1033 | |
aba5073d PE |
1034 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR, |
1035 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1036 | 0, 0); | |
1037 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR, | |
1038 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1039 | 0, 0); | |
1040 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1041 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1042 | 0, 1); | |
1043 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR, | |
1044 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1045 | 0, 1); | |
1046 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1047 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1048 | 0, 2); | |
1049 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR, | |
1050 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1051 | 0, 2); | |
1052 | ||
1053 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1054 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1055 | 1, 0); | |
1056 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR, | |
1057 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1058 | 1, 0); | |
1059 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1060 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1061 | 1, 1); | |
1062 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR, | |
1063 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1064 | 1, 1); | |
1065 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1066 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1067 | 1, 2); | |
1068 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR, | |
1069 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1070 | 1, 2); | |
1071 | ||
1072 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1073 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1074 | 2, 0); | |
1075 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR, | |
1076 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1077 | 2, 0); | |
1078 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1079 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1080 | 2, 1); | |
1081 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR, | |
1082 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1083 | 2, 1); | |
1084 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1085 | show_pwm_auto_point_temp, set_pwm_auto_point_temp, | |
1086 | 2, 2); | |
1087 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR, | |
1088 | show_pwm_auto_point_fan, set_pwm_auto_point_fan, | |
1089 | 2, 2); | |
1090 | ||
0e39e01c JD |
1091 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); |
1092 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); | |
1093 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); | |
1094 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); | |
1095 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4); | |
1096 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5); | |
1097 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6); | |
1098 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7); | |
1099 | static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8); | |
51c997d8 JD |
1100 | static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9); |
1101 | static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10); | |
0e39e01c JD |
1102 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11); |
1103 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12); | |
1104 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13); | |
1105 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16); | |
1106 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17); | |
1107 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18); | |
1108 | static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL); | |
1109 | static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL); | |
1110 | static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL); | |
1111 | ||
1112 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
1113 | ||
1114 | static struct attribute *f71805f_attributes[] = { | |
51c997d8 JD |
1115 | &sensor_dev_attr_in0_input.dev_attr.attr, |
1116 | &sensor_dev_attr_in0_max.dev_attr.attr, | |
1117 | &sensor_dev_attr_in0_min.dev_attr.attr, | |
0e39e01c JD |
1118 | &sensor_dev_attr_in1_input.dev_attr.attr, |
1119 | &sensor_dev_attr_in1_max.dev_attr.attr, | |
1120 | &sensor_dev_attr_in1_min.dev_attr.attr, | |
1121 | &sensor_dev_attr_in2_input.dev_attr.attr, | |
1122 | &sensor_dev_attr_in2_max.dev_attr.attr, | |
1123 | &sensor_dev_attr_in2_min.dev_attr.attr, | |
1124 | &sensor_dev_attr_in3_input.dev_attr.attr, | |
1125 | &sensor_dev_attr_in3_max.dev_attr.attr, | |
1126 | &sensor_dev_attr_in3_min.dev_attr.attr, | |
0e39e01c JD |
1127 | &sensor_dev_attr_in5_input.dev_attr.attr, |
1128 | &sensor_dev_attr_in5_max.dev_attr.attr, | |
1129 | &sensor_dev_attr_in5_min.dev_attr.attr, | |
1130 | &sensor_dev_attr_in6_input.dev_attr.attr, | |
1131 | &sensor_dev_attr_in6_max.dev_attr.attr, | |
1132 | &sensor_dev_attr_in6_min.dev_attr.attr, | |
1133 | &sensor_dev_attr_in7_input.dev_attr.attr, | |
1134 | &sensor_dev_attr_in7_max.dev_attr.attr, | |
1135 | &sensor_dev_attr_in7_min.dev_attr.attr, | |
0e39e01c | 1136 | |
c7176cb5 JD |
1137 | &sensor_dev_attr_fan1_input.dev_attr.attr, |
1138 | &sensor_dev_attr_fan1_min.dev_attr.attr, | |
1139 | &sensor_dev_attr_fan1_alarm.dev_attr.attr, | |
1140 | &sensor_dev_attr_fan1_target.dev_attr.attr, | |
1141 | &sensor_dev_attr_fan2_input.dev_attr.attr, | |
1142 | &sensor_dev_attr_fan2_min.dev_attr.attr, | |
1143 | &sensor_dev_attr_fan2_alarm.dev_attr.attr, | |
1144 | &sensor_dev_attr_fan2_target.dev_attr.attr, | |
1145 | &sensor_dev_attr_fan3_input.dev_attr.attr, | |
1146 | &sensor_dev_attr_fan3_min.dev_attr.attr, | |
1147 | &sensor_dev_attr_fan3_alarm.dev_attr.attr, | |
1148 | &sensor_dev_attr_fan3_target.dev_attr.attr, | |
1149 | ||
1150 | &sensor_dev_attr_pwm1.dev_attr.attr, | |
1151 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | |
1152 | &sensor_dev_attr_pwm1_mode.dev_attr.attr, | |
1153 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1154 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1155 | &sensor_dev_attr_pwm2_mode.dev_attr.attr, | |
1156 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1157 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1158 | &sensor_dev_attr_pwm3_mode.dev_attr.attr, | |
1159 | ||
0e39e01c JD |
1160 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
1161 | &sensor_dev_attr_temp1_max.dev_attr.attr, | |
1162 | &sensor_dev_attr_temp1_max_hyst.dev_attr.attr, | |
1163 | &sensor_dev_attr_temp1_type.dev_attr.attr, | |
1164 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
1165 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
1166 | &sensor_dev_attr_temp2_max_hyst.dev_attr.attr, | |
1167 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
1168 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
1169 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
1170 | &sensor_dev_attr_temp3_max_hyst.dev_attr.attr, | |
1171 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
1172 | ||
aba5073d PE |
1173 | &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr, |
1174 | &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr, | |
1175 | &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr, | |
1176 | &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr, | |
1177 | &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr, | |
1178 | &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr, | |
1179 | &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr, | |
1180 | &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr, | |
1181 | &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr, | |
1182 | &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr, | |
1183 | &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr, | |
1184 | &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr, | |
1185 | &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr, | |
1186 | &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr, | |
1187 | &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr, | |
1188 | &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr, | |
1189 | &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr, | |
1190 | &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr, | |
1191 | ||
0e39e01c JD |
1192 | &sensor_dev_attr_in0_alarm.dev_attr.attr, |
1193 | &sensor_dev_attr_in1_alarm.dev_attr.attr, | |
1194 | &sensor_dev_attr_in2_alarm.dev_attr.attr, | |
1195 | &sensor_dev_attr_in3_alarm.dev_attr.attr, | |
0e39e01c JD |
1196 | &sensor_dev_attr_in5_alarm.dev_attr.attr, |
1197 | &sensor_dev_attr_in6_alarm.dev_attr.attr, | |
1198 | &sensor_dev_attr_in7_alarm.dev_attr.attr, | |
0e39e01c JD |
1199 | &dev_attr_alarms_in.attr, |
1200 | &sensor_dev_attr_temp1_alarm.dev_attr.attr, | |
1201 | &sensor_dev_attr_temp2_alarm.dev_attr.attr, | |
1202 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, | |
1203 | &dev_attr_alarms_temp.attr, | |
1204 | &dev_attr_alarms_fan.attr, | |
1205 | ||
1206 | &dev_attr_name.attr, | |
1207 | NULL | |
2488a39d JD |
1208 | }; |
1209 | ||
0e39e01c JD |
1210 | static const struct attribute_group f71805f_group = { |
1211 | .attrs = f71805f_attributes, | |
2488a39d JD |
1212 | }; |
1213 | ||
51c997d8 JD |
1214 | static struct attribute *f71805f_attributes_optin[4][5] = { |
1215 | { | |
1216 | &sensor_dev_attr_in4_input.dev_attr.attr, | |
1217 | &sensor_dev_attr_in4_max.dev_attr.attr, | |
1218 | &sensor_dev_attr_in4_min.dev_attr.attr, | |
1219 | &sensor_dev_attr_in4_alarm.dev_attr.attr, | |
1220 | NULL | |
1221 | }, { | |
1222 | &sensor_dev_attr_in8_input.dev_attr.attr, | |
1223 | &sensor_dev_attr_in8_max.dev_attr.attr, | |
1224 | &sensor_dev_attr_in8_min.dev_attr.attr, | |
1225 | &sensor_dev_attr_in8_alarm.dev_attr.attr, | |
1226 | NULL | |
1227 | }, { | |
1228 | &sensor_dev_attr_in9_input.dev_attr.attr, | |
1229 | &sensor_dev_attr_in9_max.dev_attr.attr, | |
1230 | &sensor_dev_attr_in9_min.dev_attr.attr, | |
1231 | &sensor_dev_attr_in9_alarm.dev_attr.attr, | |
1232 | NULL | |
1233 | }, { | |
1234 | &sensor_dev_attr_in10_input.dev_attr.attr, | |
1235 | &sensor_dev_attr_in10_max.dev_attr.attr, | |
1236 | &sensor_dev_attr_in10_min.dev_attr.attr, | |
1237 | &sensor_dev_attr_in10_alarm.dev_attr.attr, | |
1238 | NULL | |
1239 | } | |
1240 | }; | |
1241 | ||
1242 | static const struct attribute_group f71805f_group_optin[4] = { | |
1243 | { .attrs = f71805f_attributes_optin[0] }, | |
1244 | { .attrs = f71805f_attributes_optin[1] }, | |
1245 | { .attrs = f71805f_attributes_optin[2] }, | |
1246 | { .attrs = f71805f_attributes_optin[3] }, | |
1247 | }; | |
1248 | ||
e196783d JD |
1249 | /* We don't include pwm_freq files in the arrays above, because they must be |
1250 | created conditionally (only if pwm_mode is 1 == PWM) */ | |
1251 | static struct attribute *f71805f_attributes_pwm_freq[] = { | |
1252 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, | |
1253 | &sensor_dev_attr_pwm2_freq.dev_attr.attr, | |
1254 | &sensor_dev_attr_pwm3_freq.dev_attr.attr, | |
1255 | NULL | |
1256 | }; | |
1257 | ||
1258 | static const struct attribute_group f71805f_group_pwm_freq = { | |
1259 | .attrs = f71805f_attributes_pwm_freq, | |
1260 | }; | |
1261 | ||
95e35312 JD |
1262 | /* We also need an indexed access to pwmN files to toggle writability */ |
1263 | static struct attribute *f71805f_attr_pwm[] = { | |
1264 | &sensor_dev_attr_pwm1.dev_attr.attr, | |
1265 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1266 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1267 | }; | |
1268 | ||
e53004e2 JD |
1269 | /* |
1270 | * Device registration and initialization | |
1271 | */ | |
1272 | ||
1273 | static void __devinit f71805f_init_device(struct f71805f_data *data) | |
1274 | { | |
1275 | u8 reg; | |
1276 | int i; | |
1277 | ||
1278 | reg = f71805f_read8(data, F71805F_REG_START); | |
1279 | if ((reg & 0x41) != 0x01) { | |
1280 | printk(KERN_DEBUG DRVNAME ": Starting monitoring " | |
1281 | "operations\n"); | |
1282 | f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40); | |
1283 | } | |
1284 | ||
1285 | /* Fan monitoring can be disabled. If it is, we won't be polling | |
1286 | the register values, and won't create the related sysfs files. */ | |
1287 | for (i = 0; i < 3; i++) { | |
6b14a546 JD |
1288 | data->fan_ctrl[i] = f71805f_read8(data, |
1289 | F71805F_REG_FAN_CTRL(i)); | |
315c7113 JD |
1290 | /* Clear latch full bit, else "speed mode" fan speed control |
1291 | doesn't work */ | |
1292 | if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) { | |
1293 | data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL; | |
1294 | f71805f_write8(data, F71805F_REG_FAN_CTRL(i), | |
1295 | data->fan_ctrl[i]); | |
1296 | } | |
e53004e2 JD |
1297 | } |
1298 | } | |
1299 | ||
1300 | static int __devinit f71805f_probe(struct platform_device *pdev) | |
1301 | { | |
51c997d8 | 1302 | struct f71805f_sio_data *sio_data = pdev->dev.platform_data; |
e53004e2 JD |
1303 | struct f71805f_data *data; |
1304 | struct resource *res; | |
2488a39d | 1305 | int i, err; |
e53004e2 | 1306 | |
51c997d8 JD |
1307 | static const char *names[] = { |
1308 | "f71805f", | |
1309 | "f71872f", | |
1310 | }; | |
1311 | ||
e53004e2 JD |
1312 | if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) { |
1313 | err = -ENOMEM; | |
e54c5ad6 | 1314 | pr_err("Out of memory\n"); |
e53004e2 JD |
1315 | goto exit; |
1316 | } | |
1317 | ||
1318 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
ce7ee4e8 JD |
1319 | if (!request_region(res->start + ADDR_REG_OFFSET, 2, DRVNAME)) { |
1320 | err = -EBUSY; | |
1321 | dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n", | |
1322 | (unsigned long)(res->start + ADDR_REG_OFFSET), | |
1323 | (unsigned long)(res->start + ADDR_REG_OFFSET + 1)); | |
1324 | goto exit_free; | |
1325 | } | |
e53004e2 | 1326 | data->addr = res->start; |
51c997d8 | 1327 | data->name = names[sio_data->kind]; |
f0819184 | 1328 | mutex_init(&data->update_lock); |
e53004e2 JD |
1329 | |
1330 | platform_set_drvdata(pdev, data); | |
1331 | ||
51c997d8 JD |
1332 | /* Some voltage inputs depend on chip model and configuration */ |
1333 | switch (sio_data->kind) { | |
1334 | case f71805f: | |
1335 | data->has_in = 0x1ff; | |
1336 | break; | |
1337 | case f71872f: | |
1338 | data->has_in = 0x6ef; | |
1339 | if (sio_data->fnsel1 & 0x01) | |
1340 | data->has_in |= (1 << 4); /* in4 */ | |
1341 | if (sio_data->fnsel1 & 0x02) | |
1342 | data->has_in |= (1 << 8); /* in8 */ | |
1343 | break; | |
1344 | } | |
1345 | ||
e53004e2 JD |
1346 | /* Initialize the F71805F chip */ |
1347 | f71805f_init_device(data); | |
1348 | ||
1349 | /* Register sysfs interface files */ | |
0e39e01c | 1350 | if ((err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group))) |
ce7ee4e8 | 1351 | goto exit_release_region; |
51c997d8 JD |
1352 | if (data->has_in & (1 << 4)) { /* in4 */ |
1353 | if ((err = sysfs_create_group(&pdev->dev.kobj, | |
1354 | &f71805f_group_optin[0]))) | |
1355 | goto exit_remove_files; | |
1356 | } | |
1357 | if (data->has_in & (1 << 8)) { /* in8 */ | |
1358 | if ((err = sysfs_create_group(&pdev->dev.kobj, | |
1359 | &f71805f_group_optin[1]))) | |
1360 | goto exit_remove_files; | |
1361 | } | |
1362 | if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */ | |
1363 | if ((err = sysfs_create_group(&pdev->dev.kobj, | |
1364 | &f71805f_group_optin[2]))) | |
1365 | goto exit_remove_files; | |
1366 | } | |
1367 | if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */ | |
1368 | if ((err = sysfs_create_group(&pdev->dev.kobj, | |
1369 | &f71805f_group_optin[3]))) | |
1370 | goto exit_remove_files; | |
1371 | } | |
0e39e01c | 1372 | for (i = 0; i < 3; i++) { |
e196783d JD |
1373 | /* If control mode is PWM, create pwm_freq file */ |
1374 | if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) { | |
1375 | if ((err = sysfs_create_file(&pdev->dev.kobj, | |
1376 | f71805f_attributes_pwm_freq[i]))) | |
1377 | goto exit_remove_files; | |
1378 | } | |
95e35312 JD |
1379 | /* If PWM is in manual mode, add write permission */ |
1380 | if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) { | |
1381 | if ((err = sysfs_chmod_file(&pdev->dev.kobj, | |
1382 | f71805f_attr_pwm[i], | |
1383 | S_IRUGO | S_IWUSR))) { | |
1384 | dev_err(&pdev->dev, "chmod +w pwm%d failed\n", | |
1385 | i + 1); | |
1386 | goto exit_remove_files; | |
1387 | } | |
1388 | } | |
0e39e01c JD |
1389 | } |
1390 | ||
1beeffe4 TJ |
1391 | data->hwmon_dev = hwmon_device_register(&pdev->dev); |
1392 | if (IS_ERR(data->hwmon_dev)) { | |
1393 | err = PTR_ERR(data->hwmon_dev); | |
0e39e01c JD |
1394 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); |
1395 | goto exit_remove_files; | |
e53004e2 | 1396 | } |
e53004e2 JD |
1397 | |
1398 | return 0; | |
1399 | ||
0e39e01c JD |
1400 | exit_remove_files: |
1401 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); | |
51c997d8 JD |
1402 | for (i = 0; i < 4; i++) |
1403 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); | |
e196783d | 1404 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); |
ce7ee4e8 JD |
1405 | exit_release_region: |
1406 | release_region(res->start + ADDR_REG_OFFSET, 2); | |
e53004e2 | 1407 | exit_free: |
0e39e01c | 1408 | platform_set_drvdata(pdev, NULL); |
e53004e2 JD |
1409 | kfree(data); |
1410 | exit: | |
1411 | return err; | |
1412 | } | |
1413 | ||
1414 | static int __devexit f71805f_remove(struct platform_device *pdev) | |
1415 | { | |
1416 | struct f71805f_data *data = platform_get_drvdata(pdev); | |
ce7ee4e8 | 1417 | struct resource *res; |
0e39e01c | 1418 | int i; |
e53004e2 | 1419 | |
1beeffe4 | 1420 | hwmon_device_unregister(data->hwmon_dev); |
0e39e01c | 1421 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); |
51c997d8 JD |
1422 | for (i = 0; i < 4; i++) |
1423 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); | |
e196783d | 1424 | sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); |
04a6217d | 1425 | platform_set_drvdata(pdev, NULL); |
e53004e2 JD |
1426 | kfree(data); |
1427 | ||
ce7ee4e8 JD |
1428 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); |
1429 | release_region(res->start + ADDR_REG_OFFSET, 2); | |
1430 | ||
e53004e2 JD |
1431 | return 0; |
1432 | } | |
1433 | ||
1434 | static struct platform_driver f71805f_driver = { | |
1435 | .driver = { | |
1436 | .owner = THIS_MODULE, | |
1437 | .name = DRVNAME, | |
1438 | }, | |
1439 | .probe = f71805f_probe, | |
1440 | .remove = __devexit_p(f71805f_remove), | |
1441 | }; | |
1442 | ||
51c997d8 JD |
1443 | static int __init f71805f_device_add(unsigned short address, |
1444 | const struct f71805f_sio_data *sio_data) | |
e53004e2 | 1445 | { |
568825c8 JD |
1446 | struct resource res = { |
1447 | .start = address, | |
1448 | .end = address + REGION_LENGTH - 1, | |
1449 | .flags = IORESOURCE_IO, | |
1450 | }; | |
e53004e2 JD |
1451 | int err; |
1452 | ||
1453 | pdev = platform_device_alloc(DRVNAME, address); | |
1454 | if (!pdev) { | |
1455 | err = -ENOMEM; | |
e54c5ad6 | 1456 | pr_err("Device allocation failed\n"); |
e53004e2 JD |
1457 | goto exit; |
1458 | } | |
1459 | ||
568825c8 | 1460 | res.name = pdev->name; |
b9acb64a JD |
1461 | err = acpi_check_resource_conflict(&res); |
1462 | if (err) | |
1463 | goto exit_device_put; | |
1464 | ||
568825c8 | 1465 | err = platform_device_add_resources(pdev, &res, 1); |
e53004e2 | 1466 | if (err) { |
e54c5ad6 | 1467 | pr_err("Device resource addition failed (%d)\n", err); |
e53004e2 JD |
1468 | goto exit_device_put; |
1469 | } | |
1470 | ||
2df6d811 JD |
1471 | err = platform_device_add_data(pdev, sio_data, |
1472 | sizeof(struct f71805f_sio_data)); | |
1473 | if (err) { | |
e54c5ad6 | 1474 | pr_err("Platform data allocation failed\n"); |
51c997d8 JD |
1475 | goto exit_device_put; |
1476 | } | |
51c997d8 | 1477 | |
e53004e2 JD |
1478 | err = platform_device_add(pdev); |
1479 | if (err) { | |
e54c5ad6 | 1480 | pr_err("Device addition failed (%d)\n", err); |
a117dddf | 1481 | goto exit_device_put; |
e53004e2 JD |
1482 | } |
1483 | ||
1484 | return 0; | |
1485 | ||
1486 | exit_device_put: | |
1487 | platform_device_put(pdev); | |
1488 | exit: | |
1489 | return err; | |
1490 | } | |
1491 | ||
51c997d8 JD |
1492 | static int __init f71805f_find(int sioaddr, unsigned short *address, |
1493 | struct f71805f_sio_data *sio_data) | |
e53004e2 JD |
1494 | { |
1495 | int err = -ENODEV; | |
1496 | u16 devid; | |
1497 | ||
51c997d8 JD |
1498 | static const char *names[] = { |
1499 | "F71805F/FG", | |
9cab0217 | 1500 | "F71872F/FG or F71806F/FG", |
51c997d8 JD |
1501 | }; |
1502 | ||
e53004e2 JD |
1503 | superio_enter(sioaddr); |
1504 | ||
1505 | devid = superio_inw(sioaddr, SIO_REG_MANID); | |
1506 | if (devid != SIO_FINTEK_ID) | |
1507 | goto exit; | |
1508 | ||
67b671bc | 1509 | devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID); |
51c997d8 JD |
1510 | switch (devid) { |
1511 | case SIO_F71805F_ID: | |
1512 | sio_data->kind = f71805f; | |
1513 | break; | |
1514 | case SIO_F71872F_ID: | |
1515 | sio_data->kind = f71872f; | |
1516 | sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1); | |
1517 | break; | |
1518 | default: | |
e54c5ad6 | 1519 | pr_info("Unsupported Fintek device, skipping\n"); |
e53004e2 JD |
1520 | goto exit; |
1521 | } | |
1522 | ||
1523 | superio_select(sioaddr, F71805F_LD_HWM); | |
1524 | if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) { | |
e54c5ad6 | 1525 | pr_warn("Device not activated, skipping\n"); |
e53004e2 JD |
1526 | goto exit; |
1527 | } | |
1528 | ||
1529 | *address = superio_inw(sioaddr, SIO_REG_ADDR); | |
1530 | if (*address == 0) { | |
e54c5ad6 | 1531 | pr_warn("Base address not set, skipping\n"); |
e53004e2 JD |
1532 | goto exit; |
1533 | } | |
75c99029 | 1534 | *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */ |
e53004e2 JD |
1535 | |
1536 | err = 0; | |
e54c5ad6 JP |
1537 | pr_info("Found %s chip at %#x, revision %u\n", |
1538 | names[sio_data->kind], *address, | |
1539 | superio_inb(sioaddr, SIO_REG_DEVREV)); | |
e53004e2 JD |
1540 | |
1541 | exit: | |
1542 | superio_exit(sioaddr); | |
1543 | return err; | |
1544 | } | |
1545 | ||
1546 | static int __init f71805f_init(void) | |
1547 | { | |
1548 | int err; | |
1549 | unsigned short address; | |
51c997d8 | 1550 | struct f71805f_sio_data sio_data; |
e53004e2 | 1551 | |
51c997d8 JD |
1552 | if (f71805f_find(0x2e, &address, &sio_data) |
1553 | && f71805f_find(0x4e, &address, &sio_data)) | |
e53004e2 JD |
1554 | return -ENODEV; |
1555 | ||
1556 | err = platform_driver_register(&f71805f_driver); | |
1557 | if (err) | |
1558 | goto exit; | |
1559 | ||
1560 | /* Sets global pdev as a side effect */ | |
51c997d8 | 1561 | err = f71805f_device_add(address, &sio_data); |
e53004e2 JD |
1562 | if (err) |
1563 | goto exit_driver; | |
1564 | ||
1565 | return 0; | |
1566 | ||
1567 | exit_driver: | |
1568 | platform_driver_unregister(&f71805f_driver); | |
1569 | exit: | |
1570 | return err; | |
1571 | } | |
1572 | ||
1573 | static void __exit f71805f_exit(void) | |
1574 | { | |
1575 | platform_device_unregister(pdev); | |
1576 | platform_driver_unregister(&f71805f_driver); | |
1577 | } | |
1578 | ||
1579 | MODULE_AUTHOR("Jean Delvare <khali@linux-fr>"); | |
1580 | MODULE_LICENSE("GPL"); | |
51c997d8 | 1581 | MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver"); |
e53004e2 JD |
1582 | |
1583 | module_init(f71805f_init); | |
1584 | module_exit(f71805f_exit); |