hwmon: (coretemp) Fix truncated name of alarm attributes
[deliverable/linux.git] / drivers / hwmon / fam15h_power.c
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1/*
2 * fam15h_power.c - AMD Family 15h processor power monitoring
3 *
4 * Copyright (c) 2011 Advanced Micro Devices, Inc.
d034fbf0 5 * Author: Andreas Herrmann <herrmann.der.user@googlemail.com>
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6 *
7 *
8 * This driver is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This driver is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
15 * See the GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this driver; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <linux/err.h>
22#include <linux/hwmon.h>
23#include <linux/hwmon-sysfs.h>
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/pci.h>
27#include <linux/bitops.h>
28#include <asm/processor.h>
29
30MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor");
d034fbf0 31MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>");
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32MODULE_LICENSE("GPL");
33
22e32f4f
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34/* Family 16h Northbridge's function 4 PCI ID */
35#define PCI_DEVICE_ID_AMD_16H_NB_F4 0x1534
36
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37/* D18F3 */
38#define REG_NORTHBRIDGE_CAP 0xe8
39
40/* D18F4 */
41#define REG_PROCESSOR_TDP 0x1b8
42
43/* D18F5 */
44#define REG_TDP_RUNNING_AVERAGE 0xe0
45#define REG_TDP_LIMIT3 0xe8
46
47struct fam15h_power_data {
48 struct device *hwmon_dev;
49 unsigned int tdp_to_watts;
50 unsigned int base_tdp;
51 unsigned int processor_pwr_watts;
52};
53
54static ssize_t show_power(struct device *dev,
55 struct device_attribute *attr, char *buf)
56{
57 u32 val, tdp_limit, running_avg_range;
58 s32 running_avg_capture;
59 u64 curr_pwr_watts;
60 struct pci_dev *f4 = to_pci_dev(dev);
61 struct fam15h_power_data *data = dev_get_drvdata(dev);
62
63 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
64 REG_TDP_RUNNING_AVERAGE, &val);
65 running_avg_capture = (val >> 4) & 0x3fffff;
fc0900cb 66 running_avg_capture = sign_extend32(running_avg_capture, 21);
941a956b 67 running_avg_range = (val & 0xf) + 1;
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68
69 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
70 REG_TDP_LIMIT3, &val);
71
72 tdp_limit = val >> 16;
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73 curr_pwr_watts = ((u64)(tdp_limit +
74 data->base_tdp)) << running_avg_range;
941a956b 75 curr_pwr_watts -= running_avg_capture;
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76 curr_pwr_watts *= data->tdp_to_watts;
77
78 /*
79 * Convert to microWatt
80 *
81 * power is in Watt provided as fixed point integer with
82 * scaling factor 1/(2^16). For conversion we use
83 * (10^6)/(2^16) = 15625/(2^10)
84 */
941a956b 85 curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range);
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86 return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts);
87}
88static DEVICE_ATTR(power1_input, S_IRUGO, show_power, NULL);
89
90static ssize_t show_power_crit(struct device *dev,
91 struct device_attribute *attr, char *buf)
92{
93 struct fam15h_power_data *data = dev_get_drvdata(dev);
94
95 return sprintf(buf, "%u\n", data->processor_pwr_watts);
96}
97static DEVICE_ATTR(power1_crit, S_IRUGO, show_power_crit, NULL);
98
99static ssize_t show_name(struct device *dev,
100 struct device_attribute *attr, char *buf)
101{
102 return sprintf(buf, "fam15h_power\n");
103}
104static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
105
106static struct attribute *fam15h_power_attrs[] = {
107 &dev_attr_power1_input.attr,
108 &dev_attr_power1_crit.attr,
109 &dev_attr_name.attr,
110 NULL
111};
112
113static const struct attribute_group fam15h_power_attr_group = {
114 .attrs = fam15h_power_attrs,
115};
116
6c931ae1 117static bool fam15h_power_is_internal_node0(struct pci_dev *f4)
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118{
119 u32 val;
120
121 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3),
122 REG_NORTHBRIDGE_CAP, &val);
123 if ((val & BIT(29)) && ((val >> 30) & 3))
124 return false;
125
126 return true;
127}
128
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129/*
130 * Newer BKDG versions have an updated recommendation on how to properly
131 * initialize the running average range (was: 0xE, now: 0x9). This avoids
132 * counter saturations resulting in bogus power readings.
133 * We correct this value ourselves to cope with older BIOSes.
134 */
5f0ecb90 135static const struct pci_device_id affected_device[] = {
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136 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
137 { 0 }
138};
139
5f0ecb90 140static void tweak_runavg_range(struct pci_dev *pdev)
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141{
142 u32 val;
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143
144 /*
145 * let this quirk apply only to the current version of the
146 * northbridge, since future versions may change the behavior
147 */
c3e40a99 148 if (!pci_match_id(affected_device, pdev))
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149 return;
150
151 pci_bus_read_config_dword(pdev->bus,
152 PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
153 REG_TDP_RUNNING_AVERAGE, &val);
154 if ((val & 0xf) != 0xe)
155 return;
156
157 val &= ~0xf;
158 val |= 0x9;
159 pci_bus_write_config_dword(pdev->bus,
160 PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
161 REG_TDP_RUNNING_AVERAGE, val);
162}
163
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164#ifdef CONFIG_PM
165static int fam15h_power_resume(struct pci_dev *pdev)
166{
167 tweak_runavg_range(pdev);
168 return 0;
169}
170#else
171#define fam15h_power_resume NULL
172#endif
173
6c931ae1 174static void fam15h_power_init_data(struct pci_dev *f4,
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175 struct fam15h_power_data *data)
176{
177 u32 val;
178 u64 tmp;
179
180 pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val);
181 data->base_tdp = val >> 16;
182 tmp = val & 0xffff;
183
184 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
185 REG_TDP_LIMIT3, &val);
186
187 data->tdp_to_watts = ((val & 0x3ff) << 6) | ((val >> 10) & 0x3f);
188 tmp *= data->tdp_to_watts;
189
190 /* result not allowed to be >= 256W */
191 if ((tmp >> 16) >= 256)
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192 dev_warn(&f4->dev,
193 "Bogus value for ProcessorPwrWatts (processor_pwr_watts>=%u)\n",
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194 (unsigned int) (tmp >> 16));
195
196 /* convert to microWatt */
197 data->processor_pwr_watts = (tmp * 15625) >> 10;
198}
199
6c931ae1 200static int fam15h_power_probe(struct pci_dev *pdev,
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201 const struct pci_device_id *id)
202{
203 struct fam15h_power_data *data;
87432a2e 204 struct device *dev = &pdev->dev;
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205 int err;
206
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207 /*
208 * though we ignore every other northbridge, we still have to
209 * do the tweaking on _each_ node in MCM processors as the counters
210 * are working hand-in-hand
211 */
212 tweak_runavg_range(pdev);
213
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214 if (!fam15h_power_is_internal_node0(pdev))
215 return -ENODEV;
216
217 data = devm_kzalloc(dev, sizeof(struct fam15h_power_data), GFP_KERNEL);
218 if (!data)
219 return -ENOMEM;
512d1027 220
512d1027 221 fam15h_power_init_data(pdev, data);
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222
223 dev_set_drvdata(dev, data);
224 err = sysfs_create_group(&dev->kobj, &fam15h_power_attr_group);
225 if (err)
87432a2e 226 return err;
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227
228 data->hwmon_dev = hwmon_device_register(dev);
229 if (IS_ERR(data->hwmon_dev)) {
230 err = PTR_ERR(data->hwmon_dev);
231 goto exit_remove_group;
232 }
233
234 return 0;
235
236exit_remove_group:
237 sysfs_remove_group(&dev->kobj, &fam15h_power_attr_group);
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238 return err;
239}
240
281dfd0b 241static void fam15h_power_remove(struct pci_dev *pdev)
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242{
243 struct device *dev;
244 struct fam15h_power_data *data;
245
246 dev = &pdev->dev;
247 data = dev_get_drvdata(dev);
248 hwmon_device_unregister(data->hwmon_dev);
249 sysfs_remove_group(&dev->kobj, &fam15h_power_attr_group);
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250}
251
252static DEFINE_PCI_DEVICE_TABLE(fam15h_power_id_table) = {
253 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
22e32f4f 254 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
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255 {}
256};
257MODULE_DEVICE_TABLE(pci, fam15h_power_id_table);
258
259static struct pci_driver fam15h_power_driver = {
260 .name = "fam15h_power",
261 .id_table = fam15h_power_id_table,
262 .probe = fam15h_power_probe,
9e5e9b7a 263 .remove = fam15h_power_remove,
5f0ecb90 264 .resume = fam15h_power_resume,
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265};
266
f71f5a55 267module_pci_driver(fam15h_power_driver);
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