[deliverable/linux.git] / drivers / hwmon / fam15h_power.c

/*
 * fam15h_power.c - AMD Family 15h processor power monitoring
 *
 * Copyright (c) 2011 Advanced Micro Devices, Inc.
 * Author: Andreas Herrmann <herrmann.der.user@googlemail.com>
 *
 *
 * This driver is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This driver is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See the GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this driver; if not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/bitops.h>
#include <asm/processor.h>

MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor");
MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>");
MODULE_LICENSE("GPL");

/* D18F3 */
#define REG_NORTHBRIDGE_CAP		0xe8

/* D18F4 */
#define REG_PROCESSOR_TDP		0x1b8

/* D18F5 */
#define REG_TDP_RUNNING_AVERAGE		0xe0
#define REG_TDP_LIMIT3			0xe8

#define FAM15H_MIN_NUM_ATTRS		2
#define FAM15H_NUM_GROUPS		2

struct fam15h_power_data {
	struct pci_dev *pdev;
	unsigned int tdp_to_watts;
	unsigned int base_tdp;
	unsigned int processor_pwr_watts;
	unsigned int cpu_pwr_sample_ratio;
	const struct attribute_group *groups[FAM15H_NUM_GROUPS];
	struct attribute_group group;
};

static ssize_t show_power(struct device *dev,
			  struct device_attribute *attr, char *buf)
{
	u32 val, tdp_limit, running_avg_range;
	s32 running_avg_capture;
	u64 curr_pwr_watts;
	struct fam15h_power_data *data = dev_get_drvdata(dev);
	struct pci_dev *f4 = data->pdev;

	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
				  REG_TDP_RUNNING_AVERAGE, &val);

	/*
	 * On Carrizo and later platforms, TdpRunAvgAccCap bit field
	 * is extended to 4:31 from 4:25.
	 */
	if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model >= 0x60) {
		running_avg_capture = val >> 4;
		running_avg_capture = sign_extend32(running_avg_capture, 27);
	} else {
		running_avg_capture = (val >> 4) & 0x3fffff;
		running_avg_capture = sign_extend32(running_avg_capture, 21);
	}

	running_avg_range = (val & 0xf) + 1;

	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
				  REG_TDP_LIMIT3, &val);

	tdp_limit = val >> 16;
	curr_pwr_watts = ((u64)(tdp_limit +
				data->base_tdp)) << running_avg_range;
	curr_pwr_watts -= running_avg_capture;
	curr_pwr_watts *= data->tdp_to_watts;

	/*
	 * Convert to microWatt
	 *
	 * power is in Watt provided as fixed point integer with
	 * scaling factor 1/(2^16).  For conversion we use
	 * (10^6)/(2^16) = 15625/(2^10)
	 */
	curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range);
	return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts);
}
static DEVICE_ATTR(power1_input, S_IRUGO, show_power, NULL);

static ssize_t show_power_crit(struct device *dev,
			       struct device_attribute *attr, char *buf)
{
	struct fam15h_power_data *data = dev_get_drvdata(dev);

	return sprintf(buf, "%u\n", data->processor_pwr_watts);
}
static DEVICE_ATTR(power1_crit, S_IRUGO, show_power_crit, NULL);

static int fam15h_power_init_attrs(struct pci_dev *pdev,
				   struct fam15h_power_data *data)
{
	int n = FAM15H_MIN_NUM_ATTRS;
	struct attribute **fam15h_power_attrs;

	if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model <= 0xf)
		n += 1;

	fam15h_power_attrs = devm_kcalloc(&pdev->dev, n,
					  sizeof(*fam15h_power_attrs),
					  GFP_KERNEL);

	if (!fam15h_power_attrs)
		return -ENOMEM;

	n = 0;
	fam15h_power_attrs[n++] = &dev_attr_power1_crit.attr;
	if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model <= 0xf)
		fam15h_power_attrs[n++] = &dev_attr_power1_input.attr;

	data->group.attrs = fam15h_power_attrs;

	return 0;
}

static bool should_load_on_this_node(struct pci_dev *f4)
{
	u32 val;

	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3),
				  REG_NORTHBRIDGE_CAP, &val);
	if ((val & BIT(29)) && ((val >> 30) & 3))
		return false;

	return true;
}

/*
 * Newer BKDG versions have an updated recommendation on how to properly
 * initialize the running average range (was: 0xE, now: 0x9). This avoids
 * counter saturations resulting in bogus power readings.
 * We correct this value ourselves to cope with older BIOSes.
 */
static const struct pci_device_id affected_device[] = {
	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
	{ 0 }
};

static void tweak_runavg_range(struct pci_dev *pdev)
{
	u32 val;

	/*
	 * let this quirk apply only to the current version of the
	 * northbridge, since future versions may change the behavior
	 */
	if (!pci_match_id(affected_device, pdev))
		return;

	pci_bus_read_config_dword(pdev->bus,
		PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
		REG_TDP_RUNNING_AVERAGE, &val);
	if ((val & 0xf) != 0xe)
		return;

	val &= ~0xf;
	val |=  0x9;
	pci_bus_write_config_dword(pdev->bus,
		PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
		REG_TDP_RUNNING_AVERAGE, val);
}

#ifdef CONFIG_PM
static int fam15h_power_resume(struct pci_dev *pdev)
{
	tweak_runavg_range(pdev);
	return 0;
}
#else
#define fam15h_power_resume NULL
#endif

static int fam15h_power_init_data(struct pci_dev *f4,
				  struct fam15h_power_data *data)
{
	u32 val, eax, ebx, ecx, edx;
	u64 tmp;
	int ret;

	pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val);
	data->base_tdp = val >> 16;
	tmp = val & 0xffff;

	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
				  REG_TDP_LIMIT3, &val);

	data->tdp_to_watts = ((val & 0x3ff) << 6) | ((val >> 10) & 0x3f);
	tmp *= data->tdp_to_watts;

	/* result not allowed to be >= 256W */
	if ((tmp >> 16) >= 256)
		dev_warn(&f4->dev,
			 "Bogus value for ProcessorPwrWatts (processor_pwr_watts>=%u)\n",
			 (unsigned int) (tmp >> 16));

	/* convert to microWatt */
	data->processor_pwr_watts = (tmp * 15625) >> 10;

	ret = fam15h_power_init_attrs(f4, data);
	if (ret)
		return ret;

	cpuid(0x80000007, &eax, &ebx, &ecx, &edx);

	/* CPUID Fn8000_0007:EDX[12] indicates to support accumulated power */
	if (!(edx & BIT(12)))
		return 0;

	/*
	 * determine the ratio of the compute unit power accumulator
	 * sample period to the PTSC counter period by executing CPUID
	 * Fn8000_0007:ECX
	 */
	data->cpu_pwr_sample_ratio = ecx;

	return 0;
}

static int fam15h_power_probe(struct pci_dev *pdev,
			      const struct pci_device_id *id)
{
	struct fam15h_power_data *data;
	struct device *dev = &pdev->dev;
	struct device *hwmon_dev;
	int ret;

	/*
	 * though we ignore every other northbridge, we still have to
	 * do the tweaking on _each_ node in MCM processors as the counters
	 * are working hand-in-hand
	 */
	tweak_runavg_range(pdev);

	if (!should_load_on_this_node(pdev))
		return -ENODEV;

	data = devm_kzalloc(dev, sizeof(struct fam15h_power_data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	ret = fam15h_power_init_data(pdev, data);
	if (ret)
		return ret;

	data->pdev = pdev;

	data->groups[0] = &data->group;

	hwmon_dev = devm_hwmon_device_register_with_groups(dev, "fam15h_power",
							   data,
							   &data->groups[0]);
	return PTR_ERR_OR_ZERO(hwmon_dev);
}

static const struct pci_device_id fam15h_power_id_table[] = {
	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) },
	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F4) },
	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
	{}
};
MODULE_DEVICE_TABLE(pci, fam15h_power_id_table);

static struct pci_driver fam15h_power_driver = {
	.name = "fam15h_power",
	.id_table = fam15h_power_id_table,
	.probe = fam15h_power_probe,
	.resume = fam15h_power_resume,
};

module_pci_driver(fam15h_power_driver);
Commit	Line	Data
512d1027 AH	1	/*
	2	* fam15h_power.c - AMD Family 15h processor power monitoring
	3	*
	4	* Copyright (c) 2011 Advanced Micro Devices, Inc.
d034fbf0	5	* Author: Andreas Herrmann <herrmann.der.user@googlemail.com>
512d1027 AH	6	*
	7	*
	8	* This driver is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This driver is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
	15	* See the GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this driver; if not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
	21	#include <linux/err.h>
	22	#include <linux/hwmon.h>
	23	#include <linux/hwmon-sysfs.h>
	24	#include <linux/init.h>
	25	#include <linux/module.h>
	26	#include <linux/pci.h>
	27	#include <linux/bitops.h>
	28	#include <asm/processor.h>
	29
	30	MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor");
d034fbf0	31	MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>");
512d1027 AH	32	MODULE_LICENSE("GPL");
	33
	34	/* D18F3 */
	35	#define REG_NORTHBRIDGE_CAP 0xe8
	36
	37	/* D18F4 */
	38	#define REG_PROCESSOR_TDP 0x1b8
	39
	40	/* D18F5 */
	41	#define REG_TDP_RUNNING_AVERAGE 0xe0
	42	#define REG_TDP_LIMIT3 0xe8
	43
7deb14b1 HR	44	#define FAM15H_MIN_NUM_ATTRS 2
	45	#define FAM15H_NUM_GROUPS 2
	46
512d1027	47	struct fam15h_power_data {
562dc973	48	struct pci_dev *pdev;
512d1027 AH	49	unsigned int tdp_to_watts;
	50	unsigned int base_tdp;
	51	unsigned int processor_pwr_watts;
1ed32160	52	unsigned int cpu_pwr_sample_ratio;
7deb14b1 HR	53	const struct attribute_group *groups[FAM15H_NUM_GROUPS];
7deb14b1 HR	54	struct attribute_group group;
512d1027 AH	55	};
	56
	57	static ssize_t show_power(struct device *dev,
	58	struct device_attribute attr, char buf)
	59	{
	60	u32 val, tdp_limit, running_avg_range;
	61	s32 running_avg_capture;
	62	u64 curr_pwr_watts;
512d1027	63	struct fam15h_power_data *data = dev_get_drvdata(dev);
562dc973	64	struct pci_dev *f4 = data->pdev;
512d1027 AH	65
	66	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
	67	REG_TDP_RUNNING_AVERAGE, &val);
e9cd4d55 HR	68
	69	/*
	70	* On Carrizo and later platforms, TdpRunAvgAccCap bit field
	71	* is extended to 4:31 from 4:25.
	72	*/
	73	if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model >= 0x60) {
	74	running_avg_capture = val >> 4;
	75	running_avg_capture = sign_extend32(running_avg_capture, 27);
	76	} else {
	77	running_avg_capture = (val >> 4) & 0x3fffff;
	78	running_avg_capture = sign_extend32(running_avg_capture, 21);
	79	}
	80
941a956b	81	running_avg_range = (val & 0xf) + 1;
512d1027 AH	82
	83	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
	84	REG_TDP_LIMIT3, &val);
	85
	86	tdp_limit = val >> 16;
62867d49 GR	87	curr_pwr_watts = ((u64)(tdp_limit +
62867d49 GR	88	data->base_tdp)) << running_avg_range;
941a956b	89	curr_pwr_watts -= running_avg_capture;
512d1027 AH	90	curr_pwr_watts *= data->tdp_to_watts;
	91
	92	/*
	93	* Convert to microWatt
	94	*
	95	* power is in Watt provided as fixed point integer with
	96	* scaling factor 1/(2^16). For conversion we use
	97	* (10^6)/(2^16) = 15625/(2^10)
	98	*/
941a956b	99	curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range);
512d1027 AH	100	return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts);
	101	}
	102	static DEVICE_ATTR(power1_input, S_IRUGO, show_power, NULL);
	103
	104	static ssize_t show_power_crit(struct device *dev,
	105	struct device_attribute attr, char buf)
	106	{
	107	struct fam15h_power_data *data = dev_get_drvdata(dev);
	108
	109	return sprintf(buf, "%u\n", data->processor_pwr_watts);
	110	}
	111	static DEVICE_ATTR(power1_crit, S_IRUGO, show_power_crit, NULL);
	112
7deb14b1 HR	113	static int fam15h_power_init_attrs(struct pci_dev *pdev,
7deb14b1 HR	114	struct fam15h_power_data *data)
961a2378	115	{
7deb14b1 HR	116	int n = FAM15H_MIN_NUM_ATTRS;
7deb14b1 HR	117	struct attribute **fam15h_power_attrs;
961a2378	118
7deb14b1 HR	119	if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model <= 0xf)
7deb14b1 HR	120	n += 1;
961a2378	121
7deb14b1 HR	122	fam15h_power_attrs = devm_kcalloc(&pdev->dev, n,
	123	sizeof(*fam15h_power_attrs),
	124	GFP_KERNEL);
512d1027	125
7deb14b1 HR	126	if (!fam15h_power_attrs)
	127	return -ENOMEM;
	128
	129	n = 0;
	130	fam15h_power_attrs[n++] = &dev_attr_power1_crit.attr;
	131	if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model <= 0xf)
	132	fam15h_power_attrs[n++] = &dev_attr_power1_input.attr;
	133
	134	data->group.attrs = fam15h_power_attrs;
	135
	136	return 0;
	137	}
512d1027	138
d83e92b3	139	static bool should_load_on_this_node(struct pci_dev *f4)
512d1027 AH	140	{
	141	u32 val;
	142
	143	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3),
	144	REG_NORTHBRIDGE_CAP, &val);
	145	if ((val & BIT(29)) && ((val >> 30) & 3))
	146	return false;
	147
	148	return true;
	149	}
	150
00250ec9 AP	151	/*
	152	* Newer BKDG versions have an updated recommendation on how to properly
	153	* initialize the running average range (was: 0xE, now: 0x9). This avoids
	154	* counter saturations resulting in bogus power readings.
	155	* We correct this value ourselves to cope with older BIOSes.
	156	*/
5f0ecb90	157	static const struct pci_device_id affected_device[] = {
c3e40a99 GR	158	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
	159	{ 0 }
	160	};
	161
5f0ecb90	162	static void tweak_runavg_range(struct pci_dev *pdev)
00250ec9 AP	163	{
00250ec9 AP	164	u32 val;
00250ec9 AP	165
	166	/*
	167	* let this quirk apply only to the current version of the
	168	* northbridge, since future versions may change the behavior
	169	*/
c3e40a99	170	if (!pci_match_id(affected_device, pdev))
00250ec9 AP	171	return;
	172
	173	pci_bus_read_config_dword(pdev->bus,
	174	PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
	175	REG_TDP_RUNNING_AVERAGE, &val);
	176	if ((val & 0xf) != 0xe)
	177	return;
	178
	179	val &= ~0xf;
	180	val \|= 0x9;
	181	pci_bus_write_config_dword(pdev->bus,
	182	PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
	183	REG_TDP_RUNNING_AVERAGE, val);
	184	}
	185
5f0ecb90 AH	186	#ifdef CONFIG_PM
	187	static int fam15h_power_resume(struct pci_dev *pdev)
	188	{
	189	tweak_runavg_range(pdev);
	190	return 0;
	191	}
	192	#else
	193	#define fam15h_power_resume NULL
	194	#endif
	195
7deb14b1 HR	196	static int fam15h_power_init_data(struct pci_dev *f4,
7deb14b1 HR	197	struct fam15h_power_data *data)
512d1027	198	{
1ed32160	199	u32 val, eax, ebx, ecx, edx;
512d1027	200	u64 tmp;
7deb14b1	201	int ret;
512d1027 AH	202
	203	pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val);
	204	data->base_tdp = val >> 16;
	205	tmp = val & 0xffff;
	206
	207	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
	208	REG_TDP_LIMIT3, &val);
	209
	210	data->tdp_to_watts = ((val & 0x3ff) << 6) \| ((val >> 10) & 0x3f);
	211	tmp *= data->tdp_to_watts;
	212
	213	/* result not allowed to be >= 256W */
	214	if ((tmp >> 16) >= 256)
b55f3757 GR	215	dev_warn(&f4->dev,
b55f3757 GR	216	"Bogus value for ProcessorPwrWatts (processor_pwr_watts>=%u)\n",
512d1027 AH	217	(unsigned int) (tmp >> 16));
	218
	219	/* convert to microWatt */
	220	data->processor_pwr_watts = (tmp * 15625) >> 10;
1ed32160	221
7deb14b1 HR	222	ret = fam15h_power_init_attrs(f4, data);
	223	if (ret)
	224	return ret;
	225
1ed32160 HR	226	cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
	227
	228	/* CPUID Fn8000_0007:EDX[12] indicates to support accumulated power */
	229	if (!(edx & BIT(12)))
7deb14b1	230	return 0;
1ed32160 HR	231
	232	/*
	233	* determine the ratio of the compute unit power accumulator
	234	* sample period to the PTSC counter period by executing CPUID
	235	* Fn8000_0007:ECX
	236	*/
	237	data->cpu_pwr_sample_ratio = ecx;
7deb14b1 HR	238
7deb14b1 HR	239	return 0;
512d1027 AH	240	}
512d1027 AH	241
6c931ae1	242	static int fam15h_power_probe(struct pci_dev *pdev,
7deb14b1	243	const struct pci_device_id *id)
512d1027 AH	244	{
512d1027 AH	245	struct fam15h_power_data *data;
87432a2e	246	struct device *dev = &pdev->dev;
562dc973	247	struct device *hwmon_dev;
7deb14b1	248	int ret;
512d1027	249
00250ec9 AP	250	/*
	251	* though we ignore every other northbridge, we still have to
	252	* do the tweaking on _each_ node in MCM processors as the counters
	253	* are working hand-in-hand
	254	*/
	255	tweak_runavg_range(pdev);
	256
d83e92b3	257	if (!should_load_on_this_node(pdev))
87432a2e GR	258	return -ENODEV;
	259
	260	data = devm_kzalloc(dev, sizeof(struct fam15h_power_data), GFP_KERNEL);
	261	if (!data)
	262	return -ENOMEM;
512d1027	263
7deb14b1 HR	264	ret = fam15h_power_init_data(pdev, data);
	265	if (ret)
	266	return ret;
	267
562dc973	268	data->pdev = pdev;
512d1027	269
7deb14b1 HR	270	data->groups[0] = &data->group;
7deb14b1 HR	271
562dc973 AL	272	hwmon_dev = devm_hwmon_device_register_with_groups(dev, "fam15h_power",
562dc973 AL	273	data,
7deb14b1	274	&data->groups[0]);
562dc973	275	return PTR_ERR_OR_ZERO(hwmon_dev);
512d1027 AH	276	}
512d1027 AH	277
cd9bb056	278	static const struct pci_device_id fam15h_power_id_table[] = {
512d1027	279	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
0a0039ad	280	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) },
5dc08725	281	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F4) },
22e32f4f	282	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
0bd52941	283	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
512d1027 AH	284	{}
	285	};
	286	MODULE_DEVICE_TABLE(pci, fam15h_power_id_table);
	287
	288	static struct pci_driver fam15h_power_driver = {
	289	.name = "fam15h_power",
	290	.id_table = fam15h_power_id_table,
	291	.probe = fam15h_power_probe,
5f0ecb90	292	.resume = fam15h_power_resume,
512d1027 AH	293	};
512d1027 AH	294
f71f5a55	295	module_pci_driver(fam15h_power_driver);