[deliverable/linux.git] / drivers / hwmon / fam15h_power.c

/*
 * fam15h_power.c - AMD Family 15h processor power monitoring
 *
 * Copyright (c) 2011 Advanced Micro Devices, Inc.
 * Author: Andreas Herrmann <herrmann.der.user@googlemail.com>
 *
 *
 * This driver is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This driver is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See the GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this driver; if not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/err.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/bitops.h>
#include <asm/processor.h>

MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor");
MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>");
MODULE_LICENSE("GPL");

/* D18F3 */
#define REG_NORTHBRIDGE_CAP		0xe8

/* D18F4 */
#define REG_PROCESSOR_TDP		0x1b8

/* D18F5 */
#define REG_TDP_RUNNING_AVERAGE		0xe0
#define REG_TDP_LIMIT3			0xe8

struct fam15h_power_data {
	struct pci_dev *pdev;
	unsigned int tdp_to_watts;
	unsigned int base_tdp;
	unsigned int processor_pwr_watts;
};

static ssize_t show_power(struct device *dev,
			  struct device_attribute *attr, char *buf)
{
	u32 val, tdp_limit, running_avg_range;
	s32 running_avg_capture;
	u64 curr_pwr_watts;
	struct fam15h_power_data *data = dev_get_drvdata(dev);
	struct pci_dev *f4 = data->pdev;

	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
				  REG_TDP_RUNNING_AVERAGE, &val);
	running_avg_capture = (val >> 4) & 0x3fffff;
	running_avg_capture = sign_extend32(running_avg_capture, 21);
	running_avg_range = (val & 0xf) + 1;

	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
				  REG_TDP_LIMIT3, &val);

	tdp_limit = val >> 16;
	curr_pwr_watts = ((u64)(tdp_limit +
				data->base_tdp)) << running_avg_range;
	curr_pwr_watts -= running_avg_capture;
	curr_pwr_watts *= data->tdp_to_watts;

	/*
	 * Convert to microWatt
	 *
	 * power is in Watt provided as fixed point integer with
	 * scaling factor 1/(2^16).  For conversion we use
	 * (10^6)/(2^16) = 15625/(2^10)
	 */
	curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range);
	return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts);
}
static DEVICE_ATTR(power1_input, S_IRUGO, show_power, NULL);

static ssize_t show_power_crit(struct device *dev,
			       struct device_attribute *attr, char *buf)
{
	struct fam15h_power_data *data = dev_get_drvdata(dev);

	return sprintf(buf, "%u\n", data->processor_pwr_watts);
}
static DEVICE_ATTR(power1_crit, S_IRUGO, show_power_crit, NULL);

static umode_t fam15h_power_is_visible(struct kobject *kobj,
				       struct attribute *attr,
				       int index)
{
	/* power1_input is only reported for Fam15h, Models 00h-0fh */
	if (attr == &dev_attr_power1_input.attr &&
	   (boot_cpu_data.x86 != 0x15 || boot_cpu_data.x86_model > 0xf))
		return 0;

	return attr->mode;
}

static struct attribute *fam15h_power_attrs[] = {
	&dev_attr_power1_input.attr,
	&dev_attr_power1_crit.attr,
	NULL
};

static const struct attribute_group fam15h_power_group = {
	.attrs = fam15h_power_attrs,
	.is_visible = fam15h_power_is_visible,
};
__ATTRIBUTE_GROUPS(fam15h_power);

static bool fam15h_power_is_internal_node0(struct pci_dev *f4)
{
	u32 val;

	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3),
				  REG_NORTHBRIDGE_CAP, &val);
	if ((val & BIT(29)) && ((val >> 30) & 3))
		return false;

	return true;
}

/*
 * Newer BKDG versions have an updated recommendation on how to properly
 * initialize the running average range (was: 0xE, now: 0x9). This avoids
 * counter saturations resulting in bogus power readings.
 * We correct this value ourselves to cope with older BIOSes.
 */
static const struct pci_device_id affected_device[] = {
	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
	{ 0 }
};

static void tweak_runavg_range(struct pci_dev *pdev)
{
	u32 val;

	/*
	 * let this quirk apply only to the current version of the
	 * northbridge, since future versions may change the behavior
	 */
	if (!pci_match_id(affected_device, pdev))
		return;

	pci_bus_read_config_dword(pdev->bus,
		PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
		REG_TDP_RUNNING_AVERAGE, &val);
	if ((val & 0xf) != 0xe)
		return;

	val &= ~0xf;
	val |=  0x9;
	pci_bus_write_config_dword(pdev->bus,
		PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
		REG_TDP_RUNNING_AVERAGE, val);
}

#ifdef CONFIG_PM
static int fam15h_power_resume(struct pci_dev *pdev)
{
	tweak_runavg_range(pdev);
	return 0;
}
#else
#define fam15h_power_resume NULL
#endif

static void fam15h_power_init_data(struct pci_dev *f4,
					     struct fam15h_power_data *data)
{
	u32 val;
	u64 tmp;

	pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val);
	data->base_tdp = val >> 16;
	tmp = val & 0xffff;

	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
				  REG_TDP_LIMIT3, &val);

	data->tdp_to_watts = ((val & 0x3ff) << 6) | ((val >> 10) & 0x3f);
	tmp *= data->tdp_to_watts;

	/* result not allowed to be >= 256W */
	if ((tmp >> 16) >= 256)
		dev_warn(&f4->dev,
			 "Bogus value for ProcessorPwrWatts (processor_pwr_watts>=%u)\n",
			 (unsigned int) (tmp >> 16));

	/* convert to microWatt */
	data->processor_pwr_watts = (tmp * 15625) >> 10;
}

static int fam15h_power_probe(struct pci_dev *pdev,
					const struct pci_device_id *id)
{
	struct fam15h_power_data *data;
	struct device *dev = &pdev->dev;
	struct device *hwmon_dev;

	/*
	 * though we ignore every other northbridge, we still have to
	 * do the tweaking on _each_ node in MCM processors as the counters
	 * are working hand-in-hand
	 */
	tweak_runavg_range(pdev);

	if (!fam15h_power_is_internal_node0(pdev))
		return -ENODEV;

	data = devm_kzalloc(dev, sizeof(struct fam15h_power_data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	fam15h_power_init_data(pdev, data);
	data->pdev = pdev;

	hwmon_dev = devm_hwmon_device_register_with_groups(dev, "fam15h_power",
							   data,
							   fam15h_power_groups);
	return PTR_ERR_OR_ZERO(hwmon_dev);
}

static const struct pci_device_id fam15h_power_id_table[] = {
	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
	{}
};
MODULE_DEVICE_TABLE(pci, fam15h_power_id_table);

static struct pci_driver fam15h_power_driver = {
	.name = "fam15h_power",
	.id_table = fam15h_power_id_table,
	.probe = fam15h_power_probe,
	.resume = fam15h_power_resume,
};

module_pci_driver(fam15h_power_driver);
Commit	Line	Data
512d1027 AH	1	/*
	2	* fam15h_power.c - AMD Family 15h processor power monitoring
	3	*
	4	* Copyright (c) 2011 Advanced Micro Devices, Inc.
d034fbf0	5	* Author: Andreas Herrmann <herrmann.der.user@googlemail.com>
512d1027 AH	6	*
	7	*
	8	* This driver is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This driver is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
	15	* See the GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this driver; if not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
	21	#include <linux/err.h>
	22	#include <linux/hwmon.h>
	23	#include <linux/hwmon-sysfs.h>
	24	#include <linux/init.h>
	25	#include <linux/module.h>
	26	#include <linux/pci.h>
	27	#include <linux/bitops.h>
	28	#include <asm/processor.h>
	29
	30	MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor");
d034fbf0	31	MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>");
512d1027 AH	32	MODULE_LICENSE("GPL");
	33
	34	/* D18F3 */
	35	#define REG_NORTHBRIDGE_CAP 0xe8
	36
	37	/* D18F4 */
	38	#define REG_PROCESSOR_TDP 0x1b8
	39
	40	/* D18F5 */
	41	#define REG_TDP_RUNNING_AVERAGE 0xe0
	42	#define REG_TDP_LIMIT3 0xe8
	43
	44	struct fam15h_power_data {
562dc973	45	struct pci_dev *pdev;
512d1027 AH	46	unsigned int tdp_to_watts;
	47	unsigned int base_tdp;
	48	unsigned int processor_pwr_watts;
	49	};
	50
	51	static ssize_t show_power(struct device *dev,
	52	struct device_attribute attr, char buf)
	53	{
	54	u32 val, tdp_limit, running_avg_range;
	55	s32 running_avg_capture;
	56	u64 curr_pwr_watts;
512d1027	57	struct fam15h_power_data *data = dev_get_drvdata(dev);
562dc973	58	struct pci_dev *f4 = data->pdev;
512d1027 AH	59
	60	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
	61	REG_TDP_RUNNING_AVERAGE, &val);
	62	running_avg_capture = (val >> 4) & 0x3fffff;
fc0900cb	63	running_avg_capture = sign_extend32(running_avg_capture, 21);
941a956b	64	running_avg_range = (val & 0xf) + 1;
512d1027 AH	65
	66	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
	67	REG_TDP_LIMIT3, &val);
	68
	69	tdp_limit = val >> 16;
62867d49 GR	70	curr_pwr_watts = ((u64)(tdp_limit +
62867d49 GR	71	data->base_tdp)) << running_avg_range;
941a956b	72	curr_pwr_watts -= running_avg_capture;
512d1027 AH	73	curr_pwr_watts *= data->tdp_to_watts;
	74
	75	/*
	76	* Convert to microWatt
	77	*
	78	* power is in Watt provided as fixed point integer with
	79	* scaling factor 1/(2^16). For conversion we use
	80	* (10^6)/(2^16) = 15625/(2^10)
	81	*/
941a956b	82	curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range);
512d1027 AH	83	return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts);
	84	}
	85	static DEVICE_ATTR(power1_input, S_IRUGO, show_power, NULL);
	86
	87	static ssize_t show_power_crit(struct device *dev,
	88	struct device_attribute attr, char buf)
	89	{
	90	struct fam15h_power_data *data = dev_get_drvdata(dev);
	91
	92	return sprintf(buf, "%u\n", data->processor_pwr_watts);
	93	}
	94	static DEVICE_ATTR(power1_crit, S_IRUGO, show_power_crit, NULL);
	95
961a2378 AG	96	static umode_t fam15h_power_is_visible(struct kobject *kobj,
	97	struct attribute *attr,
	98	int index)
	99	{
	100	/* power1_input is only reported for Fam15h, Models 00h-0fh */
	101	if (attr == &dev_attr_power1_input.attr &&
	102	(boot_cpu_data.x86 != 0x15 \|\| boot_cpu_data.x86_model > 0xf))
	103	return 0;
	104
	105	return attr->mode;
	106	}
	107
512d1027 AH	108	static struct attribute *fam15h_power_attrs[] = {
	109	&dev_attr_power1_input.attr,
	110	&dev_attr_power1_crit.attr,
512d1027 AH	111	NULL
	112	};
	113
961a2378 AG	114	static const struct attribute_group fam15h_power_group = {
	115	.attrs = fam15h_power_attrs,
	116	.is_visible = fam15h_power_is_visible,
	117	};
	118	__ATTRIBUTE_GROUPS(fam15h_power);
512d1027	119
6c931ae1	120	static bool fam15h_power_is_internal_node0(struct pci_dev *f4)
512d1027 AH	121	{
	122	u32 val;
	123
	124	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3),
	125	REG_NORTHBRIDGE_CAP, &val);
	126	if ((val & BIT(29)) && ((val >> 30) & 3))
	127	return false;
	128
	129	return true;
	130	}
	131
00250ec9 AP	132	/*
	133	* Newer BKDG versions have an updated recommendation on how to properly
	134	* initialize the running average range (was: 0xE, now: 0x9). This avoids
	135	* counter saturations resulting in bogus power readings.
	136	* We correct this value ourselves to cope with older BIOSes.
	137	*/
5f0ecb90	138	static const struct pci_device_id affected_device[] = {
c3e40a99 GR	139	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
	140	{ 0 }
	141	};
	142
5f0ecb90	143	static void tweak_runavg_range(struct pci_dev *pdev)
00250ec9 AP	144	{
00250ec9 AP	145	u32 val;
00250ec9 AP	146
	147	/*
	148	* let this quirk apply only to the current version of the
	149	* northbridge, since future versions may change the behavior
	150	*/
c3e40a99	151	if (!pci_match_id(affected_device, pdev))
00250ec9 AP	152	return;
	153
	154	pci_bus_read_config_dword(pdev->bus,
	155	PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
	156	REG_TDP_RUNNING_AVERAGE, &val);
	157	if ((val & 0xf) != 0xe)
	158	return;
	159
	160	val &= ~0xf;
	161	val \|= 0x9;
	162	pci_bus_write_config_dword(pdev->bus,
	163	PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
	164	REG_TDP_RUNNING_AVERAGE, val);
	165	}
	166
5f0ecb90 AH	167	#ifdef CONFIG_PM
	168	static int fam15h_power_resume(struct pci_dev *pdev)
	169	{
	170	tweak_runavg_range(pdev);
	171	return 0;
	172	}
	173	#else
	174	#define fam15h_power_resume NULL
	175	#endif
	176
6c931ae1	177	static void fam15h_power_init_data(struct pci_dev *f4,
512d1027 AH	178	struct fam15h_power_data *data)
	179	{
	180	u32 val;
	181	u64 tmp;
	182
	183	pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val);
	184	data->base_tdp = val >> 16;
	185	tmp = val & 0xffff;
	186
	187	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
	188	REG_TDP_LIMIT3, &val);
	189
	190	data->tdp_to_watts = ((val & 0x3ff) << 6) \| ((val >> 10) & 0x3f);
	191	tmp *= data->tdp_to_watts;
	192
	193	/* result not allowed to be >= 256W */
	194	if ((tmp >> 16) >= 256)
b55f3757 GR	195	dev_warn(&f4->dev,
b55f3757 GR	196	"Bogus value for ProcessorPwrWatts (processor_pwr_watts>=%u)\n",
512d1027 AH	197	(unsigned int) (tmp >> 16));
	198
	199	/* convert to microWatt */
	200	data->processor_pwr_watts = (tmp * 15625) >> 10;
	201	}
	202
6c931ae1	203	static int fam15h_power_probe(struct pci_dev *pdev,
512d1027 AH	204	const struct pci_device_id *id)
	205	{
	206	struct fam15h_power_data *data;
87432a2e	207	struct device *dev = &pdev->dev;
562dc973	208	struct device *hwmon_dev;
512d1027	209
00250ec9 AP	210	/*
	211	* though we ignore every other northbridge, we still have to
	212	* do the tweaking on _each_ node in MCM processors as the counters
	213	* are working hand-in-hand
	214	*/
	215	tweak_runavg_range(pdev);
	216
87432a2e GR	217	if (!fam15h_power_is_internal_node0(pdev))
	218	return -ENODEV;
	219
	220	data = devm_kzalloc(dev, sizeof(struct fam15h_power_data), GFP_KERNEL);
	221	if (!data)
	222	return -ENOMEM;
512d1027	223
512d1027	224	fam15h_power_init_data(pdev, data);
562dc973	225	data->pdev = pdev;
512d1027	226
562dc973 AL	227	hwmon_dev = devm_hwmon_device_register_with_groups(dev, "fam15h_power",
	228	data,
	229	fam15h_power_groups);
	230	return PTR_ERR_OR_ZERO(hwmon_dev);
512d1027 AH	231	}
512d1027 AH	232
cd9bb056	233	static const struct pci_device_id fam15h_power_id_table[] = {
512d1027	234	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
22e32f4f	235	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
512d1027 AH	236	{}
	237	};
	238	MODULE_DEVICE_TABLE(pci, fam15h_power_id_table);
	239
	240	static struct pci_driver fam15h_power_driver = {
	241	.name = "fam15h_power",
	242	.id_table = fam15h_power_id_table,
	243	.probe = fam15h_power_probe,
5f0ecb90	244	.resume = fam15h_power_resume,
512d1027 AH	245	};
512d1027 AH	246
f71f5a55	247	module_pci_driver(fam15h_power_driver);