Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
5f2dc798 JD |
2 | * it87.c - Part of lm_sensors, Linux kernel modules for hardware |
3 | * monitoring. | |
4 | * | |
5 | * The IT8705F is an LPC-based Super I/O part that contains UARTs, a | |
6 | * parallel port, an IR port, a MIDI port, a floppy controller, etc., in | |
7 | * addition to an Environment Controller (Enhanced Hardware Monitor and | |
8 | * Fan Controller) | |
9 | * | |
10 | * This driver supports only the Environment Controller in the IT8705F and | |
11 | * similar parts. The other devices are supported by different drivers. | |
12 | * | |
c145d5c6 | 13 | * Supports: IT8603E Super I/O chip w/LPC interface |
3ba9d977 | 14 | * IT8620E Super I/O chip w/LPC interface |
574e9bd8 | 15 | * IT8623E Super I/O chip w/LPC interface |
c145d5c6 | 16 | * IT8705F Super I/O chip w/LPC interface |
5f2dc798 JD |
17 | * IT8712F Super I/O chip w/LPC interface |
18 | * IT8716F Super I/O chip w/LPC interface | |
19 | * IT8718F Super I/O chip w/LPC interface | |
20 | * IT8720F Super I/O chip w/LPC interface | |
44c1bcd4 | 21 | * IT8721F Super I/O chip w/LPC interface |
5f2dc798 | 22 | * IT8726F Super I/O chip w/LPC interface |
16b5dda2 | 23 | * IT8728F Super I/O chip w/LPC interface |
ead80803 | 24 | * IT8732F Super I/O chip w/LPC interface |
44c1bcd4 | 25 | * IT8758E Super I/O chip w/LPC interface |
b0636707 GR |
26 | * IT8771E Super I/O chip w/LPC interface |
27 | * IT8772E Super I/O chip w/LPC interface | |
7bc32d29 | 28 | * IT8781F Super I/O chip w/LPC interface |
0531d98b GR |
29 | * IT8782F Super I/O chip w/LPC interface |
30 | * IT8783E/F Super I/O chip w/LPC interface | |
a0c1424a | 31 | * IT8786E Super I/O chip w/LPC interface |
4ee07157 | 32 | * IT8790E Super I/O chip w/LPC interface |
5f2dc798 JD |
33 | * Sis950 A clone of the IT8705F |
34 | * | |
35 | * Copyright (C) 2001 Chris Gauthron | |
7c81c60f | 36 | * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de> |
5f2dc798 JD |
37 | * |
38 | * This program is free software; you can redistribute it and/or modify | |
39 | * it under the terms of the GNU General Public License as published by | |
40 | * the Free Software Foundation; either version 2 of the License, or | |
41 | * (at your option) any later version. | |
42 | * | |
43 | * This program is distributed in the hope that it will be useful, | |
44 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
45 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
46 | * GNU General Public License for more details. | |
47 | * | |
48 | * You should have received a copy of the GNU General Public License | |
49 | * along with this program; if not, write to the Free Software | |
50 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
51 | */ | |
1da177e4 | 52 | |
a8ca1037 JP |
53 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
54 | ||
1da177e4 LT |
55 | #include <linux/module.h> |
56 | #include <linux/init.h> | |
57 | #include <linux/slab.h> | |
58 | #include <linux/jiffies.h> | |
b74f3fdd | 59 | #include <linux/platform_device.h> |
943b0830 | 60 | #include <linux/hwmon.h> |
303760b4 JD |
61 | #include <linux/hwmon-sysfs.h> |
62 | #include <linux/hwmon-vid.h> | |
943b0830 | 63 | #include <linux/err.h> |
9a61bf63 | 64 | #include <linux/mutex.h> |
87808be4 | 65 | #include <linux/sysfs.h> |
98dd22c3 JD |
66 | #include <linux/string.h> |
67 | #include <linux/dmi.h> | |
b9acb64a | 68 | #include <linux/acpi.h> |
6055fae8 | 69 | #include <linux/io.h> |
1da177e4 | 70 | |
b74f3fdd | 71 | #define DRVNAME "it87" |
1da177e4 | 72 | |
ead80803 JM |
73 | enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732, |
74 | it8771, it8772, it8781, it8782, it8783, it8786, it8790, it8603, | |
75 | it8620 }; | |
1da177e4 | 76 | |
67b671bc JD |
77 | static unsigned short force_id; |
78 | module_param(force_id, ushort, 0); | |
79 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
80 | ||
b74f3fdd | 81 | static struct platform_device *pdev; |
82 | ||
1da177e4 LT |
83 | #define REG 0x2e /* The register to read/write */ |
84 | #define DEV 0x07 /* Register: Logical device select */ | |
85 | #define VAL 0x2f /* The value to read/write */ | |
86 | #define PME 0x04 /* The device with the fan registers in it */ | |
b4da93e4 JMS |
87 | |
88 | /* The device with the IT8718F/IT8720F VID value in it */ | |
89 | #define GPIO 0x07 | |
90 | ||
1da177e4 LT |
91 | #define DEVID 0x20 /* Register: Device ID */ |
92 | #define DEVREV 0x22 /* Register: Device Revision */ | |
93 | ||
5b0380c9 | 94 | static inline int superio_inb(int reg) |
1da177e4 LT |
95 | { |
96 | outb(reg, REG); | |
97 | return inb(VAL); | |
98 | } | |
99 | ||
5b0380c9 | 100 | static inline void superio_outb(int reg, int val) |
436cad2a JD |
101 | { |
102 | outb(reg, REG); | |
103 | outb(val, VAL); | |
104 | } | |
105 | ||
1da177e4 LT |
106 | static int superio_inw(int reg) |
107 | { | |
108 | int val; | |
109 | outb(reg++, REG); | |
110 | val = inb(VAL) << 8; | |
111 | outb(reg, REG); | |
112 | val |= inb(VAL); | |
113 | return val; | |
114 | } | |
115 | ||
5b0380c9 | 116 | static inline void superio_select(int ldn) |
1da177e4 LT |
117 | { |
118 | outb(DEV, REG); | |
87673dd7 | 119 | outb(ldn, VAL); |
1da177e4 LT |
120 | } |
121 | ||
5b0380c9 | 122 | static inline int superio_enter(void) |
1da177e4 | 123 | { |
5b0380c9 NG |
124 | /* |
125 | * Try to reserve REG and REG + 1 for exclusive access. | |
126 | */ | |
127 | if (!request_muxed_region(REG, 2, DRVNAME)) | |
128 | return -EBUSY; | |
129 | ||
1da177e4 LT |
130 | outb(0x87, REG); |
131 | outb(0x01, REG); | |
132 | outb(0x55, REG); | |
133 | outb(0x55, REG); | |
5b0380c9 | 134 | return 0; |
1da177e4 LT |
135 | } |
136 | ||
5b0380c9 | 137 | static inline void superio_exit(void) |
1da177e4 LT |
138 | { |
139 | outb(0x02, REG); | |
140 | outb(0x02, VAL); | |
5b0380c9 | 141 | release_region(REG, 2); |
1da177e4 LT |
142 | } |
143 | ||
87673dd7 | 144 | /* Logical device 4 registers */ |
1da177e4 LT |
145 | #define IT8712F_DEVID 0x8712 |
146 | #define IT8705F_DEVID 0x8705 | |
17d648bf | 147 | #define IT8716F_DEVID 0x8716 |
87673dd7 | 148 | #define IT8718F_DEVID 0x8718 |
b4da93e4 | 149 | #define IT8720F_DEVID 0x8720 |
44c1bcd4 | 150 | #define IT8721F_DEVID 0x8721 |
08a8f6e9 | 151 | #define IT8726F_DEVID 0x8726 |
16b5dda2 | 152 | #define IT8728F_DEVID 0x8728 |
ead80803 | 153 | #define IT8732F_DEVID 0x8732 |
b0636707 GR |
154 | #define IT8771E_DEVID 0x8771 |
155 | #define IT8772E_DEVID 0x8772 | |
7bc32d29 | 156 | #define IT8781F_DEVID 0x8781 |
0531d98b GR |
157 | #define IT8782F_DEVID 0x8782 |
158 | #define IT8783E_DEVID 0x8783 | |
a0c1424a | 159 | #define IT8786E_DEVID 0x8786 |
4ee07157 | 160 | #define IT8790E_DEVID 0x8790 |
7183ae8c | 161 | #define IT8603E_DEVID 0x8603 |
3ba9d977 | 162 | #define IT8620E_DEVID 0x8620 |
574e9bd8 | 163 | #define IT8623E_DEVID 0x8623 |
1da177e4 LT |
164 | #define IT87_ACT_REG 0x30 |
165 | #define IT87_BASE_REG 0x60 | |
166 | ||
87673dd7 | 167 | /* Logical device 7 registers (IT8712F and later) */ |
0531d98b | 168 | #define IT87_SIO_GPIO1_REG 0x25 |
3ba9d977 | 169 | #define IT87_SIO_GPIO2_REG 0x26 |
895ff267 | 170 | #define IT87_SIO_GPIO3_REG 0x27 |
591ec650 | 171 | #define IT87_SIO_GPIO5_REG 0x29 |
0531d98b | 172 | #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */ |
87673dd7 | 173 | #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */ |
0531d98b | 174 | #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */ |
87673dd7 | 175 | #define IT87_SIO_VID_REG 0xfc /* VID value */ |
d9b327c3 | 176 | #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */ |
87673dd7 | 177 | |
1da177e4 | 178 | /* Update battery voltage after every reading if true */ |
90ab5ee9 | 179 | static bool update_vbat; |
1da177e4 LT |
180 | |
181 | /* Not all BIOSes properly configure the PWM registers */ | |
90ab5ee9 | 182 | static bool fix_pwm_polarity; |
1da177e4 | 183 | |
1da177e4 LT |
184 | /* Many IT87 constants specified below */ |
185 | ||
186 | /* Length of ISA address segment */ | |
187 | #define IT87_EXTENT 8 | |
188 | ||
87b4b663 BH |
189 | /* Length of ISA address segment for Environmental Controller */ |
190 | #define IT87_EC_EXTENT 2 | |
191 | ||
192 | /* Offset of EC registers from ISA base address */ | |
193 | #define IT87_EC_OFFSET 5 | |
194 | ||
195 | /* Where are the ISA address/data registers relative to the EC base address */ | |
196 | #define IT87_ADDR_REG_OFFSET 0 | |
197 | #define IT87_DATA_REG_OFFSET 1 | |
1da177e4 LT |
198 | |
199 | /*----- The IT87 registers -----*/ | |
200 | ||
201 | #define IT87_REG_CONFIG 0x00 | |
202 | ||
203 | #define IT87_REG_ALARM1 0x01 | |
204 | #define IT87_REG_ALARM2 0x02 | |
205 | #define IT87_REG_ALARM3 0x03 | |
206 | ||
4a0d71cf GR |
207 | /* |
208 | * The IT8718F and IT8720F have the VID value in a different register, in | |
209 | * Super-I/O configuration space. | |
210 | */ | |
1da177e4 | 211 | #define IT87_REG_VID 0x0a |
4a0d71cf GR |
212 | /* |
213 | * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b | |
214 | * for fan divisors. Later IT8712F revisions must use 16-bit tachometer | |
215 | * mode. | |
216 | */ | |
1da177e4 | 217 | #define IT87_REG_FAN_DIV 0x0b |
17d648bf | 218 | #define IT87_REG_FAN_16BIT 0x0c |
1da177e4 LT |
219 | |
220 | /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */ | |
221 | ||
fa3f70d6 GR |
222 | static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c }; |
223 | static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e }; | |
224 | static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d }; | |
225 | static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f }; | |
226 | static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 }; | |
161d898a | 227 | |
1da177e4 LT |
228 | #define IT87_REG_FAN_MAIN_CTRL 0x13 |
229 | #define IT87_REG_FAN_CTL 0x14 | |
230 | #define IT87_REG_PWM(nr) (0x15 + (nr)) | |
6229cdb2 | 231 | #define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8) |
1da177e4 LT |
232 | |
233 | #define IT87_REG_VIN(nr) (0x20 + (nr)) | |
234 | #define IT87_REG_TEMP(nr) (0x29 + (nr)) | |
235 | ||
236 | #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2) | |
237 | #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2) | |
238 | #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2) | |
239 | #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2) | |
240 | ||
1da177e4 LT |
241 | #define IT87_REG_VIN_ENABLE 0x50 |
242 | #define IT87_REG_TEMP_ENABLE 0x51 | |
4573acbc | 243 | #define IT87_REG_TEMP_EXTRA 0x55 |
d9b327c3 | 244 | #define IT87_REG_BEEP_ENABLE 0x5c |
1da177e4 LT |
245 | |
246 | #define IT87_REG_CHIPID 0x58 | |
247 | ||
4f3f51bc JD |
248 | #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i)) |
249 | #define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i)) | |
250 | ||
483db43e GR |
251 | struct it87_devices { |
252 | const char *name; | |
faf392fb | 253 | const char * const suffix; |
483db43e | 254 | u16 features; |
19529784 GR |
255 | u8 peci_mask; |
256 | u8 old_peci_mask; | |
483db43e GR |
257 | }; |
258 | ||
259 | #define FEAT_12MV_ADC (1 << 0) | |
260 | #define FEAT_NEWER_AUTOPWM (1 << 1) | |
261 | #define FEAT_OLD_AUTOPWM (1 << 2) | |
262 | #define FEAT_16BIT_FANS (1 << 3) | |
263 | #define FEAT_TEMP_OFFSET (1 << 4) | |
5d8d2f2b | 264 | #define FEAT_TEMP_PECI (1 << 5) |
19529784 | 265 | #define FEAT_TEMP_OLD_PECI (1 << 6) |
9faf28ca GR |
266 | #define FEAT_FAN16_CONFIG (1 << 7) /* Need to enable 16-bit fans */ |
267 | #define FEAT_FIVE_FANS (1 << 8) /* Supports five fans */ | |
32dd7c40 | 268 | #define FEAT_VID (1 << 9) /* Set if chip supports VID */ |
7f5726c3 | 269 | #define FEAT_IN7_INTERNAL (1 << 10) /* Set if in7 is internal */ |
fa3f70d6 | 270 | #define FEAT_SIX_FANS (1 << 11) /* Supports six fans */ |
ead80803 | 271 | #define FEAT_10_9MV_ADC (1 << 12) |
483db43e GR |
272 | |
273 | static const struct it87_devices it87_devices[] = { | |
274 | [it87] = { | |
275 | .name = "it87", | |
faf392fb | 276 | .suffix = "F", |
483db43e GR |
277 | .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */ |
278 | }, | |
279 | [it8712] = { | |
280 | .name = "it8712", | |
faf392fb | 281 | .suffix = "F", |
32dd7c40 GR |
282 | .features = FEAT_OLD_AUTOPWM | FEAT_VID, |
283 | /* may need to overwrite */ | |
483db43e GR |
284 | }, |
285 | [it8716] = { | |
286 | .name = "it8716", | |
faf392fb | 287 | .suffix = "F", |
32dd7c40 | 288 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID |
9faf28ca | 289 | | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS, |
483db43e GR |
290 | }, |
291 | [it8718] = { | |
292 | .name = "it8718", | |
faf392fb | 293 | .suffix = "F", |
32dd7c40 | 294 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID |
9faf28ca | 295 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS, |
19529784 | 296 | .old_peci_mask = 0x4, |
483db43e GR |
297 | }, |
298 | [it8720] = { | |
299 | .name = "it8720", | |
faf392fb | 300 | .suffix = "F", |
32dd7c40 | 301 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID |
9faf28ca | 302 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS, |
19529784 | 303 | .old_peci_mask = 0x4, |
483db43e GR |
304 | }, |
305 | [it8721] = { | |
306 | .name = "it8721", | |
faf392fb | 307 | .suffix = "F", |
483db43e | 308 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
9faf28ca | 309 | | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI |
7f5726c3 | 310 | | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL, |
5d8d2f2b | 311 | .peci_mask = 0x05, |
19529784 | 312 | .old_peci_mask = 0x02, /* Actually reports PCH */ |
483db43e GR |
313 | }, |
314 | [it8728] = { | |
315 | .name = "it8728", | |
faf392fb | 316 | .suffix = "F", |
483db43e | 317 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 GR |
318 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS |
319 | | FEAT_IN7_INTERNAL, | |
5d8d2f2b | 320 | .peci_mask = 0x07, |
483db43e | 321 | }, |
ead80803 JM |
322 | [it8732] = { |
323 | .name = "it8732", | |
324 | .suffix = "F", | |
325 | .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS | |
326 | | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | |
327 | | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL, | |
328 | .peci_mask = 0x07, | |
329 | .old_peci_mask = 0x02, /* Actually reports PCH */ | |
330 | }, | |
b0636707 GR |
331 | [it8771] = { |
332 | .name = "it8771", | |
faf392fb | 333 | .suffix = "E", |
b0636707 | 334 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 | 335 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, |
9faf28ca GR |
336 | /* PECI: guesswork */ |
337 | /* 12mV ADC (OHM) */ | |
338 | /* 16 bit fans (OHM) */ | |
339 | /* three fans, always 16 bit (guesswork) */ | |
b0636707 GR |
340 | .peci_mask = 0x07, |
341 | }, | |
342 | [it8772] = { | |
343 | .name = "it8772", | |
faf392fb | 344 | .suffix = "E", |
b0636707 | 345 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 | 346 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, |
9faf28ca GR |
347 | /* PECI (coreboot) */ |
348 | /* 12mV ADC (HWSensors4, OHM) */ | |
349 | /* 16 bit fans (HWSensors4, OHM) */ | |
350 | /* three fans, always 16 bit (datasheet) */ | |
b0636707 GR |
351 | .peci_mask = 0x07, |
352 | }, | |
7bc32d29 GR |
353 | [it8781] = { |
354 | .name = "it8781", | |
faf392fb | 355 | .suffix = "F", |
7bc32d29 | 356 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
9faf28ca | 357 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG, |
7bc32d29 GR |
358 | .old_peci_mask = 0x4, |
359 | }, | |
483db43e GR |
360 | [it8782] = { |
361 | .name = "it8782", | |
faf392fb | 362 | .suffix = "F", |
19529784 | 363 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
9faf28ca | 364 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG, |
19529784 | 365 | .old_peci_mask = 0x4, |
483db43e GR |
366 | }, |
367 | [it8783] = { | |
368 | .name = "it8783", | |
faf392fb | 369 | .suffix = "E/F", |
19529784 | 370 | .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET |
9faf28ca | 371 | | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG, |
19529784 | 372 | .old_peci_mask = 0x4, |
483db43e | 373 | }, |
a0c1424a TL |
374 | [it8786] = { |
375 | .name = "it8786", | |
faf392fb | 376 | .suffix = "E", |
a0c1424a | 377 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 | 378 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, |
a0c1424a TL |
379 | .peci_mask = 0x07, |
380 | }, | |
4ee07157 GR |
381 | [it8790] = { |
382 | .name = "it8790", | |
383 | .suffix = "E", | |
384 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
385 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, | |
386 | .peci_mask = 0x07, | |
387 | }, | |
c145d5c6 RM |
388 | [it8603] = { |
389 | .name = "it8603", | |
faf392fb | 390 | .suffix = "E", |
c145d5c6 | 391 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS |
7f5726c3 | 392 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, |
c145d5c6 RM |
393 | .peci_mask = 0x07, |
394 | }, | |
3ba9d977 GR |
395 | [it8620] = { |
396 | .name = "it8620", | |
397 | .suffix = "E", | |
398 | .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | |
fa3f70d6 | 399 | | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS |
3ba9d977 GR |
400 | | FEAT_IN7_INTERNAL, |
401 | .peci_mask = 0x07, | |
402 | }, | |
483db43e GR |
403 | }; |
404 | ||
405 | #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS) | |
406 | #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC) | |
ead80803 | 407 | #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC) |
483db43e GR |
408 | #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM) |
409 | #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM) | |
410 | #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET) | |
5d8d2f2b GR |
411 | #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \ |
412 | ((data)->peci_mask & (1 << nr))) | |
19529784 GR |
413 | #define has_temp_old_peci(data, nr) \ |
414 | (((data)->features & FEAT_TEMP_OLD_PECI) && \ | |
415 | ((data)->old_peci_mask & (1 << nr))) | |
9faf28ca | 416 | #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG) |
fa3f70d6 GR |
417 | #define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \ |
418 | FEAT_SIX_FANS)) | |
32dd7c40 | 419 | #define has_vid(data) ((data)->features & FEAT_VID) |
7f5726c3 | 420 | #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL) |
fa3f70d6 | 421 | #define has_six_fans(data) ((data)->features & FEAT_SIX_FANS) |
1da177e4 | 422 | |
b74f3fdd | 423 | struct it87_sio_data { |
424 | enum chips type; | |
425 | /* Values read from Super-I/O config space */ | |
0475169c | 426 | u8 revision; |
b74f3fdd | 427 | u8 vid_value; |
d9b327c3 | 428 | u8 beep_pin; |
738e5e05 | 429 | u8 internal; /* Internal sensors can be labeled */ |
591ec650 | 430 | /* Features skipped based on config or DMI */ |
9172b5d1 | 431 | u16 skip_in; |
895ff267 | 432 | u8 skip_vid; |
591ec650 | 433 | u8 skip_fan; |
98dd22c3 | 434 | u8 skip_pwm; |
4573acbc | 435 | u8 skip_temp; |
b74f3fdd | 436 | }; |
437 | ||
4a0d71cf GR |
438 | /* |
439 | * For each registered chip, we need to keep some data in memory. | |
440 | * The structure is dynamically allocated. | |
441 | */ | |
1da177e4 | 442 | struct it87_data { |
1beeffe4 | 443 | struct device *hwmon_dev; |
1da177e4 | 444 | enum chips type; |
483db43e | 445 | u16 features; |
19529784 GR |
446 | u8 peci_mask; |
447 | u8 old_peci_mask; | |
1da177e4 | 448 | |
b74f3fdd | 449 | unsigned short addr; |
450 | const char *name; | |
9a61bf63 | 451 | struct mutex update_lock; |
1da177e4 LT |
452 | char valid; /* !=0 if following fields are valid */ |
453 | unsigned long last_updated; /* In jiffies */ | |
454 | ||
44c1bcd4 | 455 | u16 in_scaled; /* Internal voltage sensors are scaled */ |
c145d5c6 | 456 | u8 in[10][3]; /* [nr][0]=in, [1]=min, [2]=max */ |
9060f8bd | 457 | u8 has_fan; /* Bitfield, fans enabled */ |
fa3f70d6 | 458 | u16 fan[6][2]; /* Register values, [nr][0]=fan, [1]=min */ |
4573acbc | 459 | u8 has_temp; /* Bitfield, temp sensors enabled */ |
161d898a | 460 | s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */ |
19529784 GR |
461 | u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */ |
462 | u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */ | |
1da177e4 LT |
463 | u8 fan_div[3]; /* Register encoding, shifted right */ |
464 | u8 vid; /* Register encoding, combined */ | |
a7be58a1 | 465 | u8 vrm; |
1da177e4 | 466 | u32 alarms; /* Register encoding, combined */ |
d9b327c3 | 467 | u8 beeps; /* Register encoding */ |
1da177e4 | 468 | u8 fan_main_ctrl; /* Register value */ |
f8d0c19a | 469 | u8 fan_ctl; /* Register value */ |
b99883dc | 470 | |
4a0d71cf GR |
471 | /* |
472 | * The following 3 arrays correspond to the same registers up to | |
6229cdb2 JD |
473 | * the IT8720F. The meaning of bits 6-0 depends on the value of bit |
474 | * 7, and we want to preserve settings on mode changes, so we have | |
475 | * to track all values separately. | |
476 | * Starting with the IT8721F, the manual PWM duty cycles are stored | |
477 | * in separate registers (8-bit values), so the separate tracking | |
478 | * is no longer needed, but it is still done to keep the driver | |
4a0d71cf GR |
479 | * simple. |
480 | */ | |
b99883dc | 481 | u8 pwm_ctrl[3]; /* Register value */ |
6229cdb2 | 482 | u8 pwm_duty[3]; /* Manual PWM value set by user */ |
b99883dc | 483 | u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */ |
4f3f51bc JD |
484 | |
485 | /* Automatic fan speed control registers */ | |
486 | u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */ | |
487 | s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */ | |
1da177e4 | 488 | }; |
0df6454d | 489 | |
0531d98b | 490 | static int adc_lsb(const struct it87_data *data, int nr) |
44c1bcd4 | 491 | { |
ead80803 JM |
492 | int lsb; |
493 | ||
494 | if (has_12mv_adc(data)) | |
495 | lsb = 120; | |
496 | else if (has_10_9mv_adc(data)) | |
497 | lsb = 109; | |
498 | else | |
499 | lsb = 160; | |
0531d98b GR |
500 | if (data->in_scaled & (1 << nr)) |
501 | lsb <<= 1; | |
502 | return lsb; | |
503 | } | |
44c1bcd4 | 504 | |
0531d98b GR |
505 | static u8 in_to_reg(const struct it87_data *data, int nr, long val) |
506 | { | |
ead80803 | 507 | val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr)); |
2a844c14 | 508 | return clamp_val(val, 0, 255); |
44c1bcd4 JD |
509 | } |
510 | ||
511 | static int in_from_reg(const struct it87_data *data, int nr, int val) | |
512 | { | |
ead80803 | 513 | return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10); |
44c1bcd4 | 514 | } |
0df6454d JD |
515 | |
516 | static inline u8 FAN_TO_REG(long rpm, int div) | |
517 | { | |
518 | if (rpm == 0) | |
519 | return 255; | |
2a844c14 GR |
520 | rpm = clamp_val(rpm, 1, 1000000); |
521 | return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
0df6454d JD |
522 | } |
523 | ||
524 | static inline u16 FAN16_TO_REG(long rpm) | |
525 | { | |
526 | if (rpm == 0) | |
527 | return 0xffff; | |
2a844c14 | 528 | return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe); |
0df6454d JD |
529 | } |
530 | ||
531 | #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \ | |
532 | 1350000 / ((val) * (div))) | |
533 | /* The divider is fixed to 2 in 16-bit mode */ | |
534 | #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \ | |
535 | 1350000 / ((val) * 2)) | |
536 | ||
2a844c14 GR |
537 | #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \ |
538 | ((val) + 500) / 1000), -128, 127)) | |
0df6454d JD |
539 | #define TEMP_FROM_REG(val) ((val) * 1000) |
540 | ||
44c1bcd4 JD |
541 | static u8 pwm_to_reg(const struct it87_data *data, long val) |
542 | { | |
16b5dda2 | 543 | if (has_newer_autopwm(data)) |
44c1bcd4 JD |
544 | return val; |
545 | else | |
546 | return val >> 1; | |
547 | } | |
548 | ||
549 | static int pwm_from_reg(const struct it87_data *data, u8 reg) | |
550 | { | |
16b5dda2 | 551 | if (has_newer_autopwm(data)) |
44c1bcd4 JD |
552 | return reg; |
553 | else | |
554 | return (reg & 0x7f) << 1; | |
555 | } | |
556 | ||
0df6454d JD |
557 | |
558 | static int DIV_TO_REG(int val) | |
559 | { | |
560 | int answer = 0; | |
561 | while (answer < 7 && (val >>= 1)) | |
562 | answer++; | |
563 | return answer; | |
564 | } | |
565 | #define DIV_FROM_REG(val) (1 << (val)) | |
566 | ||
f56c9c0a GR |
567 | /* |
568 | * PWM base frequencies. The frequency has to be divided by either 128 or 256, | |
569 | * depending on the chip type, to calculate the actual PWM frequency. | |
570 | * | |
571 | * Some of the chip datasheets suggest a base frequency of 51 kHz instead | |
572 | * of 750 kHz for the slowest base frequency, resulting in a PWM frequency | |
573 | * of 200 Hz. Sometimes both PWM frequency select registers are affected, | |
574 | * sometimes just one. It is unknown if this is a datasheet error or real, | |
575 | * so this is ignored for now. | |
576 | */ | |
0df6454d | 577 | static const unsigned int pwm_freq[8] = { |
f56c9c0a GR |
578 | 48000000, |
579 | 24000000, | |
580 | 12000000, | |
581 | 8000000, | |
582 | 6000000, | |
583 | 3000000, | |
584 | 1500000, | |
585 | 750000, | |
0df6454d | 586 | }; |
1da177e4 | 587 | |
b74f3fdd | 588 | static int it87_probe(struct platform_device *pdev); |
281dfd0b | 589 | static int it87_remove(struct platform_device *pdev); |
1da177e4 | 590 | |
b74f3fdd | 591 | static int it87_read_value(struct it87_data *data, u8 reg); |
592 | static void it87_write_value(struct it87_data *data, u8 reg, u8 value); | |
1da177e4 | 593 | static struct it87_data *it87_update_device(struct device *dev); |
b74f3fdd | 594 | static int it87_check_pwm(struct device *dev); |
595 | static void it87_init_device(struct platform_device *pdev); | |
1da177e4 LT |
596 | |
597 | ||
b74f3fdd | 598 | static struct platform_driver it87_driver = { |
cdaf7934 | 599 | .driver = { |
b74f3fdd | 600 | .name = DRVNAME, |
cdaf7934 | 601 | }, |
b74f3fdd | 602 | .probe = it87_probe, |
9e5e9b7a | 603 | .remove = it87_remove, |
fde09509 JD |
604 | }; |
605 | ||
20ad93d4 | 606 | static ssize_t show_in(struct device *dev, struct device_attribute *attr, |
929c6a56 | 607 | char *buf) |
1da177e4 | 608 | { |
929c6a56 GR |
609 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
610 | int nr = sattr->nr; | |
611 | int index = sattr->index; | |
20ad93d4 | 612 | |
1da177e4 | 613 | struct it87_data *data = it87_update_device(dev); |
929c6a56 | 614 | return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index])); |
1da177e4 LT |
615 | } |
616 | ||
929c6a56 GR |
617 | static ssize_t set_in(struct device *dev, struct device_attribute *attr, |
618 | const char *buf, size_t count) | |
1da177e4 | 619 | { |
929c6a56 GR |
620 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
621 | int nr = sattr->nr; | |
622 | int index = sattr->index; | |
20ad93d4 | 623 | |
b74f3fdd | 624 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 JD |
625 | unsigned long val; |
626 | ||
179c4fdb | 627 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 628 | return -EINVAL; |
1da177e4 | 629 | |
9a61bf63 | 630 | mutex_lock(&data->update_lock); |
929c6a56 GR |
631 | data->in[nr][index] = in_to_reg(data, nr, val); |
632 | it87_write_value(data, | |
633 | index == 1 ? IT87_REG_VIN_MIN(nr) | |
634 | : IT87_REG_VIN_MAX(nr), | |
635 | data->in[nr][index]); | |
9a61bf63 | 636 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
637 | return count; |
638 | } | |
20ad93d4 | 639 | |
929c6a56 GR |
640 | static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0); |
641 | static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
642 | 0, 1); | |
643 | static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
644 | 0, 2); | |
f5f64501 | 645 | |
929c6a56 GR |
646 | static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0); |
647 | static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
648 | 1, 1); | |
649 | static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
650 | 1, 2); | |
1da177e4 | 651 | |
929c6a56 GR |
652 | static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0); |
653 | static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
654 | 2, 1); | |
655 | static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
656 | 2, 2); | |
1da177e4 | 657 | |
929c6a56 GR |
658 | static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0); |
659 | static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
660 | 3, 1); | |
661 | static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
662 | 3, 2); | |
663 | ||
664 | static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0); | |
665 | static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
666 | 4, 1); | |
667 | static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
668 | 4, 2); | |
669 | ||
670 | static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0); | |
671 | static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
672 | 5, 1); | |
673 | static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
674 | 5, 2); | |
675 | ||
676 | static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0); | |
677 | static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
678 | 6, 1); | |
679 | static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
680 | 6, 2); | |
681 | ||
682 | static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0); | |
683 | static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in, | |
684 | 7, 1); | |
685 | static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in, | |
686 | 7, 2); | |
687 | ||
688 | static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0); | |
c145d5c6 | 689 | static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0); |
1da177e4 LT |
690 | |
691 | /* 3 temperatures */ | |
20ad93d4 | 692 | static ssize_t show_temp(struct device *dev, struct device_attribute *attr, |
60ca385a | 693 | char *buf) |
1da177e4 | 694 | { |
60ca385a GR |
695 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
696 | int nr = sattr->nr; | |
697 | int index = sattr->index; | |
1da177e4 | 698 | struct it87_data *data = it87_update_device(dev); |
20ad93d4 | 699 | |
60ca385a | 700 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index])); |
1da177e4 | 701 | } |
20ad93d4 | 702 | |
60ca385a GR |
703 | static ssize_t set_temp(struct device *dev, struct device_attribute *attr, |
704 | const char *buf, size_t count) | |
1da177e4 | 705 | { |
60ca385a GR |
706 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
707 | int nr = sattr->nr; | |
708 | int index = sattr->index; | |
b74f3fdd | 709 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 710 | long val; |
161d898a | 711 | u8 reg, regval; |
f5f64501 | 712 | |
179c4fdb | 713 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 | 714 | return -EINVAL; |
1da177e4 | 715 | |
9a61bf63 | 716 | mutex_lock(&data->update_lock); |
161d898a GR |
717 | |
718 | switch (index) { | |
719 | default: | |
720 | case 1: | |
721 | reg = IT87_REG_TEMP_LOW(nr); | |
722 | break; | |
723 | case 2: | |
724 | reg = IT87_REG_TEMP_HIGH(nr); | |
725 | break; | |
726 | case 3: | |
727 | regval = it87_read_value(data, IT87_REG_BEEP_ENABLE); | |
728 | if (!(regval & 0x80)) { | |
729 | regval |= 0x80; | |
730 | it87_write_value(data, IT87_REG_BEEP_ENABLE, regval); | |
731 | } | |
732 | data->valid = 0; | |
733 | reg = IT87_REG_TEMP_OFFSET[nr]; | |
734 | break; | |
735 | } | |
736 | ||
60ca385a | 737 | data->temp[nr][index] = TEMP_TO_REG(val); |
161d898a | 738 | it87_write_value(data, reg, data->temp[nr][index]); |
9a61bf63 | 739 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
740 | return count; |
741 | } | |
1da177e4 | 742 | |
60ca385a GR |
743 | static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0); |
744 | static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
745 | 0, 1); | |
746 | static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
747 | 0, 2); | |
161d898a GR |
748 | static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp, |
749 | set_temp, 0, 3); | |
60ca385a GR |
750 | static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0); |
751 | static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
752 | 1, 1); | |
753 | static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
754 | 1, 2); | |
161d898a GR |
755 | static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp, |
756 | set_temp, 1, 3); | |
60ca385a GR |
757 | static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0); |
758 | static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
759 | 2, 1); | |
760 | static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp, | |
761 | 2, 2); | |
161d898a GR |
762 | static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp, |
763 | set_temp, 2, 3); | |
1da177e4 | 764 | |
2cece01f GR |
765 | static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr, |
766 | char *buf) | |
1da177e4 | 767 | { |
20ad93d4 JD |
768 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
769 | int nr = sensor_attr->index; | |
1da177e4 | 770 | struct it87_data *data = it87_update_device(dev); |
4a0d71cf | 771 | u8 reg = data->sensor; /* In case value is updated while used */ |
19529784 | 772 | u8 extra = data->extra; |
5f2dc798 | 773 | |
19529784 GR |
774 | if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) |
775 | || (has_temp_old_peci(data, nr) && (extra & 0x80))) | |
5d8d2f2b | 776 | return sprintf(buf, "6\n"); /* Intel PECI */ |
1da177e4 LT |
777 | if (reg & (1 << nr)) |
778 | return sprintf(buf, "3\n"); /* thermal diode */ | |
779 | if (reg & (8 << nr)) | |
4ed10779 | 780 | return sprintf(buf, "4\n"); /* thermistor */ |
1da177e4 LT |
781 | return sprintf(buf, "0\n"); /* disabled */ |
782 | } | |
2cece01f GR |
783 | |
784 | static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr, | |
785 | const char *buf, size_t count) | |
1da177e4 | 786 | { |
20ad93d4 JD |
787 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
788 | int nr = sensor_attr->index; | |
789 | ||
b74f3fdd | 790 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 791 | long val; |
19529784 | 792 | u8 reg, extra; |
f5f64501 | 793 | |
179c4fdb | 794 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 | 795 | return -EINVAL; |
1da177e4 | 796 | |
8acf07c5 JD |
797 | reg = it87_read_value(data, IT87_REG_TEMP_ENABLE); |
798 | reg &= ~(1 << nr); | |
799 | reg &= ~(8 << nr); | |
5d8d2f2b GR |
800 | if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6)) |
801 | reg &= 0x3f; | |
19529784 GR |
802 | extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); |
803 | if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6)) | |
804 | extra &= 0x7f; | |
4ed10779 | 805 | if (val == 2) { /* backwards compatibility */ |
1d9bcf6a GR |
806 | dev_warn(dev, |
807 | "Sensor type 2 is deprecated, please use 4 instead\n"); | |
4ed10779 JD |
808 | val = 4; |
809 | } | |
5d8d2f2b | 810 | /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */ |
1da177e4 | 811 | if (val == 3) |
8acf07c5 | 812 | reg |= 1 << nr; |
4ed10779 | 813 | else if (val == 4) |
8acf07c5 | 814 | reg |= 8 << nr; |
5d8d2f2b GR |
815 | else if (has_temp_peci(data, nr) && val == 6) |
816 | reg |= (nr + 1) << 6; | |
19529784 GR |
817 | else if (has_temp_old_peci(data, nr) && val == 6) |
818 | extra |= 0x80; | |
8acf07c5 | 819 | else if (val != 0) |
1da177e4 | 820 | return -EINVAL; |
8acf07c5 JD |
821 | |
822 | mutex_lock(&data->update_lock); | |
823 | data->sensor = reg; | |
19529784 | 824 | data->extra = extra; |
b74f3fdd | 825 | it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor); |
19529784 GR |
826 | if (has_temp_old_peci(data, nr)) |
827 | it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra); | |
2b3d1d87 | 828 | data->valid = 0; /* Force cache refresh */ |
9a61bf63 | 829 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
830 | return count; |
831 | } | |
1da177e4 | 832 | |
2cece01f GR |
833 | static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type, |
834 | set_temp_type, 0); | |
835 | static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type, | |
836 | set_temp_type, 1); | |
837 | static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type, | |
838 | set_temp_type, 2); | |
1da177e4 LT |
839 | |
840 | /* 3 Fans */ | |
b99883dc JD |
841 | |
842 | static int pwm_mode(const struct it87_data *data, int nr) | |
843 | { | |
844 | int ctrl = data->fan_main_ctrl & (1 << nr); | |
845 | ||
c145d5c6 | 846 | if (ctrl == 0 && data->type != it8603) /* Full speed */ |
b99883dc JD |
847 | return 0; |
848 | if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ | |
849 | return 2; | |
850 | else /* Manual mode */ | |
851 | return 1; | |
852 | } | |
853 | ||
20ad93d4 | 854 | static ssize_t show_fan(struct device *dev, struct device_attribute *attr, |
e1169ba0 | 855 | char *buf) |
1da177e4 | 856 | { |
e1169ba0 GR |
857 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
858 | int nr = sattr->nr; | |
859 | int index = sattr->index; | |
860 | int speed; | |
1da177e4 | 861 | struct it87_data *data = it87_update_device(dev); |
20ad93d4 | 862 | |
e1169ba0 GR |
863 | speed = has_16bit_fans(data) ? |
864 | FAN16_FROM_REG(data->fan[nr][index]) : | |
865 | FAN_FROM_REG(data->fan[nr][index], | |
866 | DIV_FROM_REG(data->fan_div[nr])); | |
867 | return sprintf(buf, "%d\n", speed); | |
1da177e4 | 868 | } |
e1169ba0 | 869 | |
20ad93d4 JD |
870 | static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr, |
871 | char *buf) | |
1da177e4 | 872 | { |
20ad93d4 JD |
873 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
874 | int nr = sensor_attr->index; | |
875 | ||
1da177e4 LT |
876 | struct it87_data *data = it87_update_device(dev); |
877 | return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr])); | |
878 | } | |
5f2dc798 JD |
879 | static ssize_t show_pwm_enable(struct device *dev, |
880 | struct device_attribute *attr, char *buf) | |
1da177e4 | 881 | { |
20ad93d4 JD |
882 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
883 | int nr = sensor_attr->index; | |
884 | ||
1da177e4 | 885 | struct it87_data *data = it87_update_device(dev); |
b99883dc | 886 | return sprintf(buf, "%d\n", pwm_mode(data, nr)); |
1da177e4 | 887 | } |
20ad93d4 JD |
888 | static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, |
889 | char *buf) | |
1da177e4 | 890 | { |
20ad93d4 JD |
891 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
892 | int nr = sensor_attr->index; | |
893 | ||
1da177e4 | 894 | struct it87_data *data = it87_update_device(dev); |
44c1bcd4 JD |
895 | return sprintf(buf, "%d\n", |
896 | pwm_from_reg(data, data->pwm_duty[nr])); | |
1da177e4 | 897 | } |
f8d0c19a JD |
898 | static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr, |
899 | char *buf) | |
900 | { | |
901 | struct it87_data *data = it87_update_device(dev); | |
902 | int index = (data->fan_ctl >> 4) & 0x07; | |
f56c9c0a | 903 | unsigned int freq; |
f8d0c19a | 904 | |
f56c9c0a GR |
905 | freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128); |
906 | ||
907 | return sprintf(buf, "%u\n", freq); | |
f8d0c19a | 908 | } |
e1169ba0 GR |
909 | |
910 | static ssize_t set_fan(struct device *dev, struct device_attribute *attr, | |
911 | const char *buf, size_t count) | |
1da177e4 | 912 | { |
e1169ba0 GR |
913 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
914 | int nr = sattr->nr; | |
915 | int index = sattr->index; | |
20ad93d4 | 916 | |
b74f3fdd | 917 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 918 | long val; |
7f999aa7 | 919 | u8 reg; |
1da177e4 | 920 | |
179c4fdb | 921 | if (kstrtol(buf, 10, &val) < 0) |
f5f64501 JD |
922 | return -EINVAL; |
923 | ||
9a61bf63 | 924 | mutex_lock(&data->update_lock); |
e1169ba0 GR |
925 | |
926 | if (has_16bit_fans(data)) { | |
927 | data->fan[nr][index] = FAN16_TO_REG(val); | |
928 | it87_write_value(data, IT87_REG_FAN_MIN[nr], | |
929 | data->fan[nr][index] & 0xff); | |
930 | it87_write_value(data, IT87_REG_FANX_MIN[nr], | |
931 | data->fan[nr][index] >> 8); | |
932 | } else { | |
933 | reg = it87_read_value(data, IT87_REG_FAN_DIV); | |
934 | switch (nr) { | |
935 | case 0: | |
936 | data->fan_div[nr] = reg & 0x07; | |
937 | break; | |
938 | case 1: | |
939 | data->fan_div[nr] = (reg >> 3) & 0x07; | |
940 | break; | |
941 | case 2: | |
942 | data->fan_div[nr] = (reg & 0x40) ? 3 : 1; | |
943 | break; | |
944 | } | |
945 | data->fan[nr][index] = | |
946 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); | |
947 | it87_write_value(data, IT87_REG_FAN_MIN[nr], | |
948 | data->fan[nr][index]); | |
07eab46d JD |
949 | } |
950 | ||
9a61bf63 | 951 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
952 | return count; |
953 | } | |
e1169ba0 | 954 | |
20ad93d4 JD |
955 | static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr, |
956 | const char *buf, size_t count) | |
1da177e4 | 957 | { |
20ad93d4 JD |
958 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
959 | int nr = sensor_attr->index; | |
960 | ||
b74f3fdd | 961 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 962 | unsigned long val; |
8ab4ec3e | 963 | int min; |
1da177e4 LT |
964 | u8 old; |
965 | ||
179c4fdb | 966 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 JD |
967 | return -EINVAL; |
968 | ||
9a61bf63 | 969 | mutex_lock(&data->update_lock); |
b74f3fdd | 970 | old = it87_read_value(data, IT87_REG_FAN_DIV); |
1da177e4 | 971 | |
8ab4ec3e | 972 | /* Save fan min limit */ |
e1169ba0 | 973 | min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr])); |
1da177e4 LT |
974 | |
975 | switch (nr) { | |
976 | case 0: | |
977 | case 1: | |
978 | data->fan_div[nr] = DIV_TO_REG(val); | |
979 | break; | |
980 | case 2: | |
981 | if (val < 8) | |
982 | data->fan_div[nr] = 1; | |
983 | else | |
984 | data->fan_div[nr] = 3; | |
985 | } | |
986 | val = old & 0x80; | |
987 | val |= (data->fan_div[0] & 0x07); | |
988 | val |= (data->fan_div[1] & 0x07) << 3; | |
989 | if (data->fan_div[2] == 3) | |
990 | val |= 0x1 << 6; | |
b74f3fdd | 991 | it87_write_value(data, IT87_REG_FAN_DIV, val); |
1da177e4 | 992 | |
8ab4ec3e | 993 | /* Restore fan min limit */ |
e1169ba0 GR |
994 | data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); |
995 | it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]); | |
8ab4ec3e | 996 | |
9a61bf63 | 997 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
998 | return count; |
999 | } | |
cccfc9c4 JD |
1000 | |
1001 | /* Returns 0 if OK, -EINVAL otherwise */ | |
1002 | static int check_trip_points(struct device *dev, int nr) | |
1003 | { | |
1004 | const struct it87_data *data = dev_get_drvdata(dev); | |
1005 | int i, err = 0; | |
1006 | ||
1007 | if (has_old_autopwm(data)) { | |
1008 | for (i = 0; i < 3; i++) { | |
1009 | if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) | |
1010 | err = -EINVAL; | |
1011 | } | |
1012 | for (i = 0; i < 2; i++) { | |
1013 | if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) | |
1014 | err = -EINVAL; | |
1015 | } | |
1016 | } | |
1017 | ||
1018 | if (err) { | |
1d9bcf6a GR |
1019 | dev_err(dev, |
1020 | "Inconsistent trip points, not switching to automatic mode\n"); | |
cccfc9c4 JD |
1021 | dev_err(dev, "Adjust the trip points and try again\n"); |
1022 | } | |
1023 | return err; | |
1024 | } | |
1025 | ||
20ad93d4 JD |
1026 | static ssize_t set_pwm_enable(struct device *dev, |
1027 | struct device_attribute *attr, const char *buf, size_t count) | |
1da177e4 | 1028 | { |
20ad93d4 JD |
1029 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
1030 | int nr = sensor_attr->index; | |
1031 | ||
b74f3fdd | 1032 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 1033 | long val; |
1da177e4 | 1034 | |
179c4fdb | 1035 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2) |
b99883dc JD |
1036 | return -EINVAL; |
1037 | ||
cccfc9c4 JD |
1038 | /* Check trip points before switching to automatic mode */ |
1039 | if (val == 2) { | |
1040 | if (check_trip_points(dev, nr) < 0) | |
1041 | return -EINVAL; | |
1042 | } | |
1043 | ||
c145d5c6 RM |
1044 | /* IT8603E does not have on/off mode */ |
1045 | if (val == 0 && data->type == it8603) | |
1046 | return -EINVAL; | |
1047 | ||
9a61bf63 | 1048 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1049 | |
1050 | if (val == 0) { | |
1051 | int tmp; | |
1052 | /* make sure the fan is on when in on/off mode */ | |
b74f3fdd | 1053 | tmp = it87_read_value(data, IT87_REG_FAN_CTL); |
1054 | it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr)); | |
1da177e4 LT |
1055 | /* set on/off mode */ |
1056 | data->fan_main_ctrl &= ~(1 << nr); | |
5f2dc798 JD |
1057 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, |
1058 | data->fan_main_ctrl); | |
b99883dc JD |
1059 | } else { |
1060 | if (val == 1) /* Manual mode */ | |
16b5dda2 | 1061 | data->pwm_ctrl[nr] = has_newer_autopwm(data) ? |
6229cdb2 JD |
1062 | data->pwm_temp_map[nr] : |
1063 | data->pwm_duty[nr]; | |
b99883dc JD |
1064 | else /* Automatic mode */ |
1065 | data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; | |
1066 | it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); | |
c145d5c6 RM |
1067 | |
1068 | if (data->type != it8603) { | |
1069 | /* set SmartGuardian mode */ | |
1070 | data->fan_main_ctrl |= (1 << nr); | |
1071 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, | |
1072 | data->fan_main_ctrl); | |
1073 | } | |
1da177e4 LT |
1074 | } |
1075 | ||
9a61bf63 | 1076 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1077 | return count; |
1078 | } | |
20ad93d4 JD |
1079 | static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, |
1080 | const char *buf, size_t count) | |
1da177e4 | 1081 | { |
20ad93d4 JD |
1082 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
1083 | int nr = sensor_attr->index; | |
1084 | ||
b74f3fdd | 1085 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 1086 | long val; |
1da177e4 | 1087 | |
179c4fdb | 1088 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) |
1da177e4 LT |
1089 | return -EINVAL; |
1090 | ||
9a61bf63 | 1091 | mutex_lock(&data->update_lock); |
16b5dda2 | 1092 | if (has_newer_autopwm(data)) { |
4a0d71cf GR |
1093 | /* |
1094 | * If we are in automatic mode, the PWM duty cycle register | |
1095 | * is read-only so we can't write the value. | |
1096 | */ | |
6229cdb2 JD |
1097 | if (data->pwm_ctrl[nr] & 0x80) { |
1098 | mutex_unlock(&data->update_lock); | |
1099 | return -EBUSY; | |
1100 | } | |
1101 | data->pwm_duty[nr] = pwm_to_reg(data, val); | |
1102 | it87_write_value(data, IT87_REG_PWM_DUTY(nr), | |
1103 | data->pwm_duty[nr]); | |
1104 | } else { | |
1105 | data->pwm_duty[nr] = pwm_to_reg(data, val); | |
4a0d71cf GR |
1106 | /* |
1107 | * If we are in manual mode, write the duty cycle immediately; | |
1108 | * otherwise, just store it for later use. | |
1109 | */ | |
6229cdb2 JD |
1110 | if (!(data->pwm_ctrl[nr] & 0x80)) { |
1111 | data->pwm_ctrl[nr] = data->pwm_duty[nr]; | |
1112 | it87_write_value(data, IT87_REG_PWM(nr), | |
1113 | data->pwm_ctrl[nr]); | |
1114 | } | |
b99883dc | 1115 | } |
9a61bf63 | 1116 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1117 | return count; |
1118 | } | |
f8d0c19a JD |
1119 | static ssize_t set_pwm_freq(struct device *dev, |
1120 | struct device_attribute *attr, const char *buf, size_t count) | |
1121 | { | |
b74f3fdd | 1122 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 | 1123 | unsigned long val; |
f8d0c19a JD |
1124 | int i; |
1125 | ||
179c4fdb | 1126 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 1127 | return -EINVAL; |
f56c9c0a GR |
1128 | |
1129 | val = clamp_val(val, 0, 1000000); | |
1130 | val *= has_newer_autopwm(data) ? 256 : 128; | |
f5f64501 | 1131 | |
f8d0c19a JD |
1132 | /* Search for the nearest available frequency */ |
1133 | for (i = 0; i < 7; i++) { | |
1134 | if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2) | |
1135 | break; | |
1136 | } | |
1137 | ||
1138 | mutex_lock(&data->update_lock); | |
b74f3fdd | 1139 | data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f; |
f8d0c19a | 1140 | data->fan_ctl |= i << 4; |
b74f3fdd | 1141 | it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl); |
f8d0c19a JD |
1142 | mutex_unlock(&data->update_lock); |
1143 | ||
1144 | return count; | |
1145 | } | |
94ac7ee6 JD |
1146 | static ssize_t show_pwm_temp_map(struct device *dev, |
1147 | struct device_attribute *attr, char *buf) | |
1148 | { | |
1149 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
1150 | int nr = sensor_attr->index; | |
1151 | ||
1152 | struct it87_data *data = it87_update_device(dev); | |
1153 | int map; | |
1154 | ||
1155 | if (data->pwm_temp_map[nr] < 3) | |
1156 | map = 1 << data->pwm_temp_map[nr]; | |
1157 | else | |
1158 | map = 0; /* Should never happen */ | |
1159 | return sprintf(buf, "%d\n", map); | |
1160 | } | |
1161 | static ssize_t set_pwm_temp_map(struct device *dev, | |
1162 | struct device_attribute *attr, const char *buf, size_t count) | |
1163 | { | |
1164 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
1165 | int nr = sensor_attr->index; | |
1166 | ||
1167 | struct it87_data *data = dev_get_drvdata(dev); | |
1168 | long val; | |
1169 | u8 reg; | |
1170 | ||
4a0d71cf GR |
1171 | /* |
1172 | * This check can go away if we ever support automatic fan speed | |
1173 | * control on newer chips. | |
1174 | */ | |
4f3f51bc JD |
1175 | if (!has_old_autopwm(data)) { |
1176 | dev_notice(dev, "Mapping change disabled for safety reasons\n"); | |
1177 | return -EINVAL; | |
1178 | } | |
1179 | ||
179c4fdb | 1180 | if (kstrtol(buf, 10, &val) < 0) |
94ac7ee6 JD |
1181 | return -EINVAL; |
1182 | ||
1183 | switch (val) { | |
1184 | case (1 << 0): | |
1185 | reg = 0x00; | |
1186 | break; | |
1187 | case (1 << 1): | |
1188 | reg = 0x01; | |
1189 | break; | |
1190 | case (1 << 2): | |
1191 | reg = 0x02; | |
1192 | break; | |
1193 | default: | |
1194 | return -EINVAL; | |
1195 | } | |
1196 | ||
1197 | mutex_lock(&data->update_lock); | |
1198 | data->pwm_temp_map[nr] = reg; | |
4a0d71cf GR |
1199 | /* |
1200 | * If we are in automatic mode, write the temp mapping immediately; | |
1201 | * otherwise, just store it for later use. | |
1202 | */ | |
94ac7ee6 JD |
1203 | if (data->pwm_ctrl[nr] & 0x80) { |
1204 | data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; | |
1205 | it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); | |
1206 | } | |
1207 | mutex_unlock(&data->update_lock); | |
1208 | return count; | |
1209 | } | |
1da177e4 | 1210 | |
4f3f51bc JD |
1211 | static ssize_t show_auto_pwm(struct device *dev, |
1212 | struct device_attribute *attr, char *buf) | |
1213 | { | |
1214 | struct it87_data *data = it87_update_device(dev); | |
1215 | struct sensor_device_attribute_2 *sensor_attr = | |
1216 | to_sensor_dev_attr_2(attr); | |
1217 | int nr = sensor_attr->nr; | |
1218 | int point = sensor_attr->index; | |
1219 | ||
44c1bcd4 JD |
1220 | return sprintf(buf, "%d\n", |
1221 | pwm_from_reg(data, data->auto_pwm[nr][point])); | |
4f3f51bc JD |
1222 | } |
1223 | ||
1224 | static ssize_t set_auto_pwm(struct device *dev, | |
1225 | struct device_attribute *attr, const char *buf, size_t count) | |
1226 | { | |
1227 | struct it87_data *data = dev_get_drvdata(dev); | |
1228 | struct sensor_device_attribute_2 *sensor_attr = | |
1229 | to_sensor_dev_attr_2(attr); | |
1230 | int nr = sensor_attr->nr; | |
1231 | int point = sensor_attr->index; | |
1232 | long val; | |
1233 | ||
179c4fdb | 1234 | if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) |
4f3f51bc JD |
1235 | return -EINVAL; |
1236 | ||
1237 | mutex_lock(&data->update_lock); | |
44c1bcd4 | 1238 | data->auto_pwm[nr][point] = pwm_to_reg(data, val); |
4f3f51bc JD |
1239 | it87_write_value(data, IT87_REG_AUTO_PWM(nr, point), |
1240 | data->auto_pwm[nr][point]); | |
1241 | mutex_unlock(&data->update_lock); | |
1242 | return count; | |
1243 | } | |
1244 | ||
1245 | static ssize_t show_auto_temp(struct device *dev, | |
1246 | struct device_attribute *attr, char *buf) | |
1247 | { | |
1248 | struct it87_data *data = it87_update_device(dev); | |
1249 | struct sensor_device_attribute_2 *sensor_attr = | |
1250 | to_sensor_dev_attr_2(attr); | |
1251 | int nr = sensor_attr->nr; | |
1252 | int point = sensor_attr->index; | |
1253 | ||
1254 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point])); | |
1255 | } | |
1256 | ||
1257 | static ssize_t set_auto_temp(struct device *dev, | |
1258 | struct device_attribute *attr, const char *buf, size_t count) | |
1259 | { | |
1260 | struct it87_data *data = dev_get_drvdata(dev); | |
1261 | struct sensor_device_attribute_2 *sensor_attr = | |
1262 | to_sensor_dev_attr_2(attr); | |
1263 | int nr = sensor_attr->nr; | |
1264 | int point = sensor_attr->index; | |
1265 | long val; | |
1266 | ||
179c4fdb | 1267 | if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000) |
4f3f51bc JD |
1268 | return -EINVAL; |
1269 | ||
1270 | mutex_lock(&data->update_lock); | |
1271 | data->auto_temp[nr][point] = TEMP_TO_REG(val); | |
1272 | it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), | |
1273 | data->auto_temp[nr][point]); | |
1274 | mutex_unlock(&data->update_lock); | |
1275 | return count; | |
1276 | } | |
1277 | ||
e1169ba0 GR |
1278 | static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0); |
1279 | static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1280 | 0, 1); | |
1281 | static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1282 | set_fan_div, 0); | |
1283 | ||
1284 | static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0); | |
1285 | static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1286 | 1, 1); | |
1287 | static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1288 | set_fan_div, 1); | |
1289 | ||
1290 | static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0); | |
1291 | static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1292 | 2, 1); | |
1293 | static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div, | |
1294 | set_fan_div, 2); | |
1295 | ||
1296 | static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0); | |
1297 | static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1298 | 3, 1); | |
1da177e4 | 1299 | |
e1169ba0 GR |
1300 | static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0); |
1301 | static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1302 | 4, 1); | |
1da177e4 | 1303 | |
fa3f70d6 GR |
1304 | static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0); |
1305 | static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan, | |
1306 | 5, 1); | |
1307 | ||
c4458db3 GR |
1308 | static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, |
1309 | show_pwm_enable, set_pwm_enable, 0); | |
1310 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0); | |
1311 | static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq); | |
1312 | static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1313 | show_pwm_temp_map, set_pwm_temp_map, 0); | |
1314 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1315 | show_auto_pwm, set_auto_pwm, 0, 0); | |
1316 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1317 | show_auto_pwm, set_auto_pwm, 0, 1); | |
1318 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1319 | show_auto_pwm, set_auto_pwm, 0, 2); | |
1320 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO, | |
1321 | show_auto_pwm, NULL, 0, 3); | |
1322 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1323 | show_auto_temp, set_auto_temp, 0, 1); | |
1324 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1325 | show_auto_temp, set_auto_temp, 0, 0); | |
1326 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1327 | show_auto_temp, set_auto_temp, 0, 2); | |
1328 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1329 | show_auto_temp, set_auto_temp, 0, 3); | |
1330 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1331 | show_auto_temp, set_auto_temp, 0, 4); | |
1332 | ||
1333 | static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, | |
1334 | show_pwm_enable, set_pwm_enable, 1); | |
1335 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1); | |
1336 | static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL); | |
1337 | static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1338 | show_pwm_temp_map, set_pwm_temp_map, 1); | |
1339 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1340 | show_auto_pwm, set_auto_pwm, 1, 0); | |
1341 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1342 | show_auto_pwm, set_auto_pwm, 1, 1); | |
1343 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1344 | show_auto_pwm, set_auto_pwm, 1, 2); | |
1345 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO, | |
1346 | show_auto_pwm, NULL, 1, 3); | |
1347 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1348 | show_auto_temp, set_auto_temp, 1, 1); | |
1349 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1350 | show_auto_temp, set_auto_temp, 1, 0); | |
1351 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1352 | show_auto_temp, set_auto_temp, 1, 2); | |
1353 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1354 | show_auto_temp, set_auto_temp, 1, 3); | |
1355 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1356 | show_auto_temp, set_auto_temp, 1, 4); | |
1357 | ||
1358 | static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, | |
1359 | show_pwm_enable, set_pwm_enable, 2); | |
1360 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2); | |
1361 | static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL); | |
1362 | static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR, | |
1363 | show_pwm_temp_map, set_pwm_temp_map, 2); | |
1364 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, | |
1365 | show_auto_pwm, set_auto_pwm, 2, 0); | |
1366 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR, | |
1367 | show_auto_pwm, set_auto_pwm, 2, 1); | |
1368 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR, | |
1369 | show_auto_pwm, set_auto_pwm, 2, 2); | |
1370 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO, | |
1371 | show_auto_pwm, NULL, 2, 3); | |
1372 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR, | |
1373 | show_auto_temp, set_auto_temp, 2, 1); | |
1374 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, | |
1375 | show_auto_temp, set_auto_temp, 2, 0); | |
1376 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR, | |
1377 | show_auto_temp, set_auto_temp, 2, 2); | |
1378 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR, | |
1379 | show_auto_temp, set_auto_temp, 2, 3); | |
1380 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR, | |
1381 | show_auto_temp, set_auto_temp, 2, 4); | |
1da177e4 LT |
1382 | |
1383 | /* Alarms */ | |
5f2dc798 JD |
1384 | static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, |
1385 | char *buf) | |
1da177e4 LT |
1386 | { |
1387 | struct it87_data *data = it87_update_device(dev); | |
68188ba7 | 1388 | return sprintf(buf, "%u\n", data->alarms); |
1da177e4 | 1389 | } |
1d66c64c | 1390 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL); |
1da177e4 | 1391 | |
0124dd78 JD |
1392 | static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, |
1393 | char *buf) | |
1394 | { | |
1395 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1396 | struct it87_data *data = it87_update_device(dev); | |
1397 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
1398 | } | |
3d30f9e6 JD |
1399 | |
1400 | static ssize_t clear_intrusion(struct device *dev, struct device_attribute | |
1401 | *attr, const char *buf, size_t count) | |
1402 | { | |
1403 | struct it87_data *data = dev_get_drvdata(dev); | |
1404 | long val; | |
1405 | int config; | |
1406 | ||
179c4fdb | 1407 | if (kstrtol(buf, 10, &val) < 0 || val != 0) |
3d30f9e6 JD |
1408 | return -EINVAL; |
1409 | ||
1410 | mutex_lock(&data->update_lock); | |
1411 | config = it87_read_value(data, IT87_REG_CONFIG); | |
1412 | if (config < 0) { | |
1413 | count = config; | |
1414 | } else { | |
1415 | config |= 1 << 5; | |
1416 | it87_write_value(data, IT87_REG_CONFIG, config); | |
1417 | /* Invalidate cache to force re-read */ | |
1418 | data->valid = 0; | |
1419 | } | |
1420 | mutex_unlock(&data->update_lock); | |
1421 | ||
1422 | return count; | |
1423 | } | |
1424 | ||
0124dd78 JD |
1425 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8); |
1426 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9); | |
1427 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10); | |
1428 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11); | |
1429 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12); | |
1430 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13); | |
1431 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14); | |
1432 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15); | |
1433 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0); | |
1434 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1); | |
1435 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2); | |
1436 | static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3); | |
1437 | static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6); | |
fa3f70d6 | 1438 | static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7); |
0124dd78 JD |
1439 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16); |
1440 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17); | |
1441 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18); | |
3d30f9e6 JD |
1442 | static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR, |
1443 | show_alarm, clear_intrusion, 4); | |
0124dd78 | 1444 | |
d9b327c3 JD |
1445 | static ssize_t show_beep(struct device *dev, struct device_attribute *attr, |
1446 | char *buf) | |
1447 | { | |
1448 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1449 | struct it87_data *data = it87_update_device(dev); | |
1450 | return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1); | |
1451 | } | |
1452 | static ssize_t set_beep(struct device *dev, struct device_attribute *attr, | |
1453 | const char *buf, size_t count) | |
1454 | { | |
1455 | int bitnr = to_sensor_dev_attr(attr)->index; | |
1456 | struct it87_data *data = dev_get_drvdata(dev); | |
1457 | long val; | |
1458 | ||
179c4fdb | 1459 | if (kstrtol(buf, 10, &val) < 0 |
d9b327c3 JD |
1460 | || (val != 0 && val != 1)) |
1461 | return -EINVAL; | |
1462 | ||
1463 | mutex_lock(&data->update_lock); | |
1464 | data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); | |
1465 | if (val) | |
1466 | data->beeps |= (1 << bitnr); | |
1467 | else | |
1468 | data->beeps &= ~(1 << bitnr); | |
1469 | it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps); | |
1470 | mutex_unlock(&data->update_lock); | |
1471 | return count; | |
1472 | } | |
1473 | ||
1474 | static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, | |
1475 | show_beep, set_beep, 1); | |
1476 | static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1); | |
1477 | static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1); | |
1478 | static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1); | |
1479 | static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1); | |
1480 | static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1); | |
1481 | static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1); | |
1482 | static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1); | |
1483 | /* fanX_beep writability is set later */ | |
1484 | static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0); | |
1485 | static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0); | |
1486 | static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0); | |
1487 | static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0); | |
1488 | static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0); | |
fa3f70d6 | 1489 | static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0); |
d9b327c3 JD |
1490 | static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, |
1491 | show_beep, set_beep, 2); | |
1492 | static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2); | |
1493 | static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2); | |
1494 | ||
5f2dc798 JD |
1495 | static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr, |
1496 | char *buf) | |
1da177e4 | 1497 | { |
90d6619a | 1498 | struct it87_data *data = dev_get_drvdata(dev); |
a7be58a1 | 1499 | return sprintf(buf, "%u\n", data->vrm); |
1da177e4 | 1500 | } |
5f2dc798 JD |
1501 | static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr, |
1502 | const char *buf, size_t count) | |
1da177e4 | 1503 | { |
b74f3fdd | 1504 | struct it87_data *data = dev_get_drvdata(dev); |
f5f64501 JD |
1505 | unsigned long val; |
1506 | ||
179c4fdb | 1507 | if (kstrtoul(buf, 10, &val) < 0) |
f5f64501 | 1508 | return -EINVAL; |
1da177e4 | 1509 | |
1da177e4 LT |
1510 | data->vrm = val; |
1511 | ||
1512 | return count; | |
1513 | } | |
1514 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
1da177e4 | 1515 | |
5f2dc798 JD |
1516 | static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr, |
1517 | char *buf) | |
1da177e4 LT |
1518 | { |
1519 | struct it87_data *data = it87_update_device(dev); | |
1520 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
1521 | } | |
1522 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
87808be4 | 1523 | |
738e5e05 JD |
1524 | static ssize_t show_label(struct device *dev, struct device_attribute *attr, |
1525 | char *buf) | |
1526 | { | |
3c4c4971 | 1527 | static const char * const labels[] = { |
738e5e05 JD |
1528 | "+5V", |
1529 | "5VSB", | |
1530 | "Vbat", | |
1531 | }; | |
3c4c4971 | 1532 | static const char * const labels_it8721[] = { |
44c1bcd4 JD |
1533 | "+3.3V", |
1534 | "3VSB", | |
1535 | "Vbat", | |
1536 | }; | |
1537 | struct it87_data *data = dev_get_drvdata(dev); | |
738e5e05 | 1538 | int nr = to_sensor_dev_attr(attr)->index; |
ead80803 | 1539 | const char *label; |
738e5e05 | 1540 | |
ead80803 JM |
1541 | if (has_12mv_adc(data) || has_10_9mv_adc(data)) |
1542 | label = labels_it8721[nr]; | |
1543 | else | |
1544 | label = labels[nr]; | |
1545 | ||
1546 | return sprintf(buf, "%s\n", label); | |
738e5e05 JD |
1547 | } |
1548 | static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0); | |
1549 | static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1); | |
1550 | static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2); | |
7183ae8c | 1551 | /* special AVCC3 IT8603E in9 */ |
c145d5c6 | 1552 | static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0); |
738e5e05 | 1553 | |
b74f3fdd | 1554 | static ssize_t show_name(struct device *dev, struct device_attribute |
1555 | *devattr, char *buf) | |
1556 | { | |
1557 | struct it87_data *data = dev_get_drvdata(dev); | |
1558 | return sprintf(buf, "%s\n", data->name); | |
1559 | } | |
1560 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
1561 | ||
c145d5c6 | 1562 | static struct attribute *it87_attributes_in[10][5] = { |
9172b5d1 | 1563 | { |
87808be4 | 1564 | &sensor_dev_attr_in0_input.dev_attr.attr, |
87808be4 | 1565 | &sensor_dev_attr_in0_min.dev_attr.attr, |
87808be4 | 1566 | &sensor_dev_attr_in0_max.dev_attr.attr, |
0124dd78 | 1567 | &sensor_dev_attr_in0_alarm.dev_attr.attr, |
9172b5d1 GR |
1568 | NULL |
1569 | }, { | |
1570 | &sensor_dev_attr_in1_input.dev_attr.attr, | |
1571 | &sensor_dev_attr_in1_min.dev_attr.attr, | |
1572 | &sensor_dev_attr_in1_max.dev_attr.attr, | |
0124dd78 | 1573 | &sensor_dev_attr_in1_alarm.dev_attr.attr, |
9172b5d1 GR |
1574 | NULL |
1575 | }, { | |
1576 | &sensor_dev_attr_in2_input.dev_attr.attr, | |
1577 | &sensor_dev_attr_in2_min.dev_attr.attr, | |
1578 | &sensor_dev_attr_in2_max.dev_attr.attr, | |
0124dd78 | 1579 | &sensor_dev_attr_in2_alarm.dev_attr.attr, |
9172b5d1 GR |
1580 | NULL |
1581 | }, { | |
1582 | &sensor_dev_attr_in3_input.dev_attr.attr, | |
1583 | &sensor_dev_attr_in3_min.dev_attr.attr, | |
1584 | &sensor_dev_attr_in3_max.dev_attr.attr, | |
0124dd78 | 1585 | &sensor_dev_attr_in3_alarm.dev_attr.attr, |
9172b5d1 GR |
1586 | NULL |
1587 | }, { | |
1588 | &sensor_dev_attr_in4_input.dev_attr.attr, | |
1589 | &sensor_dev_attr_in4_min.dev_attr.attr, | |
1590 | &sensor_dev_attr_in4_max.dev_attr.attr, | |
0124dd78 | 1591 | &sensor_dev_attr_in4_alarm.dev_attr.attr, |
9172b5d1 GR |
1592 | NULL |
1593 | }, { | |
1594 | &sensor_dev_attr_in5_input.dev_attr.attr, | |
1595 | &sensor_dev_attr_in5_min.dev_attr.attr, | |
1596 | &sensor_dev_attr_in5_max.dev_attr.attr, | |
0124dd78 | 1597 | &sensor_dev_attr_in5_alarm.dev_attr.attr, |
9172b5d1 GR |
1598 | NULL |
1599 | }, { | |
1600 | &sensor_dev_attr_in6_input.dev_attr.attr, | |
1601 | &sensor_dev_attr_in6_min.dev_attr.attr, | |
1602 | &sensor_dev_attr_in6_max.dev_attr.attr, | |
0124dd78 | 1603 | &sensor_dev_attr_in6_alarm.dev_attr.attr, |
9172b5d1 GR |
1604 | NULL |
1605 | }, { | |
1606 | &sensor_dev_attr_in7_input.dev_attr.attr, | |
1607 | &sensor_dev_attr_in7_min.dev_attr.attr, | |
1608 | &sensor_dev_attr_in7_max.dev_attr.attr, | |
0124dd78 | 1609 | &sensor_dev_attr_in7_alarm.dev_attr.attr, |
9172b5d1 GR |
1610 | NULL |
1611 | }, { | |
1612 | &sensor_dev_attr_in8_input.dev_attr.attr, | |
1613 | NULL | |
c145d5c6 RM |
1614 | }, { |
1615 | &sensor_dev_attr_in9_input.dev_attr.attr, | |
1616 | NULL | |
9172b5d1 | 1617 | } }; |
87808be4 | 1618 | |
c145d5c6 | 1619 | static const struct attribute_group it87_group_in[10] = { |
9172b5d1 GR |
1620 | { .attrs = it87_attributes_in[0] }, |
1621 | { .attrs = it87_attributes_in[1] }, | |
1622 | { .attrs = it87_attributes_in[2] }, | |
1623 | { .attrs = it87_attributes_in[3] }, | |
1624 | { .attrs = it87_attributes_in[4] }, | |
1625 | { .attrs = it87_attributes_in[5] }, | |
1626 | { .attrs = it87_attributes_in[6] }, | |
1627 | { .attrs = it87_attributes_in[7] }, | |
1628 | { .attrs = it87_attributes_in[8] }, | |
c145d5c6 | 1629 | { .attrs = it87_attributes_in[9] }, |
9172b5d1 GR |
1630 | }; |
1631 | ||
4573acbc GR |
1632 | static struct attribute *it87_attributes_temp[3][6] = { |
1633 | { | |
87808be4 | 1634 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
87808be4 | 1635 | &sensor_dev_attr_temp1_max.dev_attr.attr, |
87808be4 | 1636 | &sensor_dev_attr_temp1_min.dev_attr.attr, |
87808be4 | 1637 | &sensor_dev_attr_temp1_type.dev_attr.attr, |
0124dd78 | 1638 | &sensor_dev_attr_temp1_alarm.dev_attr.attr, |
4573acbc GR |
1639 | NULL |
1640 | } , { | |
1641 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
1642 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
1643 | &sensor_dev_attr_temp2_min.dev_attr.attr, | |
1644 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
0124dd78 | 1645 | &sensor_dev_attr_temp2_alarm.dev_attr.attr, |
4573acbc GR |
1646 | NULL |
1647 | } , { | |
1648 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
1649 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
1650 | &sensor_dev_attr_temp3_min.dev_attr.attr, | |
1651 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
0124dd78 | 1652 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, |
4573acbc GR |
1653 | NULL |
1654 | } }; | |
1655 | ||
1656 | static const struct attribute_group it87_group_temp[3] = { | |
1657 | { .attrs = it87_attributes_temp[0] }, | |
1658 | { .attrs = it87_attributes_temp[1] }, | |
1659 | { .attrs = it87_attributes_temp[2] }, | |
1660 | }; | |
87808be4 | 1661 | |
161d898a GR |
1662 | static struct attribute *it87_attributes_temp_offset[] = { |
1663 | &sensor_dev_attr_temp1_offset.dev_attr.attr, | |
1664 | &sensor_dev_attr_temp2_offset.dev_attr.attr, | |
1665 | &sensor_dev_attr_temp3_offset.dev_attr.attr, | |
1666 | }; | |
1667 | ||
4573acbc | 1668 | static struct attribute *it87_attributes[] = { |
87808be4 | 1669 | &dev_attr_alarms.attr, |
3d30f9e6 | 1670 | &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, |
b74f3fdd | 1671 | &dev_attr_name.attr, |
87808be4 JD |
1672 | NULL |
1673 | }; | |
1674 | ||
1675 | static const struct attribute_group it87_group = { | |
1676 | .attrs = it87_attributes, | |
1677 | }; | |
1678 | ||
9172b5d1 | 1679 | static struct attribute *it87_attributes_in_beep[] = { |
d9b327c3 JD |
1680 | &sensor_dev_attr_in0_beep.dev_attr.attr, |
1681 | &sensor_dev_attr_in1_beep.dev_attr.attr, | |
1682 | &sensor_dev_attr_in2_beep.dev_attr.attr, | |
1683 | &sensor_dev_attr_in3_beep.dev_attr.attr, | |
1684 | &sensor_dev_attr_in4_beep.dev_attr.attr, | |
1685 | &sensor_dev_attr_in5_beep.dev_attr.attr, | |
1686 | &sensor_dev_attr_in6_beep.dev_attr.attr, | |
1687 | &sensor_dev_attr_in7_beep.dev_attr.attr, | |
c145d5c6 RM |
1688 | NULL, |
1689 | NULL, | |
9172b5d1 | 1690 | }; |
d9b327c3 | 1691 | |
4573acbc | 1692 | static struct attribute *it87_attributes_temp_beep[] = { |
d9b327c3 JD |
1693 | &sensor_dev_attr_temp1_beep.dev_attr.attr, |
1694 | &sensor_dev_attr_temp2_beep.dev_attr.attr, | |
1695 | &sensor_dev_attr_temp3_beep.dev_attr.attr, | |
d9b327c3 JD |
1696 | }; |
1697 | ||
fa3f70d6 | 1698 | static struct attribute *it87_attributes_fan[6][3+1] = { { |
e1169ba0 GR |
1699 | &sensor_dev_attr_fan1_input.dev_attr.attr, |
1700 | &sensor_dev_attr_fan1_min.dev_attr.attr, | |
723a0aa0 JD |
1701 | &sensor_dev_attr_fan1_alarm.dev_attr.attr, |
1702 | NULL | |
1703 | }, { | |
e1169ba0 GR |
1704 | &sensor_dev_attr_fan2_input.dev_attr.attr, |
1705 | &sensor_dev_attr_fan2_min.dev_attr.attr, | |
723a0aa0 JD |
1706 | &sensor_dev_attr_fan2_alarm.dev_attr.attr, |
1707 | NULL | |
1708 | }, { | |
e1169ba0 GR |
1709 | &sensor_dev_attr_fan3_input.dev_attr.attr, |
1710 | &sensor_dev_attr_fan3_min.dev_attr.attr, | |
723a0aa0 JD |
1711 | &sensor_dev_attr_fan3_alarm.dev_attr.attr, |
1712 | NULL | |
1713 | }, { | |
e1169ba0 GR |
1714 | &sensor_dev_attr_fan4_input.dev_attr.attr, |
1715 | &sensor_dev_attr_fan4_min.dev_attr.attr, | |
723a0aa0 JD |
1716 | &sensor_dev_attr_fan4_alarm.dev_attr.attr, |
1717 | NULL | |
1718 | }, { | |
e1169ba0 GR |
1719 | &sensor_dev_attr_fan5_input.dev_attr.attr, |
1720 | &sensor_dev_attr_fan5_min.dev_attr.attr, | |
723a0aa0 JD |
1721 | &sensor_dev_attr_fan5_alarm.dev_attr.attr, |
1722 | NULL | |
fa3f70d6 GR |
1723 | }, { |
1724 | &sensor_dev_attr_fan6_input.dev_attr.attr, | |
1725 | &sensor_dev_attr_fan6_min.dev_attr.attr, | |
1726 | &sensor_dev_attr_fan6_alarm.dev_attr.attr, | |
1727 | NULL | |
723a0aa0 JD |
1728 | } }; |
1729 | ||
fa3f70d6 | 1730 | static const struct attribute_group it87_group_fan[6] = { |
e1169ba0 GR |
1731 | { .attrs = it87_attributes_fan[0] }, |
1732 | { .attrs = it87_attributes_fan[1] }, | |
1733 | { .attrs = it87_attributes_fan[2] }, | |
1734 | { .attrs = it87_attributes_fan[3] }, | |
1735 | { .attrs = it87_attributes_fan[4] }, | |
fa3f70d6 | 1736 | { .attrs = it87_attributes_fan[5] }, |
723a0aa0 | 1737 | }; |
87808be4 | 1738 | |
e1169ba0 | 1739 | static const struct attribute *it87_attributes_fan_div[] = { |
87808be4 | 1740 | &sensor_dev_attr_fan1_div.dev_attr.attr, |
87808be4 | 1741 | &sensor_dev_attr_fan2_div.dev_attr.attr, |
87808be4 | 1742 | &sensor_dev_attr_fan3_div.dev_attr.attr, |
723a0aa0 JD |
1743 | }; |
1744 | ||
723a0aa0 | 1745 | static struct attribute *it87_attributes_pwm[3][4+1] = { { |
87808be4 | 1746 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, |
87808be4 | 1747 | &sensor_dev_attr_pwm1.dev_attr.attr, |
d5b0b5d6 | 1748 | &dev_attr_pwm1_freq.attr, |
94ac7ee6 | 1749 | &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1750 | NULL |
1751 | }, { | |
1752 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1753 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1754 | &dev_attr_pwm2_freq.attr, | |
94ac7ee6 | 1755 | &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1756 | NULL |
1757 | }, { | |
1758 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
1759 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1760 | &dev_attr_pwm3_freq.attr, | |
94ac7ee6 | 1761 | &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr, |
723a0aa0 JD |
1762 | NULL |
1763 | } }; | |
87808be4 | 1764 | |
723a0aa0 JD |
1765 | static const struct attribute_group it87_group_pwm[3] = { |
1766 | { .attrs = it87_attributes_pwm[0] }, | |
1767 | { .attrs = it87_attributes_pwm[1] }, | |
1768 | { .attrs = it87_attributes_pwm[2] }, | |
1769 | }; | |
1770 | ||
4f3f51bc JD |
1771 | static struct attribute *it87_attributes_autopwm[3][9+1] = { { |
1772 | &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, | |
1773 | &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, | |
1774 | &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr, | |
1775 | &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr, | |
1776 | &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr, | |
1777 | &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr, | |
1778 | &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr, | |
1779 | &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr, | |
1780 | &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr, | |
1781 | NULL | |
1782 | }, { | |
1783 | &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, | |
1784 | &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, | |
1785 | &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr, | |
1786 | &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr, | |
1787 | &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr, | |
1788 | &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr, | |
1789 | &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr, | |
1790 | &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr, | |
1791 | &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr, | |
1792 | NULL | |
1793 | }, { | |
1794 | &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, | |
1795 | &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, | |
1796 | &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr, | |
1797 | &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr, | |
1798 | &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr, | |
1799 | &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr, | |
1800 | &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr, | |
1801 | &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr, | |
1802 | &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr, | |
1803 | NULL | |
1804 | } }; | |
1805 | ||
1806 | static const struct attribute_group it87_group_autopwm[3] = { | |
1807 | { .attrs = it87_attributes_autopwm[0] }, | |
1808 | { .attrs = it87_attributes_autopwm[1] }, | |
1809 | { .attrs = it87_attributes_autopwm[2] }, | |
1810 | }; | |
1811 | ||
d9b327c3 JD |
1812 | static struct attribute *it87_attributes_fan_beep[] = { |
1813 | &sensor_dev_attr_fan1_beep.dev_attr.attr, | |
1814 | &sensor_dev_attr_fan2_beep.dev_attr.attr, | |
1815 | &sensor_dev_attr_fan3_beep.dev_attr.attr, | |
1816 | &sensor_dev_attr_fan4_beep.dev_attr.attr, | |
1817 | &sensor_dev_attr_fan5_beep.dev_attr.attr, | |
fa3f70d6 | 1818 | &sensor_dev_attr_fan6_beep.dev_attr.attr, |
d9b327c3 JD |
1819 | }; |
1820 | ||
6a8d7acf | 1821 | static struct attribute *it87_attributes_vid[] = { |
87808be4 JD |
1822 | &dev_attr_vrm.attr, |
1823 | &dev_attr_cpu0_vid.attr, | |
1824 | NULL | |
1825 | }; | |
1826 | ||
6a8d7acf JD |
1827 | static const struct attribute_group it87_group_vid = { |
1828 | .attrs = it87_attributes_vid, | |
87808be4 | 1829 | }; |
1da177e4 | 1830 | |
738e5e05 JD |
1831 | static struct attribute *it87_attributes_label[] = { |
1832 | &sensor_dev_attr_in3_label.dev_attr.attr, | |
1833 | &sensor_dev_attr_in7_label.dev_attr.attr, | |
1834 | &sensor_dev_attr_in8_label.dev_attr.attr, | |
c145d5c6 | 1835 | &sensor_dev_attr_in9_label.dev_attr.attr, |
738e5e05 JD |
1836 | NULL |
1837 | }; | |
1838 | ||
1839 | static const struct attribute_group it87_group_label = { | |
fa8b6975 | 1840 | .attrs = it87_attributes_label, |
738e5e05 JD |
1841 | }; |
1842 | ||
2d8672c5 | 1843 | /* SuperIO detection - will change isa_address if a chip is found */ |
b74f3fdd | 1844 | static int __init it87_find(unsigned short *address, |
1845 | struct it87_sio_data *sio_data) | |
1da177e4 | 1846 | { |
5b0380c9 | 1847 | int err; |
b74f3fdd | 1848 | u16 chip_type; |
98dd22c3 | 1849 | const char *board_vendor, *board_name; |
f83a9cb6 | 1850 | const struct it87_devices *config; |
1da177e4 | 1851 | |
5b0380c9 NG |
1852 | err = superio_enter(); |
1853 | if (err) | |
1854 | return err; | |
1855 | ||
1856 | err = -ENODEV; | |
67b671bc | 1857 | chip_type = force_id ? force_id : superio_inw(DEVID); |
b74f3fdd | 1858 | |
1859 | switch (chip_type) { | |
1860 | case IT8705F_DEVID: | |
1861 | sio_data->type = it87; | |
1862 | break; | |
1863 | case IT8712F_DEVID: | |
1864 | sio_data->type = it8712; | |
1865 | break; | |
1866 | case IT8716F_DEVID: | |
1867 | case IT8726F_DEVID: | |
1868 | sio_data->type = it8716; | |
1869 | break; | |
1870 | case IT8718F_DEVID: | |
1871 | sio_data->type = it8718; | |
1872 | break; | |
b4da93e4 JMS |
1873 | case IT8720F_DEVID: |
1874 | sio_data->type = it8720; | |
1875 | break; | |
44c1bcd4 JD |
1876 | case IT8721F_DEVID: |
1877 | sio_data->type = it8721; | |
1878 | break; | |
16b5dda2 JD |
1879 | case IT8728F_DEVID: |
1880 | sio_data->type = it8728; | |
1881 | break; | |
ead80803 JM |
1882 | case IT8732F_DEVID: |
1883 | sio_data->type = it8732; | |
1884 | break; | |
b0636707 GR |
1885 | case IT8771E_DEVID: |
1886 | sio_data->type = it8771; | |
1887 | break; | |
1888 | case IT8772E_DEVID: | |
1889 | sio_data->type = it8772; | |
1890 | break; | |
7bc32d29 GR |
1891 | case IT8781F_DEVID: |
1892 | sio_data->type = it8781; | |
1893 | break; | |
0531d98b GR |
1894 | case IT8782F_DEVID: |
1895 | sio_data->type = it8782; | |
1896 | break; | |
1897 | case IT8783E_DEVID: | |
1898 | sio_data->type = it8783; | |
1899 | break; | |
a0c1424a TL |
1900 | case IT8786E_DEVID: |
1901 | sio_data->type = it8786; | |
1902 | break; | |
4ee07157 GR |
1903 | case IT8790E_DEVID: |
1904 | sio_data->type = it8790; | |
1905 | break; | |
7183ae8c | 1906 | case IT8603E_DEVID: |
574e9bd8 | 1907 | case IT8623E_DEVID: |
c145d5c6 RM |
1908 | sio_data->type = it8603; |
1909 | break; | |
3ba9d977 GR |
1910 | case IT8620E_DEVID: |
1911 | sio_data->type = it8620; | |
1912 | break; | |
b74f3fdd | 1913 | case 0xffff: /* No device at all */ |
1914 | goto exit; | |
1915 | default: | |
a8ca1037 | 1916 | pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type); |
b74f3fdd | 1917 | goto exit; |
1918 | } | |
1da177e4 | 1919 | |
87673dd7 | 1920 | superio_select(PME); |
1da177e4 | 1921 | if (!(superio_inb(IT87_ACT_REG) & 0x01)) { |
a8ca1037 | 1922 | pr_info("Device not activated, skipping\n"); |
1da177e4 LT |
1923 | goto exit; |
1924 | } | |
1925 | ||
1926 | *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1); | |
1927 | if (*address == 0) { | |
a8ca1037 | 1928 | pr_info("Base address not set, skipping\n"); |
1da177e4 LT |
1929 | goto exit; |
1930 | } | |
1931 | ||
1932 | err = 0; | |
0475169c | 1933 | sio_data->revision = superio_inb(DEVREV) & 0x0f; |
faf392fb GR |
1934 | pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type, |
1935 | it87_devices[sio_data->type].suffix, | |
a0c1424a | 1936 | *address, sio_data->revision); |
1da177e4 | 1937 | |
f83a9cb6 GR |
1938 | config = &it87_devices[sio_data->type]; |
1939 | ||
7f5726c3 | 1940 | /* in7 (VSB or VCCH5V) is always internal on some chips */ |
f83a9cb6 | 1941 | if (has_in7_internal(config)) |
7f5726c3 GR |
1942 | sio_data->internal |= (1 << 1); |
1943 | ||
738e5e05 | 1944 | /* in8 (Vbat) is always internal */ |
7f5726c3 GR |
1945 | sio_data->internal |= (1 << 2); |
1946 | ||
c145d5c6 RM |
1947 | /* Only the IT8603E has in9 */ |
1948 | if (sio_data->type != it8603) | |
1949 | sio_data->skip_in |= (1 << 9); | |
738e5e05 | 1950 | |
f83a9cb6 | 1951 | if (!has_vid(config)) |
895ff267 | 1952 | sio_data->skip_vid = 1; |
d9b327c3 | 1953 | |
32dd7c40 GR |
1954 | /* Read GPIO config and VID value from LDN 7 (GPIO) */ |
1955 | if (sio_data->type == it87) { | |
d9b327c3 JD |
1956 | /* The IT8705F has a different LD number for GPIO */ |
1957 | superio_select(5); | |
1958 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
0531d98b | 1959 | } else if (sio_data->type == it8783) { |
088ce2ac | 1960 | int reg25, reg27, reg2a, reg2c, regef; |
0531d98b | 1961 | |
0531d98b GR |
1962 | superio_select(GPIO); |
1963 | ||
1964 | reg25 = superio_inb(IT87_SIO_GPIO1_REG); | |
1965 | reg27 = superio_inb(IT87_SIO_GPIO3_REG); | |
088ce2ac GR |
1966 | reg2a = superio_inb(IT87_SIO_PINX1_REG); |
1967 | reg2c = superio_inb(IT87_SIO_PINX2_REG); | |
1968 | regef = superio_inb(IT87_SIO_SPI_REG); | |
0531d98b | 1969 | |
0531d98b | 1970 | /* Check if fan3 is there or not */ |
088ce2ac | 1971 | if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2))) |
0531d98b GR |
1972 | sio_data->skip_fan |= (1 << 2); |
1973 | if ((reg25 & (1 << 4)) | |
088ce2ac | 1974 | || (!(reg2a & (1 << 1)) && (regef & (1 << 0)))) |
0531d98b GR |
1975 | sio_data->skip_pwm |= (1 << 2); |
1976 | ||
1977 | /* Check if fan2 is there or not */ | |
1978 | if (reg27 & (1 << 7)) | |
1979 | sio_data->skip_fan |= (1 << 1); | |
1980 | if (reg27 & (1 << 3)) | |
1981 | sio_data->skip_pwm |= (1 << 1); | |
1982 | ||
1983 | /* VIN5 */ | |
088ce2ac | 1984 | if ((reg27 & (1 << 0)) || (reg2c & (1 << 2))) |
9172b5d1 | 1985 | sio_data->skip_in |= (1 << 5); /* No VIN5 */ |
0531d98b GR |
1986 | |
1987 | /* VIN6 */ | |
9172b5d1 GR |
1988 | if (reg27 & (1 << 1)) |
1989 | sio_data->skip_in |= (1 << 6); /* No VIN6 */ | |
0531d98b GR |
1990 | |
1991 | /* | |
1992 | * VIN7 | |
1993 | * Does not depend on bit 2 of Reg2C, contrary to datasheet. | |
1994 | */ | |
9172b5d1 GR |
1995 | if (reg27 & (1 << 2)) { |
1996 | /* | |
1997 | * The data sheet is a bit unclear regarding the | |
1998 | * internal voltage divider for VCCH5V. It says | |
1999 | * "This bit enables and switches VIN7 (pin 91) to the | |
2000 | * internal voltage divider for VCCH5V". | |
2001 | * This is different to other chips, where the internal | |
2002 | * voltage divider would connect VIN7 to an internal | |
2003 | * voltage source. Maybe that is the case here as well. | |
2004 | * | |
2005 | * Since we don't know for sure, re-route it if that is | |
2006 | * not the case, and ask the user to report if the | |
2007 | * resulting voltage is sane. | |
2008 | */ | |
088ce2ac GR |
2009 | if (!(reg2c & (1 << 1))) { |
2010 | reg2c |= (1 << 1); | |
2011 | superio_outb(IT87_SIO_PINX2_REG, reg2c); | |
9172b5d1 GR |
2012 | pr_notice("Routing internal VCCH5V to in7.\n"); |
2013 | } | |
2014 | pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n"); | |
2015 | pr_notice("Please report if it displays a reasonable voltage.\n"); | |
2016 | } | |
0531d98b | 2017 | |
088ce2ac | 2018 | if (reg2c & (1 << 0)) |
0531d98b | 2019 | sio_data->internal |= (1 << 0); |
088ce2ac | 2020 | if (reg2c & (1 << 1)) |
0531d98b GR |
2021 | sio_data->internal |= (1 << 1); |
2022 | ||
2023 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; | |
c145d5c6 RM |
2024 | } else if (sio_data->type == it8603) { |
2025 | int reg27, reg29; | |
2026 | ||
c145d5c6 | 2027 | superio_select(GPIO); |
0531d98b | 2028 | |
c145d5c6 RM |
2029 | reg27 = superio_inb(IT87_SIO_GPIO3_REG); |
2030 | ||
2031 | /* Check if fan3 is there or not */ | |
2032 | if (reg27 & (1 << 6)) | |
2033 | sio_data->skip_pwm |= (1 << 2); | |
2034 | if (reg27 & (1 << 7)) | |
2035 | sio_data->skip_fan |= (1 << 2); | |
2036 | ||
2037 | /* Check if fan2 is there or not */ | |
2038 | reg29 = superio_inb(IT87_SIO_GPIO5_REG); | |
2039 | if (reg29 & (1 << 1)) | |
2040 | sio_data->skip_pwm |= (1 << 1); | |
2041 | if (reg29 & (1 << 2)) | |
2042 | sio_data->skip_fan |= (1 << 1); | |
2043 | ||
2044 | sio_data->skip_in |= (1 << 5); /* No VIN5 */ | |
2045 | sio_data->skip_in |= (1 << 6); /* No VIN6 */ | |
2046 | ||
c145d5c6 RM |
2047 | sio_data->internal |= (1 << 3); /* in9 is AVCC */ |
2048 | ||
3ba9d977 GR |
2049 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; |
2050 | } else if (sio_data->type == it8620) { | |
2051 | int reg; | |
2052 | ||
2053 | superio_select(GPIO); | |
2054 | ||
2055 | /* Check for fan4, fan5 */ | |
2056 | reg = superio_inb(IT87_SIO_GPIO2_REG); | |
2057 | if (!(reg & (1 << 5))) | |
2058 | sio_data->skip_fan |= (1 << 3); | |
2059 | if (!(reg & (1 << 4))) | |
2060 | sio_data->skip_fan |= (1 << 4); | |
2061 | ||
2062 | /* Check for pwm3, fan3 */ | |
2063 | reg = superio_inb(IT87_SIO_GPIO3_REG); | |
2064 | if (reg & (1 << 6)) | |
2065 | sio_data->skip_pwm |= (1 << 2); | |
2066 | if (reg & (1 << 7)) | |
2067 | sio_data->skip_fan |= (1 << 2); | |
2068 | ||
2069 | /* Check for pwm2, fan2 */ | |
2070 | reg = superio_inb(IT87_SIO_GPIO5_REG); | |
2071 | if (reg & (1 << 1)) | |
2072 | sio_data->skip_pwm |= (1 << 1); | |
2073 | if (reg & (1 << 2)) | |
2074 | sio_data->skip_fan |= (1 << 1); | |
2075 | ||
c145d5c6 | 2076 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; |
895ff267 | 2077 | } else { |
87673dd7 | 2078 | int reg; |
9172b5d1 | 2079 | bool uart6; |
87673dd7 JD |
2080 | |
2081 | superio_select(GPIO); | |
44c1bcd4 | 2082 | |
895ff267 | 2083 | reg = superio_inb(IT87_SIO_GPIO3_REG); |
32dd7c40 | 2084 | if (!sio_data->skip_vid) { |
44c1bcd4 JD |
2085 | /* We need at least 4 VID pins */ |
2086 | if (reg & 0x0f) { | |
a8ca1037 | 2087 | pr_info("VID is disabled (pins used for GPIO)\n"); |
44c1bcd4 JD |
2088 | sio_data->skip_vid = 1; |
2089 | } | |
895ff267 JD |
2090 | } |
2091 | ||
591ec650 JD |
2092 | /* Check if fan3 is there or not */ |
2093 | if (reg & (1 << 6)) | |
2094 | sio_data->skip_pwm |= (1 << 2); | |
2095 | if (reg & (1 << 7)) | |
2096 | sio_data->skip_fan |= (1 << 2); | |
2097 | ||
2098 | /* Check if fan2 is there or not */ | |
2099 | reg = superio_inb(IT87_SIO_GPIO5_REG); | |
2100 | if (reg & (1 << 1)) | |
2101 | sio_data->skip_pwm |= (1 << 1); | |
2102 | if (reg & (1 << 2)) | |
2103 | sio_data->skip_fan |= (1 << 1); | |
2104 | ||
895ff267 JD |
2105 | if ((sio_data->type == it8718 || sio_data->type == it8720) |
2106 | && !(sio_data->skip_vid)) | |
b74f3fdd | 2107 | sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); |
87673dd7 JD |
2108 | |
2109 | reg = superio_inb(IT87_SIO_PINX2_REG); | |
9172b5d1 GR |
2110 | |
2111 | uart6 = sio_data->type == it8782 && (reg & (1 << 2)); | |
2112 | ||
436cad2a JD |
2113 | /* |
2114 | * The IT8720F has no VIN7 pin, so VCCH should always be | |
2115 | * routed internally to VIN7 with an internal divider. | |
2116 | * Curiously, there still is a configuration bit to control | |
2117 | * this, which means it can be set incorrectly. And even | |
2118 | * more curiously, many boards out there are improperly | |
2119 | * configured, even though the IT8720F datasheet claims | |
2120 | * that the internal routing of VCCH to VIN7 is the default | |
2121 | * setting. So we force the internal routing in this case. | |
0531d98b GR |
2122 | * |
2123 | * On IT8782F, VIN7 is multiplexed with one of the UART6 pins. | |
9172b5d1 GR |
2124 | * If UART6 is enabled, re-route VIN7 to the internal divider |
2125 | * if that is not already the case. | |
436cad2a | 2126 | */ |
9172b5d1 | 2127 | if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) { |
436cad2a JD |
2128 | reg |= (1 << 1); |
2129 | superio_outb(IT87_SIO_PINX2_REG, reg); | |
a8ca1037 | 2130 | pr_notice("Routing internal VCCH to in7\n"); |
436cad2a | 2131 | } |
87673dd7 | 2132 | if (reg & (1 << 0)) |
738e5e05 | 2133 | sio_data->internal |= (1 << 0); |
7f5726c3 | 2134 | if (reg & (1 << 1)) |
738e5e05 | 2135 | sio_data->internal |= (1 << 1); |
d9b327c3 | 2136 | |
9172b5d1 GR |
2137 | /* |
2138 | * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7. | |
2139 | * While VIN7 can be routed to the internal voltage divider, | |
2140 | * VIN5 and VIN6 are not available if UART6 is enabled. | |
4573acbc GR |
2141 | * |
2142 | * Also, temp3 is not available if UART6 is enabled and TEMPIN3 | |
2143 | * is the temperature source. Since we can not read the | |
2144 | * temperature source here, skip_temp is preliminary. | |
9172b5d1 | 2145 | */ |
4573acbc | 2146 | if (uart6) { |
9172b5d1 | 2147 | sio_data->skip_in |= (1 << 5) | (1 << 6); |
4573acbc GR |
2148 | sio_data->skip_temp |= (1 << 2); |
2149 | } | |
9172b5d1 | 2150 | |
d9b327c3 | 2151 | sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; |
87673dd7 | 2152 | } |
d9b327c3 | 2153 | if (sio_data->beep_pin) |
a8ca1037 | 2154 | pr_info("Beeping is supported\n"); |
87673dd7 | 2155 | |
98dd22c3 JD |
2156 | /* Disable specific features based on DMI strings */ |
2157 | board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR); | |
2158 | board_name = dmi_get_system_info(DMI_BOARD_NAME); | |
2159 | if (board_vendor && board_name) { | |
2160 | if (strcmp(board_vendor, "nVIDIA") == 0 | |
2161 | && strcmp(board_name, "FN68PT") == 0) { | |
4a0d71cf GR |
2162 | /* |
2163 | * On the Shuttle SN68PT, FAN_CTL2 is apparently not | |
2164 | * connected to a fan, but to something else. One user | |
2165 | * has reported instant system power-off when changing | |
2166 | * the PWM2 duty cycle, so we disable it. | |
2167 | * I use the board name string as the trigger in case | |
2168 | * the same board is ever used in other systems. | |
2169 | */ | |
a8ca1037 | 2170 | pr_info("Disabling pwm2 due to hardware constraints\n"); |
98dd22c3 JD |
2171 | sio_data->skip_pwm = (1 << 1); |
2172 | } | |
2173 | } | |
2174 | ||
1da177e4 LT |
2175 | exit: |
2176 | superio_exit(); | |
2177 | return err; | |
2178 | } | |
2179 | ||
723a0aa0 JD |
2180 | static void it87_remove_files(struct device *dev) |
2181 | { | |
2182 | struct it87_data *data = platform_get_drvdata(pdev); | |
a8b3a3a5 | 2183 | struct it87_sio_data *sio_data = dev_get_platdata(dev); |
723a0aa0 JD |
2184 | int i; |
2185 | ||
2186 | sysfs_remove_group(&dev->kobj, &it87_group); | |
c145d5c6 | 2187 | for (i = 0; i < 10; i++) { |
9172b5d1 GR |
2188 | if (sio_data->skip_in & (1 << i)) |
2189 | continue; | |
2190 | sysfs_remove_group(&dev->kobj, &it87_group_in[i]); | |
2191 | if (it87_attributes_in_beep[i]) | |
2192 | sysfs_remove_file(&dev->kobj, | |
2193 | it87_attributes_in_beep[i]); | |
2194 | } | |
4573acbc GR |
2195 | for (i = 0; i < 3; i++) { |
2196 | if (!(data->has_temp & (1 << i))) | |
2197 | continue; | |
2198 | sysfs_remove_group(&dev->kobj, &it87_group_temp[i]); | |
161d898a GR |
2199 | if (has_temp_offset(data)) |
2200 | sysfs_remove_file(&dev->kobj, | |
2201 | it87_attributes_temp_offset[i]); | |
4573acbc GR |
2202 | if (sio_data->beep_pin) |
2203 | sysfs_remove_file(&dev->kobj, | |
2204 | it87_attributes_temp_beep[i]); | |
2205 | } | |
fa3f70d6 | 2206 | for (i = 0; i < 6; i++) { |
723a0aa0 JD |
2207 | if (!(data->has_fan & (1 << i))) |
2208 | continue; | |
e1169ba0 | 2209 | sysfs_remove_group(&dev->kobj, &it87_group_fan[i]); |
d9b327c3 JD |
2210 | if (sio_data->beep_pin) |
2211 | sysfs_remove_file(&dev->kobj, | |
2212 | it87_attributes_fan_beep[i]); | |
e1169ba0 GR |
2213 | if (i < 3 && !has_16bit_fans(data)) |
2214 | sysfs_remove_file(&dev->kobj, | |
2215 | it87_attributes_fan_div[i]); | |
723a0aa0 JD |
2216 | } |
2217 | for (i = 0; i < 3; i++) { | |
1696d1de | 2218 | if (sio_data->skip_pwm & (1 << i)) |
723a0aa0 JD |
2219 | continue; |
2220 | sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]); | |
4f3f51bc JD |
2221 | if (has_old_autopwm(data)) |
2222 | sysfs_remove_group(&dev->kobj, | |
2223 | &it87_group_autopwm[i]); | |
723a0aa0 | 2224 | } |
6a8d7acf JD |
2225 | if (!sio_data->skip_vid) |
2226 | sysfs_remove_group(&dev->kobj, &it87_group_vid); | |
738e5e05 | 2227 | sysfs_remove_group(&dev->kobj, &it87_group_label); |
723a0aa0 JD |
2228 | } |
2229 | ||
6c931ae1 | 2230 | static int it87_probe(struct platform_device *pdev) |
1da177e4 | 2231 | { |
1da177e4 | 2232 | struct it87_data *data; |
b74f3fdd | 2233 | struct resource *res; |
2234 | struct device *dev = &pdev->dev; | |
a8b3a3a5 | 2235 | struct it87_sio_data *sio_data = dev_get_platdata(dev); |
723a0aa0 | 2236 | int err = 0, i; |
1da177e4 | 2237 | int enable_pwm_interface; |
d9b327c3 | 2238 | int fan_beep_need_rw; |
b74f3fdd | 2239 | |
2240 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
62a1d05f GR |
2241 | if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT, |
2242 | DRVNAME)) { | |
b74f3fdd | 2243 | dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", |
2244 | (unsigned long)res->start, | |
87b4b663 | 2245 | (unsigned long)(res->start + IT87_EC_EXTENT - 1)); |
62a1d05f | 2246 | return -EBUSY; |
8e9afcbb | 2247 | } |
1da177e4 | 2248 | |
62a1d05f GR |
2249 | data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL); |
2250 | if (!data) | |
2251 | return -ENOMEM; | |
1da177e4 | 2252 | |
b74f3fdd | 2253 | data->addr = res->start; |
2254 | data->type = sio_data->type; | |
483db43e | 2255 | data->features = it87_devices[sio_data->type].features; |
5d8d2f2b | 2256 | data->peci_mask = it87_devices[sio_data->type].peci_mask; |
19529784 | 2257 | data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask; |
483db43e GR |
2258 | data->name = it87_devices[sio_data->type].name; |
2259 | /* | |
2260 | * IT8705F Datasheet 0.4.1, 3h == Version G. | |
2261 | * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J. | |
2262 | * These are the first revisions with 16-bit tachometer support. | |
2263 | */ | |
2264 | switch (data->type) { | |
2265 | case it87: | |
2266 | if (sio_data->revision >= 0x03) { | |
2267 | data->features &= ~FEAT_OLD_AUTOPWM; | |
9faf28ca | 2268 | data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS; |
483db43e GR |
2269 | } |
2270 | break; | |
2271 | case it8712: | |
2272 | if (sio_data->revision >= 0x08) { | |
2273 | data->features &= ~FEAT_OLD_AUTOPWM; | |
9faf28ca GR |
2274 | data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS | |
2275 | FEAT_FIVE_FANS; | |
483db43e GR |
2276 | } |
2277 | break; | |
2278 | default: | |
2279 | break; | |
2280 | } | |
1da177e4 LT |
2281 | |
2282 | /* Now, we do the remaining detection. */ | |
b74f3fdd | 2283 | if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) |
62a1d05f GR |
2284 | || it87_read_value(data, IT87_REG_CHIPID) != 0x90) |
2285 | return -ENODEV; | |
1da177e4 | 2286 | |
b74f3fdd | 2287 | platform_set_drvdata(pdev, data); |
1da177e4 | 2288 | |
9a61bf63 | 2289 | mutex_init(&data->update_lock); |
1da177e4 | 2290 | |
1da177e4 | 2291 | /* Check PWM configuration */ |
b74f3fdd | 2292 | enable_pwm_interface = it87_check_pwm(dev); |
1da177e4 | 2293 | |
44c1bcd4 | 2294 | /* Starting with IT8721F, we handle scaling of internal voltages */ |
16b5dda2 | 2295 | if (has_12mv_adc(data)) { |
44c1bcd4 JD |
2296 | if (sio_data->internal & (1 << 0)) |
2297 | data->in_scaled |= (1 << 3); /* in3 is AVCC */ | |
2298 | if (sio_data->internal & (1 << 1)) | |
2299 | data->in_scaled |= (1 << 7); /* in7 is VSB */ | |
2300 | if (sio_data->internal & (1 << 2)) | |
2301 | data->in_scaled |= (1 << 8); /* in8 is Vbat */ | |
c145d5c6 RM |
2302 | if (sio_data->internal & (1 << 3)) |
2303 | data->in_scaled |= (1 << 9); /* in9 is AVCC */ | |
7bc32d29 GR |
2304 | } else if (sio_data->type == it8781 || sio_data->type == it8782 || |
2305 | sio_data->type == it8783) { | |
0531d98b GR |
2306 | if (sio_data->internal & (1 << 0)) |
2307 | data->in_scaled |= (1 << 3); /* in3 is VCC5V */ | |
2308 | if (sio_data->internal & (1 << 1)) | |
2309 | data->in_scaled |= (1 << 7); /* in7 is VCCH5V */ | |
44c1bcd4 JD |
2310 | } |
2311 | ||
4573acbc GR |
2312 | data->has_temp = 0x07; |
2313 | if (sio_data->skip_temp & (1 << 2)) { | |
2314 | if (sio_data->type == it8782 | |
2315 | && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80)) | |
2316 | data->has_temp &= ~(1 << 2); | |
2317 | } | |
2318 | ||
1da177e4 | 2319 | /* Initialize the IT87 chip */ |
b74f3fdd | 2320 | it87_init_device(pdev); |
1da177e4 LT |
2321 | |
2322 | /* Register sysfs hooks */ | |
5f2dc798 JD |
2323 | err = sysfs_create_group(&dev->kobj, &it87_group); |
2324 | if (err) | |
62a1d05f | 2325 | return err; |
17d648bf | 2326 | |
c145d5c6 | 2327 | for (i = 0; i < 10; i++) { |
9172b5d1 GR |
2328 | if (sio_data->skip_in & (1 << i)) |
2329 | continue; | |
2330 | err = sysfs_create_group(&dev->kobj, &it87_group_in[i]); | |
2331 | if (err) | |
62a1d05f | 2332 | goto error; |
9172b5d1 GR |
2333 | if (sio_data->beep_pin && it87_attributes_in_beep[i]) { |
2334 | err = sysfs_create_file(&dev->kobj, | |
2335 | it87_attributes_in_beep[i]); | |
2336 | if (err) | |
62a1d05f | 2337 | goto error; |
9172b5d1 GR |
2338 | } |
2339 | } | |
2340 | ||
4573acbc GR |
2341 | for (i = 0; i < 3; i++) { |
2342 | if (!(data->has_temp & (1 << i))) | |
2343 | continue; | |
2344 | err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]); | |
d9b327c3 | 2345 | if (err) |
62a1d05f | 2346 | goto error; |
161d898a GR |
2347 | if (has_temp_offset(data)) { |
2348 | err = sysfs_create_file(&dev->kobj, | |
2349 | it87_attributes_temp_offset[i]); | |
2350 | if (err) | |
2351 | goto error; | |
2352 | } | |
4573acbc GR |
2353 | if (sio_data->beep_pin) { |
2354 | err = sysfs_create_file(&dev->kobj, | |
2355 | it87_attributes_temp_beep[i]); | |
2356 | if (err) | |
2357 | goto error; | |
2358 | } | |
d9b327c3 JD |
2359 | } |
2360 | ||
9060f8bd | 2361 | /* Do not create fan files for disabled fans */ |
d9b327c3 | 2362 | fan_beep_need_rw = 1; |
fa3f70d6 | 2363 | for (i = 0; i < 6; i++) { |
723a0aa0 JD |
2364 | if (!(data->has_fan & (1 << i))) |
2365 | continue; | |
e1169ba0 | 2366 | err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]); |
723a0aa0 | 2367 | if (err) |
62a1d05f | 2368 | goto error; |
d9b327c3 | 2369 | |
e1169ba0 GR |
2370 | if (i < 3 && !has_16bit_fans(data)) { |
2371 | err = sysfs_create_file(&dev->kobj, | |
2372 | it87_attributes_fan_div[i]); | |
2373 | if (err) | |
2374 | goto error; | |
2375 | } | |
2376 | ||
d9b327c3 JD |
2377 | if (sio_data->beep_pin) { |
2378 | err = sysfs_create_file(&dev->kobj, | |
2379 | it87_attributes_fan_beep[i]); | |
2380 | if (err) | |
62a1d05f | 2381 | goto error; |
d9b327c3 JD |
2382 | if (!fan_beep_need_rw) |
2383 | continue; | |
2384 | ||
4a0d71cf GR |
2385 | /* |
2386 | * As we have a single beep enable bit for all fans, | |
d9b327c3 | 2387 | * only the first enabled fan has a writable attribute |
4a0d71cf GR |
2388 | * for it. |
2389 | */ | |
d9b327c3 JD |
2390 | if (sysfs_chmod_file(&dev->kobj, |
2391 | it87_attributes_fan_beep[i], | |
2392 | S_IRUGO | S_IWUSR)) | |
2393 | dev_dbg(dev, "chmod +w fan%d_beep failed\n", | |
2394 | i + 1); | |
2395 | fan_beep_need_rw = 0; | |
2396 | } | |
17d648bf JD |
2397 | } |
2398 | ||
1da177e4 | 2399 | if (enable_pwm_interface) { |
723a0aa0 JD |
2400 | for (i = 0; i < 3; i++) { |
2401 | if (sio_data->skip_pwm & (1 << i)) | |
2402 | continue; | |
2403 | err = sysfs_create_group(&dev->kobj, | |
2404 | &it87_group_pwm[i]); | |
2405 | if (err) | |
62a1d05f | 2406 | goto error; |
4f3f51bc JD |
2407 | |
2408 | if (!has_old_autopwm(data)) | |
2409 | continue; | |
2410 | err = sysfs_create_group(&dev->kobj, | |
2411 | &it87_group_autopwm[i]); | |
2412 | if (err) | |
62a1d05f | 2413 | goto error; |
98dd22c3 | 2414 | } |
1da177e4 LT |
2415 | } |
2416 | ||
895ff267 | 2417 | if (!sio_data->skip_vid) { |
303760b4 | 2418 | data->vrm = vid_which_vrm(); |
87673dd7 | 2419 | /* VID reading from Super-I/O config space if available */ |
b74f3fdd | 2420 | data->vid = sio_data->vid_value; |
6a8d7acf JD |
2421 | err = sysfs_create_group(&dev->kobj, &it87_group_vid); |
2422 | if (err) | |
62a1d05f | 2423 | goto error; |
87808be4 JD |
2424 | } |
2425 | ||
738e5e05 | 2426 | /* Export labels for internal sensors */ |
c145d5c6 | 2427 | for (i = 0; i < 4; i++) { |
738e5e05 JD |
2428 | if (!(sio_data->internal & (1 << i))) |
2429 | continue; | |
2430 | err = sysfs_create_file(&dev->kobj, | |
2431 | it87_attributes_label[i]); | |
2432 | if (err) | |
62a1d05f | 2433 | goto error; |
738e5e05 JD |
2434 | } |
2435 | ||
1beeffe4 TJ |
2436 | data->hwmon_dev = hwmon_device_register(dev); |
2437 | if (IS_ERR(data->hwmon_dev)) { | |
2438 | err = PTR_ERR(data->hwmon_dev); | |
62a1d05f | 2439 | goto error; |
1da177e4 LT |
2440 | } |
2441 | ||
2442 | return 0; | |
2443 | ||
62a1d05f | 2444 | error: |
723a0aa0 | 2445 | it87_remove_files(dev); |
1da177e4 LT |
2446 | return err; |
2447 | } | |
2448 | ||
281dfd0b | 2449 | static int it87_remove(struct platform_device *pdev) |
1da177e4 | 2450 | { |
b74f3fdd | 2451 | struct it87_data *data = platform_get_drvdata(pdev); |
1da177e4 | 2452 | |
1beeffe4 | 2453 | hwmon_device_unregister(data->hwmon_dev); |
723a0aa0 | 2454 | it87_remove_files(&pdev->dev); |
943b0830 | 2455 | |
1da177e4 LT |
2456 | return 0; |
2457 | } | |
2458 | ||
4a0d71cf GR |
2459 | /* |
2460 | * Must be called with data->update_lock held, except during initialization. | |
2461 | * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, | |
2462 | * would slow down the IT87 access and should not be necessary. | |
2463 | */ | |
b74f3fdd | 2464 | static int it87_read_value(struct it87_data *data, u8 reg) |
1da177e4 | 2465 | { |
b74f3fdd | 2466 | outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); |
2467 | return inb_p(data->addr + IT87_DATA_REG_OFFSET); | |
1da177e4 LT |
2468 | } |
2469 | ||
4a0d71cf GR |
2470 | /* |
2471 | * Must be called with data->update_lock held, except during initialization. | |
2472 | * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, | |
2473 | * would slow down the IT87 access and should not be necessary. | |
2474 | */ | |
b74f3fdd | 2475 | static void it87_write_value(struct it87_data *data, u8 reg, u8 value) |
1da177e4 | 2476 | { |
b74f3fdd | 2477 | outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); |
2478 | outb_p(value, data->addr + IT87_DATA_REG_OFFSET); | |
1da177e4 LT |
2479 | } |
2480 | ||
2481 | /* Return 1 if and only if the PWM interface is safe to use */ | |
6c931ae1 | 2482 | static int it87_check_pwm(struct device *dev) |
1da177e4 | 2483 | { |
b74f3fdd | 2484 | struct it87_data *data = dev_get_drvdata(dev); |
4a0d71cf GR |
2485 | /* |
2486 | * Some BIOSes fail to correctly configure the IT87 fans. All fans off | |
1da177e4 | 2487 | * and polarity set to active low is sign that this is the case so we |
4a0d71cf GR |
2488 | * disable pwm control to protect the user. |
2489 | */ | |
b74f3fdd | 2490 | int tmp = it87_read_value(data, IT87_REG_FAN_CTL); |
1da177e4 LT |
2491 | if ((tmp & 0x87) == 0) { |
2492 | if (fix_pwm_polarity) { | |
4a0d71cf GR |
2493 | /* |
2494 | * The user asks us to attempt a chip reconfiguration. | |
1da177e4 | 2495 | * This means switching to active high polarity and |
4a0d71cf GR |
2496 | * inverting all fan speed values. |
2497 | */ | |
1da177e4 LT |
2498 | int i; |
2499 | u8 pwm[3]; | |
2500 | ||
2501 | for (i = 0; i < 3; i++) | |
b74f3fdd | 2502 | pwm[i] = it87_read_value(data, |
1da177e4 LT |
2503 | IT87_REG_PWM(i)); |
2504 | ||
4a0d71cf GR |
2505 | /* |
2506 | * If any fan is in automatic pwm mode, the polarity | |
1da177e4 LT |
2507 | * might be correct, as suspicious as it seems, so we |
2508 | * better don't change anything (but still disable the | |
4a0d71cf GR |
2509 | * PWM interface). |
2510 | */ | |
1da177e4 | 2511 | if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) { |
1d9bcf6a GR |
2512 | dev_info(dev, |
2513 | "Reconfiguring PWM to active high polarity\n"); | |
b74f3fdd | 2514 | it87_write_value(data, IT87_REG_FAN_CTL, |
1da177e4 LT |
2515 | tmp | 0x87); |
2516 | for (i = 0; i < 3; i++) | |
b74f3fdd | 2517 | it87_write_value(data, |
1da177e4 LT |
2518 | IT87_REG_PWM(i), |
2519 | 0x7f & ~pwm[i]); | |
2520 | return 1; | |
2521 | } | |
2522 | ||
1d9bcf6a GR |
2523 | dev_info(dev, |
2524 | "PWM configuration is too broken to be fixed\n"); | |
1da177e4 LT |
2525 | } |
2526 | ||
1d9bcf6a GR |
2527 | dev_info(dev, |
2528 | "Detected broken BIOS defaults, disabling PWM interface\n"); | |
1da177e4 LT |
2529 | return 0; |
2530 | } else if (fix_pwm_polarity) { | |
1d9bcf6a GR |
2531 | dev_info(dev, |
2532 | "PWM configuration looks sane, won't touch\n"); | |
1da177e4 LT |
2533 | } |
2534 | ||
2535 | return 1; | |
2536 | } | |
2537 | ||
2538 | /* Called when we have found a new IT87. */ | |
6c931ae1 | 2539 | static void it87_init_device(struct platform_device *pdev) |
1da177e4 | 2540 | { |
a8b3a3a5 | 2541 | struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev); |
b74f3fdd | 2542 | struct it87_data *data = platform_get_drvdata(pdev); |
1da177e4 | 2543 | int tmp, i; |
591ec650 | 2544 | u8 mask; |
1da177e4 | 2545 | |
4a0d71cf GR |
2546 | /* |
2547 | * For each PWM channel: | |
b99883dc JD |
2548 | * - If it is in automatic mode, setting to manual mode should set |
2549 | * the fan to full speed by default. | |
2550 | * - If it is in manual mode, we need a mapping to temperature | |
2551 | * channels to use when later setting to automatic mode later. | |
2552 | * Use a 1:1 mapping by default (we are clueless.) | |
2553 | * In both cases, the value can (and should) be changed by the user | |
6229cdb2 JD |
2554 | * prior to switching to a different mode. |
2555 | * Note that this is no longer needed for the IT8721F and later, as | |
2556 | * these have separate registers for the temperature mapping and the | |
4a0d71cf GR |
2557 | * manual duty cycle. |
2558 | */ | |
1da177e4 | 2559 | for (i = 0; i < 3; i++) { |
b99883dc JD |
2560 | data->pwm_temp_map[i] = i; |
2561 | data->pwm_duty[i] = 0x7f; /* Full speed */ | |
4f3f51bc | 2562 | data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */ |
1da177e4 LT |
2563 | } |
2564 | ||
4a0d71cf GR |
2565 | /* |
2566 | * Some chips seem to have default value 0xff for all limit | |
c5df9b7a JD |
2567 | * registers. For low voltage limits it makes no sense and triggers |
2568 | * alarms, so change to 0 instead. For high temperature limits, it | |
2569 | * means -1 degree C, which surprisingly doesn't trigger an alarm, | |
4a0d71cf GR |
2570 | * but is still confusing, so change to 127 degrees C. |
2571 | */ | |
c5df9b7a | 2572 | for (i = 0; i < 8; i++) { |
b74f3fdd | 2573 | tmp = it87_read_value(data, IT87_REG_VIN_MIN(i)); |
c5df9b7a | 2574 | if (tmp == 0xff) |
b74f3fdd | 2575 | it87_write_value(data, IT87_REG_VIN_MIN(i), 0); |
c5df9b7a JD |
2576 | } |
2577 | for (i = 0; i < 3; i++) { | |
b74f3fdd | 2578 | tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i)); |
c5df9b7a | 2579 | if (tmp == 0xff) |
b74f3fdd | 2580 | it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127); |
c5df9b7a JD |
2581 | } |
2582 | ||
4a0d71cf GR |
2583 | /* |
2584 | * Temperature channels are not forcibly enabled, as they can be | |
a00afb97 JD |
2585 | * set to two different sensor types and we can't guess which one |
2586 | * is correct for a given system. These channels can be enabled at | |
4a0d71cf GR |
2587 | * run-time through the temp{1-3}_type sysfs accessors if needed. |
2588 | */ | |
1da177e4 LT |
2589 | |
2590 | /* Check if voltage monitors are reset manually or by some reason */ | |
b74f3fdd | 2591 | tmp = it87_read_value(data, IT87_REG_VIN_ENABLE); |
1da177e4 LT |
2592 | if ((tmp & 0xff) == 0) { |
2593 | /* Enable all voltage monitors */ | |
b74f3fdd | 2594 | it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff); |
1da177e4 LT |
2595 | } |
2596 | ||
2597 | /* Check if tachometers are reset manually or by some reason */ | |
591ec650 | 2598 | mask = 0x70 & ~(sio_data->skip_fan << 4); |
b74f3fdd | 2599 | data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL); |
591ec650 | 2600 | if ((data->fan_main_ctrl & mask) == 0) { |
1da177e4 | 2601 | /* Enable all fan tachometers */ |
591ec650 | 2602 | data->fan_main_ctrl |= mask; |
5f2dc798 JD |
2603 | it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, |
2604 | data->fan_main_ctrl); | |
1da177e4 | 2605 | } |
9060f8bd | 2606 | data->has_fan = (data->fan_main_ctrl >> 4) & 0x07; |
1da177e4 | 2607 | |
fa3f70d6 GR |
2608 | tmp = it87_read_value(data, IT87_REG_FAN_16BIT); |
2609 | ||
9faf28ca GR |
2610 | /* Set tachometers to 16-bit mode if needed */ |
2611 | if (has_fan16_config(data)) { | |
9060f8bd | 2612 | if (~tmp & 0x07 & data->has_fan) { |
b74f3fdd | 2613 | dev_dbg(&pdev->dev, |
17d648bf | 2614 | "Setting fan1-3 to 16-bit mode\n"); |
b74f3fdd | 2615 | it87_write_value(data, IT87_REG_FAN_16BIT, |
17d648bf JD |
2616 | tmp | 0x07); |
2617 | } | |
9faf28ca GR |
2618 | } |
2619 | ||
2620 | /* Check for additional fans */ | |
2621 | if (has_five_fans(data)) { | |
9faf28ca GR |
2622 | if (tmp & (1 << 4)) |
2623 | data->has_fan |= (1 << 3); /* fan4 enabled */ | |
2624 | if (tmp & (1 << 5)) | |
2625 | data->has_fan |= (1 << 4); /* fan5 enabled */ | |
fa3f70d6 GR |
2626 | if (has_six_fans(data) && (tmp & (1 << 2))) |
2627 | data->has_fan |= (1 << 5); /* fan6 enabled */ | |
17d648bf JD |
2628 | } |
2629 | ||
591ec650 JD |
2630 | /* Fan input pins may be used for alternative functions */ |
2631 | data->has_fan &= ~sio_data->skip_fan; | |
2632 | ||
1da177e4 | 2633 | /* Start monitoring */ |
b74f3fdd | 2634 | it87_write_value(data, IT87_REG_CONFIG, |
41002f8d | 2635 | (it87_read_value(data, IT87_REG_CONFIG) & 0x3e) |
1da177e4 LT |
2636 | | (update_vbat ? 0x41 : 0x01)); |
2637 | } | |
2638 | ||
b99883dc JD |
2639 | static void it87_update_pwm_ctrl(struct it87_data *data, int nr) |
2640 | { | |
2641 | data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr)); | |
16b5dda2 | 2642 | if (has_newer_autopwm(data)) { |
b99883dc | 2643 | data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; |
6229cdb2 JD |
2644 | data->pwm_duty[nr] = it87_read_value(data, |
2645 | IT87_REG_PWM_DUTY(nr)); | |
2646 | } else { | |
2647 | if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ | |
2648 | data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; | |
2649 | else /* Manual mode */ | |
2650 | data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f; | |
2651 | } | |
4f3f51bc JD |
2652 | |
2653 | if (has_old_autopwm(data)) { | |
2654 | int i; | |
2655 | ||
2656 | for (i = 0; i < 5 ; i++) | |
2657 | data->auto_temp[nr][i] = it87_read_value(data, | |
2658 | IT87_REG_AUTO_TEMP(nr, i)); | |
2659 | for (i = 0; i < 3 ; i++) | |
2660 | data->auto_pwm[nr][i] = it87_read_value(data, | |
2661 | IT87_REG_AUTO_PWM(nr, i)); | |
2662 | } | |
b99883dc JD |
2663 | } |
2664 | ||
1da177e4 LT |
2665 | static struct it87_data *it87_update_device(struct device *dev) |
2666 | { | |
b74f3fdd | 2667 | struct it87_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
2668 | int i; |
2669 | ||
9a61bf63 | 2670 | mutex_lock(&data->update_lock); |
1da177e4 LT |
2671 | |
2672 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
2673 | || !data->valid) { | |
1da177e4 | 2674 | if (update_vbat) { |
4a0d71cf GR |
2675 | /* |
2676 | * Cleared after each update, so reenable. Value | |
2677 | * returned by this read will be previous value | |
2678 | */ | |
b74f3fdd | 2679 | it87_write_value(data, IT87_REG_CONFIG, |
5f2dc798 | 2680 | it87_read_value(data, IT87_REG_CONFIG) | 0x40); |
1da177e4 LT |
2681 | } |
2682 | for (i = 0; i <= 7; i++) { | |
929c6a56 | 2683 | data->in[i][0] = |
5f2dc798 | 2684 | it87_read_value(data, IT87_REG_VIN(i)); |
929c6a56 | 2685 | data->in[i][1] = |
5f2dc798 | 2686 | it87_read_value(data, IT87_REG_VIN_MIN(i)); |
929c6a56 | 2687 | data->in[i][2] = |
5f2dc798 | 2688 | it87_read_value(data, IT87_REG_VIN_MAX(i)); |
1da177e4 | 2689 | } |
3543a53f | 2690 | /* in8 (battery) has no limit registers */ |
929c6a56 | 2691 | data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8)); |
c145d5c6 RM |
2692 | if (data->type == it8603) |
2693 | data->in[9][0] = it87_read_value(data, 0x2f); | |
1da177e4 | 2694 | |
fa3f70d6 | 2695 | for (i = 0; i < 6; i++) { |
9060f8bd JD |
2696 | /* Skip disabled fans */ |
2697 | if (!(data->has_fan & (1 << i))) | |
2698 | continue; | |
2699 | ||
e1169ba0 | 2700 | data->fan[i][1] = |
5f2dc798 | 2701 | it87_read_value(data, IT87_REG_FAN_MIN[i]); |
e1169ba0 | 2702 | data->fan[i][0] = it87_read_value(data, |
c7f1f716 | 2703 | IT87_REG_FAN[i]); |
17d648bf | 2704 | /* Add high byte if in 16-bit mode */ |
0475169c | 2705 | if (has_16bit_fans(data)) { |
e1169ba0 | 2706 | data->fan[i][0] |= it87_read_value(data, |
c7f1f716 | 2707 | IT87_REG_FANX[i]) << 8; |
e1169ba0 | 2708 | data->fan[i][1] |= it87_read_value(data, |
c7f1f716 | 2709 | IT87_REG_FANX_MIN[i]) << 8; |
17d648bf | 2710 | } |
1da177e4 LT |
2711 | } |
2712 | for (i = 0; i < 3; i++) { | |
4573acbc GR |
2713 | if (!(data->has_temp & (1 << i))) |
2714 | continue; | |
60ca385a | 2715 | data->temp[i][0] = |
5f2dc798 | 2716 | it87_read_value(data, IT87_REG_TEMP(i)); |
60ca385a | 2717 | data->temp[i][1] = |
5f2dc798 | 2718 | it87_read_value(data, IT87_REG_TEMP_LOW(i)); |
60ca385a GR |
2719 | data->temp[i][2] = |
2720 | it87_read_value(data, IT87_REG_TEMP_HIGH(i)); | |
161d898a GR |
2721 | if (has_temp_offset(data)) |
2722 | data->temp[i][3] = | |
2723 | it87_read_value(data, | |
2724 | IT87_REG_TEMP_OFFSET[i]); | |
1da177e4 LT |
2725 | } |
2726 | ||
17d648bf | 2727 | /* Newer chips don't have clock dividers */ |
0475169c | 2728 | if ((data->has_fan & 0x07) && !has_16bit_fans(data)) { |
b74f3fdd | 2729 | i = it87_read_value(data, IT87_REG_FAN_DIV); |
17d648bf JD |
2730 | data->fan_div[0] = i & 0x07; |
2731 | data->fan_div[1] = (i >> 3) & 0x07; | |
2732 | data->fan_div[2] = (i & 0x40) ? 3 : 1; | |
2733 | } | |
1da177e4 LT |
2734 | |
2735 | data->alarms = | |
b74f3fdd | 2736 | it87_read_value(data, IT87_REG_ALARM1) | |
2737 | (it87_read_value(data, IT87_REG_ALARM2) << 8) | | |
2738 | (it87_read_value(data, IT87_REG_ALARM3) << 16); | |
d9b327c3 | 2739 | data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); |
b99883dc | 2740 | |
b74f3fdd | 2741 | data->fan_main_ctrl = it87_read_value(data, |
2742 | IT87_REG_FAN_MAIN_CTRL); | |
2743 | data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL); | |
b99883dc JD |
2744 | for (i = 0; i < 3; i++) |
2745 | it87_update_pwm_ctrl(data, i); | |
b74f3fdd | 2746 | |
2747 | data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE); | |
19529784 | 2748 | data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); |
4a0d71cf GR |
2749 | /* |
2750 | * The IT8705F does not have VID capability. | |
2751 | * The IT8718F and later don't use IT87_REG_VID for the | |
2752 | * same purpose. | |
2753 | */ | |
17d648bf | 2754 | if (data->type == it8712 || data->type == it8716) { |
b74f3fdd | 2755 | data->vid = it87_read_value(data, IT87_REG_VID); |
4a0d71cf GR |
2756 | /* |
2757 | * The older IT8712F revisions had only 5 VID pins, | |
2758 | * but we assume it is always safe to read 6 bits. | |
2759 | */ | |
17d648bf | 2760 | data->vid &= 0x3f; |
1da177e4 LT |
2761 | } |
2762 | data->last_updated = jiffies; | |
2763 | data->valid = 1; | |
2764 | } | |
2765 | ||
9a61bf63 | 2766 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
2767 | |
2768 | return data; | |
2769 | } | |
2770 | ||
b74f3fdd | 2771 | static int __init it87_device_add(unsigned short address, |
2772 | const struct it87_sio_data *sio_data) | |
2773 | { | |
2774 | struct resource res = { | |
87b4b663 BH |
2775 | .start = address + IT87_EC_OFFSET, |
2776 | .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1, | |
b74f3fdd | 2777 | .name = DRVNAME, |
2778 | .flags = IORESOURCE_IO, | |
2779 | }; | |
2780 | int err; | |
2781 | ||
b9acb64a JD |
2782 | err = acpi_check_resource_conflict(&res); |
2783 | if (err) | |
2784 | goto exit; | |
2785 | ||
b74f3fdd | 2786 | pdev = platform_device_alloc(DRVNAME, address); |
2787 | if (!pdev) { | |
2788 | err = -ENOMEM; | |
a8ca1037 | 2789 | pr_err("Device allocation failed\n"); |
b74f3fdd | 2790 | goto exit; |
2791 | } | |
2792 | ||
2793 | err = platform_device_add_resources(pdev, &res, 1); | |
2794 | if (err) { | |
a8ca1037 | 2795 | pr_err("Device resource addition failed (%d)\n", err); |
b74f3fdd | 2796 | goto exit_device_put; |
2797 | } | |
2798 | ||
2799 | err = platform_device_add_data(pdev, sio_data, | |
2800 | sizeof(struct it87_sio_data)); | |
2801 | if (err) { | |
a8ca1037 | 2802 | pr_err("Platform data allocation failed\n"); |
b74f3fdd | 2803 | goto exit_device_put; |
2804 | } | |
2805 | ||
2806 | err = platform_device_add(pdev); | |
2807 | if (err) { | |
a8ca1037 | 2808 | pr_err("Device addition failed (%d)\n", err); |
b74f3fdd | 2809 | goto exit_device_put; |
2810 | } | |
2811 | ||
2812 | return 0; | |
2813 | ||
2814 | exit_device_put: | |
2815 | platform_device_put(pdev); | |
2816 | exit: | |
2817 | return err; | |
2818 | } | |
2819 | ||
1da177e4 LT |
2820 | static int __init sm_it87_init(void) |
2821 | { | |
b74f3fdd | 2822 | int err; |
5f2dc798 | 2823 | unsigned short isa_address = 0; |
b74f3fdd | 2824 | struct it87_sio_data sio_data; |
2825 | ||
98dd22c3 | 2826 | memset(&sio_data, 0, sizeof(struct it87_sio_data)); |
b74f3fdd | 2827 | err = it87_find(&isa_address, &sio_data); |
2828 | if (err) | |
2829 | return err; | |
2830 | err = platform_driver_register(&it87_driver); | |
2831 | if (err) | |
2832 | return err; | |
fde09509 | 2833 | |
b74f3fdd | 2834 | err = it87_device_add(isa_address, &sio_data); |
5f2dc798 | 2835 | if (err) { |
b74f3fdd | 2836 | platform_driver_unregister(&it87_driver); |
2837 | return err; | |
2838 | } | |
2839 | ||
2840 | return 0; | |
1da177e4 LT |
2841 | } |
2842 | ||
2843 | static void __exit sm_it87_exit(void) | |
2844 | { | |
b74f3fdd | 2845 | platform_device_unregister(pdev); |
2846 | platform_driver_unregister(&it87_driver); | |
1da177e4 LT |
2847 | } |
2848 | ||
2849 | ||
7c81c60f | 2850 | MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>"); |
44c1bcd4 | 2851 | MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver"); |
1da177e4 LT |
2852 | module_param(update_vbat, bool, 0); |
2853 | MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value"); | |
2854 | module_param(fix_pwm_polarity, bool, 0); | |
5f2dc798 JD |
2855 | MODULE_PARM_DESC(fix_pwm_polarity, |
2856 | "Force PWM polarity to active high (DANGEROUS)"); | |
1da177e4 LT |
2857 | MODULE_LICENSE("GPL"); |
2858 | ||
2859 | module_init(sm_it87_init); | |
2860 | module_exit(sm_it87_exit); |