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4453d736 GR |
1 | /* |
2 | * jc42.c - driver for Jedec JC42.4 compliant temperature sensors | |
3 | * | |
4 | * Copyright (c) 2010 Ericsson AB. | |
5 | * | |
6 | * Derived from lm77.c by Andras BALI <drewie@freemail.hu>. | |
7 | * | |
8 | * JC42.4 compliant temperature sensors are typically used on memory modules. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
25 | #include <linux/module.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/i2c.h> | |
30 | #include <linux/hwmon.h> | |
31 | #include <linux/hwmon-sysfs.h> | |
32 | #include <linux/err.h> | |
33 | #include <linux/mutex.h> | |
34 | ||
35 | /* Addresses to scan */ | |
36 | static const unsigned short normal_i2c[] = { | |
37 | 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END }; | |
38 | ||
39 | /* JC42 registers. All registers are 16 bit. */ | |
40 | #define JC42_REG_CAP 0x00 | |
41 | #define JC42_REG_CONFIG 0x01 | |
42 | #define JC42_REG_TEMP_UPPER 0x02 | |
43 | #define JC42_REG_TEMP_LOWER 0x03 | |
44 | #define JC42_REG_TEMP_CRITICAL 0x04 | |
45 | #define JC42_REG_TEMP 0x05 | |
46 | #define JC42_REG_MANID 0x06 | |
47 | #define JC42_REG_DEVICEID 0x07 | |
48 | ||
49 | /* Status bits in temperature register */ | |
50 | #define JC42_ALARM_CRIT_BIT 15 | |
51 | #define JC42_ALARM_MAX_BIT 14 | |
52 | #define JC42_ALARM_MIN_BIT 13 | |
53 | ||
54 | /* Configuration register defines */ | |
55 | #define JC42_CFG_CRIT_ONLY (1 << 2) | |
2c6315da CL |
56 | #define JC42_CFG_TCRIT_LOCK (1 << 6) |
57 | #define JC42_CFG_EVENT_LOCK (1 << 7) | |
4453d736 GR |
58 | #define JC42_CFG_SHUTDOWN (1 << 8) |
59 | #define JC42_CFG_HYST_SHIFT 9 | |
60 | #define JC42_CFG_HYST_MASK 0x03 | |
61 | ||
62 | /* Capabilities */ | |
63 | #define JC42_CAP_RANGE (1 << 2) | |
64 | ||
65 | /* Manufacturer IDs */ | |
66 | #define ADT_MANID 0x11d4 /* Analog Devices */ | |
1bd612a2 | 67 | #define ATMEL_MANID 0x001f /* Atmel */ |
4453d736 GR |
68 | #define MAX_MANID 0x004d /* Maxim */ |
69 | #define IDT_MANID 0x00b3 /* IDT */ | |
70 | #define MCP_MANID 0x0054 /* Microchip */ | |
71 | #define NXP_MANID 0x1131 /* NXP Semiconductors */ | |
72 | #define ONS_MANID 0x1b09 /* ON Semiconductor */ | |
73 | #define STM_MANID 0x104a /* ST Microelectronics */ | |
74 | ||
75 | /* Supported chips */ | |
76 | ||
77 | /* Analog Devices */ | |
78 | #define ADT7408_DEVID 0x0801 | |
79 | #define ADT7408_DEVID_MASK 0xffff | |
80 | ||
1bd612a2 GR |
81 | /* Atmel */ |
82 | #define AT30TS00_DEVID 0x8201 | |
83 | #define AT30TS00_DEVID_MASK 0xffff | |
84 | ||
4453d736 GR |
85 | /* IDT */ |
86 | #define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */ | |
87 | #define TS3000B3_DEVID_MASK 0xffff | |
88 | ||
1bd612a2 GR |
89 | #define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */ |
90 | #define TS3000GB2_DEVID_MASK 0xffff | |
91 | ||
4453d736 GR |
92 | /* Maxim */ |
93 | #define MAX6604_DEVID 0x3e00 | |
94 | #define MAX6604_DEVID_MASK 0xffff | |
95 | ||
96 | /* Microchip */ | |
1bd612a2 GR |
97 | #define MCP9804_DEVID 0x0200 |
98 | #define MCP9804_DEVID_MASK 0xfffc | |
99 | ||
4453d736 GR |
100 | #define MCP98242_DEVID 0x2000 |
101 | #define MCP98242_DEVID_MASK 0xfffc | |
102 | ||
103 | #define MCP98243_DEVID 0x2100 | |
104 | #define MCP98243_DEVID_MASK 0xfffc | |
105 | ||
106 | #define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */ | |
107 | #define MCP9843_DEVID_MASK 0xfffe | |
108 | ||
109 | /* NXP */ | |
110 | #define SE97_DEVID 0xa200 | |
111 | #define SE97_DEVID_MASK 0xfffc | |
112 | ||
113 | #define SE98_DEVID 0xa100 | |
114 | #define SE98_DEVID_MASK 0xfffc | |
115 | ||
116 | /* ON Semiconductor */ | |
117 | #define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */ | |
118 | #define CAT6095_DEVID_MASK 0xffe0 | |
119 | ||
120 | /* ST Microelectronics */ | |
121 | #define STTS424_DEVID 0x0101 | |
122 | #define STTS424_DEVID_MASK 0xffff | |
123 | ||
124 | #define STTS424E_DEVID 0x0000 | |
125 | #define STTS424E_DEVID_MASK 0xfffe | |
126 | ||
4de86126 JD |
127 | #define STTS2002_DEVID 0x0300 |
128 | #define STTS2002_DEVID_MASK 0xffff | |
129 | ||
130 | #define STTS3000_DEVID 0x0200 | |
131 | #define STTS3000_DEVID_MASK 0xffff | |
132 | ||
4453d736 GR |
133 | static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 }; |
134 | ||
135 | struct jc42_chips { | |
136 | u16 manid; | |
137 | u16 devid; | |
138 | u16 devid_mask; | |
139 | }; | |
140 | ||
141 | static struct jc42_chips jc42_chips[] = { | |
142 | { ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK }, | |
1bd612a2 | 143 | { ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK }, |
4453d736 | 144 | { IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK }, |
1bd612a2 | 145 | { IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK }, |
4453d736 | 146 | { MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK }, |
1bd612a2 | 147 | { MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK }, |
4453d736 GR |
148 | { MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK }, |
149 | { MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK }, | |
150 | { MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK }, | |
151 | { NXP_MANID, SE97_DEVID, SE97_DEVID_MASK }, | |
152 | { ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK }, | |
153 | { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK }, | |
154 | { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK }, | |
155 | { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK }, | |
4de86126 JD |
156 | { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK }, |
157 | { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK }, | |
4453d736 GR |
158 | }; |
159 | ||
160 | /* Each client has this additional data */ | |
161 | struct jc42_data { | |
162 | struct device *hwmon_dev; | |
163 | struct mutex update_lock; /* protect register access */ | |
164 | bool extended; /* true if extended range supported */ | |
165 | bool valid; | |
166 | unsigned long last_updated; /* In jiffies */ | |
167 | u16 orig_config; /* original configuration */ | |
168 | u16 config; /* current configuration */ | |
169 | u16 temp_input; /* Temperatures */ | |
170 | u16 temp_crit; | |
171 | u16 temp_min; | |
172 | u16 temp_max; | |
173 | }; | |
174 | ||
175 | static int jc42_probe(struct i2c_client *client, | |
176 | const struct i2c_device_id *id); | |
177 | static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info); | |
178 | static int jc42_remove(struct i2c_client *client); | |
4453d736 GR |
179 | |
180 | static struct jc42_data *jc42_update_device(struct device *dev); | |
181 | ||
182 | static const struct i2c_device_id jc42_id[] = { | |
4453d736 | 183 | { "jc42", 0 }, |
4453d736 GR |
184 | { } |
185 | }; | |
186 | MODULE_DEVICE_TABLE(i2c, jc42_id); | |
187 | ||
188 | #ifdef CONFIG_PM | |
189 | ||
190 | static int jc42_suspend(struct device *dev) | |
191 | { | |
192 | struct i2c_client *client = to_i2c_client(dev); | |
193 | struct jc42_data *data = i2c_get_clientdata(client); | |
194 | ||
195 | data->config |= JC42_CFG_SHUTDOWN; | |
90f4102c | 196 | i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config); |
4453d736 GR |
197 | return 0; |
198 | } | |
199 | ||
200 | static int jc42_resume(struct device *dev) | |
201 | { | |
202 | struct i2c_client *client = to_i2c_client(dev); | |
203 | struct jc42_data *data = i2c_get_clientdata(client); | |
204 | ||
205 | data->config &= ~JC42_CFG_SHUTDOWN; | |
90f4102c | 206 | i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config); |
4453d736 GR |
207 | return 0; |
208 | } | |
209 | ||
210 | static const struct dev_pm_ops jc42_dev_pm_ops = { | |
211 | .suspend = jc42_suspend, | |
212 | .resume = jc42_resume, | |
213 | }; | |
214 | ||
215 | #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops) | |
216 | #else | |
217 | #define JC42_DEV_PM_OPS NULL | |
218 | #endif /* CONFIG_PM */ | |
219 | ||
220 | /* This is the driver that will be inserted */ | |
221 | static struct i2c_driver jc42_driver = { | |
774466ad | 222 | .class = I2C_CLASS_SPD, |
4453d736 GR |
223 | .driver = { |
224 | .name = "jc42", | |
225 | .pm = JC42_DEV_PM_OPS, | |
226 | }, | |
227 | .probe = jc42_probe, | |
228 | .remove = jc42_remove, | |
229 | .id_table = jc42_id, | |
230 | .detect = jc42_detect, | |
231 | .address_list = normal_i2c, | |
232 | }; | |
233 | ||
234 | #define JC42_TEMP_MIN_EXTENDED (-40000) | |
235 | #define JC42_TEMP_MIN 0 | |
236 | #define JC42_TEMP_MAX 125000 | |
237 | ||
238 | static u16 jc42_temp_to_reg(int temp, bool extended) | |
239 | { | |
240 | int ntemp = SENSORS_LIMIT(temp, | |
241 | extended ? JC42_TEMP_MIN_EXTENDED : | |
242 | JC42_TEMP_MIN, JC42_TEMP_MAX); | |
243 | ||
244 | /* convert from 0.001 to 0.0625 resolution */ | |
245 | return (ntemp * 2 / 125) & 0x1fff; | |
246 | } | |
247 | ||
248 | static int jc42_temp_from_reg(s16 reg) | |
249 | { | |
250 | reg &= 0x1fff; | |
251 | ||
252 | /* sign extend register */ | |
253 | if (reg & 0x1000) | |
254 | reg |= 0xf000; | |
255 | ||
256 | /* convert from 0.0625 to 0.001 resolution */ | |
257 | return reg * 125 / 2; | |
258 | } | |
259 | ||
260 | /* sysfs stuff */ | |
261 | ||
262 | /* read routines for temperature limits */ | |
263 | #define show(value) \ | |
264 | static ssize_t show_##value(struct device *dev, \ | |
265 | struct device_attribute *attr, \ | |
266 | char *buf) \ | |
267 | { \ | |
268 | struct jc42_data *data = jc42_update_device(dev); \ | |
269 | if (IS_ERR(data)) \ | |
270 | return PTR_ERR(data); \ | |
271 | return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value)); \ | |
272 | } | |
273 | ||
274 | show(temp_input); | |
275 | show(temp_crit); | |
276 | show(temp_min); | |
277 | show(temp_max); | |
278 | ||
279 | /* read routines for hysteresis values */ | |
280 | static ssize_t show_temp_crit_hyst(struct device *dev, | |
281 | struct device_attribute *attr, char *buf) | |
282 | { | |
283 | struct jc42_data *data = jc42_update_device(dev); | |
284 | int temp, hyst; | |
285 | ||
286 | if (IS_ERR(data)) | |
287 | return PTR_ERR(data); | |
288 | ||
289 | temp = jc42_temp_from_reg(data->temp_crit); | |
290 | hyst = jc42_hysteresis[(data->config >> JC42_CFG_HYST_SHIFT) | |
291 | & JC42_CFG_HYST_MASK]; | |
292 | return sprintf(buf, "%d\n", temp - hyst); | |
293 | } | |
294 | ||
295 | static ssize_t show_temp_max_hyst(struct device *dev, | |
296 | struct device_attribute *attr, char *buf) | |
297 | { | |
298 | struct jc42_data *data = jc42_update_device(dev); | |
299 | int temp, hyst; | |
300 | ||
301 | if (IS_ERR(data)) | |
302 | return PTR_ERR(data); | |
303 | ||
304 | temp = jc42_temp_from_reg(data->temp_max); | |
305 | hyst = jc42_hysteresis[(data->config >> JC42_CFG_HYST_SHIFT) | |
306 | & JC42_CFG_HYST_MASK]; | |
307 | return sprintf(buf, "%d\n", temp - hyst); | |
308 | } | |
309 | ||
310 | /* write routines */ | |
311 | #define set(value, reg) \ | |
312 | static ssize_t set_##value(struct device *dev, \ | |
313 | struct device_attribute *attr, \ | |
314 | const char *buf, size_t count) \ | |
315 | { \ | |
316 | struct i2c_client *client = to_i2c_client(dev); \ | |
317 | struct jc42_data *data = i2c_get_clientdata(client); \ | |
318 | int err, ret = count; \ | |
319 | long val; \ | |
179c4fdb | 320 | if (kstrtol(buf, 10, &val) < 0) \ |
4453d736 GR |
321 | return -EINVAL; \ |
322 | mutex_lock(&data->update_lock); \ | |
323 | data->value = jc42_temp_to_reg(val, data->extended); \ | |
90f4102c | 324 | err = i2c_smbus_write_word_swapped(client, reg, data->value); \ |
4453d736 GR |
325 | if (err < 0) \ |
326 | ret = err; \ | |
327 | mutex_unlock(&data->update_lock); \ | |
328 | return ret; \ | |
329 | } | |
330 | ||
331 | set(temp_min, JC42_REG_TEMP_LOWER); | |
332 | set(temp_max, JC42_REG_TEMP_UPPER); | |
333 | set(temp_crit, JC42_REG_TEMP_CRITICAL); | |
334 | ||
5d577dba GR |
335 | /* |
336 | * JC42.4 compliant chips only support four hysteresis values. | |
337 | * Pick best choice and go from there. | |
338 | */ | |
4453d736 GR |
339 | static ssize_t set_temp_crit_hyst(struct device *dev, |
340 | struct device_attribute *attr, | |
341 | const char *buf, size_t count) | |
342 | { | |
343 | struct i2c_client *client = to_i2c_client(dev); | |
344 | struct jc42_data *data = i2c_get_clientdata(client); | |
e8667296 | 345 | unsigned long val; |
4453d736 GR |
346 | int diff, hyst; |
347 | int err; | |
348 | int ret = count; | |
349 | ||
179c4fdb | 350 | if (kstrtoul(buf, 10, &val) < 0) |
4453d736 GR |
351 | return -EINVAL; |
352 | ||
353 | diff = jc42_temp_from_reg(data->temp_crit) - val; | |
354 | hyst = 0; | |
355 | if (diff > 0) { | |
356 | if (diff < 2250) | |
357 | hyst = 1; /* 1.5 degrees C */ | |
358 | else if (diff < 4500) | |
359 | hyst = 2; /* 3.0 degrees C */ | |
360 | else | |
361 | hyst = 3; /* 6.0 degrees C */ | |
362 | } | |
363 | ||
364 | mutex_lock(&data->update_lock); | |
365 | data->config = (data->config | |
366 | & ~(JC42_CFG_HYST_MASK << JC42_CFG_HYST_SHIFT)) | |
367 | | (hyst << JC42_CFG_HYST_SHIFT); | |
90f4102c JD |
368 | err = i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, |
369 | data->config); | |
4453d736 GR |
370 | if (err < 0) |
371 | ret = err; | |
372 | mutex_unlock(&data->update_lock); | |
373 | return ret; | |
374 | } | |
375 | ||
376 | static ssize_t show_alarm(struct device *dev, | |
377 | struct device_attribute *attr, char *buf) | |
378 | { | |
379 | u16 bit = to_sensor_dev_attr(attr)->index; | |
380 | struct jc42_data *data = jc42_update_device(dev); | |
381 | u16 val; | |
382 | ||
383 | if (IS_ERR(data)) | |
384 | return PTR_ERR(data); | |
385 | ||
386 | val = data->temp_input; | |
387 | if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY)) | |
388 | val = 0; | |
389 | return sprintf(buf, "%u\n", (val >> bit) & 1); | |
390 | } | |
391 | ||
392 | static DEVICE_ATTR(temp1_input, S_IRUGO, | |
393 | show_temp_input, NULL); | |
2c6315da | 394 | static DEVICE_ATTR(temp1_crit, S_IRUGO, |
4453d736 | 395 | show_temp_crit, set_temp_crit); |
2c6315da | 396 | static DEVICE_ATTR(temp1_min, S_IRUGO, |
4453d736 | 397 | show_temp_min, set_temp_min); |
2c6315da | 398 | static DEVICE_ATTR(temp1_max, S_IRUGO, |
4453d736 GR |
399 | show_temp_max, set_temp_max); |
400 | ||
2c6315da | 401 | static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, |
4453d736 GR |
402 | show_temp_crit_hyst, set_temp_crit_hyst); |
403 | static DEVICE_ATTR(temp1_max_hyst, S_IRUGO, | |
404 | show_temp_max_hyst, NULL); | |
405 | ||
406 | static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL, | |
407 | JC42_ALARM_CRIT_BIT); | |
408 | static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL, | |
409 | JC42_ALARM_MIN_BIT); | |
410 | static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL, | |
411 | JC42_ALARM_MAX_BIT); | |
412 | ||
413 | static struct attribute *jc42_attributes[] = { | |
414 | &dev_attr_temp1_input.attr, | |
415 | &dev_attr_temp1_crit.attr, | |
416 | &dev_attr_temp1_min.attr, | |
417 | &dev_attr_temp1_max.attr, | |
418 | &dev_attr_temp1_crit_hyst.attr, | |
419 | &dev_attr_temp1_max_hyst.attr, | |
420 | &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, | |
421 | &sensor_dev_attr_temp1_min_alarm.dev_attr.attr, | |
422 | &sensor_dev_attr_temp1_max_alarm.dev_attr.attr, | |
423 | NULL | |
424 | }; | |
425 | ||
587a1f16 | 426 | static umode_t jc42_attribute_mode(struct kobject *kobj, |
2c6315da CL |
427 | struct attribute *attr, int index) |
428 | { | |
429 | struct device *dev = container_of(kobj, struct device, kobj); | |
430 | struct i2c_client *client = to_i2c_client(dev); | |
431 | struct jc42_data *data = i2c_get_clientdata(client); | |
432 | unsigned int config = data->config; | |
433 | bool readonly; | |
434 | ||
435 | if (attr == &dev_attr_temp1_crit.attr) | |
436 | readonly = config & JC42_CFG_TCRIT_LOCK; | |
437 | else if (attr == &dev_attr_temp1_min.attr || | |
438 | attr == &dev_attr_temp1_max.attr) | |
439 | readonly = config & JC42_CFG_EVENT_LOCK; | |
440 | else if (attr == &dev_attr_temp1_crit_hyst.attr) | |
441 | readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK); | |
442 | else | |
443 | readonly = true; | |
444 | ||
445 | return S_IRUGO | (readonly ? 0 : S_IWUSR); | |
446 | } | |
447 | ||
4453d736 GR |
448 | static const struct attribute_group jc42_group = { |
449 | .attrs = jc42_attributes, | |
2c6315da | 450 | .is_visible = jc42_attribute_mode, |
4453d736 GR |
451 | }; |
452 | ||
453 | /* Return 0 if detection is successful, -ENODEV otherwise */ | |
f15df57d | 454 | static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info) |
4453d736 | 455 | { |
f15df57d | 456 | struct i2c_adapter *adapter = client->adapter; |
4453d736 GR |
457 | int i, config, cap, manid, devid; |
458 | ||
459 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | | |
460 | I2C_FUNC_SMBUS_WORD_DATA)) | |
461 | return -ENODEV; | |
462 | ||
f15df57d GR |
463 | cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP); |
464 | config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG); | |
465 | manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID); | |
466 | devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID); | |
4453d736 GR |
467 | |
468 | if (cap < 0 || config < 0 || manid < 0 || devid < 0) | |
469 | return -ENODEV; | |
470 | ||
471 | if ((cap & 0xff00) || (config & 0xf800)) | |
472 | return -ENODEV; | |
473 | ||
474 | for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) { | |
475 | struct jc42_chips *chip = &jc42_chips[i]; | |
476 | if (manid == chip->manid && | |
477 | (devid & chip->devid_mask) == chip->devid) { | |
478 | strlcpy(info->type, "jc42", I2C_NAME_SIZE); | |
479 | return 0; | |
480 | } | |
481 | } | |
482 | return -ENODEV; | |
483 | } | |
484 | ||
f15df57d | 485 | static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id) |
4453d736 GR |
486 | { |
487 | struct jc42_data *data; | |
488 | int config, cap, err; | |
f15df57d | 489 | struct device *dev = &client->dev; |
4453d736 | 490 | |
f15df57d GR |
491 | data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL); |
492 | if (!data) | |
493 | return -ENOMEM; | |
4453d736 | 494 | |
f15df57d | 495 | i2c_set_clientdata(client, data); |
4453d736 GR |
496 | mutex_init(&data->update_lock); |
497 | ||
f15df57d GR |
498 | cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP); |
499 | if (cap < 0) | |
500 | return cap; | |
501 | ||
4453d736 GR |
502 | data->extended = !!(cap & JC42_CAP_RANGE); |
503 | ||
f15df57d GR |
504 | config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG); |
505 | if (config < 0) | |
506 | return config; | |
507 | ||
4453d736 GR |
508 | data->orig_config = config; |
509 | if (config & JC42_CFG_SHUTDOWN) { | |
510 | config &= ~JC42_CFG_SHUTDOWN; | |
f15df57d | 511 | i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config); |
4453d736 GR |
512 | } |
513 | data->config = config; | |
514 | ||
515 | /* Register sysfs hooks */ | |
f15df57d | 516 | err = sysfs_create_group(&dev->kobj, &jc42_group); |
4453d736 | 517 | if (err) |
f15df57d | 518 | return err; |
4453d736 | 519 | |
f15df57d | 520 | data->hwmon_dev = hwmon_device_register(dev); |
4453d736 GR |
521 | if (IS_ERR(data->hwmon_dev)) { |
522 | err = PTR_ERR(data->hwmon_dev); | |
523 | goto exit_remove; | |
524 | } | |
525 | ||
526 | return 0; | |
527 | ||
528 | exit_remove: | |
f15df57d | 529 | sysfs_remove_group(&dev->kobj, &jc42_group); |
4453d736 GR |
530 | return err; |
531 | } | |
532 | ||
533 | static int jc42_remove(struct i2c_client *client) | |
534 | { | |
535 | struct jc42_data *data = i2c_get_clientdata(client); | |
536 | hwmon_device_unregister(data->hwmon_dev); | |
537 | sysfs_remove_group(&client->dev.kobj, &jc42_group); | |
538 | if (data->config != data->orig_config) | |
90f4102c JD |
539 | i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, |
540 | data->orig_config); | |
4453d736 GR |
541 | return 0; |
542 | } | |
543 | ||
4453d736 GR |
544 | static struct jc42_data *jc42_update_device(struct device *dev) |
545 | { | |
546 | struct i2c_client *client = to_i2c_client(dev); | |
547 | struct jc42_data *data = i2c_get_clientdata(client); | |
548 | struct jc42_data *ret = data; | |
549 | int val; | |
550 | ||
551 | mutex_lock(&data->update_lock); | |
552 | ||
553 | if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { | |
90f4102c | 554 | val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP); |
4453d736 GR |
555 | if (val < 0) { |
556 | ret = ERR_PTR(val); | |
557 | goto abort; | |
558 | } | |
559 | data->temp_input = val; | |
560 | ||
90f4102c JD |
561 | val = i2c_smbus_read_word_swapped(client, |
562 | JC42_REG_TEMP_CRITICAL); | |
4453d736 GR |
563 | if (val < 0) { |
564 | ret = ERR_PTR(val); | |
565 | goto abort; | |
566 | } | |
567 | data->temp_crit = val; | |
568 | ||
90f4102c | 569 | val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_LOWER); |
4453d736 GR |
570 | if (val < 0) { |
571 | ret = ERR_PTR(val); | |
572 | goto abort; | |
573 | } | |
574 | data->temp_min = val; | |
575 | ||
90f4102c | 576 | val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_UPPER); |
4453d736 GR |
577 | if (val < 0) { |
578 | ret = ERR_PTR(val); | |
579 | goto abort; | |
580 | } | |
581 | data->temp_max = val; | |
582 | ||
583 | data->last_updated = jiffies; | |
584 | data->valid = true; | |
585 | } | |
586 | abort: | |
587 | mutex_unlock(&data->update_lock); | |
588 | return ret; | |
589 | } | |
590 | ||
f0967eea | 591 | module_i2c_driver(jc42_driver); |
4453d736 GR |
592 | |
593 | MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>"); | |
594 | MODULE_DESCRIPTION("JC42 driver"); | |
595 | MODULE_LICENSE("GPL"); |