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1da177e4 LT |
1 | /* |
2 | w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware | |
3 | monitoring | |
4 | Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>, | |
5 | Philip Edelbrock <phil@netroedge.com>, | |
6 | and Mark Studebaker <mdsxyz123@yahoo.com> | |
7 | Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org> | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program; if not, write to the Free Software | |
21 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | */ | |
23 | ||
24 | /* | |
25 | Supports following chips: | |
26 | ||
27 | Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
28 | w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) | |
29 | w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) | |
30 | w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) | |
31 | w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC) | |
32 | ||
33 | For other winbond chips, and for i2c support in the above chips, | |
34 | use w83781d.c. | |
35 | ||
36 | Note: automatic ("cruise") fan control for 697, 637 & 627thf not | |
37 | supported yet. | |
38 | */ | |
39 | ||
40 | #include <linux/module.h> | |
41 | #include <linux/init.h> | |
42 | #include <linux/slab.h> | |
43 | #include <linux/jiffies.h> | |
44 | #include <linux/i2c.h> | |
fde09509 | 45 | #include <linux/i2c-isa.h> |
943b0830 | 46 | #include <linux/hwmon.h> |
303760b4 | 47 | #include <linux/hwmon-vid.h> |
943b0830 | 48 | #include <linux/err.h> |
1da177e4 LT |
49 | #include <asm/io.h> |
50 | #include "lm75.h" | |
51 | ||
52 | static u16 force_addr; | |
53 | module_param(force_addr, ushort, 0); | |
54 | MODULE_PARM_DESC(force_addr, | |
55 | "Initialize the base address of the sensors"); | |
56 | static u8 force_i2c = 0x1f; | |
57 | module_param(force_i2c, byte, 0); | |
58 | MODULE_PARM_DESC(force_i2c, | |
59 | "Initialize the i2c address of the sensors"); | |
60 | ||
2d8672c5 JD |
61 | /* The actual ISA address is read from Super-I/O configuration space */ |
62 | static unsigned short address; | |
1da177e4 LT |
63 | |
64 | /* Insmod parameters */ | |
2d8672c5 | 65 | enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf }; |
1da177e4 LT |
66 | |
67 | static int init = 1; | |
68 | module_param(init, bool, 0); | |
69 | MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); | |
70 | ||
71 | /* modified from kernel/include/traps.c */ | |
72 | static int REG; /* The register to read/write */ | |
73 | #define DEV 0x07 /* Register: Logical device select */ | |
74 | static int VAL; /* The value to read/write */ | |
75 | ||
76 | /* logical device numbers for superio_select (below) */ | |
77 | #define W83627HF_LD_FDC 0x00 | |
78 | #define W83627HF_LD_PRT 0x01 | |
79 | #define W83627HF_LD_UART1 0x02 | |
80 | #define W83627HF_LD_UART2 0x03 | |
81 | #define W83627HF_LD_KBC 0x05 | |
82 | #define W83627HF_LD_CIR 0x06 /* w83627hf only */ | |
83 | #define W83627HF_LD_GAME 0x07 | |
84 | #define W83627HF_LD_MIDI 0x07 | |
85 | #define W83627HF_LD_GPIO1 0x07 | |
86 | #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */ | |
87 | #define W83627HF_LD_GPIO2 0x08 | |
88 | #define W83627HF_LD_GPIO3 0x09 | |
89 | #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */ | |
90 | #define W83627HF_LD_ACPI 0x0a | |
91 | #define W83627HF_LD_HWM 0x0b | |
92 | ||
93 | #define DEVID 0x20 /* Register: Device ID */ | |
94 | ||
95 | #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */ | |
96 | #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */ | |
97 | #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */ | |
98 | ||
99 | static inline void | |
100 | superio_outb(int reg, int val) | |
101 | { | |
102 | outb(reg, REG); | |
103 | outb(val, VAL); | |
104 | } | |
105 | ||
106 | static inline int | |
107 | superio_inb(int reg) | |
108 | { | |
109 | outb(reg, REG); | |
110 | return inb(VAL); | |
111 | } | |
112 | ||
113 | static inline void | |
114 | superio_select(int ld) | |
115 | { | |
116 | outb(DEV, REG); | |
117 | outb(ld, VAL); | |
118 | } | |
119 | ||
120 | static inline void | |
121 | superio_enter(void) | |
122 | { | |
123 | outb(0x87, REG); | |
124 | outb(0x87, REG); | |
125 | } | |
126 | ||
127 | static inline void | |
128 | superio_exit(void) | |
129 | { | |
130 | outb(0xAA, REG); | |
131 | } | |
132 | ||
133 | #define W627_DEVID 0x52 | |
134 | #define W627THF_DEVID 0x82 | |
135 | #define W697_DEVID 0x60 | |
136 | #define W637_DEVID 0x70 | |
137 | #define WINB_ACT_REG 0x30 | |
138 | #define WINB_BASE_REG 0x60 | |
139 | /* Constants specified below */ | |
140 | ||
141 | /* Length of ISA address segment */ | |
142 | #define WINB_EXTENT 8 | |
143 | ||
144 | /* Where are the ISA address/data registers relative to the base address */ | |
145 | #define W83781D_ADDR_REG_OFFSET 5 | |
146 | #define W83781D_DATA_REG_OFFSET 6 | |
147 | ||
148 | /* The W83781D registers */ | |
149 | /* The W83782D registers for nr=7,8 are in bank 5 */ | |
150 | #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ | |
151 | (0x554 + (((nr) - 7) * 2))) | |
152 | #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | |
153 | (0x555 + (((nr) - 7) * 2))) | |
154 | #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | |
155 | (0x550 + (nr) - 7)) | |
156 | ||
157 | #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr)) | |
158 | #define W83781D_REG_FAN(nr) (0x27 + (nr)) | |
159 | ||
160 | #define W83781D_REG_TEMP2_CONFIG 0x152 | |
161 | #define W83781D_REG_TEMP3_CONFIG 0x252 | |
162 | #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ | |
163 | ((nr == 2) ? (0x0150) : \ | |
164 | (0x27))) | |
165 | #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ | |
166 | ((nr == 2) ? (0x153) : \ | |
167 | (0x3A))) | |
168 | #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ | |
169 | ((nr == 2) ? (0x155) : \ | |
170 | (0x39))) | |
171 | ||
172 | #define W83781D_REG_BANK 0x4E | |
173 | ||
174 | #define W83781D_REG_CONFIG 0x40 | |
175 | #define W83781D_REG_ALARM1 0x41 | |
176 | #define W83781D_REG_ALARM2 0x42 | |
177 | #define W83781D_REG_ALARM3 0x450 | |
178 | ||
179 | #define W83781D_REG_IRQ 0x4C | |
180 | #define W83781D_REG_BEEP_CONFIG 0x4D | |
181 | #define W83781D_REG_BEEP_INTS1 0x56 | |
182 | #define W83781D_REG_BEEP_INTS2 0x57 | |
183 | #define W83781D_REG_BEEP_INTS3 0x453 | |
184 | ||
185 | #define W83781D_REG_VID_FANDIV 0x47 | |
186 | ||
187 | #define W83781D_REG_CHIPID 0x49 | |
188 | #define W83781D_REG_WCHIPID 0x58 | |
189 | #define W83781D_REG_CHIPMAN 0x4F | |
190 | #define W83781D_REG_PIN 0x4B | |
191 | ||
192 | #define W83781D_REG_VBAT 0x5D | |
193 | ||
194 | #define W83627HF_REG_PWM1 0x5A | |
195 | #define W83627HF_REG_PWM2 0x5B | |
196 | #define W83627HF_REG_PWMCLK12 0x5C | |
197 | ||
198 | #define W83627THF_REG_PWM1 0x01 /* 697HF and 637HF too */ | |
199 | #define W83627THF_REG_PWM2 0x03 /* 697HF and 637HF too */ | |
200 | #define W83627THF_REG_PWM3 0x11 /* 637HF too */ | |
201 | ||
202 | #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF too */ | |
203 | ||
204 | static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 }; | |
205 | static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2, | |
206 | W83627THF_REG_PWM3 }; | |
207 | #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \ | |
208 | regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1]) | |
209 | ||
210 | #define W83781D_REG_I2C_ADDR 0x48 | |
211 | #define W83781D_REG_I2C_SUBADDR 0x4A | |
212 | ||
213 | /* Sensor selection */ | |
214 | #define W83781D_REG_SCFG1 0x5D | |
215 | static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; | |
216 | #define W83781D_REG_SCFG2 0x59 | |
217 | static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; | |
218 | #define W83781D_DEFAULT_BETA 3435 | |
219 | ||
220 | /* Conversions. Limit checking is only done on the TO_REG | |
221 | variants. Note that you should be a bit careful with which arguments | |
222 | these macros are called: arguments may be evaluated more than once. | |
223 | Fixing this is just not worth it. */ | |
224 | #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255)) | |
225 | #define IN_FROM_REG(val) ((val) * 16) | |
226 | ||
227 | static inline u8 FAN_TO_REG(long rpm, int div) | |
228 | { | |
229 | if (rpm == 0) | |
230 | return 255; | |
231 | rpm = SENSORS_LIMIT(rpm, 1, 1000000); | |
232 | return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, | |
233 | 254); | |
234 | } | |
235 | ||
236 | #define TEMP_MIN (-128000) | |
237 | #define TEMP_MAX ( 127000) | |
238 | ||
239 | /* TEMP: 0.001C/bit (-128C to +127C) | |
240 | REG: 1C/bit, two's complement */ | |
241 | static u8 TEMP_TO_REG(int temp) | |
242 | { | |
243 | int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX); | |
244 | ntemp += (ntemp<0 ? -500 : 500); | |
245 | return (u8)(ntemp / 1000); | |
246 | } | |
247 | ||
248 | static int TEMP_FROM_REG(u8 reg) | |
249 | { | |
250 | return (s8)reg * 1000; | |
251 | } | |
252 | ||
253 | #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div))) | |
254 | ||
255 | #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) | |
256 | ||
257 | #define BEEP_MASK_FROM_REG(val) (val) | |
258 | #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff) | |
259 | #define BEEP_ENABLE_TO_REG(val) ((val)?1:0) | |
260 | #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0) | |
261 | ||
262 | #define DIV_FROM_REG(val) (1 << (val)) | |
263 | ||
264 | static inline u8 DIV_TO_REG(long val) | |
265 | { | |
266 | int i; | |
267 | val = SENSORS_LIMIT(val, 1, 128) >> 1; | |
abc01922 | 268 | for (i = 0; i < 7; i++) { |
1da177e4 LT |
269 | if (val == 0) |
270 | break; | |
271 | val >>= 1; | |
272 | } | |
273 | return ((u8) i); | |
274 | } | |
275 | ||
276 | /* For each registered chip, we need to keep some data in memory. That | |
277 | data is pointed to by w83627hf_list[NR]->data. The structure itself is | |
278 | dynamically allocated, at the same time when a new client is allocated. */ | |
279 | struct w83627hf_data { | |
280 | struct i2c_client client; | |
943b0830 | 281 | struct class_device *class_dev; |
1da177e4 LT |
282 | struct semaphore lock; |
283 | enum chips type; | |
284 | ||
285 | struct semaphore update_lock; | |
286 | char valid; /* !=0 if following fields are valid */ | |
287 | unsigned long last_updated; /* In jiffies */ | |
288 | ||
289 | struct i2c_client *lm75; /* for secondary I2C addresses */ | |
290 | /* pointer to array of 2 subclients */ | |
291 | ||
292 | u8 in[9]; /* Register value */ | |
293 | u8 in_max[9]; /* Register value */ | |
294 | u8 in_min[9]; /* Register value */ | |
295 | u8 fan[3]; /* Register value */ | |
296 | u8 fan_min[3]; /* Register value */ | |
297 | u8 temp; | |
298 | u8 temp_max; /* Register value */ | |
299 | u8 temp_max_hyst; /* Register value */ | |
300 | u16 temp_add[2]; /* Register value */ | |
301 | u16 temp_max_add[2]; /* Register value */ | |
302 | u16 temp_max_hyst_add[2]; /* Register value */ | |
303 | u8 fan_div[3]; /* Register encoding, shifted right */ | |
304 | u8 vid; /* Register encoding, combined */ | |
305 | u32 alarms; /* Register encoding, combined */ | |
306 | u32 beep_mask; /* Register encoding, combined */ | |
307 | u8 beep_enable; /* Boolean */ | |
308 | u8 pwm[3]; /* Register value */ | |
309 | u16 sens[3]; /* 782D/783S only. | |
310 | 1 = pentium diode; 2 = 3904 diode; | |
311 | 3000-5000 = thermistor beta. | |
312 | Default = 3435. | |
313 | Other Betas unimplemented */ | |
314 | u8 vrm; | |
315 | u8 vrm_ovt; /* Register value, 627thf & 637hf only */ | |
316 | }; | |
317 | ||
318 | ||
2d8672c5 | 319 | static int w83627hf_detect(struct i2c_adapter *adapter); |
1da177e4 LT |
320 | static int w83627hf_detach_client(struct i2c_client *client); |
321 | ||
322 | static int w83627hf_read_value(struct i2c_client *client, u16 register); | |
323 | static int w83627hf_write_value(struct i2c_client *client, u16 register, | |
324 | u16 value); | |
325 | static struct w83627hf_data *w83627hf_update_device(struct device *dev); | |
326 | static void w83627hf_init_client(struct i2c_client *client); | |
327 | ||
328 | static struct i2c_driver w83627hf_driver = { | |
329 | .owner = THIS_MODULE, | |
330 | .name = "w83627hf", | |
2d8672c5 | 331 | .attach_adapter = w83627hf_detect, |
1da177e4 LT |
332 | .detach_client = w83627hf_detach_client, |
333 | }; | |
334 | ||
335 | /* following are the sysfs callback functions */ | |
336 | #define show_in_reg(reg) \ | |
337 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
338 | { \ | |
339 | struct w83627hf_data *data = w83627hf_update_device(dev); \ | |
340 | return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \ | |
341 | } | |
342 | show_in_reg(in) | |
343 | show_in_reg(in_min) | |
344 | show_in_reg(in_max) | |
345 | ||
346 | #define store_in_reg(REG, reg) \ | |
347 | static ssize_t \ | |
348 | store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \ | |
349 | { \ | |
350 | struct i2c_client *client = to_i2c_client(dev); \ | |
351 | struct w83627hf_data *data = i2c_get_clientdata(client); \ | |
352 | u32 val; \ | |
353 | \ | |
354 | val = simple_strtoul(buf, NULL, 10); \ | |
355 | \ | |
356 | down(&data->update_lock); \ | |
357 | data->in_##reg[nr] = IN_TO_REG(val); \ | |
358 | w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \ | |
359 | data->in_##reg[nr]); \ | |
360 | \ | |
361 | up(&data->update_lock); \ | |
362 | return count; \ | |
363 | } | |
364 | store_in_reg(MIN, min) | |
365 | store_in_reg(MAX, max) | |
366 | ||
367 | #define sysfs_in_offset(offset) \ | |
368 | static ssize_t \ | |
a5099cfc | 369 | show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
370 | { \ |
371 | return show_in(dev, buf, offset); \ | |
372 | } \ | |
373 | static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL); | |
374 | ||
375 | #define sysfs_in_reg_offset(reg, offset) \ | |
a5099cfc | 376 | static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
377 | { \ |
378 | return show_in_##reg (dev, buf, offset); \ | |
379 | } \ | |
380 | static ssize_t \ | |
a5099cfc | 381 | store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \ |
1da177e4 LT |
382 | const char *buf, size_t count) \ |
383 | { \ | |
384 | return store_in_##reg (dev, buf, count, offset); \ | |
385 | } \ | |
386 | static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \ | |
387 | show_regs_in_##reg##offset, store_regs_in_##reg##offset); | |
388 | ||
389 | #define sysfs_in_offsets(offset) \ | |
390 | sysfs_in_offset(offset) \ | |
391 | sysfs_in_reg_offset(min, offset) \ | |
392 | sysfs_in_reg_offset(max, offset) | |
393 | ||
394 | sysfs_in_offsets(1); | |
395 | sysfs_in_offsets(2); | |
396 | sysfs_in_offsets(3); | |
397 | sysfs_in_offsets(4); | |
398 | sysfs_in_offsets(5); | |
399 | sysfs_in_offsets(6); | |
400 | sysfs_in_offsets(7); | |
401 | sysfs_in_offsets(8); | |
402 | ||
403 | /* use a different set of functions for in0 */ | |
404 | static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg) | |
405 | { | |
406 | long in0; | |
407 | ||
408 | if ((data->vrm_ovt & 0x01) && | |
409 | (w83627thf == data->type || w83637hf == data->type)) | |
410 | ||
411 | /* use VRM9 calculation */ | |
412 | in0 = (long)((reg * 488 + 70000 + 50) / 100); | |
413 | else | |
414 | /* use VRM8 (standard) calculation */ | |
415 | in0 = (long)IN_FROM_REG(reg); | |
416 | ||
417 | return sprintf(buf,"%ld\n", in0); | |
418 | } | |
419 | ||
a5099cfc | 420 | static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
421 | { |
422 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
423 | return show_in_0(data, buf, data->in[0]); | |
424 | } | |
425 | ||
a5099cfc | 426 | static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
427 | { |
428 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
429 | return show_in_0(data, buf, data->in_min[0]); | |
430 | } | |
431 | ||
a5099cfc | 432 | static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
433 | { |
434 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
435 | return show_in_0(data, buf, data->in_max[0]); | |
436 | } | |
437 | ||
a5099cfc | 438 | static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr, |
1da177e4 LT |
439 | const char *buf, size_t count) |
440 | { | |
441 | struct i2c_client *client = to_i2c_client(dev); | |
442 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
443 | u32 val; | |
444 | ||
445 | val = simple_strtoul(buf, NULL, 10); | |
446 | ||
447 | down(&data->update_lock); | |
448 | ||
449 | if ((data->vrm_ovt & 0x01) && | |
450 | (w83627thf == data->type || w83637hf == data->type)) | |
451 | ||
452 | /* use VRM9 calculation */ | |
453 | data->in_min[0] = (u8)(((val * 100) - 70000 + 244) / 488); | |
454 | else | |
455 | /* use VRM8 (standard) calculation */ | |
456 | data->in_min[0] = IN_TO_REG(val); | |
457 | ||
458 | w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]); | |
459 | up(&data->update_lock); | |
460 | return count; | |
461 | } | |
462 | ||
a5099cfc | 463 | static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr, |
1da177e4 LT |
464 | const char *buf, size_t count) |
465 | { | |
466 | struct i2c_client *client = to_i2c_client(dev); | |
467 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
468 | u32 val; | |
469 | ||
470 | val = simple_strtoul(buf, NULL, 10); | |
471 | ||
472 | down(&data->update_lock); | |
473 | ||
474 | if ((data->vrm_ovt & 0x01) && | |
475 | (w83627thf == data->type || w83637hf == data->type)) | |
476 | ||
477 | /* use VRM9 calculation */ | |
478 | data->in_max[0] = (u8)(((val * 100) - 70000 + 244) / 488); | |
479 | else | |
480 | /* use VRM8 (standard) calculation */ | |
481 | data->in_max[0] = IN_TO_REG(val); | |
482 | ||
483 | w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]); | |
484 | up(&data->update_lock); | |
485 | return count; | |
486 | } | |
487 | ||
488 | static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL); | |
489 | static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR, | |
490 | show_regs_in_min0, store_regs_in_min0); | |
491 | static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR, | |
492 | show_regs_in_max0, store_regs_in_max0); | |
493 | ||
494 | #define device_create_file_in(client, offset) \ | |
495 | do { \ | |
496 | device_create_file(&client->dev, &dev_attr_in##offset##_input); \ | |
497 | device_create_file(&client->dev, &dev_attr_in##offset##_min); \ | |
498 | device_create_file(&client->dev, &dev_attr_in##offset##_max); \ | |
499 | } while (0) | |
500 | ||
501 | #define show_fan_reg(reg) \ | |
502 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
503 | { \ | |
504 | struct w83627hf_data *data = w83627hf_update_device(dev); \ | |
505 | return sprintf(buf,"%ld\n", \ | |
506 | FAN_FROM_REG(data->reg[nr-1], \ | |
507 | (long)DIV_FROM_REG(data->fan_div[nr-1]))); \ | |
508 | } | |
509 | show_fan_reg(fan); | |
510 | show_fan_reg(fan_min); | |
511 | ||
512 | static ssize_t | |
513 | store_fan_min(struct device *dev, const char *buf, size_t count, int nr) | |
514 | { | |
515 | struct i2c_client *client = to_i2c_client(dev); | |
516 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
517 | u32 val; | |
518 | ||
519 | val = simple_strtoul(buf, NULL, 10); | |
520 | ||
521 | down(&data->update_lock); | |
522 | data->fan_min[nr - 1] = | |
523 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1])); | |
524 | w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr), | |
525 | data->fan_min[nr - 1]); | |
526 | ||
527 | up(&data->update_lock); | |
528 | return count; | |
529 | } | |
530 | ||
531 | #define sysfs_fan_offset(offset) \ | |
a5099cfc | 532 | static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
533 | { \ |
534 | return show_fan(dev, buf, offset); \ | |
535 | } \ | |
536 | static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL); | |
537 | ||
538 | #define sysfs_fan_min_offset(offset) \ | |
a5099cfc | 539 | static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
540 | { \ |
541 | return show_fan_min(dev, buf, offset); \ | |
542 | } \ | |
543 | static ssize_t \ | |
a5099cfc | 544 | store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
545 | { \ |
546 | return store_fan_min(dev, buf, count, offset); \ | |
547 | } \ | |
548 | static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \ | |
549 | show_regs_fan_min##offset, store_regs_fan_min##offset); | |
550 | ||
551 | sysfs_fan_offset(1); | |
552 | sysfs_fan_min_offset(1); | |
553 | sysfs_fan_offset(2); | |
554 | sysfs_fan_min_offset(2); | |
555 | sysfs_fan_offset(3); | |
556 | sysfs_fan_min_offset(3); | |
557 | ||
558 | #define device_create_file_fan(client, offset) \ | |
559 | do { \ | |
560 | device_create_file(&client->dev, &dev_attr_fan##offset##_input); \ | |
561 | device_create_file(&client->dev, &dev_attr_fan##offset##_min); \ | |
562 | } while (0) | |
563 | ||
564 | #define show_temp_reg(reg) \ | |
565 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
566 | { \ | |
567 | struct w83627hf_data *data = w83627hf_update_device(dev); \ | |
568 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
569 | return sprintf(buf,"%ld\n", \ | |
570 | (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ | |
571 | } else { /* TEMP1 */ \ | |
572 | return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ | |
573 | } \ | |
574 | } | |
575 | show_temp_reg(temp); | |
576 | show_temp_reg(temp_max); | |
577 | show_temp_reg(temp_max_hyst); | |
578 | ||
579 | #define store_temp_reg(REG, reg) \ | |
580 | static ssize_t \ | |
581 | store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \ | |
582 | { \ | |
583 | struct i2c_client *client = to_i2c_client(dev); \ | |
584 | struct w83627hf_data *data = i2c_get_clientdata(client); \ | |
585 | u32 val; \ | |
586 | \ | |
587 | val = simple_strtoul(buf, NULL, 10); \ | |
588 | \ | |
589 | down(&data->update_lock); \ | |
590 | \ | |
591 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
592 | data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ | |
593 | w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \ | |
594 | data->temp_##reg##_add[nr-2]); \ | |
595 | } else { /* TEMP1 */ \ | |
596 | data->temp_##reg = TEMP_TO_REG(val); \ | |
597 | w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \ | |
598 | data->temp_##reg); \ | |
599 | } \ | |
600 | \ | |
601 | up(&data->update_lock); \ | |
602 | return count; \ | |
603 | } | |
604 | store_temp_reg(OVER, max); | |
605 | store_temp_reg(HYST, max_hyst); | |
606 | ||
607 | #define sysfs_temp_offset(offset) \ | |
608 | static ssize_t \ | |
a5099cfc | 609 | show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
610 | { \ |
611 | return show_temp(dev, buf, offset); \ | |
612 | } \ | |
613 | static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL); | |
614 | ||
615 | #define sysfs_temp_reg_offset(reg, offset) \ | |
a5099cfc | 616 | static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
617 | { \ |
618 | return show_temp_##reg (dev, buf, offset); \ | |
619 | } \ | |
620 | static ssize_t \ | |
a5099cfc | 621 | store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \ |
1da177e4 LT |
622 | const char *buf, size_t count) \ |
623 | { \ | |
624 | return store_temp_##reg (dev, buf, count, offset); \ | |
625 | } \ | |
626 | static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \ | |
627 | show_regs_temp_##reg##offset, store_regs_temp_##reg##offset); | |
628 | ||
629 | #define sysfs_temp_offsets(offset) \ | |
630 | sysfs_temp_offset(offset) \ | |
631 | sysfs_temp_reg_offset(max, offset) \ | |
632 | sysfs_temp_reg_offset(max_hyst, offset) | |
633 | ||
634 | sysfs_temp_offsets(1); | |
635 | sysfs_temp_offsets(2); | |
636 | sysfs_temp_offsets(3); | |
637 | ||
638 | #define device_create_file_temp(client, offset) \ | |
639 | do { \ | |
640 | device_create_file(&client->dev, &dev_attr_temp##offset##_input); \ | |
641 | device_create_file(&client->dev, &dev_attr_temp##offset##_max); \ | |
642 | device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \ | |
643 | } while (0) | |
644 | ||
645 | static ssize_t | |
a5099cfc | 646 | show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
647 | { |
648 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
649 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
650 | } | |
651 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
652 | #define device_create_file_vid(client) \ | |
653 | device_create_file(&client->dev, &dev_attr_cpu0_vid) | |
654 | ||
655 | static ssize_t | |
a5099cfc | 656 | show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
657 | { |
658 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
659 | return sprintf(buf, "%ld\n", (long) data->vrm); | |
660 | } | |
661 | static ssize_t | |
a5099cfc | 662 | store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) |
1da177e4 LT |
663 | { |
664 | struct i2c_client *client = to_i2c_client(dev); | |
665 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
666 | u32 val; | |
667 | ||
668 | val = simple_strtoul(buf, NULL, 10); | |
669 | data->vrm = val; | |
670 | ||
671 | return count; | |
672 | } | |
673 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
674 | #define device_create_file_vrm(client) \ | |
675 | device_create_file(&client->dev, &dev_attr_vrm) | |
676 | ||
677 | static ssize_t | |
a5099cfc | 678 | show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
679 | { |
680 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
681 | return sprintf(buf, "%ld\n", (long) data->alarms); | |
682 | } | |
683 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); | |
684 | #define device_create_file_alarms(client) \ | |
685 | device_create_file(&client->dev, &dev_attr_alarms) | |
686 | ||
687 | #define show_beep_reg(REG, reg) \ | |
a5099cfc | 688 | static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
689 | { \ |
690 | struct w83627hf_data *data = w83627hf_update_device(dev); \ | |
691 | return sprintf(buf,"%ld\n", \ | |
692 | (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \ | |
693 | } | |
694 | show_beep_reg(ENABLE, enable) | |
695 | show_beep_reg(MASK, mask) | |
696 | ||
697 | #define BEEP_ENABLE 0 /* Store beep_enable */ | |
698 | #define BEEP_MASK 1 /* Store beep_mask */ | |
699 | ||
700 | static ssize_t | |
701 | store_beep_reg(struct device *dev, const char *buf, size_t count, | |
702 | int update_mask) | |
703 | { | |
704 | struct i2c_client *client = to_i2c_client(dev); | |
705 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
706 | u32 val, val2; | |
707 | ||
708 | val = simple_strtoul(buf, NULL, 10); | |
709 | ||
710 | down(&data->update_lock); | |
711 | ||
712 | if (update_mask == BEEP_MASK) { /* We are storing beep_mask */ | |
713 | data->beep_mask = BEEP_MASK_TO_REG(val); | |
714 | w83627hf_write_value(client, W83781D_REG_BEEP_INTS1, | |
715 | data->beep_mask & 0xff); | |
716 | w83627hf_write_value(client, W83781D_REG_BEEP_INTS3, | |
717 | ((data->beep_mask) >> 16) & 0xff); | |
718 | val2 = (data->beep_mask >> 8) & 0x7f; | |
719 | } else { /* We are storing beep_enable */ | |
720 | val2 = | |
721 | w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f; | |
722 | data->beep_enable = BEEP_ENABLE_TO_REG(val); | |
723 | } | |
724 | ||
725 | w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, | |
726 | val2 | data->beep_enable << 7); | |
727 | ||
728 | up(&data->update_lock); | |
729 | return count; | |
730 | } | |
731 | ||
732 | #define sysfs_beep(REG, reg) \ | |
a5099cfc | 733 | static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 | 734 | { \ |
a5099cfc | 735 | return show_beep_##reg(dev, attr, buf); \ |
1da177e4 LT |
736 | } \ |
737 | static ssize_t \ | |
a5099cfc | 738 | store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
739 | { \ |
740 | return store_beep_reg(dev, buf, count, BEEP_##REG); \ | |
741 | } \ | |
742 | static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \ | |
743 | show_regs_beep_##reg, store_regs_beep_##reg); | |
744 | ||
745 | sysfs_beep(ENABLE, enable); | |
746 | sysfs_beep(MASK, mask); | |
747 | ||
748 | #define device_create_file_beep(client) \ | |
749 | do { \ | |
750 | device_create_file(&client->dev, &dev_attr_beep_enable); \ | |
751 | device_create_file(&client->dev, &dev_attr_beep_mask); \ | |
752 | } while (0) | |
753 | ||
754 | static ssize_t | |
755 | show_fan_div_reg(struct device *dev, char *buf, int nr) | |
756 | { | |
757 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
758 | return sprintf(buf, "%ld\n", | |
759 | (long) DIV_FROM_REG(data->fan_div[nr - 1])); | |
760 | } | |
761 | ||
762 | /* Note: we save and restore the fan minimum here, because its value is | |
763 | determined in part by the fan divisor. This follows the principle of | |
764 | least suprise; the user doesn't expect the fan minimum to change just | |
765 | because the divisor changed. */ | |
766 | static ssize_t | |
767 | store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr) | |
768 | { | |
769 | struct i2c_client *client = to_i2c_client(dev); | |
770 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
771 | unsigned long min; | |
772 | u8 reg; | |
773 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
774 | ||
775 | down(&data->update_lock); | |
776 | ||
777 | /* Save fan_min */ | |
778 | min = FAN_FROM_REG(data->fan_min[nr], | |
779 | DIV_FROM_REG(data->fan_div[nr])); | |
780 | ||
781 | data->fan_div[nr] = DIV_TO_REG(val); | |
782 | ||
783 | reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) | |
784 | & (nr==0 ? 0xcf : 0x3f)) | |
785 | | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); | |
786 | w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); | |
787 | ||
788 | reg = (w83627hf_read_value(client, W83781D_REG_VBAT) | |
789 | & ~(1 << (5 + nr))) | |
790 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); | |
791 | w83627hf_write_value(client, W83781D_REG_VBAT, reg); | |
792 | ||
793 | /* Restore fan_min */ | |
794 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | |
795 | w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]); | |
796 | ||
797 | up(&data->update_lock); | |
798 | return count; | |
799 | } | |
800 | ||
801 | #define sysfs_fan_div(offset) \ | |
a5099cfc | 802 | static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
803 | { \ |
804 | return show_fan_div_reg(dev, buf, offset); \ | |
805 | } \ | |
806 | static ssize_t \ | |
a5099cfc | 807 | store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \ |
1da177e4 LT |
808 | const char *buf, size_t count) \ |
809 | { \ | |
810 | return store_fan_div_reg(dev, buf, count, offset - 1); \ | |
811 | } \ | |
812 | static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \ | |
813 | show_regs_fan_div_##offset, store_regs_fan_div_##offset); | |
814 | ||
815 | sysfs_fan_div(1); | |
816 | sysfs_fan_div(2); | |
817 | sysfs_fan_div(3); | |
818 | ||
819 | #define device_create_file_fan_div(client, offset) \ | |
820 | do { \ | |
821 | device_create_file(&client->dev, &dev_attr_fan##offset##_div); \ | |
822 | } while (0) | |
823 | ||
824 | static ssize_t | |
825 | show_pwm_reg(struct device *dev, char *buf, int nr) | |
826 | { | |
827 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
828 | return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]); | |
829 | } | |
830 | ||
831 | static ssize_t | |
832 | store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr) | |
833 | { | |
834 | struct i2c_client *client = to_i2c_client(dev); | |
835 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
836 | u32 val; | |
837 | ||
838 | val = simple_strtoul(buf, NULL, 10); | |
839 | ||
840 | down(&data->update_lock); | |
841 | ||
842 | if (data->type == w83627thf) { | |
843 | /* bits 0-3 are reserved in 627THF */ | |
844 | data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0; | |
845 | w83627hf_write_value(client, | |
846 | W836X7HF_REG_PWM(data->type, nr), | |
847 | data->pwm[nr - 1] | | |
848 | (w83627hf_read_value(client, | |
849 | W836X7HF_REG_PWM(data->type, nr)) & 0x0f)); | |
850 | } else { | |
851 | data->pwm[nr - 1] = PWM_TO_REG(val); | |
852 | w83627hf_write_value(client, | |
853 | W836X7HF_REG_PWM(data->type, nr), | |
854 | data->pwm[nr - 1]); | |
855 | } | |
856 | ||
857 | up(&data->update_lock); | |
858 | return count; | |
859 | } | |
860 | ||
861 | #define sysfs_pwm(offset) \ | |
a5099cfc | 862 | static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
863 | { \ |
864 | return show_pwm_reg(dev, buf, offset); \ | |
865 | } \ | |
866 | static ssize_t \ | |
a5099cfc | 867 | store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
868 | { \ |
869 | return store_pwm_reg(dev, buf, count, offset); \ | |
870 | } \ | |
871 | static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \ | |
872 | show_regs_pwm_##offset, store_regs_pwm_##offset); | |
873 | ||
874 | sysfs_pwm(1); | |
875 | sysfs_pwm(2); | |
876 | sysfs_pwm(3); | |
877 | ||
878 | #define device_create_file_pwm(client, offset) \ | |
879 | do { \ | |
880 | device_create_file(&client->dev, &dev_attr_pwm##offset); \ | |
881 | } while (0) | |
882 | ||
883 | static ssize_t | |
884 | show_sensor_reg(struct device *dev, char *buf, int nr) | |
885 | { | |
886 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
887 | return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]); | |
888 | } | |
889 | ||
890 | static ssize_t | |
891 | store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr) | |
892 | { | |
893 | struct i2c_client *client = to_i2c_client(dev); | |
894 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
895 | u32 val, tmp; | |
896 | ||
897 | val = simple_strtoul(buf, NULL, 10); | |
898 | ||
899 | down(&data->update_lock); | |
900 | ||
901 | switch (val) { | |
902 | case 1: /* PII/Celeron diode */ | |
903 | tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); | |
904 | w83627hf_write_value(client, W83781D_REG_SCFG1, | |
905 | tmp | BIT_SCFG1[nr - 1]); | |
906 | tmp = w83627hf_read_value(client, W83781D_REG_SCFG2); | |
907 | w83627hf_write_value(client, W83781D_REG_SCFG2, | |
908 | tmp | BIT_SCFG2[nr - 1]); | |
909 | data->sens[nr - 1] = val; | |
910 | break; | |
911 | case 2: /* 3904 */ | |
912 | tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); | |
913 | w83627hf_write_value(client, W83781D_REG_SCFG1, | |
914 | tmp | BIT_SCFG1[nr - 1]); | |
915 | tmp = w83627hf_read_value(client, W83781D_REG_SCFG2); | |
916 | w83627hf_write_value(client, W83781D_REG_SCFG2, | |
917 | tmp & ~BIT_SCFG2[nr - 1]); | |
918 | data->sens[nr - 1] = val; | |
919 | break; | |
920 | case W83781D_DEFAULT_BETA: /* thermistor */ | |
921 | tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); | |
922 | w83627hf_write_value(client, W83781D_REG_SCFG1, | |
923 | tmp & ~BIT_SCFG1[nr - 1]); | |
924 | data->sens[nr - 1] = val; | |
925 | break; | |
926 | default: | |
927 | dev_err(&client->dev, | |
928 | "Invalid sensor type %ld; must be 1, 2, or %d\n", | |
929 | (long) val, W83781D_DEFAULT_BETA); | |
930 | break; | |
931 | } | |
932 | ||
933 | up(&data->update_lock); | |
934 | return count; | |
935 | } | |
936 | ||
937 | #define sysfs_sensor(offset) \ | |
a5099cfc | 938 | static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
939 | { \ |
940 | return show_sensor_reg(dev, buf, offset); \ | |
941 | } \ | |
942 | static ssize_t \ | |
a5099cfc | 943 | store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
944 | { \ |
945 | return store_sensor_reg(dev, buf, count, offset); \ | |
946 | } \ | |
947 | static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \ | |
948 | show_regs_sensor_##offset, store_regs_sensor_##offset); | |
949 | ||
950 | sysfs_sensor(1); | |
951 | sysfs_sensor(2); | |
952 | sysfs_sensor(3); | |
953 | ||
954 | #define device_create_file_sensor(client, offset) \ | |
955 | do { \ | |
956 | device_create_file(&client->dev, &dev_attr_temp##offset##_type); \ | |
957 | } while (0) | |
958 | ||
959 | ||
e6cfb3ad | 960 | static int __init w83627hf_find(int sioaddr, unsigned short *addr) |
1da177e4 LT |
961 | { |
962 | u16 val; | |
963 | ||
964 | REG = sioaddr; | |
965 | VAL = sioaddr + 1; | |
966 | ||
967 | superio_enter(); | |
968 | val= superio_inb(DEVID); | |
969 | if(val != W627_DEVID && | |
970 | val != W627THF_DEVID && | |
971 | val != W697_DEVID && | |
972 | val != W637_DEVID) { | |
973 | superio_exit(); | |
974 | return -ENODEV; | |
975 | } | |
976 | ||
977 | superio_select(W83627HF_LD_HWM); | |
978 | val = (superio_inb(WINB_BASE_REG) << 8) | | |
979 | superio_inb(WINB_BASE_REG + 1); | |
2d8672c5 JD |
980 | *addr = val & ~(WINB_EXTENT - 1); |
981 | if (*addr == 0 && force_addr == 0) { | |
1da177e4 LT |
982 | superio_exit(); |
983 | return -ENODEV; | |
984 | } | |
1da177e4 LT |
985 | |
986 | superio_exit(); | |
987 | return 0; | |
988 | } | |
989 | ||
2d8672c5 | 990 | static int w83627hf_detect(struct i2c_adapter *adapter) |
1da177e4 | 991 | { |
2d8672c5 | 992 | int val, kind; |
1da177e4 LT |
993 | struct i2c_client *new_client; |
994 | struct w83627hf_data *data; | |
995 | int err = 0; | |
996 | const char *client_name = ""; | |
997 | ||
1da177e4 LT |
998 | if(force_addr) |
999 | address = force_addr & ~(WINB_EXTENT - 1); | |
1000 | ||
1001 | if (!request_region(address, WINB_EXTENT, w83627hf_driver.name)) { | |
1002 | err = -EBUSY; | |
1003 | goto ERROR0; | |
1004 | } | |
1005 | ||
1006 | if(force_addr) { | |
1007 | printk("w83627hf.o: forcing ISA address 0x%04X\n", address); | |
1008 | superio_enter(); | |
1009 | superio_select(W83627HF_LD_HWM); | |
1010 | superio_outb(WINB_BASE_REG, address >> 8); | |
1011 | superio_outb(WINB_BASE_REG+1, address & 0xff); | |
1012 | superio_exit(); | |
1013 | } | |
1014 | ||
1015 | superio_enter(); | |
1016 | val= superio_inb(DEVID); | |
1017 | if(val == W627_DEVID) | |
1018 | kind = w83627hf; | |
1019 | else if(val == W697_DEVID) | |
1020 | kind = w83697hf; | |
1021 | else if(val == W627THF_DEVID) | |
1022 | kind = w83627thf; | |
1023 | else if(val == W637_DEVID) | |
1024 | kind = w83637hf; | |
1025 | else { | |
1026 | dev_info(&adapter->dev, | |
1027 | "Unsupported chip (dev_id=0x%02X).\n", val); | |
1028 | goto ERROR1; | |
1029 | } | |
1030 | ||
1031 | superio_select(W83627HF_LD_HWM); | |
1032 | if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0) | |
1033 | superio_outb(WINB_ACT_REG, 1); | |
1034 | superio_exit(); | |
1035 | ||
1036 | /* OK. For now, we presume we have a valid client. We now create the | |
1037 | client structure, even though we cannot fill it completely yet. | |
1038 | But it allows us to access w83627hf_{read,write}_value. */ | |
1039 | ||
1040 | if (!(data = kmalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) { | |
1041 | err = -ENOMEM; | |
1042 | goto ERROR1; | |
1043 | } | |
1044 | memset(data, 0, sizeof(struct w83627hf_data)); | |
1045 | ||
1046 | new_client = &data->client; | |
1047 | i2c_set_clientdata(new_client, data); | |
1048 | new_client->addr = address; | |
1049 | init_MUTEX(&data->lock); | |
1050 | new_client->adapter = adapter; | |
1051 | new_client->driver = &w83627hf_driver; | |
1052 | new_client->flags = 0; | |
1053 | ||
1054 | ||
1055 | if (kind == w83627hf) { | |
1056 | client_name = "w83627hf"; | |
1057 | } else if (kind == w83627thf) { | |
1058 | client_name = "w83627thf"; | |
1059 | } else if (kind == w83697hf) { | |
1060 | client_name = "w83697hf"; | |
1061 | } else if (kind == w83637hf) { | |
1062 | client_name = "w83637hf"; | |
1063 | } | |
1064 | ||
1065 | /* Fill in the remaining client fields and put into the global list */ | |
1066 | strlcpy(new_client->name, client_name, I2C_NAME_SIZE); | |
1067 | data->type = kind; | |
1068 | data->valid = 0; | |
1069 | init_MUTEX(&data->update_lock); | |
1070 | ||
1071 | /* Tell the I2C layer a new client has arrived */ | |
1072 | if ((err = i2c_attach_client(new_client))) | |
1073 | goto ERROR2; | |
1074 | ||
1075 | data->lm75 = NULL; | |
1076 | ||
1077 | /* Initialize the chip */ | |
1078 | w83627hf_init_client(new_client); | |
1079 | ||
1080 | /* A few vars need to be filled upon startup */ | |
1081 | data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1)); | |
1082 | data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2)); | |
1083 | data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3)); | |
1084 | ||
1085 | /* Register sysfs hooks */ | |
943b0830 MH |
1086 | data->class_dev = hwmon_device_register(&new_client->dev); |
1087 | if (IS_ERR(data->class_dev)) { | |
1088 | err = PTR_ERR(data->class_dev); | |
1089 | goto ERROR3; | |
1090 | } | |
1091 | ||
1da177e4 LT |
1092 | device_create_file_in(new_client, 0); |
1093 | if (kind != w83697hf) | |
1094 | device_create_file_in(new_client, 1); | |
1095 | device_create_file_in(new_client, 2); | |
1096 | device_create_file_in(new_client, 3); | |
1097 | device_create_file_in(new_client, 4); | |
1098 | if (kind != w83627thf && kind != w83637hf) { | |
1099 | device_create_file_in(new_client, 5); | |
1100 | device_create_file_in(new_client, 6); | |
1101 | } | |
1102 | device_create_file_in(new_client, 7); | |
1103 | device_create_file_in(new_client, 8); | |
1104 | ||
1105 | device_create_file_fan(new_client, 1); | |
1106 | device_create_file_fan(new_client, 2); | |
1107 | if (kind != w83697hf) | |
1108 | device_create_file_fan(new_client, 3); | |
1109 | ||
1110 | device_create_file_temp(new_client, 1); | |
1111 | device_create_file_temp(new_client, 2); | |
1112 | if (kind != w83697hf) | |
1113 | device_create_file_temp(new_client, 3); | |
1114 | ||
1115 | if (kind != w83697hf) | |
1116 | device_create_file_vid(new_client); | |
1117 | ||
1118 | if (kind != w83697hf) | |
1119 | device_create_file_vrm(new_client); | |
1120 | ||
1121 | device_create_file_fan_div(new_client, 1); | |
1122 | device_create_file_fan_div(new_client, 2); | |
1123 | if (kind != w83697hf) | |
1124 | device_create_file_fan_div(new_client, 3); | |
1125 | ||
1126 | device_create_file_alarms(new_client); | |
1127 | ||
1128 | device_create_file_beep(new_client); | |
1129 | ||
1130 | device_create_file_pwm(new_client, 1); | |
1131 | device_create_file_pwm(new_client, 2); | |
1132 | if (kind == w83627thf || kind == w83637hf) | |
1133 | device_create_file_pwm(new_client, 3); | |
1134 | ||
1135 | device_create_file_sensor(new_client, 1); | |
1136 | device_create_file_sensor(new_client, 2); | |
1137 | if (kind != w83697hf) | |
1138 | device_create_file_sensor(new_client, 3); | |
1139 | ||
1140 | return 0; | |
1141 | ||
943b0830 MH |
1142 | ERROR3: |
1143 | i2c_detach_client(new_client); | |
1da177e4 LT |
1144 | ERROR2: |
1145 | kfree(data); | |
1146 | ERROR1: | |
1147 | release_region(address, WINB_EXTENT); | |
1148 | ERROR0: | |
1149 | return err; | |
1150 | } | |
1151 | ||
1152 | static int w83627hf_detach_client(struct i2c_client *client) | |
1153 | { | |
943b0830 | 1154 | struct w83627hf_data *data = i2c_get_clientdata(client); |
1da177e4 LT |
1155 | int err; |
1156 | ||
943b0830 MH |
1157 | hwmon_device_unregister(data->class_dev); |
1158 | ||
7bef5594 | 1159 | if ((err = i2c_detach_client(client))) |
1da177e4 | 1160 | return err; |
1da177e4 LT |
1161 | |
1162 | release_region(client->addr, WINB_EXTENT); | |
943b0830 | 1163 | kfree(data); |
1da177e4 LT |
1164 | |
1165 | return 0; | |
1166 | } | |
1167 | ||
1168 | ||
1169 | /* | |
1170 | ISA access must always be locked explicitly! | |
1171 | We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, | |
1172 | would slow down the W83781D access and should not be necessary. | |
1173 | There are some ugly typecasts here, but the good news is - they should | |
1174 | nowhere else be necessary! */ | |
1175 | static int w83627hf_read_value(struct i2c_client *client, u16 reg) | |
1176 | { | |
1177 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
1178 | int res, word_sized; | |
1179 | ||
1180 | down(&data->lock); | |
1181 | word_sized = (((reg & 0xff00) == 0x100) | |
1182 | || ((reg & 0xff00) == 0x200)) | |
1183 | && (((reg & 0x00ff) == 0x50) | |
1184 | || ((reg & 0x00ff) == 0x53) | |
1185 | || ((reg & 0x00ff) == 0x55)); | |
1186 | if (reg & 0xff00) { | |
1187 | outb_p(W83781D_REG_BANK, | |
1188 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1189 | outb_p(reg >> 8, | |
1190 | client->addr + W83781D_DATA_REG_OFFSET); | |
1191 | } | |
1192 | outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); | |
1193 | res = inb_p(client->addr + W83781D_DATA_REG_OFFSET); | |
1194 | if (word_sized) { | |
1195 | outb_p((reg & 0xff) + 1, | |
1196 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1197 | res = | |
1198 | (res << 8) + inb_p(client->addr + | |
1199 | W83781D_DATA_REG_OFFSET); | |
1200 | } | |
1201 | if (reg & 0xff00) { | |
1202 | outb_p(W83781D_REG_BANK, | |
1203 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1204 | outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); | |
1205 | } | |
1206 | up(&data->lock); | |
1207 | return res; | |
1208 | } | |
1209 | ||
1210 | static int w83627thf_read_gpio5(struct i2c_client *client) | |
1211 | { | |
1212 | int res = 0xff, sel; | |
1213 | ||
1214 | superio_enter(); | |
1215 | superio_select(W83627HF_LD_GPIO5); | |
1216 | ||
1217 | /* Make sure these GPIO pins are enabled */ | |
1218 | if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) { | |
1219 | dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n"); | |
1220 | goto exit; | |
1221 | } | |
1222 | ||
1223 | /* Make sure the pins are configured for input | |
1224 | There must be at least five (VRM 9), and possibly 6 (VRM 10) */ | |
1225 | sel = superio_inb(W83627THF_GPIO5_IOSR); | |
1226 | if ((sel & 0x1f) != 0x1f) { | |
1227 | dev_dbg(&client->dev, "GPIO5 not configured for VID " | |
1228 | "function\n"); | |
1229 | goto exit; | |
1230 | } | |
1231 | ||
1232 | dev_info(&client->dev, "Reading VID from GPIO5\n"); | |
1233 | res = superio_inb(W83627THF_GPIO5_DR) & sel; | |
1234 | ||
1235 | exit: | |
1236 | superio_exit(); | |
1237 | return res; | |
1238 | } | |
1239 | ||
1240 | static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value) | |
1241 | { | |
1242 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
1243 | int word_sized; | |
1244 | ||
1245 | down(&data->lock); | |
1246 | word_sized = (((reg & 0xff00) == 0x100) | |
1247 | || ((reg & 0xff00) == 0x200)) | |
1248 | && (((reg & 0x00ff) == 0x53) | |
1249 | || ((reg & 0x00ff) == 0x55)); | |
1250 | if (reg & 0xff00) { | |
1251 | outb_p(W83781D_REG_BANK, | |
1252 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1253 | outb_p(reg >> 8, | |
1254 | client->addr + W83781D_DATA_REG_OFFSET); | |
1255 | } | |
1256 | outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); | |
1257 | if (word_sized) { | |
1258 | outb_p(value >> 8, | |
1259 | client->addr + W83781D_DATA_REG_OFFSET); | |
1260 | outb_p((reg & 0xff) + 1, | |
1261 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1262 | } | |
1263 | outb_p(value & 0xff, | |
1264 | client->addr + W83781D_DATA_REG_OFFSET); | |
1265 | if (reg & 0xff00) { | |
1266 | outb_p(W83781D_REG_BANK, | |
1267 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1268 | outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); | |
1269 | } | |
1270 | up(&data->lock); | |
1271 | return 0; | |
1272 | } | |
1273 | ||
1274 | /* Called when we have found a new W83781D. It should set limits, etc. */ | |
1275 | static void w83627hf_init_client(struct i2c_client *client) | |
1276 | { | |
1277 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
1278 | int i; | |
1279 | int type = data->type; | |
1280 | u8 tmp; | |
1281 | ||
1282 | if(init) { | |
1283 | /* save this register */ | |
1284 | i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG); | |
1285 | /* Reset all except Watchdog values and last conversion values | |
1286 | This sets fan-divs to 2, among others */ | |
1287 | w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80); | |
1288 | /* Restore the register and disable power-on abnormal beep. | |
1289 | This saves FAN 1/2/3 input/output values set by BIOS. */ | |
1290 | w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80); | |
1291 | /* Disable master beep-enable (reset turns it on). | |
1292 | Individual beeps should be reset to off but for some reason | |
1293 | disabling this bit helps some people not get beeped */ | |
1294 | w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0); | |
1295 | } | |
1296 | ||
1297 | /* Minimize conflicts with other winbond i2c-only clients... */ | |
1298 | /* disable i2c subclients... how to disable main i2c client?? */ | |
1299 | /* force i2c address to relatively uncommon address */ | |
1300 | w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89); | |
1301 | w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c); | |
1302 | ||
1303 | /* Read VID only once */ | |
1304 | if (w83627hf == data->type || w83637hf == data->type) { | |
1305 | int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV); | |
1306 | int hi = w83627hf_read_value(client, W83781D_REG_CHIPID); | |
1307 | data->vid = (lo & 0x0f) | ((hi & 0x01) << 4); | |
1308 | } else if (w83627thf == data->type) { | |
1309 | data->vid = w83627thf_read_gpio5(client) & 0x3f; | |
1310 | } | |
1311 | ||
1312 | /* Read VRM & OVT Config only once */ | |
1313 | if (w83627thf == data->type || w83637hf == data->type) { | |
1314 | data->vrm_ovt = | |
1315 | w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG); | |
1316 | data->vrm = (data->vrm_ovt & 0x01) ? 90 : 82; | |
1317 | } else { | |
1318 | /* Convert VID to voltage based on default VRM */ | |
303760b4 | 1319 | data->vrm = vid_which_vrm(); |
1da177e4 LT |
1320 | } |
1321 | ||
1322 | tmp = w83627hf_read_value(client, W83781D_REG_SCFG1); | |
1323 | for (i = 1; i <= 3; i++) { | |
1324 | if (!(tmp & BIT_SCFG1[i - 1])) { | |
1325 | data->sens[i - 1] = W83781D_DEFAULT_BETA; | |
1326 | } else { | |
1327 | if (w83627hf_read_value | |
1328 | (client, | |
1329 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) | |
1330 | data->sens[i - 1] = 1; | |
1331 | else | |
1332 | data->sens[i - 1] = 2; | |
1333 | } | |
1334 | if ((type == w83697hf) && (i == 2)) | |
1335 | break; | |
1336 | } | |
1337 | ||
1338 | if(init) { | |
1339 | /* Enable temp2 */ | |
1340 | tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG); | |
1341 | if (tmp & 0x01) { | |
1342 | dev_warn(&client->dev, "Enabling temp2, readings " | |
1343 | "might not make sense\n"); | |
1344 | w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG, | |
1345 | tmp & 0xfe); | |
1346 | } | |
1347 | ||
1348 | /* Enable temp3 */ | |
1349 | if (type != w83697hf) { | |
1350 | tmp = w83627hf_read_value(client, | |
1351 | W83781D_REG_TEMP3_CONFIG); | |
1352 | if (tmp & 0x01) { | |
1353 | dev_warn(&client->dev, "Enabling temp3, " | |
1354 | "readings might not make sense\n"); | |
1355 | w83627hf_write_value(client, | |
1356 | W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); | |
1357 | } | |
1358 | } | |
1359 | ||
1360 | if (type == w83627hf) { | |
1361 | /* enable PWM2 control (can't hurt since PWM reg | |
1362 | should have been reset to 0xff) */ | |
1363 | w83627hf_write_value(client, W83627HF_REG_PWMCLK12, | |
1364 | 0x19); | |
1365 | } | |
1366 | /* enable comparator mode for temp2 and temp3 so | |
1367 | alarm indication will work correctly */ | |
1368 | i = w83627hf_read_value(client, W83781D_REG_IRQ); | |
1369 | if (!(i & 0x40)) | |
1370 | w83627hf_write_value(client, W83781D_REG_IRQ, | |
1371 | i | 0x40); | |
1372 | } | |
1373 | ||
1374 | /* Start monitoring */ | |
1375 | w83627hf_write_value(client, W83781D_REG_CONFIG, | |
1376 | (w83627hf_read_value(client, | |
1377 | W83781D_REG_CONFIG) & 0xf7) | |
1378 | | 0x01); | |
1379 | } | |
1380 | ||
1381 | static struct w83627hf_data *w83627hf_update_device(struct device *dev) | |
1382 | { | |
1383 | struct i2c_client *client = to_i2c_client(dev); | |
1384 | struct w83627hf_data *data = i2c_get_clientdata(client); | |
1385 | int i; | |
1386 | ||
1387 | down(&data->update_lock); | |
1388 | ||
1389 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
1390 | || !data->valid) { | |
1391 | for (i = 0; i <= 8; i++) { | |
1392 | /* skip missing sensors */ | |
1393 | if (((data->type == w83697hf) && (i == 1)) || | |
1394 | ((data->type == w83627thf || data->type == w83637hf) | |
1395 | && (i == 4 || i == 5))) | |
1396 | continue; | |
1397 | data->in[i] = | |
1398 | w83627hf_read_value(client, W83781D_REG_IN(i)); | |
1399 | data->in_min[i] = | |
1400 | w83627hf_read_value(client, | |
1401 | W83781D_REG_IN_MIN(i)); | |
1402 | data->in_max[i] = | |
1403 | w83627hf_read_value(client, | |
1404 | W83781D_REG_IN_MAX(i)); | |
1405 | } | |
1406 | for (i = 1; i <= 3; i++) { | |
1407 | data->fan[i - 1] = | |
1408 | w83627hf_read_value(client, W83781D_REG_FAN(i)); | |
1409 | data->fan_min[i - 1] = | |
1410 | w83627hf_read_value(client, | |
1411 | W83781D_REG_FAN_MIN(i)); | |
1412 | } | |
1413 | for (i = 1; i <= 3; i++) { | |
1414 | u8 tmp = w83627hf_read_value(client, | |
1415 | W836X7HF_REG_PWM(data->type, i)); | |
1416 | /* bits 0-3 are reserved in 627THF */ | |
1417 | if (data->type == w83627thf) | |
1418 | tmp &= 0xf0; | |
1419 | data->pwm[i - 1] = tmp; | |
1420 | if(i == 2 && | |
1421 | (data->type == w83627hf || data->type == w83697hf)) | |
1422 | break; | |
1423 | } | |
1424 | ||
1425 | data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1)); | |
1426 | data->temp_max = | |
1427 | w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1)); | |
1428 | data->temp_max_hyst = | |
1429 | w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1)); | |
1430 | data->temp_add[0] = | |
1431 | w83627hf_read_value(client, W83781D_REG_TEMP(2)); | |
1432 | data->temp_max_add[0] = | |
1433 | w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2)); | |
1434 | data->temp_max_hyst_add[0] = | |
1435 | w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2)); | |
1436 | if (data->type != w83697hf) { | |
1437 | data->temp_add[1] = | |
1438 | w83627hf_read_value(client, W83781D_REG_TEMP(3)); | |
1439 | data->temp_max_add[1] = | |
1440 | w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3)); | |
1441 | data->temp_max_hyst_add[1] = | |
1442 | w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3)); | |
1443 | } | |
1444 | ||
1445 | i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV); | |
1446 | data->fan_div[0] = (i >> 4) & 0x03; | |
1447 | data->fan_div[1] = (i >> 6) & 0x03; | |
1448 | if (data->type != w83697hf) { | |
1449 | data->fan_div[2] = (w83627hf_read_value(client, | |
1450 | W83781D_REG_PIN) >> 6) & 0x03; | |
1451 | } | |
1452 | i = w83627hf_read_value(client, W83781D_REG_VBAT); | |
1453 | data->fan_div[0] |= (i >> 3) & 0x04; | |
1454 | data->fan_div[1] |= (i >> 4) & 0x04; | |
1455 | if (data->type != w83697hf) | |
1456 | data->fan_div[2] |= (i >> 5) & 0x04; | |
1457 | data->alarms = | |
1458 | w83627hf_read_value(client, W83781D_REG_ALARM1) | | |
1459 | (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) | | |
1460 | (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16); | |
1461 | i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2); | |
1462 | data->beep_enable = i >> 7; | |
1463 | data->beep_mask = ((i & 0x7f) << 8) | | |
1464 | w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) | | |
1465 | w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16; | |
1466 | data->last_updated = jiffies; | |
1467 | data->valid = 1; | |
1468 | } | |
1469 | ||
1470 | up(&data->update_lock); | |
1471 | ||
1472 | return data; | |
1473 | } | |
1474 | ||
1475 | static int __init sensors_w83627hf_init(void) | |
1476 | { | |
2d8672c5 JD |
1477 | if (w83627hf_find(0x2e, &address) |
1478 | && w83627hf_find(0x4e, &address)) { | |
1da177e4 LT |
1479 | return -ENODEV; |
1480 | } | |
1da177e4 | 1481 | |
fde09509 | 1482 | return i2c_isa_add_driver(&w83627hf_driver); |
1da177e4 LT |
1483 | } |
1484 | ||
1485 | static void __exit sensors_w83627hf_exit(void) | |
1486 | { | |
fde09509 | 1487 | i2c_isa_del_driver(&w83627hf_driver); |
1da177e4 LT |
1488 | } |
1489 | ||
1490 | MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " | |
1491 | "Philip Edelbrock <phil@netroedge.com>, " | |
1492 | "and Mark Studebaker <mdsxyz123@yahoo.com>"); | |
1493 | MODULE_DESCRIPTION("W83627HF driver"); | |
1494 | MODULE_LICENSE("GPL"); | |
1495 | ||
1496 | module_init(sensors_w83627hf_init); | |
1497 | module_exit(sensors_w83627hf_exit); |