hwmon: (adm1026) Don't create files for missing inputs
[deliverable/linux.git] / drivers / hwmon / w83781d.c
CommitLineData
1da177e4
LT
1/*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
7666c13c
JD
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
1da177e4
LT
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24/*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 as99127f 7 3 0 3 0x31 0x12c3 yes no
29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
31 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
1da177e4
LT
32 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
33 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
1da177e4
LT
34
35*/
36
1da177e4
LT
37#include <linux/module.h>
38#include <linux/init.h>
39#include <linux/slab.h>
40#include <linux/jiffies.h>
41#include <linux/i2c.h>
7666c13c
JD
42#include <linux/platform_device.h>
43#include <linux/ioport.h>
943b0830 44#include <linux/hwmon.h>
303760b4 45#include <linux/hwmon-vid.h>
34875337 46#include <linux/hwmon-sysfs.h>
311ce2ef 47#include <linux/sysfs.h>
943b0830 48#include <linux/err.h>
9a61bf63 49#include <linux/mutex.h>
1da177e4
LT
50#include <asm/io.h>
51#include "lm75.h"
52
7666c13c
JD
53/* ISA device, if found */
54static struct platform_device *pdev;
55
1da177e4 56/* Addresses to scan */
6722fead
JD
57static unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
58 0x2e, 0x2f, I2C_CLIENT_END };
2d8672c5 59static unsigned short isa_address = 0x290;
1da177e4
LT
60
61/* Insmod parameters */
f4b50261 62I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
1da177e4
LT
63I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
64 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
65
fabddcd4
JD
66static int reset;
67module_param(reset, bool, 0);
68MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
69
1da177e4
LT
70static int init = 1;
71module_param(init, bool, 0);
72MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
73
74/* Constants specified below */
75
76/* Length of ISA address segment */
77#define W83781D_EXTENT 8
78
79/* Where are the ISA address/data registers relative to the base address */
80#define W83781D_ADDR_REG_OFFSET 5
81#define W83781D_DATA_REG_OFFSET 6
82
34875337
JD
83/* The device registers */
84/* in nr from 0 to 8 */
1da177e4
LT
85#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
86 (0x554 + (((nr) - 7) * 2)))
87#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
88 (0x555 + (((nr) - 7) * 2)))
89#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
90 (0x550 + (nr) - 7))
91
34875337
JD
92/* fan nr from 0 to 2 */
93#define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
94#define W83781D_REG_FAN(nr) (0x28 + (nr))
1da177e4
LT
95
96#define W83781D_REG_BANK 0x4E
97#define W83781D_REG_TEMP2_CONFIG 0x152
98#define W83781D_REG_TEMP3_CONFIG 0x252
34875337 99/* temp nr from 1 to 3 */
1da177e4
LT
100#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
101 ((nr == 2) ? (0x0150) : \
102 (0x27)))
103#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
104 ((nr == 2) ? (0x153) : \
105 (0x3A)))
106#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
107 ((nr == 2) ? (0x155) : \
108 (0x39)))
109
110#define W83781D_REG_CONFIG 0x40
c7f5d7ed
JD
111
112/* Interrupt status (W83781D, AS99127F) */
1da177e4
LT
113#define W83781D_REG_ALARM1 0x41
114#define W83781D_REG_ALARM2 0x42
1da177e4 115
c7f5d7ed
JD
116/* Real-time status (W83782D, W83783S, W83627HF) */
117#define W83782D_REG_ALARM1 0x459
118#define W83782D_REG_ALARM2 0x45A
119#define W83782D_REG_ALARM3 0x45B
120
1da177e4
LT
121#define W83781D_REG_BEEP_CONFIG 0x4D
122#define W83781D_REG_BEEP_INTS1 0x56
123#define W83781D_REG_BEEP_INTS2 0x57
124#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
125
126#define W83781D_REG_VID_FANDIV 0x47
127
128#define W83781D_REG_CHIPID 0x49
129#define W83781D_REG_WCHIPID 0x58
130#define W83781D_REG_CHIPMAN 0x4F
131#define W83781D_REG_PIN 0x4B
132
133/* 782D/783S only */
134#define W83781D_REG_VBAT 0x5D
135
136/* PWM 782D (1-4) and 783S (1-2) only */
34875337 137static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
1da177e4
LT
138#define W83781D_REG_PWMCLK12 0x5C
139#define W83781D_REG_PWMCLK34 0x45C
1da177e4
LT
140
141#define W83781D_REG_I2C_ADDR 0x48
142#define W83781D_REG_I2C_SUBADDR 0x4A
143
144/* The following are undocumented in the data sheets however we
145 received the information in an email from Winbond tech support */
146/* Sensor selection - not on 781d */
147#define W83781D_REG_SCFG1 0x5D
148static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
149
150#define W83781D_REG_SCFG2 0x59
151static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
152
153#define W83781D_DEFAULT_BETA 3435
154
155/* RT Table registers */
156#define W83781D_REG_RT_IDX 0x50
157#define W83781D_REG_RT_VAL 0x51
158
474d00a8
JD
159/* Conversions */
160#define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
161#define IN_FROM_REG(val) ((val) * 16)
1da177e4
LT
162
163static inline u8
164FAN_TO_REG(long rpm, int div)
165{
166 if (rpm == 0)
167 return 255;
168 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
169 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
170}
171
474d00a8
JD
172static inline long
173FAN_FROM_REG(u8 val, int div)
174{
175 if (val == 0)
176 return -1;
177 if (val == 255)
178 return 0;
179 return 1350000 / (val * div);
180}
1da177e4 181
474d00a8
JD
182#define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
183#define TEMP_FROM_REG(val) ((val) * 1000)
1da177e4 184
1da177e4
LT
185#define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
186 (val) ^ 0x7fff : (val))
187#define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
188 (~(val)) & 0x7fff : (val) & 0xffffff)
189
1da177e4
LT
190#define DIV_FROM_REG(val) (1 << (val))
191
192static inline u8
193DIV_TO_REG(long val, enum chips type)
194{
195 int i;
196 val = SENSORS_LIMIT(val, 1,
197 ((type == w83781d
198 || type == as99127f) ? 8 : 128)) >> 1;
abc01922 199 for (i = 0; i < 7; i++) {
1da177e4
LT
200 if (val == 0)
201 break;
202 val >>= 1;
203 }
474d00a8 204 return i;
1da177e4
LT
205}
206
207/* There are some complications in a module like this. First off, W83781D chips
208 may be both present on the SMBus and the ISA bus, and we have to handle
209 those cases separately at some places. Second, there might be several
210 W83781D chips available (well, actually, that is probably never done; but
211 it is a clean illustration of how to handle a case like that). Finally,
212 a specific chip may be attached to *both* ISA and SMBus, and we would
213 not like to detect it double. Fortunately, in the case of the W83781D at
214 least, a register tells us what SMBus address we are on, so that helps
215 a bit - except if there could be more than one SMBus. Groan. No solution
216 for this yet. */
217
7666c13c
JD
218/* For ISA chips, we abuse the i2c_client addr and name fields. We also use
219 the driver field to differentiate between I2C and ISA chips. */
1da177e4
LT
220struct w83781d_data {
221 struct i2c_client client;
1beeffe4 222 struct device *hwmon_dev;
9a61bf63 223 struct mutex lock;
1da177e4
LT
224 enum chips type;
225
9a61bf63 226 struct mutex update_lock;
1da177e4
LT
227 char valid; /* !=0 if following fields are valid */
228 unsigned long last_updated; /* In jiffies */
229
230 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
231 /* array of 2 pointers to subclients */
232
233 u8 in[9]; /* Register value - 8 & 9 for 782D only */
234 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
235 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
236 u8 fan[3]; /* Register value */
237 u8 fan_min[3]; /* Register value */
474d00a8
JD
238 s8 temp; /* Register value */
239 s8 temp_max; /* Register value */
240 s8 temp_max_hyst; /* Register value */
1da177e4
LT
241 u16 temp_add[2]; /* Register value */
242 u16 temp_max_add[2]; /* Register value */
243 u16 temp_max_hyst_add[2]; /* Register value */
244 u8 fan_div[3]; /* Register encoding, shifted right */
245 u8 vid; /* Register encoding, combined */
246 u32 alarms; /* Register encoding, combined */
247 u32 beep_mask; /* Register encoding, combined */
248 u8 beep_enable; /* Boolean */
249 u8 pwm[4]; /* Register value */
34875337 250 u8 pwm2_enable; /* Boolean */
1da177e4
LT
251 u16 sens[3]; /* 782D/783S only.
252 1 = pentium diode; 2 = 3904 diode;
b26f9330 253 4 = thermistor */
1da177e4
LT
254 u8 vrm;
255};
256
257static int w83781d_attach_adapter(struct i2c_adapter *adapter);
258static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
259static int w83781d_detach_client(struct i2c_client *client);
260
7666c13c
JD
261static int __devinit w83781d_isa_probe(struct platform_device *pdev);
262static int __devexit w83781d_isa_remove(struct platform_device *pdev);
263
31b8dc4d
JD
264static int w83781d_read_value(struct w83781d_data *data, u16 reg);
265static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
1da177e4 266static struct w83781d_data *w83781d_update_device(struct device *dev);
7666c13c 267static void w83781d_init_device(struct device *dev);
1da177e4
LT
268
269static struct i2c_driver w83781d_driver = {
cdaf7934 270 .driver = {
cdaf7934
LR
271 .name = "w83781d",
272 },
1da177e4 273 .id = I2C_DRIVERID_W83781D,
1da177e4
LT
274 .attach_adapter = w83781d_attach_adapter,
275 .detach_client = w83781d_detach_client,
276};
277
7666c13c 278static struct platform_driver w83781d_isa_driver = {
cdaf7934 279 .driver = {
87218842 280 .owner = THIS_MODULE,
7666c13c 281 .name = "w83781d",
cdaf7934 282 },
7666c13c
JD
283 .probe = w83781d_isa_probe,
284 .remove = w83781d_isa_remove,
fde09509
JD
285};
286
287
1da177e4
LT
288/* following are the sysfs callback functions */
289#define show_in_reg(reg) \
34875337
JD
290static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
291 char *buf) \
1da177e4 292{ \
34875337 293 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 294 struct w83781d_data *data = w83781d_update_device(dev); \
34875337
JD
295 return sprintf(buf, "%ld\n", \
296 (long)IN_FROM_REG(data->reg[attr->index])); \
1da177e4
LT
297}
298show_in_reg(in);
299show_in_reg(in_min);
300show_in_reg(in_max);
301
302#define store_in_reg(REG, reg) \
34875337
JD
303static ssize_t store_in_##reg (struct device *dev, struct device_attribute \
304 *da, const char *buf, size_t count) \
1da177e4 305{ \
34875337 306 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 307 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 308 int nr = attr->index; \
1da177e4
LT
309 u32 val; \
310 \
474d00a8 311 val = simple_strtoul(buf, NULL, 10); \
1da177e4 312 \
9a61bf63 313 mutex_lock(&data->update_lock); \
1da177e4 314 data->in_##reg[nr] = IN_TO_REG(val); \
31b8dc4d 315 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
1da177e4 316 \
9a61bf63 317 mutex_unlock(&data->update_lock); \
1da177e4
LT
318 return count; \
319}
320store_in_reg(MIN, min);
321store_in_reg(MAX, max);
322
1da177e4 323#define sysfs_in_offsets(offset) \
34875337
JD
324static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
325 show_in, NULL, offset); \
326static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
327 show_in_min, store_in_min, offset); \
328static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
329 show_in_max, store_in_max, offset)
1da177e4
LT
330
331sysfs_in_offsets(0);
332sysfs_in_offsets(1);
333sysfs_in_offsets(2);
334sysfs_in_offsets(3);
335sysfs_in_offsets(4);
336sysfs_in_offsets(5);
337sysfs_in_offsets(6);
338sysfs_in_offsets(7);
339sysfs_in_offsets(8);
340
1da177e4 341#define show_fan_reg(reg) \
34875337
JD
342static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
343 char *buf) \
1da177e4 344{ \
34875337 345 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4
LT
346 struct w83781d_data *data = w83781d_update_device(dev); \
347 return sprintf(buf,"%ld\n", \
34875337
JD
348 FAN_FROM_REG(data->reg[attr->index], \
349 DIV_FROM_REG(data->fan_div[attr->index]))); \
1da177e4
LT
350}
351show_fan_reg(fan);
352show_fan_reg(fan_min);
353
354static ssize_t
34875337
JD
355store_fan_min(struct device *dev, struct device_attribute *da,
356 const char *buf, size_t count)
1da177e4 357{
34875337 358 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 359 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 360 int nr = attr->index;
1da177e4
LT
361 u32 val;
362
363 val = simple_strtoul(buf, NULL, 10);
364
9a61bf63 365 mutex_lock(&data->update_lock);
34875337
JD
366 data->fan_min[nr] =
367 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
31b8dc4d 368 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
34875337 369 data->fan_min[nr]);
1da177e4 370
9a61bf63 371 mutex_unlock(&data->update_lock);
1da177e4
LT
372 return count;
373}
374
34875337
JD
375static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
376static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
377 show_fan_min, store_fan_min, 0);
378static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
379static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
380 show_fan_min, store_fan_min, 1);
381static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
382static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
383 show_fan_min, store_fan_min, 2);
1da177e4 384
1da177e4 385#define show_temp_reg(reg) \
34875337
JD
386static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
387 char *buf) \
1da177e4 388{ \
34875337 389 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
1da177e4 390 struct w83781d_data *data = w83781d_update_device(dev); \
34875337 391 int nr = attr->index; \
1da177e4
LT
392 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
393 return sprintf(buf,"%d\n", \
394 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
395 } else { /* TEMP1 */ \
396 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
397 } \
398}
399show_temp_reg(temp);
400show_temp_reg(temp_max);
401show_temp_reg(temp_max_hyst);
402
403#define store_temp_reg(REG, reg) \
34875337
JD
404static ssize_t store_temp_##reg (struct device *dev, \
405 struct device_attribute *da, const char *buf, size_t count) \
1da177e4 406{ \
34875337 407 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
7666c13c 408 struct w83781d_data *data = dev_get_drvdata(dev); \
34875337 409 int nr = attr->index; \
5bfedac0 410 long val; \
1da177e4
LT
411 \
412 val = simple_strtol(buf, NULL, 10); \
413 \
9a61bf63 414 mutex_lock(&data->update_lock); \
1da177e4
LT
415 \
416 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
417 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
31b8dc4d 418 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT
419 data->temp_##reg##_add[nr-2]); \
420 } else { /* TEMP1 */ \
421 data->temp_##reg = TEMP_TO_REG(val); \
31b8dc4d 422 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
1da177e4
LT
423 data->temp_##reg); \
424 } \
425 \
9a61bf63 426 mutex_unlock(&data->update_lock); \
1da177e4
LT
427 return count; \
428}
429store_temp_reg(OVER, max);
430store_temp_reg(HYST, max_hyst);
431
1da177e4 432#define sysfs_temp_offsets(offset) \
34875337
JD
433static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
434 show_temp, NULL, offset); \
435static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
436 show_temp_max, store_temp_max, offset); \
437static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
438 show_temp_max_hyst, store_temp_max_hyst, offset);
1da177e4
LT
439
440sysfs_temp_offsets(1);
441sysfs_temp_offsets(2);
442sysfs_temp_offsets(3);
443
1da177e4 444static ssize_t
e404e274 445show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
446{
447 struct w83781d_data *data = w83781d_update_device(dev);
448 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
449}
450
311ce2ef
JC
451static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
452
1da177e4 453static ssize_t
e404e274 454show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 455{
90d6619a 456 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT
457 return sprintf(buf, "%ld\n", (long) data->vrm);
458}
459
460static ssize_t
e404e274 461store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 462{
7666c13c 463 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT
464 u32 val;
465
466 val = simple_strtoul(buf, NULL, 10);
467 data->vrm = val;
468
469 return count;
470}
471
311ce2ef
JC
472static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
473
1da177e4 474static ssize_t
e404e274 475show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
476{
477 struct w83781d_data *data = w83781d_update_device(dev);
68188ba7 478 return sprintf(buf, "%u\n", data->alarms);
1da177e4
LT
479}
480
311ce2ef
JC
481static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
482
7d4a1374
JD
483static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
484 char *buf)
485{
486 struct w83781d_data *data = w83781d_update_device(dev);
487 int bitnr = to_sensor_dev_attr(attr)->index;
488 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
489}
490
491/* The W83781D has a single alarm bit for temp2 and temp3 */
492static ssize_t show_temp3_alarm(struct device *dev,
493 struct device_attribute *attr, char *buf)
494{
495 struct w83781d_data *data = w83781d_update_device(dev);
496 int bitnr = (data->type == w83781d) ? 5 : 13;
497 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
498}
499
500static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
501static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
502static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
503static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
504static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
505static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
506static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
507static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
508static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
509static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
510static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
511static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
512static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
513static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
514static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
515
e404e274 516static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
517{
518 struct w83781d_data *data = w83781d_update_device(dev);
519 return sprintf(buf, "%ld\n",
520 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
521}
e404e274 522static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
523{
524 struct w83781d_data *data = w83781d_update_device(dev);
474d00a8 525 return sprintf(buf, "%ld\n", (long)data->beep_enable);
1da177e4
LT
526}
527
1da177e4 528static ssize_t
34875337
JD
529store_beep_mask(struct device *dev, struct device_attribute *attr,
530 const char *buf, size_t count)
1da177e4 531{
7666c13c 532 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 533 u32 val;
1da177e4
LT
534
535 val = simple_strtoul(buf, NULL, 10);
536
9a61bf63 537 mutex_lock(&data->update_lock);
34875337
JD
538 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
539 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
540 data->beep_mask & 0xff);
541 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
542 ((data->beep_mask >> 8) & 0x7f)
543 | data->beep_enable << 7);
544 if (data->type != w83781d && data->type != as99127f) {
545 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
546 ((data->beep_mask) >> 16) & 0xff);
547 }
548 mutex_unlock(&data->update_lock);
1da177e4 549
34875337
JD
550 return count;
551}
1da177e4 552
34875337
JD
553static ssize_t
554store_beep_enable(struct device *dev, struct device_attribute *attr,
555 const char *buf, size_t count)
556{
557 struct w83781d_data *data = dev_get_drvdata(dev);
558 u32 val;
1da177e4 559
34875337
JD
560 val = simple_strtoul(buf, NULL, 10);
561 if (val != 0 && val != 1)
562 return -EINVAL;
1da177e4 563
34875337
JD
564 mutex_lock(&data->update_lock);
565 data->beep_enable = val;
566 val = w83781d_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f;
567 val |= data->beep_enable << 7;
568 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, val);
9a61bf63 569 mutex_unlock(&data->update_lock);
34875337 570
1da177e4
LT
571 return count;
572}
573
34875337
JD
574static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
575 show_beep_mask, store_beep_mask);
576static DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
577 show_beep_enable, store_beep_enable);
1da177e4 578
7d4a1374
JD
579static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
580 char *buf)
581{
582 struct w83781d_data *data = w83781d_update_device(dev);
583 int bitnr = to_sensor_dev_attr(attr)->index;
584 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
585}
586
587static ssize_t
588store_beep(struct device *dev, struct device_attribute *attr,
589 const char *buf, size_t count)
590{
591 struct w83781d_data *data = dev_get_drvdata(dev);
592 int bitnr = to_sensor_dev_attr(attr)->index;
593 unsigned long bit;
594 u8 reg;
595
596 bit = simple_strtoul(buf, NULL, 10);
597 if (bit & ~1)
598 return -EINVAL;
599
600 mutex_lock(&data->update_lock);
601 if (bit)
602 data->beep_mask |= (1 << bitnr);
603 else
604 data->beep_mask &= ~(1 << bitnr);
605
606 if (bitnr < 8) {
607 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
608 if (bit)
609 reg |= (1 << bitnr);
610 else
611 reg &= ~(1 << bitnr);
612 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
613 } else if (bitnr < 16) {
614 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
615 if (bit)
616 reg |= (1 << (bitnr - 8));
617 else
618 reg &= ~(1 << (bitnr - 8));
619 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
620 } else {
621 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
622 if (bit)
623 reg |= (1 << (bitnr - 16));
624 else
625 reg &= ~(1 << (bitnr - 16));
626 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
627 }
628 mutex_unlock(&data->update_lock);
629
630 return count;
631}
632
633/* The W83781D has a single beep bit for temp2 and temp3 */
634static ssize_t show_temp3_beep(struct device *dev,
635 struct device_attribute *attr, char *buf)
636{
637 struct w83781d_data *data = w83781d_update_device(dev);
638 int bitnr = (data->type == w83781d) ? 5 : 13;
639 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
640}
641
642static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
643 show_beep, store_beep, 0);
644static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
645 show_beep, store_beep, 1);
646static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
647 show_beep, store_beep, 2);
648static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
649 show_beep, store_beep, 3);
650static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
651 show_beep, store_beep, 8);
652static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
653 show_beep, store_beep, 9);
654static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
655 show_beep, store_beep, 10);
656static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
657 show_beep, store_beep, 16);
658static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
659 show_beep, store_beep, 17);
660static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
661 show_beep, store_beep, 6);
662static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
663 show_beep, store_beep, 7);
664static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
665 show_beep, store_beep, 11);
666static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
667 show_beep, store_beep, 4);
668static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
669 show_beep, store_beep, 5);
670static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
671 show_temp3_beep, store_beep, 13);
672
1da177e4 673static ssize_t
34875337 674show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 675{
34875337 676 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4
LT
677 struct w83781d_data *data = w83781d_update_device(dev);
678 return sprintf(buf, "%ld\n",
34875337 679 (long) DIV_FROM_REG(data->fan_div[attr->index]));
1da177e4
LT
680}
681
682/* Note: we save and restore the fan minimum here, because its value is
683 determined in part by the fan divisor. This follows the principle of
d6e05edc 684 least surprise; the user doesn't expect the fan minimum to change just
1da177e4
LT
685 because the divisor changed. */
686static ssize_t
34875337
JD
687store_fan_div(struct device *dev, struct device_attribute *da,
688 const char *buf, size_t count)
1da177e4 689{
34875337 690 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 691 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4 692 unsigned long min;
34875337 693 int nr = attr->index;
1da177e4
LT
694 u8 reg;
695 unsigned long val = simple_strtoul(buf, NULL, 10);
696
9a61bf63 697 mutex_lock(&data->update_lock);
1da177e4
LT
698
699 /* Save fan_min */
700 min = FAN_FROM_REG(data->fan_min[nr],
701 DIV_FROM_REG(data->fan_div[nr]));
702
703 data->fan_div[nr] = DIV_TO_REG(val, data->type);
704
31b8dc4d 705 reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1da177e4
LT
706 & (nr==0 ? 0xcf : 0x3f))
707 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
31b8dc4d 708 w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1da177e4
LT
709
710 /* w83781d and as99127f don't have extended divisor bits */
711 if (data->type != w83781d && data->type != as99127f) {
31b8dc4d 712 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
1da177e4
LT
713 & ~(1 << (5 + nr)))
714 | ((data->fan_div[nr] & 0x04) << (3 + nr));
31b8dc4d 715 w83781d_write_value(data, W83781D_REG_VBAT, reg);
1da177e4
LT
716 }
717
718 /* Restore fan_min */
719 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
34875337 720 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
1da177e4 721
9a61bf63 722 mutex_unlock(&data->update_lock);
1da177e4
LT
723 return count;
724}
725
34875337
JD
726static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
727 show_fan_div, store_fan_div, 0);
728static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
729 show_fan_div, store_fan_div, 1);
730static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
731 show_fan_div, store_fan_div, 2);
1da177e4 732
1da177e4 733static ssize_t
34875337 734show_pwm(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 735{
34875337 736 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 737 struct w83781d_data *data = w83781d_update_device(dev);
34875337 738 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
1da177e4
LT
739}
740
741static ssize_t
34875337 742show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
1da177e4
LT
743{
744 struct w83781d_data *data = w83781d_update_device(dev);
34875337 745 return sprintf(buf, "%d\n", (int)data->pwm2_enable);
1da177e4
LT
746}
747
748static ssize_t
34875337
JD
749store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
750 size_t count)
1da177e4 751{
34875337 752 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 753 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 754 int nr = attr->index;
1da177e4
LT
755 u32 val;
756
757 val = simple_strtoul(buf, NULL, 10);
758
9a61bf63 759 mutex_lock(&data->update_lock);
34875337
JD
760 data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
761 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
9a61bf63 762 mutex_unlock(&data->update_lock);
1da177e4
LT
763 return count;
764}
765
766static ssize_t
34875337
JD
767store_pwm2_enable(struct device *dev, struct device_attribute *da,
768 const char *buf, size_t count)
1da177e4 769{
7666c13c 770 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT
771 u32 val, reg;
772
773 val = simple_strtoul(buf, NULL, 10);
774
9a61bf63 775 mutex_lock(&data->update_lock);
1da177e4
LT
776
777 switch (val) {
778 case 0:
779 case 1:
31b8dc4d
JD
780 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
781 w83781d_write_value(data, W83781D_REG_PWMCLK12,
1da177e4
LT
782 (reg & 0xf7) | (val << 3));
783
31b8dc4d
JD
784 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
785 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
1da177e4
LT
786 (reg & 0xef) | (!val << 4));
787
34875337 788 data->pwm2_enable = val;
1da177e4
LT
789 break;
790
791 default:
9a61bf63 792 mutex_unlock(&data->update_lock);
1da177e4
LT
793 return -EINVAL;
794 }
795
9a61bf63 796 mutex_unlock(&data->update_lock);
1da177e4
LT
797 return count;
798}
799
34875337
JD
800static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
801static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
802static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
803static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
804/* only PWM2 can be enabled/disabled */
805static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
806 show_pwm2_enable, store_pwm2_enable);
1da177e4 807
1da177e4 808static ssize_t
34875337 809show_sensor(struct device *dev, struct device_attribute *da, char *buf)
1da177e4 810{
34875337 811 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
1da177e4 812 struct w83781d_data *data = w83781d_update_device(dev);
34875337 813 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
1da177e4
LT
814}
815
816static ssize_t
34875337
JD
817store_sensor(struct device *dev, struct device_attribute *da,
818 const char *buf, size_t count)
1da177e4 819{
34875337 820 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
7666c13c 821 struct w83781d_data *data = dev_get_drvdata(dev);
34875337 822 int nr = attr->index;
1da177e4
LT
823 u32 val, tmp;
824
825 val = simple_strtoul(buf, NULL, 10);
826
9a61bf63 827 mutex_lock(&data->update_lock);
1da177e4
LT
828
829 switch (val) {
830 case 1: /* PII/Celeron diode */
31b8dc4d
JD
831 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
832 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 833 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD
834 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
835 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD
836 tmp | BIT_SCFG2[nr]);
837 data->sens[nr] = val;
1da177e4
LT
838 break;
839 case 2: /* 3904 */
31b8dc4d
JD
840 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
841 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337 842 tmp | BIT_SCFG1[nr]);
31b8dc4d
JD
843 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
844 w83781d_write_value(data, W83781D_REG_SCFG2,
34875337
JD
845 tmp & ~BIT_SCFG2[nr]);
846 data->sens[nr] = val;
1da177e4 847 break;
b26f9330
JD
848 case W83781D_DEFAULT_BETA:
849 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
850 "instead\n", W83781D_DEFAULT_BETA);
851 /* fall through */
852 case 4: /* thermistor */
31b8dc4d
JD
853 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
854 w83781d_write_value(data, W83781D_REG_SCFG1,
34875337
JD
855 tmp & ~BIT_SCFG1[nr]);
856 data->sens[nr] = val;
1da177e4
LT
857 break;
858 default:
b26f9330
JD
859 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
860 (long) val);
1da177e4
LT
861 break;
862 }
863
9a61bf63 864 mutex_unlock(&data->update_lock);
1da177e4
LT
865 return count;
866}
867
34875337
JD
868static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
869 show_sensor, store_sensor, 0);
870static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
393cdad6 871 show_sensor, store_sensor, 1);
34875337 872static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
393cdad6 873 show_sensor, store_sensor, 2);
1da177e4 874
7666c13c
JD
875/* I2C devices get this name attribute automatically, but for ISA devices
876 we must create it by ourselves. */
877static ssize_t
878show_name(struct device *dev, struct device_attribute *devattr, char *buf)
879{
880 struct w83781d_data *data = dev_get_drvdata(dev);
881 return sprintf(buf, "%s\n", data->client.name);
882}
883static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
884
1da177e4
LT
885/* This function is called when:
886 * w83781d_driver is inserted (when this module is loaded), for each
887 available adapter
888 * when a new adapter is inserted (and w83781d_driver is still present) */
889static int
890w83781d_attach_adapter(struct i2c_adapter *adapter)
891{
892 if (!(adapter->class & I2C_CLASS_HWMON))
893 return 0;
2ed2dc3c 894 return i2c_probe(adapter, &addr_data, w83781d_detect);
1da177e4
LT
895}
896
897/* Assumes that adapter is of I2C, not ISA variety.
898 * OTHERWISE DON'T CALL THIS
899 */
900static int
901w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
902 struct i2c_client *new_client)
903{
904 int i, val1 = 0, id;
905 int err;
906 const char *client_name = "";
907 struct w83781d_data *data = i2c_get_clientdata(new_client);
908
ba9c2e8d 909 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT
910 if (!(data->lm75[0])) {
911 err = -ENOMEM;
912 goto ERROR_SC_0;
913 }
1da177e4
LT
914
915 id = i2c_adapter_id(adapter);
916
917 if (force_subclients[0] == id && force_subclients[1] == address) {
918 for (i = 2; i <= 3; i++) {
919 if (force_subclients[i] < 0x48 ||
920 force_subclients[i] > 0x4f) {
921 dev_err(&new_client->dev, "Invalid subclient "
922 "address %d; must be 0x48-0x4f\n",
923 force_subclients[i]);
924 err = -EINVAL;
925 goto ERROR_SC_1;
926 }
927 }
31b8dc4d 928 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
1da177e4
LT
929 (force_subclients[2] & 0x07) |
930 ((force_subclients[3] & 0x07) << 4));
931 data->lm75[0]->addr = force_subclients[2];
932 } else {
31b8dc4d 933 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
1da177e4
LT
934 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
935 }
936
937 if (kind != w83783s) {
ba9c2e8d 938 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1da177e4
LT
939 if (!(data->lm75[1])) {
940 err = -ENOMEM;
941 goto ERROR_SC_1;
942 }
1da177e4
LT
943
944 if (force_subclients[0] == id &&
945 force_subclients[1] == address) {
946 data->lm75[1]->addr = force_subclients[3];
947 } else {
948 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
949 }
950 if (data->lm75[0]->addr == data->lm75[1]->addr) {
951 dev_err(&new_client->dev,
952 "Duplicate addresses 0x%x for subclients.\n",
953 data->lm75[0]->addr);
954 err = -EBUSY;
955 goto ERROR_SC_2;
956 }
957 }
958
959 if (kind == w83781d)
960 client_name = "w83781d subclient";
961 else if (kind == w83782d)
962 client_name = "w83782d subclient";
963 else if (kind == w83783s)
964 client_name = "w83783s subclient";
965 else if (kind == w83627hf)
966 client_name = "w83627hf subclient";
967 else if (kind == as99127f)
968 client_name = "as99127f subclient";
969
970 for (i = 0; i <= 1; i++) {
971 /* store all data in w83781d */
972 i2c_set_clientdata(data->lm75[i], NULL);
973 data->lm75[i]->adapter = adapter;
974 data->lm75[i]->driver = &w83781d_driver;
975 data->lm75[i]->flags = 0;
976 strlcpy(data->lm75[i]->name, client_name,
977 I2C_NAME_SIZE);
978 if ((err = i2c_attach_client(data->lm75[i]))) {
979 dev_err(&new_client->dev, "Subclient %d "
980 "registration at address 0x%x "
981 "failed.\n", i, data->lm75[i]->addr);
982 if (i == 1)
983 goto ERROR_SC_3;
984 goto ERROR_SC_2;
985 }
986 if (kind == w83783s)
987 break;
988 }
989
990 return 0;
991
992/* Undo inits in case of errors */
993ERROR_SC_3:
994 i2c_detach_client(data->lm75[0]);
995ERROR_SC_2:
6044ec88 996 kfree(data->lm75[1]);
1da177e4 997ERROR_SC_1:
6044ec88 998 kfree(data->lm75[0]);
1da177e4
LT
999ERROR_SC_0:
1000 return err;
1001}
1002
34875337
JD
1003#define IN_UNIT_ATTRS(X) \
1004 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
1005 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
7d4a1374
JD
1006 &sensor_dev_attr_in##X##_max.dev_attr.attr, \
1007 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
1008 &sensor_dev_attr_in##X##_beep.dev_attr.attr
311ce2ef 1009
34875337
JD
1010#define FAN_UNIT_ATTRS(X) \
1011 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
1012 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
7d4a1374
JD
1013 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
1014 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
1015 &sensor_dev_attr_fan##X##_beep.dev_attr.attr
311ce2ef 1016
34875337
JD
1017#define TEMP_UNIT_ATTRS(X) \
1018 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
1019 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
7d4a1374
JD
1020 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
1021 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
1022 &sensor_dev_attr_temp##X##_beep.dev_attr.attr
311ce2ef
JC
1023
1024static struct attribute* w83781d_attributes[] = {
1025 IN_UNIT_ATTRS(0),
1026 IN_UNIT_ATTRS(2),
1027 IN_UNIT_ATTRS(3),
1028 IN_UNIT_ATTRS(4),
1029 IN_UNIT_ATTRS(5),
1030 IN_UNIT_ATTRS(6),
1031 FAN_UNIT_ATTRS(1),
1032 FAN_UNIT_ATTRS(2),
1033 FAN_UNIT_ATTRS(3),
1034 TEMP_UNIT_ATTRS(1),
1035 TEMP_UNIT_ATTRS(2),
1036 &dev_attr_cpu0_vid.attr,
1037 &dev_attr_vrm.attr,
1038 &dev_attr_alarms.attr,
1039 &dev_attr_beep_mask.attr,
1040 &dev_attr_beep_enable.attr,
1041 NULL
1042};
1043static const struct attribute_group w83781d_group = {
1044 .attrs = w83781d_attributes,
1045};
1046
1047static struct attribute *w83781d_attributes_opt[] = {
1048 IN_UNIT_ATTRS(1),
1049 IN_UNIT_ATTRS(7),
1050 IN_UNIT_ATTRS(8),
1051 TEMP_UNIT_ATTRS(3),
34875337
JD
1052 &sensor_dev_attr_pwm1.dev_attr.attr,
1053 &sensor_dev_attr_pwm2.dev_attr.attr,
1054 &sensor_dev_attr_pwm3.dev_attr.attr,
1055 &sensor_dev_attr_pwm4.dev_attr.attr,
311ce2ef 1056 &dev_attr_pwm2_enable.attr,
34875337
JD
1057 &sensor_dev_attr_temp1_type.dev_attr.attr,
1058 &sensor_dev_attr_temp2_type.dev_attr.attr,
1059 &sensor_dev_attr_temp3_type.dev_attr.attr,
311ce2ef
JC
1060 NULL
1061};
1062static const struct attribute_group w83781d_group_opt = {
1063 .attrs = w83781d_attributes_opt,
1064};
1065
7666c13c 1066/* No clean up is done on error, it's up to the caller */
1da177e4 1067static int
7666c13c 1068w83781d_create_files(struct device *dev, int kind, int is_isa)
1da177e4 1069{
1da177e4 1070 int err;
1da177e4 1071
7666c13c
JD
1072 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
1073 return err;
1074
1075 if (kind != w83783s) {
34875337
JD
1076 if ((err = device_create_file(dev,
1077 &sensor_dev_attr_in1_input.dev_attr))
1078 || (err = device_create_file(dev,
1079 &sensor_dev_attr_in1_min.dev_attr))
1080 || (err = device_create_file(dev,
7d4a1374
JD
1081 &sensor_dev_attr_in1_max.dev_attr))
1082 || (err = device_create_file(dev,
1083 &sensor_dev_attr_in1_alarm.dev_attr))
1084 || (err = device_create_file(dev,
1085 &sensor_dev_attr_in1_beep.dev_attr)))
7666c13c
JD
1086 return err;
1087 }
1088 if (kind != as99127f && kind != w83781d && kind != w83783s) {
34875337
JD
1089 if ((err = device_create_file(dev,
1090 &sensor_dev_attr_in7_input.dev_attr))
1091 || (err = device_create_file(dev,
1092 &sensor_dev_attr_in7_min.dev_attr))
1093 || (err = device_create_file(dev,
1094 &sensor_dev_attr_in7_max.dev_attr))
7d4a1374
JD
1095 || (err = device_create_file(dev,
1096 &sensor_dev_attr_in7_alarm.dev_attr))
1097 || (err = device_create_file(dev,
1098 &sensor_dev_attr_in7_beep.dev_attr))
34875337
JD
1099 || (err = device_create_file(dev,
1100 &sensor_dev_attr_in8_input.dev_attr))
1101 || (err = device_create_file(dev,
1102 &sensor_dev_attr_in8_min.dev_attr))
1103 || (err = device_create_file(dev,
7d4a1374
JD
1104 &sensor_dev_attr_in8_max.dev_attr))
1105 || (err = device_create_file(dev,
1106 &sensor_dev_attr_in8_alarm.dev_attr))
1107 || (err = device_create_file(dev,
1108 &sensor_dev_attr_in8_beep.dev_attr)))
7666c13c
JD
1109 return err;
1110 }
1111 if (kind != w83783s) {
34875337
JD
1112 if ((err = device_create_file(dev,
1113 &sensor_dev_attr_temp3_input.dev_attr))
1114 || (err = device_create_file(dev,
1115 &sensor_dev_attr_temp3_max.dev_attr))
7666c13c 1116 || (err = device_create_file(dev,
7d4a1374
JD
1117 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1118 || (err = device_create_file(dev,
1119 &sensor_dev_attr_temp3_alarm.dev_attr))
1120 || (err = device_create_file(dev,
1121 &sensor_dev_attr_temp3_beep.dev_attr)))
7666c13c 1122 return err;
7d4a1374 1123
7768aa76 1124 if (kind != w83781d) {
7d4a1374
JD
1125 err = sysfs_chmod_file(&dev->kobj,
1126 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1127 S_IRUGO | S_IWUSR);
1128 if (err)
1129 return err;
7768aa76 1130 }
1da177e4
LT
1131 }
1132
7666c13c 1133 if (kind != w83781d && kind != as99127f) {
34875337
JD
1134 if ((err = device_create_file(dev,
1135 &sensor_dev_attr_pwm1.dev_attr))
1136 || (err = device_create_file(dev,
1137 &sensor_dev_attr_pwm2.dev_attr))
7666c13c
JD
1138 || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1139 return err;
1da177e4 1140 }
7666c13c 1141 if (kind == w83782d && !is_isa) {
34875337
JD
1142 if ((err = device_create_file(dev,
1143 &sensor_dev_attr_pwm3.dev_attr))
1144 || (err = device_create_file(dev,
1145 &sensor_dev_attr_pwm4.dev_attr)))
7666c13c
JD
1146 return err;
1147 }
1148
1149 if (kind != as99127f && kind != w83781d) {
34875337
JD
1150 if ((err = device_create_file(dev,
1151 &sensor_dev_attr_temp1_type.dev_attr))
7666c13c 1152 || (err = device_create_file(dev,
34875337 1153 &sensor_dev_attr_temp2_type.dev_attr)))
7666c13c
JD
1154 return err;
1155 if (kind != w83783s) {
1156 if ((err = device_create_file(dev,
34875337 1157 &sensor_dev_attr_temp3_type.dev_attr)))
7666c13c 1158 return err;
1da177e4 1159 }
7666c13c 1160 }
1da177e4 1161
7666c13c
JD
1162 if (is_isa) {
1163 err = device_create_file(&pdev->dev, &dev_attr_name);
1164 if (err)
1165 return err;
1166 }
1da177e4 1167
7666c13c
JD
1168 return 0;
1169}
1da177e4 1170
7666c13c
JD
1171static int
1172w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1173{
1174 int val1 = 0, val2;
1175 struct i2c_client *client;
1176 struct device *dev;
1177 struct w83781d_data *data;
1178 int err;
1179 const char *client_name = "";
1180 enum vendor { winbond, asus } vendid;
1181
1182 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1183 err = -EINVAL;
1184 goto ERROR1;
1da177e4
LT
1185 }
1186
1187 /* OK. For now, we presume we have a valid client. We now create the
1188 client structure, even though we cannot fill it completely yet.
1189 But it allows us to access w83781d_{read,write}_value. */
1190
ba9c2e8d 1191 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1da177e4
LT
1192 err = -ENOMEM;
1193 goto ERROR1;
1194 }
1da177e4 1195
311ce2ef
JC
1196 client = &data->client;
1197 i2c_set_clientdata(client, data);
1198 client->addr = address;
9a61bf63 1199 mutex_init(&data->lock);
311ce2ef 1200 client->adapter = adapter;
7666c13c 1201 client->driver = &w83781d_driver;
311ce2ef 1202 dev = &client->dev;
1da177e4
LT
1203
1204 /* Now, we do the remaining detection. */
1205
1206 /* The w8378?d may be stuck in some other bank than bank 0. This may
1207 make reading other information impossible. Specify a force=... or
1208 force_*=... parameter, and the Winbond will be reset to the right
1209 bank. */
1210 if (kind < 0) {
31b8dc4d 1211 if (w83781d_read_value(data, W83781D_REG_CONFIG) & 0x80) {
bd452e6f
JD
1212 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1213 "failed at step 3\n");
1da177e4
LT
1214 err = -ENODEV;
1215 goto ERROR2;
1216 }
31b8dc4d
JD
1217 val1 = w83781d_read_value(data, W83781D_REG_BANK);
1218 val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1da177e4
LT
1219 /* Check for Winbond or Asus ID if in bank 0 */
1220 if ((!(val1 & 0x07)) &&
1221 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1222 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
bd452e6f
JD
1223 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1224 "failed at step 4\n");
1da177e4
LT
1225 err = -ENODEV;
1226 goto ERROR2;
1227 }
1228 /* If Winbond SMBus, check address at 0x48.
1229 Asus doesn't support, except for as99127f rev.2 */
7666c13c
JD
1230 if ((!(val1 & 0x80) && (val2 == 0xa3)) ||
1231 ((val1 & 0x80) && (val2 == 0x5c))) {
1da177e4 1232 if (w83781d_read_value
31b8dc4d 1233 (data, W83781D_REG_I2C_ADDR) != address) {
bd452e6f
JD
1234 dev_dbg(&adapter->dev, "Detection of w83781d "
1235 "chip failed at step 5\n");
1da177e4
LT
1236 err = -ENODEV;
1237 goto ERROR2;
1238 }
1239 }
1240 }
1241
1242 /* We have either had a force parameter, or we have already detected the
1243 Winbond. Put it now into bank 0 and Vendor ID High Byte */
31b8dc4d
JD
1244 w83781d_write_value(data, W83781D_REG_BANK,
1245 (w83781d_read_value(data, W83781D_REG_BANK)
311ce2ef 1246 & 0x78) | 0x80);
1da177e4
LT
1247
1248 /* Determine the chip type. */
1249 if (kind <= 0) {
1250 /* get vendor ID */
31b8dc4d 1251 val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1da177e4
LT
1252 if (val2 == 0x5c)
1253 vendid = winbond;
1254 else if (val2 == 0x12)
1255 vendid = asus;
1256 else {
bd452e6f
JD
1257 dev_dbg(&adapter->dev, "w83781d chip vendor is "
1258 "neither Winbond nor Asus\n");
1da177e4
LT
1259 err = -ENODEV;
1260 goto ERROR2;
1261 }
1262
31b8dc4d 1263 val1 = w83781d_read_value(data, W83781D_REG_WCHIPID);
1da177e4
LT
1264 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1265 kind = w83781d;
1266 else if (val1 == 0x30 && vendid == winbond)
1267 kind = w83782d;
7666c13c 1268 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1da177e4 1269 kind = w83783s;
7c7a5304 1270 else if (val1 == 0x21 && vendid == winbond)
1da177e4 1271 kind = w83627hf;
6722fead 1272 else if (val1 == 0x31)
1da177e4 1273 kind = as99127f;
1da177e4
LT
1274 else {
1275 if (kind == 0)
bd452e6f 1276 dev_warn(&adapter->dev, "Ignoring 'force' "
1da177e4 1277 "parameter for unknown chip at "
bd452e6f 1278 "address 0x%02x\n", address);
1da177e4
LT
1279 err = -EINVAL;
1280 goto ERROR2;
1281 }
1282 }
1283
1284 if (kind == w83781d) {
1285 client_name = "w83781d";
1286 } else if (kind == w83782d) {
1287 client_name = "w83782d";
1288 } else if (kind == w83783s) {
1289 client_name = "w83783s";
1290 } else if (kind == w83627hf) {
7c7a5304 1291 client_name = "w83627hf";
1da177e4
LT
1292 } else if (kind == as99127f) {
1293 client_name = "as99127f";
1da177e4
LT
1294 }
1295
1296 /* Fill in the remaining client fields and put into the global list */
311ce2ef 1297 strlcpy(client->name, client_name, I2C_NAME_SIZE);
1da177e4
LT
1298 data->type = kind;
1299
1da177e4 1300 /* Tell the I2C layer a new client has arrived */
311ce2ef 1301 if ((err = i2c_attach_client(client)))
1da177e4
LT
1302 goto ERROR2;
1303
1304 /* attach secondary i2c lm75-like clients */
7666c13c
JD
1305 if ((err = w83781d_detect_subclients(adapter, address,
1306 kind, client)))
1307 goto ERROR3;
1da177e4
LT
1308
1309 /* Initialize the chip */
7666c13c 1310 w83781d_init_device(dev);
1da177e4
LT
1311
1312 /* Register sysfs hooks */
7666c13c
JD
1313 err = w83781d_create_files(dev, kind, 0);
1314 if (err)
943b0830 1315 goto ERROR4;
943b0830 1316
1beeffe4
TJ
1317 data->hwmon_dev = hwmon_device_register(dev);
1318 if (IS_ERR(data->hwmon_dev)) {
1319 err = PTR_ERR(data->hwmon_dev);
311ce2ef 1320 goto ERROR4;
1da177e4
LT
1321 }
1322
1323 return 0;
1324
943b0830 1325ERROR4:
311ce2ef
JC
1326 sysfs_remove_group(&dev->kobj, &w83781d_group);
1327 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1328
943b0830
MH
1329 if (data->lm75[1]) {
1330 i2c_detach_client(data->lm75[1]);
1331 kfree(data->lm75[1]);
1332 }
1333 if (data->lm75[0]) {
1334 i2c_detach_client(data->lm75[0]);
1335 kfree(data->lm75[0]);
1336 }
1da177e4 1337ERROR3:
311ce2ef 1338 i2c_detach_client(client);
1da177e4
LT
1339ERROR2:
1340 kfree(data);
1341ERROR1:
1da177e4
LT
1342 return err;
1343}
1344
1345static int
1346w83781d_detach_client(struct i2c_client *client)
1347{
943b0830 1348 struct w83781d_data *data = i2c_get_clientdata(client);
1da177e4
LT
1349 int err;
1350
943b0830 1351 /* main client */
311ce2ef 1352 if (data) {
1beeffe4 1353 hwmon_device_unregister(data->hwmon_dev);
311ce2ef
JC
1354 sysfs_remove_group(&client->dev.kobj, &w83781d_group);
1355 sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt);
1356 }
1da177e4 1357
7bef5594 1358 if ((err = i2c_detach_client(client)))
1da177e4 1359 return err;
1da177e4 1360
943b0830
MH
1361 /* main client */
1362 if (data)
1363 kfree(data);
1364
1365 /* subclient */
1366 else
1da177e4 1367 kfree(client);
1da177e4
LT
1368
1369 return 0;
1370}
1371
7666c13c
JD
1372static int __devinit
1373w83781d_isa_probe(struct platform_device *pdev)
1374{
1375 int err, reg;
1376 struct w83781d_data *data;
1377 struct resource *res;
1378 const char *name;
1379
1380 /* Reserve the ISA region */
1381 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1382 if (!request_region(res->start, W83781D_EXTENT, "w83781d")) {
1383 err = -EBUSY;
1384 goto exit;
1385 }
1386
1387 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1388 err = -ENOMEM;
1389 goto exit_release_region;
1390 }
1391 mutex_init(&data->lock);
1392 data->client.addr = res->start;
1393 i2c_set_clientdata(&data->client, data);
1394 platform_set_drvdata(pdev, data);
1395
31b8dc4d 1396 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
7666c13c
JD
1397 switch (reg) {
1398 case 0x21:
1399 data->type = w83627hf;
1400 name = "w83627hf";
1401 break;
1402 case 0x30:
1403 data->type = w83782d;
1404 name = "w83782d";
1405 break;
1406 default:
1407 data->type = w83781d;
1408 name = "w83781d";
1409 }
1410 strlcpy(data->client.name, name, I2C_NAME_SIZE);
1411
1412 /* Initialize the W83781D chip */
1413 w83781d_init_device(&pdev->dev);
1414
1415 /* Register sysfs hooks */
1416 err = w83781d_create_files(&pdev->dev, data->type, 1);
1417 if (err)
1418 goto exit_remove_files;
1419
1beeffe4
TJ
1420 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1421 if (IS_ERR(data->hwmon_dev)) {
1422 err = PTR_ERR(data->hwmon_dev);
7666c13c
JD
1423 goto exit_remove_files;
1424 }
1425
1426 return 0;
1427
1428 exit_remove_files:
1429 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1430 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1431 device_remove_file(&pdev->dev, &dev_attr_name);
1432 kfree(data);
1433 exit_release_region:
1434 release_region(res->start, W83781D_EXTENT);
1435 exit:
1436 return err;
1437}
1438
1439static int __devexit
1440w83781d_isa_remove(struct platform_device *pdev)
1441{
1442 struct w83781d_data *data = platform_get_drvdata(pdev);
1443
1beeffe4 1444 hwmon_device_unregister(data->hwmon_dev);
7666c13c
JD
1445 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1446 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1447 device_remove_file(&pdev->dev, &dev_attr_name);
1448 release_region(data->client.addr, W83781D_EXTENT);
1449 kfree(data);
1450
1451 return 0;
1452}
1453
1da177e4
LT
1454/* The SMBus locks itself, usually, but nothing may access the Winbond between
1455 bank switches. ISA access must always be locked explicitly!
1456 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1457 would slow down the W83781D access and should not be necessary.
1458 There are some ugly typecasts here, but the good news is - they should
1459 nowhere else be necessary! */
1460static int
31b8dc4d 1461w83781d_read_value(struct w83781d_data *data, u16 reg)
1da177e4 1462{
31b8dc4d 1463 struct i2c_client *client = &data->client;
1da177e4
LT
1464 int res, word_sized, bank;
1465 struct i2c_client *cl;
1466
9a61bf63 1467 mutex_lock(&data->lock);
7666c13c 1468 if (!client->driver) { /* ISA device */
1da177e4
LT
1469 word_sized = (((reg & 0xff00) == 0x100)
1470 || ((reg & 0xff00) == 0x200))
1471 && (((reg & 0x00ff) == 0x50)
1472 || ((reg & 0x00ff) == 0x53)
1473 || ((reg & 0x00ff) == 0x55));
1474 if (reg & 0xff00) {
1475 outb_p(W83781D_REG_BANK,
1476 client->addr + W83781D_ADDR_REG_OFFSET);
1477 outb_p(reg >> 8,
1478 client->addr + W83781D_DATA_REG_OFFSET);
1479 }
1480 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1481 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1482 if (word_sized) {
1483 outb_p((reg & 0xff) + 1,
1484 client->addr + W83781D_ADDR_REG_OFFSET);
1485 res =
1486 (res << 8) + inb_p(client->addr +
1487 W83781D_DATA_REG_OFFSET);
1488 }
1489 if (reg & 0xff00) {
1490 outb_p(W83781D_REG_BANK,
1491 client->addr + W83781D_ADDR_REG_OFFSET);
1492 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1493 }
1494 } else {
1495 bank = (reg >> 8) & 0x0f;
1496 if (bank > 2)
1497 /* switch banks */
1498 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1499 bank);
1500 if (bank == 0 || bank > 2) {
1501 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1502 } else {
1503 /* switch to subclient */
1504 cl = data->lm75[bank - 1];
1505 /* convert from ISA to LM75 I2C addresses */
1506 switch (reg & 0xff) {
1507 case 0x50: /* TEMP */
1508 res = swab16(i2c_smbus_read_word_data(cl, 0));
1509 break;
1510 case 0x52: /* CONFIG */
1511 res = i2c_smbus_read_byte_data(cl, 1);
1512 break;
1513 case 0x53: /* HYST */
1514 res = swab16(i2c_smbus_read_word_data(cl, 2));
1515 break;
1516 case 0x55: /* OVER */
1517 default:
1518 res = swab16(i2c_smbus_read_word_data(cl, 3));
1519 break;
1520 }
1521 }
1522 if (bank > 2)
1523 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1524 }
9a61bf63 1525 mutex_unlock(&data->lock);
1da177e4
LT
1526 return res;
1527}
1528
1529static int
31b8dc4d 1530w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1da177e4 1531{
31b8dc4d 1532 struct i2c_client *client = &data->client;
1da177e4
LT
1533 int word_sized, bank;
1534 struct i2c_client *cl;
1535
9a61bf63 1536 mutex_lock(&data->lock);
7666c13c 1537 if (!client->driver) { /* ISA device */
1da177e4
LT
1538 word_sized = (((reg & 0xff00) == 0x100)
1539 || ((reg & 0xff00) == 0x200))
1540 && (((reg & 0x00ff) == 0x53)
1541 || ((reg & 0x00ff) == 0x55));
1542 if (reg & 0xff00) {
1543 outb_p(W83781D_REG_BANK,
1544 client->addr + W83781D_ADDR_REG_OFFSET);
1545 outb_p(reg >> 8,
1546 client->addr + W83781D_DATA_REG_OFFSET);
1547 }
1548 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1549 if (word_sized) {
1550 outb_p(value >> 8,
1551 client->addr + W83781D_DATA_REG_OFFSET);
1552 outb_p((reg & 0xff) + 1,
1553 client->addr + W83781D_ADDR_REG_OFFSET);
1554 }
1555 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1556 if (reg & 0xff00) {
1557 outb_p(W83781D_REG_BANK,
1558 client->addr + W83781D_ADDR_REG_OFFSET);
1559 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1560 }
1561 } else {
1562 bank = (reg >> 8) & 0x0f;
1563 if (bank > 2)
1564 /* switch banks */
1565 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1566 bank);
1567 if (bank == 0 || bank > 2) {
1568 i2c_smbus_write_byte_data(client, reg & 0xff,
1569 value & 0xff);
1570 } else {
1571 /* switch to subclient */
1572 cl = data->lm75[bank - 1];
1573 /* convert from ISA to LM75 I2C addresses */
1574 switch (reg & 0xff) {
1575 case 0x52: /* CONFIG */
1576 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1577 break;
1578 case 0x53: /* HYST */
1579 i2c_smbus_write_word_data(cl, 2, swab16(value));
1580 break;
1581 case 0x55: /* OVER */
1582 i2c_smbus_write_word_data(cl, 3, swab16(value));
1583 break;
1584 }
1585 }
1586 if (bank > 2)
1587 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1588 }
9a61bf63 1589 mutex_unlock(&data->lock);
1da177e4
LT
1590 return 0;
1591}
1592
1da177e4 1593static void
7666c13c 1594w83781d_init_device(struct device *dev)
1da177e4 1595{
7666c13c 1596 struct w83781d_data *data = dev_get_drvdata(dev);
1da177e4
LT
1597 int i, p;
1598 int type = data->type;
1599 u8 tmp;
1600
f5f8d38b
JD
1601 if (type == w83627hf)
1602 dev_info(dev, "The W83627HF chip is better supported by the "
1603 "w83627hf driver, support will be dropped from the "
1604 "w83781d driver soon\n");
1605
fabddcd4 1606 if (reset && type != as99127f) { /* this resets registers we don't have
1da177e4 1607 documentation for on the as99127f */
fabddcd4
JD
1608 /* Resetting the chip has been the default for a long time,
1609 but it causes the BIOS initializations (fan clock dividers,
1610 thermal sensor types...) to be lost, so it is now optional.
1611 It might even go away if nobody reports it as being useful,
1612 as I see very little reason why this would be needed at
1613 all. */
7666c13c 1614 dev_info(dev, "If reset=1 solved a problem you were "
fabddcd4
JD
1615 "having, please report!\n");
1616
1da177e4 1617 /* save these registers */
31b8dc4d
JD
1618 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1619 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1da177e4
LT
1620 /* Reset all except Watchdog values and last conversion values
1621 This sets fan-divs to 2, among others */
31b8dc4d 1622 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1da177e4
LT
1623 /* Restore the registers and disable power-on abnormal beep.
1624 This saves FAN 1/2/3 input/output values set by BIOS. */
31b8dc4d
JD
1625 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1626 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1da177e4
LT
1627 /* Disable master beep-enable (reset turns it on).
1628 Individual beep_mask should be reset to off but for some reason
1629 disabling this bit helps some people not get beeped */
31b8dc4d 1630 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1da177e4
LT
1631 }
1632
fabddcd4
JD
1633 /* Disable power-on abnormal beep, as advised by the datasheet.
1634 Already done if reset=1. */
1635 if (init && !reset && type != as99127f) {
31b8dc4d
JD
1636 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1637 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
fabddcd4
JD
1638 }
1639
303760b4 1640 data->vrm = vid_which_vrm();
1da177e4
LT
1641
1642 if ((type != w83781d) && (type != as99127f)) {
31b8dc4d 1643 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1da177e4
LT
1644 for (i = 1; i <= 3; i++) {
1645 if (!(tmp & BIT_SCFG1[i - 1])) {
b26f9330 1646 data->sens[i - 1] = 4;
1da177e4
LT
1647 } else {
1648 if (w83781d_read_value
31b8dc4d 1649 (data,
1da177e4
LT
1650 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1651 data->sens[i - 1] = 1;
1652 else
1653 data->sens[i - 1] = 2;
1654 }
7c7a5304 1655 if (type == w83783s && i == 2)
1da177e4
LT
1656 break;
1657 }
1658 }
1659
1660 if (init && type != as99127f) {
1661 /* Enable temp2 */
31b8dc4d 1662 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1da177e4 1663 if (tmp & 0x01) {
7666c13c 1664 dev_warn(dev, "Enabling temp2, readings "
1da177e4 1665 "might not make sense\n");
31b8dc4d 1666 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1da177e4
LT
1667 tmp & 0xfe);
1668 }
1669
1670 /* Enable temp3 */
7c7a5304 1671 if (type != w83783s) {
31b8dc4d 1672 tmp = w83781d_read_value(data,
1da177e4
LT
1673 W83781D_REG_TEMP3_CONFIG);
1674 if (tmp & 0x01) {
7666c13c 1675 dev_warn(dev, "Enabling temp3, "
1da177e4 1676 "readings might not make sense\n");
31b8dc4d 1677 w83781d_write_value(data,
1da177e4
LT
1678 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1679 }
1680 }
1da177e4
LT
1681 }
1682
1683 /* Start monitoring */
31b8dc4d
JD
1684 w83781d_write_value(data, W83781D_REG_CONFIG,
1685 (w83781d_read_value(data,
1da177e4
LT
1686 W83781D_REG_CONFIG) & 0xf7)
1687 | 0x01);
7666c13c
JD
1688
1689 /* A few vars need to be filled upon startup */
34875337
JD
1690 for (i = 0; i < 3; i++) {
1691 data->fan_min[i] = w83781d_read_value(data,
7666c13c
JD
1692 W83781D_REG_FAN_MIN(i));
1693 }
7666c13c
JD
1694
1695 mutex_init(&data->update_lock);
1da177e4
LT
1696}
1697
1698static struct w83781d_data *w83781d_update_device(struct device *dev)
1699{
7666c13c
JD
1700 struct w83781d_data *data = dev_get_drvdata(dev);
1701 struct i2c_client *client = &data->client;
1da177e4
LT
1702 int i;
1703
9a61bf63 1704 mutex_lock(&data->update_lock);
1da177e4
LT
1705
1706 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1707 || !data->valid) {
1708 dev_dbg(dev, "Starting device update\n");
1709
1710 for (i = 0; i <= 8; i++) {
7c7a5304 1711 if (data->type == w83783s && i == 1)
1da177e4
LT
1712 continue; /* 783S has no in1 */
1713 data->in[i] =
31b8dc4d 1714 w83781d_read_value(data, W83781D_REG_IN(i));
1da177e4 1715 data->in_min[i] =
31b8dc4d 1716 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1da177e4 1717 data->in_max[i] =
31b8dc4d 1718 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
7c7a5304 1719 if ((data->type != w83782d)
1da177e4
LT
1720 && (data->type != w83627hf) && (i == 6))
1721 break;
1722 }
34875337
JD
1723 for (i = 0; i < 3; i++) {
1724 data->fan[i] =
31b8dc4d 1725 w83781d_read_value(data, W83781D_REG_FAN(i));
34875337 1726 data->fan_min[i] =
31b8dc4d 1727 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1da177e4
LT
1728 }
1729 if (data->type != w83781d && data->type != as99127f) {
34875337
JD
1730 for (i = 0; i < 4; i++) {
1731 data->pwm[i] =
31b8dc4d 1732 w83781d_read_value(data,
34875337 1733 W83781D_REG_PWM[i]);
7666c13c 1734 if ((data->type != w83782d || !client->driver)
34875337 1735 && i == 1)
1da177e4
LT
1736 break;
1737 }
1738 /* Only PWM2 can be disabled */
34875337 1739 data->pwm2_enable = (w83781d_read_value(data,
1da177e4
LT
1740 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1741 }
1742
31b8dc4d 1743 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1da177e4 1744 data->temp_max =
31b8dc4d 1745 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1da177e4 1746 data->temp_max_hyst =
31b8dc4d 1747 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1da177e4 1748 data->temp_add[0] =
31b8dc4d 1749 w83781d_read_value(data, W83781D_REG_TEMP(2));
1da177e4 1750 data->temp_max_add[0] =
31b8dc4d 1751 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1da177e4 1752 data->temp_max_hyst_add[0] =
31b8dc4d 1753 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
7c7a5304 1754 if (data->type != w83783s) {
1da177e4 1755 data->temp_add[1] =
31b8dc4d 1756 w83781d_read_value(data, W83781D_REG_TEMP(3));
1da177e4 1757 data->temp_max_add[1] =
31b8dc4d 1758 w83781d_read_value(data,
1da177e4
LT
1759 W83781D_REG_TEMP_OVER(3));
1760 data->temp_max_hyst_add[1] =
31b8dc4d 1761 w83781d_read_value(data,
1da177e4
LT
1762 W83781D_REG_TEMP_HYST(3));
1763 }
31b8dc4d 1764 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
7c7a5304 1765 data->vid = i & 0x0f;
31b8dc4d 1766 data->vid |= (w83781d_read_value(data,
7c7a5304 1767 W83781D_REG_CHIPID) & 0x01) << 4;
1da177e4
LT
1768 data->fan_div[0] = (i >> 4) & 0x03;
1769 data->fan_div[1] = (i >> 6) & 0x03;
31b8dc4d 1770 data->fan_div[2] = (w83781d_read_value(data,
7c7a5304 1771 W83781D_REG_PIN) >> 6) & 0x03;
1da177e4 1772 if ((data->type != w83781d) && (data->type != as99127f)) {
31b8dc4d 1773 i = w83781d_read_value(data, W83781D_REG_VBAT);
1da177e4
LT
1774 data->fan_div[0] |= (i >> 3) & 0x04;
1775 data->fan_div[1] |= (i >> 4) & 0x04;
7c7a5304 1776 data->fan_div[2] |= (i >> 5) & 0x04;
1da177e4 1777 }
1da177e4 1778 if ((data->type == w83782d) || (data->type == w83627hf)) {
31b8dc4d 1779 data->alarms = w83781d_read_value(data,
c7f5d7ed 1780 W83782D_REG_ALARM1)
31b8dc4d 1781 | (w83781d_read_value(data,
c7f5d7ed 1782 W83782D_REG_ALARM2) << 8)
31b8dc4d 1783 | (w83781d_read_value(data,
c7f5d7ed
JD
1784 W83782D_REG_ALARM3) << 16);
1785 } else if (data->type == w83783s) {
31b8dc4d 1786 data->alarms = w83781d_read_value(data,
c7f5d7ed 1787 W83782D_REG_ALARM1)
31b8dc4d 1788 | (w83781d_read_value(data,
c7f5d7ed
JD
1789 W83782D_REG_ALARM2) << 8);
1790 } else {
1791 /* No real-time status registers, fall back to
1792 interrupt status registers */
31b8dc4d 1793 data->alarms = w83781d_read_value(data,
c7f5d7ed 1794 W83781D_REG_ALARM1)
31b8dc4d 1795 | (w83781d_read_value(data,
c7f5d7ed 1796 W83781D_REG_ALARM2) << 8);
1da177e4 1797 }
31b8dc4d 1798 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1da177e4
LT
1799 data->beep_enable = i >> 7;
1800 data->beep_mask = ((i & 0x7f) << 8) +
31b8dc4d 1801 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1da177e4
LT
1802 if ((data->type != w83781d) && (data->type != as99127f)) {
1803 data->beep_mask |=
31b8dc4d 1804 w83781d_read_value(data,
1da177e4
LT
1805 W83781D_REG_BEEP_INTS3) << 16;
1806 }
1807 data->last_updated = jiffies;
1808 data->valid = 1;
1809 }
1810
9a61bf63 1811 mutex_unlock(&data->update_lock);
1da177e4
LT
1812
1813 return data;
1814}
1815
7666c13c
JD
1816/* return 1 if a supported chip is found, 0 otherwise */
1817static int __init
1818w83781d_isa_found(unsigned short address)
1819{
1820 int val, save, found = 0;
1821
1822 if (!request_region(address, W83781D_EXTENT, "w83781d"))
1823 return 0;
1824
1825#define REALLY_SLOW_IO
1826 /* We need the timeouts for at least some W83781D-like
1827 chips. But only if we read 'undefined' registers. */
1828 val = inb_p(address + 1);
1829 if (inb_p(address + 2) != val
1830 || inb_p(address + 3) != val
1831 || inb_p(address + 7) != val) {
1832 pr_debug("w83781d: Detection failed at step 1\n");
1833 goto release;
1834 }
1835#undef REALLY_SLOW_IO
1836
1837 /* We should be able to change the 7 LSB of the address port. The
1838 MSB (busy flag) should be clear initially, set after the write. */
1839 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1840 if (save & 0x80) {
1841 pr_debug("w83781d: Detection failed at step 2\n");
1842 goto release;
1843 }
1844 val = ~save & 0x7f;
1845 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1846 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1847 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1848 pr_debug("w83781d: Detection failed at step 3\n");
1849 goto release;
1850 }
1851
1852 /* We found a device, now see if it could be a W83781D */
1853 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1854 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1855 if (val & 0x80) {
1856 pr_debug("w83781d: Detection failed at step 4\n");
1857 goto release;
1858 }
1859 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1860 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1861 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1862 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1863 if ((!(save & 0x80) && (val != 0xa3))
1864 || ((save & 0x80) && (val != 0x5c))) {
1865 pr_debug("w83781d: Detection failed at step 5\n");
1866 goto release;
1867 }
1868 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1869 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1870 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1871 pr_debug("w83781d: Detection failed at step 6\n");
1872 goto release;
1873 }
1874
1875 /* The busy flag should be clear again */
1876 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1877 pr_debug("w83781d: Detection failed at step 7\n");
1878 goto release;
1879 }
1880
1881 /* Determine the chip type */
1882 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1883 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1884 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1885 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1886 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1887 if ((val & 0xfe) == 0x10 /* W83781D */
1888 || val == 0x30 /* W83782D */
1889 || val == 0x21) /* W83627HF */
1890 found = 1;
1891
1892 if (found)
1893 pr_info("w83781d: Found a %s chip at %#x\n",
1894 val == 0x21 ? "W83627HF" :
1895 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1896
1897 release:
1898 release_region(address, W83781D_EXTENT);
1899 return found;
1900}
1901
1902static int __init
1903w83781d_isa_device_add(unsigned short address)
1904{
1905 struct resource res = {
1906 .start = address,
15bde2f1 1907 .end = address + W83781D_EXTENT - 1,
7666c13c
JD
1908 .name = "w83781d",
1909 .flags = IORESOURCE_IO,
1910 };
1911 int err;
1912
1913 pdev = platform_device_alloc("w83781d", address);
1914 if (!pdev) {
1915 err = -ENOMEM;
1916 printk(KERN_ERR "w83781d: Device allocation failed\n");
1917 goto exit;
1918 }
1919
1920 err = platform_device_add_resources(pdev, &res, 1);
1921 if (err) {
1922 printk(KERN_ERR "w83781d: Device resource addition failed "
1923 "(%d)\n", err);
1924 goto exit_device_put;
1925 }
1926
1927 err = platform_device_add(pdev);
1928 if (err) {
1929 printk(KERN_ERR "w83781d: Device addition failed (%d)\n",
1930 err);
1931 goto exit_device_put;
1932 }
1933
1934 return 0;
1935
1936 exit_device_put:
1937 platform_device_put(pdev);
1938 exit:
1939 pdev = NULL;
1940 return err;
1941}
1942
1da177e4
LT
1943static int __init
1944sensors_w83781d_init(void)
1945{
fde09509
JD
1946 int res;
1947
1948 res = i2c_add_driver(&w83781d_driver);
1949 if (res)
7666c13c
JD
1950 goto exit;
1951
1952 if (w83781d_isa_found(isa_address)) {
1953 res = platform_driver_register(&w83781d_isa_driver);
1954 if (res)
1955 goto exit_unreg_i2c_driver;
fde09509 1956
7666c13c
JD
1957 /* Sets global pdev as a side effect */
1958 res = w83781d_isa_device_add(isa_address);
1959 if (res)
1960 goto exit_unreg_isa_driver;
1961 }
fde09509
JD
1962
1963 return 0;
7666c13c
JD
1964
1965 exit_unreg_isa_driver:
1966 platform_driver_unregister(&w83781d_isa_driver);
1967 exit_unreg_i2c_driver:
1968 i2c_del_driver(&w83781d_driver);
1969 exit:
1970 return res;
1da177e4
LT
1971}
1972
1973static void __exit
1974sensors_w83781d_exit(void)
1975{
7666c13c
JD
1976 if (pdev) {
1977 platform_device_unregister(pdev);
1978 platform_driver_unregister(&w83781d_isa_driver);
1979 }
1da177e4
LT
1980 i2c_del_driver(&w83781d_driver);
1981}
1982
1983MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1984 "Philip Edelbrock <phil@netroedge.com>, "
1985 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1986MODULE_DESCRIPTION("W83781D driver");
1987MODULE_LICENSE("GPL");
1988
1989module_init(sensors_w83781d_init);
1990module_exit(sensors_w83781d_exit);
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