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1da177e4 LT |
1 | /* |
2 | w83781d.c - Part of lm_sensors, Linux kernel modules for hardware | |
3 | monitoring | |
4 | Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>, | |
5 | Philip Edelbrock <phil@netroedge.com>, | |
6 | and Mark Studebaker <mdsxyz123@yahoo.com> | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | /* | |
24 | Supports following chips: | |
25 | ||
26 | Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
27 | as99127f 7 3 0 3 0x31 0x12c3 yes no | |
28 | as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no | |
29 | w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes | |
30 | w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC) | |
1da177e4 LT |
31 | w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes |
32 | w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no | |
1da177e4 LT |
33 | |
34 | */ | |
35 | ||
1da177e4 LT |
36 | #include <linux/module.h> |
37 | #include <linux/init.h> | |
38 | #include <linux/slab.h> | |
39 | #include <linux/jiffies.h> | |
40 | #include <linux/i2c.h> | |
fde09509 | 41 | #include <linux/i2c-isa.h> |
943b0830 | 42 | #include <linux/hwmon.h> |
303760b4 | 43 | #include <linux/hwmon-vid.h> |
943b0830 | 44 | #include <linux/err.h> |
1da177e4 LT |
45 | #include <asm/io.h> |
46 | #include "lm75.h" | |
47 | ||
48 | /* Addresses to scan */ | |
49 | static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, | |
50 | 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, | |
51 | 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END }; | |
2d8672c5 | 52 | static unsigned short isa_address = 0x290; |
1da177e4 LT |
53 | |
54 | /* Insmod parameters */ | |
f4b50261 | 55 | I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f); |
1da177e4 LT |
56 | I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: " |
57 | "{bus, clientaddr, subclientaddr1, subclientaddr2}"); | |
58 | ||
59 | static int init = 1; | |
60 | module_param(init, bool, 0); | |
61 | MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); | |
62 | ||
63 | /* Constants specified below */ | |
64 | ||
65 | /* Length of ISA address segment */ | |
66 | #define W83781D_EXTENT 8 | |
67 | ||
68 | /* Where are the ISA address/data registers relative to the base address */ | |
69 | #define W83781D_ADDR_REG_OFFSET 5 | |
70 | #define W83781D_DATA_REG_OFFSET 6 | |
71 | ||
72 | /* The W83781D registers */ | |
73 | /* The W83782D registers for nr=7,8 are in bank 5 */ | |
74 | #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ | |
75 | (0x554 + (((nr) - 7) * 2))) | |
76 | #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | |
77 | (0x555 + (((nr) - 7) * 2))) | |
78 | #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | |
79 | (0x550 + (nr) - 7)) | |
80 | ||
81 | #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr)) | |
82 | #define W83781D_REG_FAN(nr) (0x27 + (nr)) | |
83 | ||
84 | #define W83781D_REG_BANK 0x4E | |
85 | #define W83781D_REG_TEMP2_CONFIG 0x152 | |
86 | #define W83781D_REG_TEMP3_CONFIG 0x252 | |
87 | #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ | |
88 | ((nr == 2) ? (0x0150) : \ | |
89 | (0x27))) | |
90 | #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ | |
91 | ((nr == 2) ? (0x153) : \ | |
92 | (0x3A))) | |
93 | #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ | |
94 | ((nr == 2) ? (0x155) : \ | |
95 | (0x39))) | |
96 | ||
97 | #define W83781D_REG_CONFIG 0x40 | |
98 | #define W83781D_REG_ALARM1 0x41 | |
99 | #define W83781D_REG_ALARM2 0x42 | |
100 | #define W83781D_REG_ALARM3 0x450 /* not on W83781D */ | |
101 | ||
102 | #define W83781D_REG_IRQ 0x4C | |
103 | #define W83781D_REG_BEEP_CONFIG 0x4D | |
104 | #define W83781D_REG_BEEP_INTS1 0x56 | |
105 | #define W83781D_REG_BEEP_INTS2 0x57 | |
106 | #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */ | |
107 | ||
108 | #define W83781D_REG_VID_FANDIV 0x47 | |
109 | ||
110 | #define W83781D_REG_CHIPID 0x49 | |
111 | #define W83781D_REG_WCHIPID 0x58 | |
112 | #define W83781D_REG_CHIPMAN 0x4F | |
113 | #define W83781D_REG_PIN 0x4B | |
114 | ||
115 | /* 782D/783S only */ | |
116 | #define W83781D_REG_VBAT 0x5D | |
117 | ||
118 | /* PWM 782D (1-4) and 783S (1-2) only */ | |
119 | #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */ | |
120 | /* on which is which; */ | |
121 | #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */ | |
122 | /* However 782d is probably wrong. */ | |
123 | #define W83781D_REG_PWM3 0x5E | |
124 | #define W83781D_REG_PWM4 0x5F | |
125 | #define W83781D_REG_PWMCLK12 0x5C | |
126 | #define W83781D_REG_PWMCLK34 0x45C | |
127 | static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2, | |
128 | W83781D_REG_PWM3, W83781D_REG_PWM4 | |
129 | }; | |
130 | ||
131 | #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1]) | |
132 | ||
133 | #define W83781D_REG_I2C_ADDR 0x48 | |
134 | #define W83781D_REG_I2C_SUBADDR 0x4A | |
135 | ||
136 | /* The following are undocumented in the data sheets however we | |
137 | received the information in an email from Winbond tech support */ | |
138 | /* Sensor selection - not on 781d */ | |
139 | #define W83781D_REG_SCFG1 0x5D | |
140 | static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; | |
141 | ||
142 | #define W83781D_REG_SCFG2 0x59 | |
143 | static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; | |
144 | ||
145 | #define W83781D_DEFAULT_BETA 3435 | |
146 | ||
147 | /* RT Table registers */ | |
148 | #define W83781D_REG_RT_IDX 0x50 | |
149 | #define W83781D_REG_RT_VAL 0x51 | |
150 | ||
151 | /* Conversions. Rounding and limit checking is only done on the TO_REG | |
152 | variants. Note that you should be a bit careful with which arguments | |
153 | these macros are called: arguments may be evaluated more than once. | |
154 | Fixing this is just not worth it. */ | |
155 | #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255)) | |
156 | #define IN_FROM_REG(val) (((val) * 16) / 10) | |
157 | ||
158 | static inline u8 | |
159 | FAN_TO_REG(long rpm, int div) | |
160 | { | |
161 | if (rpm == 0) | |
162 | return 255; | |
163 | rpm = SENSORS_LIMIT(rpm, 1, 1000000); | |
164 | return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
165 | } | |
166 | ||
167 | #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \ | |
168 | ((val) == 255 ? 0 : \ | |
169 | 1350000 / ((val) * (div)))) | |
170 | ||
171 | #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \ | |
172 | : (val)) / 1000, 0, 0xff)) | |
173 | #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000) | |
174 | ||
1da177e4 LT |
175 | #define PWM_FROM_REG(val) (val) |
176 | #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) | |
177 | #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \ | |
178 | (val) ^ 0x7fff : (val)) | |
179 | #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \ | |
180 | (~(val)) & 0x7fff : (val) & 0xffffff) | |
181 | ||
182 | #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0) | |
183 | #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0) | |
184 | ||
185 | #define DIV_FROM_REG(val) (1 << (val)) | |
186 | ||
187 | static inline u8 | |
188 | DIV_TO_REG(long val, enum chips type) | |
189 | { | |
190 | int i; | |
191 | val = SENSORS_LIMIT(val, 1, | |
192 | ((type == w83781d | |
193 | || type == as99127f) ? 8 : 128)) >> 1; | |
abc01922 | 194 | for (i = 0; i < 7; i++) { |
1da177e4 LT |
195 | if (val == 0) |
196 | break; | |
197 | val >>= 1; | |
198 | } | |
199 | return ((u8) i); | |
200 | } | |
201 | ||
202 | /* There are some complications in a module like this. First off, W83781D chips | |
203 | may be both present on the SMBus and the ISA bus, and we have to handle | |
204 | those cases separately at some places. Second, there might be several | |
205 | W83781D chips available (well, actually, that is probably never done; but | |
206 | it is a clean illustration of how to handle a case like that). Finally, | |
207 | a specific chip may be attached to *both* ISA and SMBus, and we would | |
208 | not like to detect it double. Fortunately, in the case of the W83781D at | |
209 | least, a register tells us what SMBus address we are on, so that helps | |
210 | a bit - except if there could be more than one SMBus. Groan. No solution | |
211 | for this yet. */ | |
212 | ||
213 | /* This module may seem overly long and complicated. In fact, it is not so | |
214 | bad. Quite a lot of bookkeeping is done. A real driver can often cut | |
215 | some corners. */ | |
216 | ||
217 | /* For each registered W83781D, we need to keep some data in memory. That | |
218 | data is pointed to by w83781d_list[NR]->data. The structure itself is | |
219 | dynamically allocated, at the same time when a new w83781d client is | |
220 | allocated. */ | |
221 | struct w83781d_data { | |
222 | struct i2c_client client; | |
943b0830 | 223 | struct class_device *class_dev; |
1da177e4 LT |
224 | struct semaphore lock; |
225 | enum chips type; | |
226 | ||
227 | struct semaphore update_lock; | |
228 | char valid; /* !=0 if following fields are valid */ | |
229 | unsigned long last_updated; /* In jiffies */ | |
230 | ||
231 | struct i2c_client *lm75[2]; /* for secondary I2C addresses */ | |
232 | /* array of 2 pointers to subclients */ | |
233 | ||
234 | u8 in[9]; /* Register value - 8 & 9 for 782D only */ | |
235 | u8 in_max[9]; /* Register value - 8 & 9 for 782D only */ | |
236 | u8 in_min[9]; /* Register value - 8 & 9 for 782D only */ | |
237 | u8 fan[3]; /* Register value */ | |
238 | u8 fan_min[3]; /* Register value */ | |
239 | u8 temp; | |
240 | u8 temp_max; /* Register value */ | |
241 | u8 temp_max_hyst; /* Register value */ | |
242 | u16 temp_add[2]; /* Register value */ | |
243 | u16 temp_max_add[2]; /* Register value */ | |
244 | u16 temp_max_hyst_add[2]; /* Register value */ | |
245 | u8 fan_div[3]; /* Register encoding, shifted right */ | |
246 | u8 vid; /* Register encoding, combined */ | |
247 | u32 alarms; /* Register encoding, combined */ | |
248 | u32 beep_mask; /* Register encoding, combined */ | |
249 | u8 beep_enable; /* Boolean */ | |
250 | u8 pwm[4]; /* Register value */ | |
251 | u8 pwmenable[4]; /* Boolean */ | |
252 | u16 sens[3]; /* 782D/783S only. | |
253 | 1 = pentium diode; 2 = 3904 diode; | |
254 | 3000-5000 = thermistor beta. | |
255 | Default = 3435. | |
256 | Other Betas unimplemented */ | |
257 | u8 vrm; | |
258 | }; | |
259 | ||
260 | static int w83781d_attach_adapter(struct i2c_adapter *adapter); | |
2d8672c5 | 261 | static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter); |
1da177e4 LT |
262 | static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind); |
263 | static int w83781d_detach_client(struct i2c_client *client); | |
264 | ||
265 | static int w83781d_read_value(struct i2c_client *client, u16 register); | |
266 | static int w83781d_write_value(struct i2c_client *client, u16 register, | |
267 | u16 value); | |
268 | static struct w83781d_data *w83781d_update_device(struct device *dev); | |
269 | static void w83781d_init_client(struct i2c_client *client); | |
270 | ||
271 | static struct i2c_driver w83781d_driver = { | |
cdaf7934 | 272 | .driver = { |
cdaf7934 LR |
273 | .name = "w83781d", |
274 | }, | |
1da177e4 | 275 | .id = I2C_DRIVERID_W83781D, |
1da177e4 LT |
276 | .attach_adapter = w83781d_attach_adapter, |
277 | .detach_client = w83781d_detach_client, | |
278 | }; | |
279 | ||
fde09509 | 280 | static struct i2c_driver w83781d_isa_driver = { |
cdaf7934 | 281 | .driver = { |
cdaf7934 LR |
282 | .name = "w83781d-isa", |
283 | }, | |
2d8672c5 | 284 | .attach_adapter = w83781d_isa_attach_adapter, |
fde09509 JD |
285 | .detach_client = w83781d_detach_client, |
286 | }; | |
287 | ||
288 | ||
1da177e4 LT |
289 | /* following are the sysfs callback functions */ |
290 | #define show_in_reg(reg) \ | |
291 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
292 | { \ | |
293 | struct w83781d_data *data = w83781d_update_device(dev); \ | |
294 | return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \ | |
295 | } | |
296 | show_in_reg(in); | |
297 | show_in_reg(in_min); | |
298 | show_in_reg(in_max); | |
299 | ||
300 | #define store_in_reg(REG, reg) \ | |
301 | static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \ | |
302 | { \ | |
303 | struct i2c_client *client = to_i2c_client(dev); \ | |
304 | struct w83781d_data *data = i2c_get_clientdata(client); \ | |
305 | u32 val; \ | |
306 | \ | |
307 | val = simple_strtoul(buf, NULL, 10) / 10; \ | |
308 | \ | |
309 | down(&data->update_lock); \ | |
310 | data->in_##reg[nr] = IN_TO_REG(val); \ | |
311 | w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \ | |
312 | \ | |
313 | up(&data->update_lock); \ | |
314 | return count; \ | |
315 | } | |
316 | store_in_reg(MIN, min); | |
317 | store_in_reg(MAX, max); | |
318 | ||
319 | #define sysfs_in_offset(offset) \ | |
320 | static ssize_t \ | |
e404e274 | 321 | show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
322 | { \ |
323 | return show_in(dev, buf, offset); \ | |
324 | } \ | |
325 | static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL); | |
326 | ||
327 | #define sysfs_in_reg_offset(reg, offset) \ | |
e404e274 | 328 | static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
329 | { \ |
330 | return show_in_##reg (dev, buf, offset); \ | |
331 | } \ | |
e404e274 | 332 | static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
333 | { \ |
334 | return store_in_##reg (dev, buf, count, offset); \ | |
335 | } \ | |
336 | static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset); | |
337 | ||
338 | #define sysfs_in_offsets(offset) \ | |
339 | sysfs_in_offset(offset); \ | |
340 | sysfs_in_reg_offset(min, offset); \ | |
341 | sysfs_in_reg_offset(max, offset); | |
342 | ||
343 | sysfs_in_offsets(0); | |
344 | sysfs_in_offsets(1); | |
345 | sysfs_in_offsets(2); | |
346 | sysfs_in_offsets(3); | |
347 | sysfs_in_offsets(4); | |
348 | sysfs_in_offsets(5); | |
349 | sysfs_in_offsets(6); | |
350 | sysfs_in_offsets(7); | |
351 | sysfs_in_offsets(8); | |
352 | ||
353 | #define device_create_file_in(client, offset) \ | |
354 | do { \ | |
355 | device_create_file(&client->dev, &dev_attr_in##offset##_input); \ | |
356 | device_create_file(&client->dev, &dev_attr_in##offset##_min); \ | |
357 | device_create_file(&client->dev, &dev_attr_in##offset##_max); \ | |
358 | } while (0) | |
359 | ||
360 | #define show_fan_reg(reg) \ | |
361 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
362 | { \ | |
363 | struct w83781d_data *data = w83781d_update_device(dev); \ | |
364 | return sprintf(buf,"%ld\n", \ | |
365 | FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \ | |
366 | } | |
367 | show_fan_reg(fan); | |
368 | show_fan_reg(fan_min); | |
369 | ||
370 | static ssize_t | |
371 | store_fan_min(struct device *dev, const char *buf, size_t count, int nr) | |
372 | { | |
373 | struct i2c_client *client = to_i2c_client(dev); | |
374 | struct w83781d_data *data = i2c_get_clientdata(client); | |
375 | u32 val; | |
376 | ||
377 | val = simple_strtoul(buf, NULL, 10); | |
378 | ||
379 | down(&data->update_lock); | |
380 | data->fan_min[nr - 1] = | |
381 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1])); | |
382 | w83781d_write_value(client, W83781D_REG_FAN_MIN(nr), | |
383 | data->fan_min[nr - 1]); | |
384 | ||
385 | up(&data->update_lock); | |
386 | return count; | |
387 | } | |
388 | ||
389 | #define sysfs_fan_offset(offset) \ | |
e404e274 | 390 | static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
391 | { \ |
392 | return show_fan(dev, buf, offset); \ | |
393 | } \ | |
394 | static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL); | |
395 | ||
396 | #define sysfs_fan_min_offset(offset) \ | |
e404e274 | 397 | static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
398 | { \ |
399 | return show_fan_min(dev, buf, offset); \ | |
400 | } \ | |
e404e274 | 401 | static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
402 | { \ |
403 | return store_fan_min(dev, buf, count, offset); \ | |
404 | } \ | |
405 | static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset); | |
406 | ||
407 | sysfs_fan_offset(1); | |
408 | sysfs_fan_min_offset(1); | |
409 | sysfs_fan_offset(2); | |
410 | sysfs_fan_min_offset(2); | |
411 | sysfs_fan_offset(3); | |
412 | sysfs_fan_min_offset(3); | |
413 | ||
414 | #define device_create_file_fan(client, offset) \ | |
415 | do { \ | |
416 | device_create_file(&client->dev, &dev_attr_fan##offset##_input); \ | |
417 | device_create_file(&client->dev, &dev_attr_fan##offset##_min); \ | |
418 | } while (0) | |
419 | ||
420 | #define show_temp_reg(reg) \ | |
421 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
422 | { \ | |
423 | struct w83781d_data *data = w83781d_update_device(dev); \ | |
424 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
425 | return sprintf(buf,"%d\n", \ | |
426 | LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ | |
427 | } else { /* TEMP1 */ \ | |
428 | return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ | |
429 | } \ | |
430 | } | |
431 | show_temp_reg(temp); | |
432 | show_temp_reg(temp_max); | |
433 | show_temp_reg(temp_max_hyst); | |
434 | ||
435 | #define store_temp_reg(REG, reg) \ | |
436 | static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \ | |
437 | { \ | |
438 | struct i2c_client *client = to_i2c_client(dev); \ | |
439 | struct w83781d_data *data = i2c_get_clientdata(client); \ | |
440 | s32 val; \ | |
441 | \ | |
442 | val = simple_strtol(buf, NULL, 10); \ | |
443 | \ | |
444 | down(&data->update_lock); \ | |
445 | \ | |
446 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
447 | data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ | |
448 | w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ | |
449 | data->temp_##reg##_add[nr-2]); \ | |
450 | } else { /* TEMP1 */ \ | |
451 | data->temp_##reg = TEMP_TO_REG(val); \ | |
452 | w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ | |
453 | data->temp_##reg); \ | |
454 | } \ | |
455 | \ | |
456 | up(&data->update_lock); \ | |
457 | return count; \ | |
458 | } | |
459 | store_temp_reg(OVER, max); | |
460 | store_temp_reg(HYST, max_hyst); | |
461 | ||
462 | #define sysfs_temp_offset(offset) \ | |
463 | static ssize_t \ | |
e404e274 | 464 | show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
465 | { \ |
466 | return show_temp(dev, buf, offset); \ | |
467 | } \ | |
468 | static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL); | |
469 | ||
470 | #define sysfs_temp_reg_offset(reg, offset) \ | |
e404e274 | 471 | static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
472 | { \ |
473 | return show_temp_##reg (dev, buf, offset); \ | |
474 | } \ | |
e404e274 | 475 | static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
476 | { \ |
477 | return store_temp_##reg (dev, buf, count, offset); \ | |
478 | } \ | |
479 | static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset); | |
480 | ||
481 | #define sysfs_temp_offsets(offset) \ | |
482 | sysfs_temp_offset(offset); \ | |
483 | sysfs_temp_reg_offset(max, offset); \ | |
484 | sysfs_temp_reg_offset(max_hyst, offset); | |
485 | ||
486 | sysfs_temp_offsets(1); | |
487 | sysfs_temp_offsets(2); | |
488 | sysfs_temp_offsets(3); | |
489 | ||
490 | #define device_create_file_temp(client, offset) \ | |
491 | do { \ | |
492 | device_create_file(&client->dev, &dev_attr_temp##offset##_input); \ | |
493 | device_create_file(&client->dev, &dev_attr_temp##offset##_max); \ | |
494 | device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \ | |
495 | } while (0) | |
496 | ||
497 | static ssize_t | |
e404e274 | 498 | show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
499 | { |
500 | struct w83781d_data *data = w83781d_update_device(dev); | |
501 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
502 | } | |
503 | ||
504 | static | |
505 | DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
506 | #define device_create_file_vid(client) \ | |
507 | device_create_file(&client->dev, &dev_attr_cpu0_vid); | |
508 | static ssize_t | |
e404e274 | 509 | show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
510 | { |
511 | struct w83781d_data *data = w83781d_update_device(dev); | |
512 | return sprintf(buf, "%ld\n", (long) data->vrm); | |
513 | } | |
514 | ||
515 | static ssize_t | |
e404e274 | 516 | store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) |
1da177e4 LT |
517 | { |
518 | struct i2c_client *client = to_i2c_client(dev); | |
519 | struct w83781d_data *data = i2c_get_clientdata(client); | |
520 | u32 val; | |
521 | ||
522 | val = simple_strtoul(buf, NULL, 10); | |
523 | data->vrm = val; | |
524 | ||
525 | return count; | |
526 | } | |
527 | ||
528 | static | |
529 | DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
530 | #define device_create_file_vrm(client) \ | |
531 | device_create_file(&client->dev, &dev_attr_vrm); | |
532 | static ssize_t | |
e404e274 | 533 | show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
534 | { |
535 | struct w83781d_data *data = w83781d_update_device(dev); | |
68188ba7 | 536 | return sprintf(buf, "%u\n", data->alarms); |
1da177e4 LT |
537 | } |
538 | ||
539 | static | |
540 | DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); | |
541 | #define device_create_file_alarms(client) \ | |
542 | device_create_file(&client->dev, &dev_attr_alarms); | |
e404e274 | 543 | static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
544 | { |
545 | struct w83781d_data *data = w83781d_update_device(dev); | |
546 | return sprintf(buf, "%ld\n", | |
547 | (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type)); | |
548 | } | |
e404e274 | 549 | static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
550 | { |
551 | struct w83781d_data *data = w83781d_update_device(dev); | |
552 | return sprintf(buf, "%ld\n", | |
553 | (long)BEEP_ENABLE_FROM_REG(data->beep_enable)); | |
554 | } | |
555 | ||
556 | #define BEEP_ENABLE 0 /* Store beep_enable */ | |
557 | #define BEEP_MASK 1 /* Store beep_mask */ | |
558 | ||
559 | static ssize_t | |
560 | store_beep_reg(struct device *dev, const char *buf, size_t count, | |
561 | int update_mask) | |
562 | { | |
563 | struct i2c_client *client = to_i2c_client(dev); | |
564 | struct w83781d_data *data = i2c_get_clientdata(client); | |
565 | u32 val, val2; | |
566 | ||
567 | val = simple_strtoul(buf, NULL, 10); | |
568 | ||
569 | down(&data->update_lock); | |
570 | ||
571 | if (update_mask == BEEP_MASK) { /* We are storing beep_mask */ | |
572 | data->beep_mask = BEEP_MASK_TO_REG(val, data->type); | |
573 | w83781d_write_value(client, W83781D_REG_BEEP_INTS1, | |
574 | data->beep_mask & 0xff); | |
575 | ||
576 | if ((data->type != w83781d) && (data->type != as99127f)) { | |
577 | w83781d_write_value(client, W83781D_REG_BEEP_INTS3, | |
578 | ((data->beep_mask) >> 16) & 0xff); | |
579 | } | |
580 | ||
581 | val2 = (data->beep_mask >> 8) & 0x7f; | |
582 | } else { /* We are storing beep_enable */ | |
583 | val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f; | |
584 | data->beep_enable = BEEP_ENABLE_TO_REG(val); | |
585 | } | |
586 | ||
587 | w83781d_write_value(client, W83781D_REG_BEEP_INTS2, | |
588 | val2 | data->beep_enable << 7); | |
589 | ||
590 | up(&data->update_lock); | |
591 | return count; | |
592 | } | |
593 | ||
594 | #define sysfs_beep(REG, reg) \ | |
e404e274 | 595 | static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 | 596 | { \ |
e404e274 | 597 | return show_beep_##reg(dev, attr, buf); \ |
1da177e4 | 598 | } \ |
e404e274 | 599 | static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
600 | { \ |
601 | return store_beep_reg(dev, buf, count, BEEP_##REG); \ | |
602 | } \ | |
603 | static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg); | |
604 | ||
605 | sysfs_beep(ENABLE, enable); | |
606 | sysfs_beep(MASK, mask); | |
607 | ||
608 | #define device_create_file_beep(client) \ | |
609 | do { \ | |
610 | device_create_file(&client->dev, &dev_attr_beep_enable); \ | |
611 | device_create_file(&client->dev, &dev_attr_beep_mask); \ | |
612 | } while (0) | |
613 | ||
614 | static ssize_t | |
615 | show_fan_div_reg(struct device *dev, char *buf, int nr) | |
616 | { | |
617 | struct w83781d_data *data = w83781d_update_device(dev); | |
618 | return sprintf(buf, "%ld\n", | |
619 | (long) DIV_FROM_REG(data->fan_div[nr - 1])); | |
620 | } | |
621 | ||
622 | /* Note: we save and restore the fan minimum here, because its value is | |
623 | determined in part by the fan divisor. This follows the principle of | |
624 | least suprise; the user doesn't expect the fan minimum to change just | |
625 | because the divisor changed. */ | |
626 | static ssize_t | |
627 | store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr) | |
628 | { | |
629 | struct i2c_client *client = to_i2c_client(dev); | |
630 | struct w83781d_data *data = i2c_get_clientdata(client); | |
631 | unsigned long min; | |
632 | u8 reg; | |
633 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
634 | ||
635 | down(&data->update_lock); | |
636 | ||
637 | /* Save fan_min */ | |
638 | min = FAN_FROM_REG(data->fan_min[nr], | |
639 | DIV_FROM_REG(data->fan_div[nr])); | |
640 | ||
641 | data->fan_div[nr] = DIV_TO_REG(val, data->type); | |
642 | ||
643 | reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) | |
644 | & (nr==0 ? 0xcf : 0x3f)) | |
645 | | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); | |
646 | w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); | |
647 | ||
648 | /* w83781d and as99127f don't have extended divisor bits */ | |
649 | if (data->type != w83781d && data->type != as99127f) { | |
650 | reg = (w83781d_read_value(client, W83781D_REG_VBAT) | |
651 | & ~(1 << (5 + nr))) | |
652 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); | |
653 | w83781d_write_value(client, W83781D_REG_VBAT, reg); | |
654 | } | |
655 | ||
656 | /* Restore fan_min */ | |
657 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | |
658 | w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]); | |
659 | ||
660 | up(&data->update_lock); | |
661 | return count; | |
662 | } | |
663 | ||
664 | #define sysfs_fan_div(offset) \ | |
e404e274 | 665 | static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
666 | { \ |
667 | return show_fan_div_reg(dev, buf, offset); \ | |
668 | } \ | |
e404e274 | 669 | static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
670 | { \ |
671 | return store_fan_div_reg(dev, buf, count, offset - 1); \ | |
672 | } \ | |
673 | static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset); | |
674 | ||
675 | sysfs_fan_div(1); | |
676 | sysfs_fan_div(2); | |
677 | sysfs_fan_div(3); | |
678 | ||
679 | #define device_create_file_fan_div(client, offset) \ | |
680 | do { \ | |
681 | device_create_file(&client->dev, &dev_attr_fan##offset##_div); \ | |
682 | } while (0) | |
683 | ||
684 | static ssize_t | |
685 | show_pwm_reg(struct device *dev, char *buf, int nr) | |
686 | { | |
687 | struct w83781d_data *data = w83781d_update_device(dev); | |
688 | return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1])); | |
689 | } | |
690 | ||
691 | static ssize_t | |
692 | show_pwmenable_reg(struct device *dev, char *buf, int nr) | |
693 | { | |
694 | struct w83781d_data *data = w83781d_update_device(dev); | |
695 | return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]); | |
696 | } | |
697 | ||
698 | static ssize_t | |
699 | store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr) | |
700 | { | |
701 | struct i2c_client *client = to_i2c_client(dev); | |
702 | struct w83781d_data *data = i2c_get_clientdata(client); | |
703 | u32 val; | |
704 | ||
705 | val = simple_strtoul(buf, NULL, 10); | |
706 | ||
707 | down(&data->update_lock); | |
708 | data->pwm[nr - 1] = PWM_TO_REG(val); | |
709 | w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]); | |
710 | up(&data->update_lock); | |
711 | return count; | |
712 | } | |
713 | ||
714 | static ssize_t | |
715 | store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr) | |
716 | { | |
717 | struct i2c_client *client = to_i2c_client(dev); | |
718 | struct w83781d_data *data = i2c_get_clientdata(client); | |
719 | u32 val, reg; | |
720 | ||
721 | val = simple_strtoul(buf, NULL, 10); | |
722 | ||
723 | down(&data->update_lock); | |
724 | ||
725 | switch (val) { | |
726 | case 0: | |
727 | case 1: | |
728 | reg = w83781d_read_value(client, W83781D_REG_PWMCLK12); | |
729 | w83781d_write_value(client, W83781D_REG_PWMCLK12, | |
730 | (reg & 0xf7) | (val << 3)); | |
731 | ||
732 | reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); | |
733 | w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, | |
734 | (reg & 0xef) | (!val << 4)); | |
735 | ||
736 | data->pwmenable[nr - 1] = val; | |
737 | break; | |
738 | ||
739 | default: | |
740 | up(&data->update_lock); | |
741 | return -EINVAL; | |
742 | } | |
743 | ||
744 | up(&data->update_lock); | |
745 | return count; | |
746 | } | |
747 | ||
748 | #define sysfs_pwm(offset) \ | |
e404e274 | 749 | static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
750 | { \ |
751 | return show_pwm_reg(dev, buf, offset); \ | |
752 | } \ | |
e404e274 | 753 | static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \ |
1da177e4 LT |
754 | const char *buf, size_t count) \ |
755 | { \ | |
756 | return store_pwm_reg(dev, buf, count, offset); \ | |
757 | } \ | |
758 | static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \ | |
759 | show_regs_pwm_##offset, store_regs_pwm_##offset); | |
760 | ||
761 | #define sysfs_pwmenable(offset) \ | |
e404e274 | 762 | static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
763 | { \ |
764 | return show_pwmenable_reg(dev, buf, offset); \ | |
765 | } \ | |
e404e274 | 766 | static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \ |
1da177e4 LT |
767 | const char *buf, size_t count) \ |
768 | { \ | |
769 | return store_pwmenable_reg(dev, buf, count, offset); \ | |
770 | } \ | |
771 | static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \ | |
772 | show_regs_pwmenable_##offset, store_regs_pwmenable_##offset); | |
773 | ||
774 | sysfs_pwm(1); | |
775 | sysfs_pwm(2); | |
776 | sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */ | |
777 | sysfs_pwm(3); | |
778 | sysfs_pwm(4); | |
779 | ||
780 | #define device_create_file_pwm(client, offset) \ | |
781 | do { \ | |
782 | device_create_file(&client->dev, &dev_attr_pwm##offset); \ | |
783 | } while (0) | |
784 | ||
785 | #define device_create_file_pwmenable(client, offset) \ | |
786 | do { \ | |
787 | device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \ | |
788 | } while (0) | |
789 | ||
790 | static ssize_t | |
791 | show_sensor_reg(struct device *dev, char *buf, int nr) | |
792 | { | |
793 | struct w83781d_data *data = w83781d_update_device(dev); | |
794 | return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]); | |
795 | } | |
796 | ||
797 | static ssize_t | |
798 | store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr) | |
799 | { | |
800 | struct i2c_client *client = to_i2c_client(dev); | |
801 | struct w83781d_data *data = i2c_get_clientdata(client); | |
802 | u32 val, tmp; | |
803 | ||
804 | val = simple_strtoul(buf, NULL, 10); | |
805 | ||
806 | down(&data->update_lock); | |
807 | ||
808 | switch (val) { | |
809 | case 1: /* PII/Celeron diode */ | |
810 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | |
811 | w83781d_write_value(client, W83781D_REG_SCFG1, | |
812 | tmp | BIT_SCFG1[nr - 1]); | |
813 | tmp = w83781d_read_value(client, W83781D_REG_SCFG2); | |
814 | w83781d_write_value(client, W83781D_REG_SCFG2, | |
815 | tmp | BIT_SCFG2[nr - 1]); | |
816 | data->sens[nr - 1] = val; | |
817 | break; | |
818 | case 2: /* 3904 */ | |
819 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | |
820 | w83781d_write_value(client, W83781D_REG_SCFG1, | |
821 | tmp | BIT_SCFG1[nr - 1]); | |
822 | tmp = w83781d_read_value(client, W83781D_REG_SCFG2); | |
823 | w83781d_write_value(client, W83781D_REG_SCFG2, | |
824 | tmp & ~BIT_SCFG2[nr - 1]); | |
825 | data->sens[nr - 1] = val; | |
826 | break; | |
827 | case W83781D_DEFAULT_BETA: /* thermistor */ | |
828 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | |
829 | w83781d_write_value(client, W83781D_REG_SCFG1, | |
830 | tmp & ~BIT_SCFG1[nr - 1]); | |
831 | data->sens[nr - 1] = val; | |
832 | break; | |
833 | default: | |
834 | dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n", | |
835 | (long) val, W83781D_DEFAULT_BETA); | |
836 | break; | |
837 | } | |
838 | ||
839 | up(&data->update_lock); | |
840 | return count; | |
841 | } | |
842 | ||
843 | #define sysfs_sensor(offset) \ | |
e404e274 | 844 | static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
845 | { \ |
846 | return show_sensor_reg(dev, buf, offset); \ | |
847 | } \ | |
e404e274 | 848 | static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
849 | { \ |
850 | return store_sensor_reg(dev, buf, count, offset); \ | |
851 | } \ | |
852 | static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset); | |
853 | ||
854 | sysfs_sensor(1); | |
855 | sysfs_sensor(2); | |
856 | sysfs_sensor(3); | |
857 | ||
858 | #define device_create_file_sensor(client, offset) \ | |
859 | do { \ | |
860 | device_create_file(&client->dev, &dev_attr_temp##offset##_type); \ | |
861 | } while (0) | |
862 | ||
863 | /* This function is called when: | |
864 | * w83781d_driver is inserted (when this module is loaded), for each | |
865 | available adapter | |
866 | * when a new adapter is inserted (and w83781d_driver is still present) */ | |
867 | static int | |
868 | w83781d_attach_adapter(struct i2c_adapter *adapter) | |
869 | { | |
870 | if (!(adapter->class & I2C_CLASS_HWMON)) | |
871 | return 0; | |
2ed2dc3c | 872 | return i2c_probe(adapter, &addr_data, w83781d_detect); |
1da177e4 LT |
873 | } |
874 | ||
2d8672c5 JD |
875 | static int |
876 | w83781d_isa_attach_adapter(struct i2c_adapter *adapter) | |
877 | { | |
878 | return w83781d_detect(adapter, isa_address, -1); | |
879 | } | |
880 | ||
1da177e4 LT |
881 | /* Assumes that adapter is of I2C, not ISA variety. |
882 | * OTHERWISE DON'T CALL THIS | |
883 | */ | |
884 | static int | |
885 | w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind, | |
886 | struct i2c_client *new_client) | |
887 | { | |
888 | int i, val1 = 0, id; | |
889 | int err; | |
890 | const char *client_name = ""; | |
891 | struct w83781d_data *data = i2c_get_clientdata(new_client); | |
892 | ||
ba9c2e8d | 893 | data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); |
1da177e4 LT |
894 | if (!(data->lm75[0])) { |
895 | err = -ENOMEM; | |
896 | goto ERROR_SC_0; | |
897 | } | |
1da177e4 LT |
898 | |
899 | id = i2c_adapter_id(adapter); | |
900 | ||
901 | if (force_subclients[0] == id && force_subclients[1] == address) { | |
902 | for (i = 2; i <= 3; i++) { | |
903 | if (force_subclients[i] < 0x48 || | |
904 | force_subclients[i] > 0x4f) { | |
905 | dev_err(&new_client->dev, "Invalid subclient " | |
906 | "address %d; must be 0x48-0x4f\n", | |
907 | force_subclients[i]); | |
908 | err = -EINVAL; | |
909 | goto ERROR_SC_1; | |
910 | } | |
911 | } | |
912 | w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR, | |
913 | (force_subclients[2] & 0x07) | | |
914 | ((force_subclients[3] & 0x07) << 4)); | |
915 | data->lm75[0]->addr = force_subclients[2]; | |
916 | } else { | |
917 | val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR); | |
918 | data->lm75[0]->addr = 0x48 + (val1 & 0x07); | |
919 | } | |
920 | ||
921 | if (kind != w83783s) { | |
ba9c2e8d | 922 | data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); |
1da177e4 LT |
923 | if (!(data->lm75[1])) { |
924 | err = -ENOMEM; | |
925 | goto ERROR_SC_1; | |
926 | } | |
1da177e4 LT |
927 | |
928 | if (force_subclients[0] == id && | |
929 | force_subclients[1] == address) { | |
930 | data->lm75[1]->addr = force_subclients[3]; | |
931 | } else { | |
932 | data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07); | |
933 | } | |
934 | if (data->lm75[0]->addr == data->lm75[1]->addr) { | |
935 | dev_err(&new_client->dev, | |
936 | "Duplicate addresses 0x%x for subclients.\n", | |
937 | data->lm75[0]->addr); | |
938 | err = -EBUSY; | |
939 | goto ERROR_SC_2; | |
940 | } | |
941 | } | |
942 | ||
943 | if (kind == w83781d) | |
944 | client_name = "w83781d subclient"; | |
945 | else if (kind == w83782d) | |
946 | client_name = "w83782d subclient"; | |
947 | else if (kind == w83783s) | |
948 | client_name = "w83783s subclient"; | |
949 | else if (kind == w83627hf) | |
950 | client_name = "w83627hf subclient"; | |
951 | else if (kind == as99127f) | |
952 | client_name = "as99127f subclient"; | |
953 | ||
954 | for (i = 0; i <= 1; i++) { | |
955 | /* store all data in w83781d */ | |
956 | i2c_set_clientdata(data->lm75[i], NULL); | |
957 | data->lm75[i]->adapter = adapter; | |
958 | data->lm75[i]->driver = &w83781d_driver; | |
959 | data->lm75[i]->flags = 0; | |
960 | strlcpy(data->lm75[i]->name, client_name, | |
961 | I2C_NAME_SIZE); | |
962 | if ((err = i2c_attach_client(data->lm75[i]))) { | |
963 | dev_err(&new_client->dev, "Subclient %d " | |
964 | "registration at address 0x%x " | |
965 | "failed.\n", i, data->lm75[i]->addr); | |
966 | if (i == 1) | |
967 | goto ERROR_SC_3; | |
968 | goto ERROR_SC_2; | |
969 | } | |
970 | if (kind == w83783s) | |
971 | break; | |
972 | } | |
973 | ||
974 | return 0; | |
975 | ||
976 | /* Undo inits in case of errors */ | |
977 | ERROR_SC_3: | |
978 | i2c_detach_client(data->lm75[0]); | |
979 | ERROR_SC_2: | |
6044ec88 | 980 | kfree(data->lm75[1]); |
1da177e4 | 981 | ERROR_SC_1: |
6044ec88 | 982 | kfree(data->lm75[0]); |
1da177e4 LT |
983 | ERROR_SC_0: |
984 | return err; | |
985 | } | |
986 | ||
987 | static int | |
988 | w83781d_detect(struct i2c_adapter *adapter, int address, int kind) | |
989 | { | |
990 | int i = 0, val1 = 0, val2; | |
991 | struct i2c_client *new_client; | |
992 | struct w83781d_data *data; | |
993 | int err; | |
994 | const char *client_name = ""; | |
995 | int is_isa = i2c_is_isa_adapter(adapter); | |
996 | enum vendor { winbond, asus } vendid; | |
997 | ||
998 | if (!is_isa | |
999 | && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { | |
1000 | err = -EINVAL; | |
1001 | goto ERROR0; | |
1002 | } | |
1003 | ||
1004 | /* Prevent users from forcing a kind for a bus it isn't supposed | |
1005 | to possibly be on */ | |
1006 | if (is_isa && (kind == as99127f || kind == w83783s)) { | |
1007 | dev_err(&adapter->dev, | |
1008 | "Cannot force I2C-only chip for ISA address 0x%02x.\n", | |
1009 | address); | |
1010 | err = -EINVAL; | |
1011 | goto ERROR0; | |
1012 | } | |
1da177e4 LT |
1013 | |
1014 | if (is_isa) | |
1015 | if (!request_region(address, W83781D_EXTENT, | |
cdaf7934 | 1016 | w83781d_isa_driver.driver.name)) { |
1da177e4 LT |
1017 | dev_dbg(&adapter->dev, "Request of region " |
1018 | "0x%x-0x%x for w83781d failed\n", address, | |
1019 | address + W83781D_EXTENT - 1); | |
1020 | err = -EBUSY; | |
1021 | goto ERROR0; | |
1022 | } | |
1023 | ||
1024 | /* Probe whether there is anything available on this address. Already | |
1025 | done for SMBus clients */ | |
1026 | if (kind < 0) { | |
1027 | if (is_isa) { | |
1028 | ||
1029 | #define REALLY_SLOW_IO | |
1030 | /* We need the timeouts for at least some LM78-like | |
1031 | chips. But only if we read 'undefined' registers. */ | |
1032 | i = inb_p(address + 1); | |
1033 | if (inb_p(address + 2) != i | |
1034 | || inb_p(address + 3) != i | |
1035 | || inb_p(address + 7) != i) { | |
1036 | dev_dbg(&adapter->dev, "Detection of w83781d " | |
1037 | "chip failed at step 1\n"); | |
1038 | err = -ENODEV; | |
1039 | goto ERROR1; | |
1040 | } | |
1041 | #undef REALLY_SLOW_IO | |
1042 | ||
1043 | /* Let's just hope nothing breaks here */ | |
1044 | i = inb_p(address + 5) & 0x7f; | |
1045 | outb_p(~i & 0x7f, address + 5); | |
1046 | val2 = inb_p(address + 5) & 0x7f; | |
1047 | if (val2 != (~i & 0x7f)) { | |
1048 | outb_p(i, address + 5); | |
1049 | dev_dbg(&adapter->dev, "Detection of w83781d " | |
1050 | "chip failed at step 2 (0x%x != " | |
1051 | "0x%x at 0x%x)\n", val2, ~i & 0x7f, | |
1052 | address + 5); | |
1053 | err = -ENODEV; | |
1054 | goto ERROR1; | |
1055 | } | |
1056 | } | |
1057 | } | |
1058 | ||
1059 | /* OK. For now, we presume we have a valid client. We now create the | |
1060 | client structure, even though we cannot fill it completely yet. | |
1061 | But it allows us to access w83781d_{read,write}_value. */ | |
1062 | ||
ba9c2e8d | 1063 | if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) { |
1da177e4 LT |
1064 | err = -ENOMEM; |
1065 | goto ERROR1; | |
1066 | } | |
1da177e4 LT |
1067 | |
1068 | new_client = &data->client; | |
1069 | i2c_set_clientdata(new_client, data); | |
1070 | new_client->addr = address; | |
1071 | init_MUTEX(&data->lock); | |
1072 | new_client->adapter = adapter; | |
fde09509 | 1073 | new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver; |
1da177e4 LT |
1074 | new_client->flags = 0; |
1075 | ||
1076 | /* Now, we do the remaining detection. */ | |
1077 | ||
1078 | /* The w8378?d may be stuck in some other bank than bank 0. This may | |
1079 | make reading other information impossible. Specify a force=... or | |
1080 | force_*=... parameter, and the Winbond will be reset to the right | |
1081 | bank. */ | |
1082 | if (kind < 0) { | |
1083 | if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) { | |
1084 | dev_dbg(&new_client->dev, "Detection failed at step " | |
1085 | "3\n"); | |
1086 | err = -ENODEV; | |
1087 | goto ERROR2; | |
1088 | } | |
1089 | val1 = w83781d_read_value(new_client, W83781D_REG_BANK); | |
1090 | val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN); | |
1091 | /* Check for Winbond or Asus ID if in bank 0 */ | |
1092 | if ((!(val1 & 0x07)) && | |
1093 | (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3)) | |
1094 | || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) { | |
1095 | dev_dbg(&new_client->dev, "Detection failed at step " | |
1096 | "4\n"); | |
1097 | err = -ENODEV; | |
1098 | goto ERROR2; | |
1099 | } | |
1100 | /* If Winbond SMBus, check address at 0x48. | |
1101 | Asus doesn't support, except for as99127f rev.2 */ | |
1102 | if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) || | |
1103 | ((val1 & 0x80) && (val2 == 0x5c)))) { | |
1104 | if (w83781d_read_value | |
1105 | (new_client, W83781D_REG_I2C_ADDR) != address) { | |
1106 | dev_dbg(&new_client->dev, "Detection failed " | |
1107 | "at step 5\n"); | |
1108 | err = -ENODEV; | |
1109 | goto ERROR2; | |
1110 | } | |
1111 | } | |
1112 | } | |
1113 | ||
1114 | /* We have either had a force parameter, or we have already detected the | |
1115 | Winbond. Put it now into bank 0 and Vendor ID High Byte */ | |
1116 | w83781d_write_value(new_client, W83781D_REG_BANK, | |
1117 | (w83781d_read_value(new_client, | |
1118 | W83781D_REG_BANK) & 0x78) | | |
1119 | 0x80); | |
1120 | ||
1121 | /* Determine the chip type. */ | |
1122 | if (kind <= 0) { | |
1123 | /* get vendor ID */ | |
1124 | val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN); | |
1125 | if (val2 == 0x5c) | |
1126 | vendid = winbond; | |
1127 | else if (val2 == 0x12) | |
1128 | vendid = asus; | |
1129 | else { | |
1130 | dev_dbg(&new_client->dev, "Chip was made by neither " | |
1131 | "Winbond nor Asus?\n"); | |
1132 | err = -ENODEV; | |
1133 | goto ERROR2; | |
1134 | } | |
1135 | ||
1136 | val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID); | |
1137 | if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) | |
1138 | kind = w83781d; | |
1139 | else if (val1 == 0x30 && vendid == winbond) | |
1140 | kind = w83782d; | |
1141 | else if (val1 == 0x40 && vendid == winbond && !is_isa | |
1142 | && address == 0x2d) | |
1143 | kind = w83783s; | |
7c7a5304 | 1144 | else if (val1 == 0x21 && vendid == winbond) |
1da177e4 LT |
1145 | kind = w83627hf; |
1146 | else if (val1 == 0x31 && !is_isa && address >= 0x28) | |
1147 | kind = as99127f; | |
1da177e4 LT |
1148 | else { |
1149 | if (kind == 0) | |
1150 | dev_warn(&new_client->dev, "Ignoring 'force' " | |
1151 | "parameter for unknown chip at " | |
1152 | "adapter %d, address 0x%02x\n", | |
1153 | i2c_adapter_id(adapter), address); | |
1154 | err = -EINVAL; | |
1155 | goto ERROR2; | |
1156 | } | |
1157 | } | |
1158 | ||
1159 | if (kind == w83781d) { | |
1160 | client_name = "w83781d"; | |
1161 | } else if (kind == w83782d) { | |
1162 | client_name = "w83782d"; | |
1163 | } else if (kind == w83783s) { | |
1164 | client_name = "w83783s"; | |
1165 | } else if (kind == w83627hf) { | |
7c7a5304 | 1166 | client_name = "w83627hf"; |
1da177e4 LT |
1167 | } else if (kind == as99127f) { |
1168 | client_name = "as99127f"; | |
1da177e4 LT |
1169 | } |
1170 | ||
1171 | /* Fill in the remaining client fields and put into the global list */ | |
1172 | strlcpy(new_client->name, client_name, I2C_NAME_SIZE); | |
1173 | data->type = kind; | |
1174 | ||
1175 | data->valid = 0; | |
1176 | init_MUTEX(&data->update_lock); | |
1177 | ||
1178 | /* Tell the I2C layer a new client has arrived */ | |
1179 | if ((err = i2c_attach_client(new_client))) | |
1180 | goto ERROR2; | |
1181 | ||
1182 | /* attach secondary i2c lm75-like clients */ | |
1183 | if (!is_isa) { | |
1184 | if ((err = w83781d_detect_subclients(adapter, address, | |
1185 | kind, new_client))) | |
1186 | goto ERROR3; | |
1187 | } else { | |
1188 | data->lm75[0] = NULL; | |
1189 | data->lm75[1] = NULL; | |
1190 | } | |
1191 | ||
1192 | /* Initialize the chip */ | |
1193 | w83781d_init_client(new_client); | |
1194 | ||
1195 | /* A few vars need to be filled upon startup */ | |
1196 | for (i = 1; i <= 3; i++) { | |
1197 | data->fan_min[i - 1] = w83781d_read_value(new_client, | |
1198 | W83781D_REG_FAN_MIN(i)); | |
1199 | } | |
1200 | if (kind != w83781d && kind != as99127f) | |
1201 | for (i = 0; i < 4; i++) | |
1202 | data->pwmenable[i] = 1; | |
1203 | ||
1204 | /* Register sysfs hooks */ | |
943b0830 MH |
1205 | data->class_dev = hwmon_device_register(&new_client->dev); |
1206 | if (IS_ERR(data->class_dev)) { | |
1207 | err = PTR_ERR(data->class_dev); | |
1208 | goto ERROR4; | |
1209 | } | |
1210 | ||
1da177e4 | 1211 | device_create_file_in(new_client, 0); |
7c7a5304 | 1212 | if (kind != w83783s) |
1da177e4 LT |
1213 | device_create_file_in(new_client, 1); |
1214 | device_create_file_in(new_client, 2); | |
1215 | device_create_file_in(new_client, 3); | |
1216 | device_create_file_in(new_client, 4); | |
1217 | device_create_file_in(new_client, 5); | |
1218 | device_create_file_in(new_client, 6); | |
1219 | if (kind != as99127f && kind != w83781d && kind != w83783s) { | |
1220 | device_create_file_in(new_client, 7); | |
1221 | device_create_file_in(new_client, 8); | |
1222 | } | |
1223 | ||
1224 | device_create_file_fan(new_client, 1); | |
1225 | device_create_file_fan(new_client, 2); | |
7c7a5304 | 1226 | device_create_file_fan(new_client, 3); |
1da177e4 LT |
1227 | |
1228 | device_create_file_temp(new_client, 1); | |
1229 | device_create_file_temp(new_client, 2); | |
7c7a5304 | 1230 | if (kind != w83783s) |
1da177e4 LT |
1231 | device_create_file_temp(new_client, 3); |
1232 | ||
7c7a5304 JD |
1233 | device_create_file_vid(new_client); |
1234 | device_create_file_vrm(new_client); | |
1da177e4 LT |
1235 | |
1236 | device_create_file_fan_div(new_client, 1); | |
1237 | device_create_file_fan_div(new_client, 2); | |
7c7a5304 | 1238 | device_create_file_fan_div(new_client, 3); |
1da177e4 LT |
1239 | |
1240 | device_create_file_alarms(new_client); | |
1241 | ||
1242 | device_create_file_beep(new_client); | |
1243 | ||
1244 | if (kind != w83781d && kind != as99127f) { | |
1245 | device_create_file_pwm(new_client, 1); | |
1246 | device_create_file_pwm(new_client, 2); | |
1247 | device_create_file_pwmenable(new_client, 2); | |
1248 | } | |
1249 | if (kind == w83782d && !is_isa) { | |
1250 | device_create_file_pwm(new_client, 3); | |
1251 | device_create_file_pwm(new_client, 4); | |
1252 | } | |
1253 | ||
1254 | if (kind != as99127f && kind != w83781d) { | |
1255 | device_create_file_sensor(new_client, 1); | |
1256 | device_create_file_sensor(new_client, 2); | |
7c7a5304 | 1257 | if (kind != w83783s) |
1da177e4 LT |
1258 | device_create_file_sensor(new_client, 3); |
1259 | } | |
1260 | ||
1261 | return 0; | |
1262 | ||
943b0830 MH |
1263 | ERROR4: |
1264 | if (data->lm75[1]) { | |
1265 | i2c_detach_client(data->lm75[1]); | |
1266 | kfree(data->lm75[1]); | |
1267 | } | |
1268 | if (data->lm75[0]) { | |
1269 | i2c_detach_client(data->lm75[0]); | |
1270 | kfree(data->lm75[0]); | |
1271 | } | |
1da177e4 LT |
1272 | ERROR3: |
1273 | i2c_detach_client(new_client); | |
1274 | ERROR2: | |
1275 | kfree(data); | |
1276 | ERROR1: | |
1277 | if (is_isa) | |
1278 | release_region(address, W83781D_EXTENT); | |
1279 | ERROR0: | |
1280 | return err; | |
1281 | } | |
1282 | ||
1283 | static int | |
1284 | w83781d_detach_client(struct i2c_client *client) | |
1285 | { | |
943b0830 | 1286 | struct w83781d_data *data = i2c_get_clientdata(client); |
1da177e4 LT |
1287 | int err; |
1288 | ||
943b0830 MH |
1289 | /* main client */ |
1290 | if (data) | |
1291 | hwmon_device_unregister(data->class_dev); | |
1292 | ||
1da177e4 LT |
1293 | if (i2c_is_isa_client(client)) |
1294 | release_region(client->addr, W83781D_EXTENT); | |
1295 | ||
7bef5594 | 1296 | if ((err = i2c_detach_client(client))) |
1da177e4 | 1297 | return err; |
1da177e4 | 1298 | |
943b0830 MH |
1299 | /* main client */ |
1300 | if (data) | |
1301 | kfree(data); | |
1302 | ||
1303 | /* subclient */ | |
1304 | else | |
1da177e4 | 1305 | kfree(client); |
1da177e4 LT |
1306 | |
1307 | return 0; | |
1308 | } | |
1309 | ||
1310 | /* The SMBus locks itself, usually, but nothing may access the Winbond between | |
1311 | bank switches. ISA access must always be locked explicitly! | |
1312 | We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, | |
1313 | would slow down the W83781D access and should not be necessary. | |
1314 | There are some ugly typecasts here, but the good news is - they should | |
1315 | nowhere else be necessary! */ | |
1316 | static int | |
1317 | w83781d_read_value(struct i2c_client *client, u16 reg) | |
1318 | { | |
1319 | struct w83781d_data *data = i2c_get_clientdata(client); | |
1320 | int res, word_sized, bank; | |
1321 | struct i2c_client *cl; | |
1322 | ||
1323 | down(&data->lock); | |
1324 | if (i2c_is_isa_client(client)) { | |
1325 | word_sized = (((reg & 0xff00) == 0x100) | |
1326 | || ((reg & 0xff00) == 0x200)) | |
1327 | && (((reg & 0x00ff) == 0x50) | |
1328 | || ((reg & 0x00ff) == 0x53) | |
1329 | || ((reg & 0x00ff) == 0x55)); | |
1330 | if (reg & 0xff00) { | |
1331 | outb_p(W83781D_REG_BANK, | |
1332 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1333 | outb_p(reg >> 8, | |
1334 | client->addr + W83781D_DATA_REG_OFFSET); | |
1335 | } | |
1336 | outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); | |
1337 | res = inb_p(client->addr + W83781D_DATA_REG_OFFSET); | |
1338 | if (word_sized) { | |
1339 | outb_p((reg & 0xff) + 1, | |
1340 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1341 | res = | |
1342 | (res << 8) + inb_p(client->addr + | |
1343 | W83781D_DATA_REG_OFFSET); | |
1344 | } | |
1345 | if (reg & 0xff00) { | |
1346 | outb_p(W83781D_REG_BANK, | |
1347 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1348 | outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); | |
1349 | } | |
1350 | } else { | |
1351 | bank = (reg >> 8) & 0x0f; | |
1352 | if (bank > 2) | |
1353 | /* switch banks */ | |
1354 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, | |
1355 | bank); | |
1356 | if (bank == 0 || bank > 2) { | |
1357 | res = i2c_smbus_read_byte_data(client, reg & 0xff); | |
1358 | } else { | |
1359 | /* switch to subclient */ | |
1360 | cl = data->lm75[bank - 1]; | |
1361 | /* convert from ISA to LM75 I2C addresses */ | |
1362 | switch (reg & 0xff) { | |
1363 | case 0x50: /* TEMP */ | |
1364 | res = swab16(i2c_smbus_read_word_data(cl, 0)); | |
1365 | break; | |
1366 | case 0x52: /* CONFIG */ | |
1367 | res = i2c_smbus_read_byte_data(cl, 1); | |
1368 | break; | |
1369 | case 0x53: /* HYST */ | |
1370 | res = swab16(i2c_smbus_read_word_data(cl, 2)); | |
1371 | break; | |
1372 | case 0x55: /* OVER */ | |
1373 | default: | |
1374 | res = swab16(i2c_smbus_read_word_data(cl, 3)); | |
1375 | break; | |
1376 | } | |
1377 | } | |
1378 | if (bank > 2) | |
1379 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); | |
1380 | } | |
1381 | up(&data->lock); | |
1382 | return res; | |
1383 | } | |
1384 | ||
1385 | static int | |
1386 | w83781d_write_value(struct i2c_client *client, u16 reg, u16 value) | |
1387 | { | |
1388 | struct w83781d_data *data = i2c_get_clientdata(client); | |
1389 | int word_sized, bank; | |
1390 | struct i2c_client *cl; | |
1391 | ||
1392 | down(&data->lock); | |
1393 | if (i2c_is_isa_client(client)) { | |
1394 | word_sized = (((reg & 0xff00) == 0x100) | |
1395 | || ((reg & 0xff00) == 0x200)) | |
1396 | && (((reg & 0x00ff) == 0x53) | |
1397 | || ((reg & 0x00ff) == 0x55)); | |
1398 | if (reg & 0xff00) { | |
1399 | outb_p(W83781D_REG_BANK, | |
1400 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1401 | outb_p(reg >> 8, | |
1402 | client->addr + W83781D_DATA_REG_OFFSET); | |
1403 | } | |
1404 | outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); | |
1405 | if (word_sized) { | |
1406 | outb_p(value >> 8, | |
1407 | client->addr + W83781D_DATA_REG_OFFSET); | |
1408 | outb_p((reg & 0xff) + 1, | |
1409 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1410 | } | |
1411 | outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET); | |
1412 | if (reg & 0xff00) { | |
1413 | outb_p(W83781D_REG_BANK, | |
1414 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1415 | outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); | |
1416 | } | |
1417 | } else { | |
1418 | bank = (reg >> 8) & 0x0f; | |
1419 | if (bank > 2) | |
1420 | /* switch banks */ | |
1421 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, | |
1422 | bank); | |
1423 | if (bank == 0 || bank > 2) { | |
1424 | i2c_smbus_write_byte_data(client, reg & 0xff, | |
1425 | value & 0xff); | |
1426 | } else { | |
1427 | /* switch to subclient */ | |
1428 | cl = data->lm75[bank - 1]; | |
1429 | /* convert from ISA to LM75 I2C addresses */ | |
1430 | switch (reg & 0xff) { | |
1431 | case 0x52: /* CONFIG */ | |
1432 | i2c_smbus_write_byte_data(cl, 1, value & 0xff); | |
1433 | break; | |
1434 | case 0x53: /* HYST */ | |
1435 | i2c_smbus_write_word_data(cl, 2, swab16(value)); | |
1436 | break; | |
1437 | case 0x55: /* OVER */ | |
1438 | i2c_smbus_write_word_data(cl, 3, swab16(value)); | |
1439 | break; | |
1440 | } | |
1441 | } | |
1442 | if (bank > 2) | |
1443 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); | |
1444 | } | |
1445 | up(&data->lock); | |
1446 | return 0; | |
1447 | } | |
1448 | ||
1da177e4 LT |
1449 | static void |
1450 | w83781d_init_client(struct i2c_client *client) | |
1451 | { | |
1452 | struct w83781d_data *data = i2c_get_clientdata(client); | |
1453 | int i, p; | |
1454 | int type = data->type; | |
1455 | u8 tmp; | |
1456 | ||
1457 | if (init && type != as99127f) { /* this resets registers we don't have | |
1458 | documentation for on the as99127f */ | |
1459 | /* save these registers */ | |
1460 | i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); | |
1461 | p = w83781d_read_value(client, W83781D_REG_PWMCLK12); | |
1462 | /* Reset all except Watchdog values and last conversion values | |
1463 | This sets fan-divs to 2, among others */ | |
1464 | w83781d_write_value(client, W83781D_REG_CONFIG, 0x80); | |
1465 | /* Restore the registers and disable power-on abnormal beep. | |
1466 | This saves FAN 1/2/3 input/output values set by BIOS. */ | |
1467 | w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80); | |
1468 | w83781d_write_value(client, W83781D_REG_PWMCLK12, p); | |
1469 | /* Disable master beep-enable (reset turns it on). | |
1470 | Individual beep_mask should be reset to off but for some reason | |
1471 | disabling this bit helps some people not get beeped */ | |
1472 | w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0); | |
1473 | } | |
1474 | ||
303760b4 | 1475 | data->vrm = vid_which_vrm(); |
1da177e4 LT |
1476 | |
1477 | if ((type != w83781d) && (type != as99127f)) { | |
1478 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | |
1479 | for (i = 1; i <= 3; i++) { | |
1480 | if (!(tmp & BIT_SCFG1[i - 1])) { | |
1481 | data->sens[i - 1] = W83781D_DEFAULT_BETA; | |
1482 | } else { | |
1483 | if (w83781d_read_value | |
1484 | (client, | |
1485 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) | |
1486 | data->sens[i - 1] = 1; | |
1487 | else | |
1488 | data->sens[i - 1] = 2; | |
1489 | } | |
7c7a5304 | 1490 | if (type == w83783s && i == 2) |
1da177e4 LT |
1491 | break; |
1492 | } | |
1493 | } | |
1494 | ||
1495 | if (init && type != as99127f) { | |
1496 | /* Enable temp2 */ | |
1497 | tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG); | |
1498 | if (tmp & 0x01) { | |
1499 | dev_warn(&client->dev, "Enabling temp2, readings " | |
1500 | "might not make sense\n"); | |
1501 | w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG, | |
1502 | tmp & 0xfe); | |
1503 | } | |
1504 | ||
1505 | /* Enable temp3 */ | |
7c7a5304 | 1506 | if (type != w83783s) { |
1da177e4 LT |
1507 | tmp = w83781d_read_value(client, |
1508 | W83781D_REG_TEMP3_CONFIG); | |
1509 | if (tmp & 0x01) { | |
1510 | dev_warn(&client->dev, "Enabling temp3, " | |
1511 | "readings might not make sense\n"); | |
1512 | w83781d_write_value(client, | |
1513 | W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); | |
1514 | } | |
1515 | } | |
1516 | ||
1517 | if (type != w83781d) { | |
1518 | /* enable comparator mode for temp2 and temp3 so | |
1519 | alarm indication will work correctly */ | |
1520 | i = w83781d_read_value(client, W83781D_REG_IRQ); | |
1521 | if (!(i & 0x40)) | |
1522 | w83781d_write_value(client, W83781D_REG_IRQ, | |
1523 | i | 0x40); | |
1524 | } | |
1525 | } | |
1526 | ||
1527 | /* Start monitoring */ | |
1528 | w83781d_write_value(client, W83781D_REG_CONFIG, | |
1529 | (w83781d_read_value(client, | |
1530 | W83781D_REG_CONFIG) & 0xf7) | |
1531 | | 0x01); | |
1532 | } | |
1533 | ||
1534 | static struct w83781d_data *w83781d_update_device(struct device *dev) | |
1535 | { | |
1536 | struct i2c_client *client = to_i2c_client(dev); | |
1537 | struct w83781d_data *data = i2c_get_clientdata(client); | |
1538 | int i; | |
1539 | ||
1540 | down(&data->update_lock); | |
1541 | ||
1542 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
1543 | || !data->valid) { | |
1544 | dev_dbg(dev, "Starting device update\n"); | |
1545 | ||
1546 | for (i = 0; i <= 8; i++) { | |
7c7a5304 | 1547 | if (data->type == w83783s && i == 1) |
1da177e4 LT |
1548 | continue; /* 783S has no in1 */ |
1549 | data->in[i] = | |
1550 | w83781d_read_value(client, W83781D_REG_IN(i)); | |
1551 | data->in_min[i] = | |
1552 | w83781d_read_value(client, W83781D_REG_IN_MIN(i)); | |
1553 | data->in_max[i] = | |
1554 | w83781d_read_value(client, W83781D_REG_IN_MAX(i)); | |
7c7a5304 | 1555 | if ((data->type != w83782d) |
1da177e4 LT |
1556 | && (data->type != w83627hf) && (i == 6)) |
1557 | break; | |
1558 | } | |
1559 | for (i = 1; i <= 3; i++) { | |
1560 | data->fan[i - 1] = | |
1561 | w83781d_read_value(client, W83781D_REG_FAN(i)); | |
1562 | data->fan_min[i - 1] = | |
1563 | w83781d_read_value(client, W83781D_REG_FAN_MIN(i)); | |
1564 | } | |
1565 | if (data->type != w83781d && data->type != as99127f) { | |
1566 | for (i = 1; i <= 4; i++) { | |
1567 | data->pwm[i - 1] = | |
1568 | w83781d_read_value(client, | |
1569 | W83781D_REG_PWM(i)); | |
1570 | if ((data->type != w83782d | |
1571 | || i2c_is_isa_client(client)) | |
1572 | && i == 2) | |
1573 | break; | |
1574 | } | |
1575 | /* Only PWM2 can be disabled */ | |
1576 | data->pwmenable[1] = (w83781d_read_value(client, | |
1577 | W83781D_REG_PWMCLK12) & 0x08) >> 3; | |
1578 | } | |
1579 | ||
1580 | data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1)); | |
1581 | data->temp_max = | |
1582 | w83781d_read_value(client, W83781D_REG_TEMP_OVER(1)); | |
1583 | data->temp_max_hyst = | |
1584 | w83781d_read_value(client, W83781D_REG_TEMP_HYST(1)); | |
1585 | data->temp_add[0] = | |
1586 | w83781d_read_value(client, W83781D_REG_TEMP(2)); | |
1587 | data->temp_max_add[0] = | |
1588 | w83781d_read_value(client, W83781D_REG_TEMP_OVER(2)); | |
1589 | data->temp_max_hyst_add[0] = | |
1590 | w83781d_read_value(client, W83781D_REG_TEMP_HYST(2)); | |
7c7a5304 | 1591 | if (data->type != w83783s) { |
1da177e4 LT |
1592 | data->temp_add[1] = |
1593 | w83781d_read_value(client, W83781D_REG_TEMP(3)); | |
1594 | data->temp_max_add[1] = | |
1595 | w83781d_read_value(client, | |
1596 | W83781D_REG_TEMP_OVER(3)); | |
1597 | data->temp_max_hyst_add[1] = | |
1598 | w83781d_read_value(client, | |
1599 | W83781D_REG_TEMP_HYST(3)); | |
1600 | } | |
1601 | i = w83781d_read_value(client, W83781D_REG_VID_FANDIV); | |
7c7a5304 JD |
1602 | data->vid = i & 0x0f; |
1603 | data->vid |= (w83781d_read_value(client, | |
1604 | W83781D_REG_CHIPID) & 0x01) << 4; | |
1da177e4 LT |
1605 | data->fan_div[0] = (i >> 4) & 0x03; |
1606 | data->fan_div[1] = (i >> 6) & 0x03; | |
7c7a5304 JD |
1607 | data->fan_div[2] = (w83781d_read_value(client, |
1608 | W83781D_REG_PIN) >> 6) & 0x03; | |
1da177e4 LT |
1609 | if ((data->type != w83781d) && (data->type != as99127f)) { |
1610 | i = w83781d_read_value(client, W83781D_REG_VBAT); | |
1611 | data->fan_div[0] |= (i >> 3) & 0x04; | |
1612 | data->fan_div[1] |= (i >> 4) & 0x04; | |
7c7a5304 | 1613 | data->fan_div[2] |= (i >> 5) & 0x04; |
1da177e4 LT |
1614 | } |
1615 | data->alarms = | |
1616 | w83781d_read_value(client, | |
1617 | W83781D_REG_ALARM1) + | |
1618 | (w83781d_read_value(client, W83781D_REG_ALARM2) << 8); | |
1619 | if ((data->type == w83782d) || (data->type == w83627hf)) { | |
1620 | data->alarms |= | |
1621 | w83781d_read_value(client, | |
1622 | W83781D_REG_ALARM3) << 16; | |
1623 | } | |
1624 | i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2); | |
1625 | data->beep_enable = i >> 7; | |
1626 | data->beep_mask = ((i & 0x7f) << 8) + | |
1627 | w83781d_read_value(client, W83781D_REG_BEEP_INTS1); | |
1628 | if ((data->type != w83781d) && (data->type != as99127f)) { | |
1629 | data->beep_mask |= | |
1630 | w83781d_read_value(client, | |
1631 | W83781D_REG_BEEP_INTS3) << 16; | |
1632 | } | |
1633 | data->last_updated = jiffies; | |
1634 | data->valid = 1; | |
1635 | } | |
1636 | ||
1637 | up(&data->update_lock); | |
1638 | ||
1639 | return data; | |
1640 | } | |
1641 | ||
1642 | static int __init | |
1643 | sensors_w83781d_init(void) | |
1644 | { | |
fde09509 JD |
1645 | int res; |
1646 | ||
1647 | res = i2c_add_driver(&w83781d_driver); | |
1648 | if (res) | |
1649 | return res; | |
1650 | ||
1651 | res = i2c_isa_add_driver(&w83781d_isa_driver); | |
1652 | if (res) { | |
1653 | i2c_del_driver(&w83781d_driver); | |
1654 | return res; | |
1655 | } | |
1656 | ||
1657 | return 0; | |
1da177e4 LT |
1658 | } |
1659 | ||
1660 | static void __exit | |
1661 | sensors_w83781d_exit(void) | |
1662 | { | |
fde09509 | 1663 | i2c_isa_del_driver(&w83781d_isa_driver); |
1da177e4 LT |
1664 | i2c_del_driver(&w83781d_driver); |
1665 | } | |
1666 | ||
1667 | MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " | |
1668 | "Philip Edelbrock <phil@netroedge.com>, " | |
1669 | "and Mark Studebaker <mdsxyz123@yahoo.com>"); | |
1670 | MODULE_DESCRIPTION("W83781D driver"); | |
1671 | MODULE_LICENSE("GPL"); | |
1672 | ||
1673 | module_init(sensors_w83781d_init); | |
1674 | module_exit(sensors_w83781d_exit); |