Commit | Line | Data |
---|---|---|
9873964d | 1 | /* |
ec1c3194 GR |
2 | * w83791d.c - Part of lm_sensors, Linux kernel modules for hardware |
3 | * monitoring | |
4 | * | |
5 | * Copyright (C) 2006-2007 Charles Spirakis <bezaur@gmail.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
9873964d CS |
21 | |
22 | /* | |
ec1c3194 GR |
23 | * Supports following chips: |
24 | * | |
25 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
26 | * w83791d 10 5 5 3 0x71 0x5ca3 yes no | |
27 | * | |
28 | * The w83791d chip appears to be part way between the 83781d and the | |
29 | * 83792d. Thus, this file is derived from both the w83792d.c and | |
30 | * w83781d.c files. | |
31 | * | |
32 | * The w83791g chip is the same as the w83791d but lead-free. | |
33 | */ | |
9873964d | 34 | |
9873964d CS |
35 | #include <linux/module.h> |
36 | #include <linux/init.h> | |
37 | #include <linux/slab.h> | |
38 | #include <linux/i2c.h> | |
39 | #include <linux/hwmon.h> | |
40 | #include <linux/hwmon-vid.h> | |
41 | #include <linux/hwmon-sysfs.h> | |
42 | #include <linux/err.h> | |
43 | #include <linux/mutex.h> | |
44 | ||
45 | #define NUMBER_OF_VIN 10 | |
46 | #define NUMBER_OF_FANIN 5 | |
47 | #define NUMBER_OF_TEMPIN 3 | |
6495ce18 | 48 | #define NUMBER_OF_PWM 5 |
9873964d CS |
49 | |
50 | /* Addresses to scan */ | |
25e9c86d MH |
51 | static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, |
52 | I2C_CLIENT_END }; | |
9873964d CS |
53 | |
54 | /* Insmod parameters */ | |
3aed198c JD |
55 | |
56 | static unsigned short force_subclients[4]; | |
57 | module_param_array(force_subclients, short, NULL, 0); | |
58 | MODULE_PARM_DESC(force_subclients, "List of subclient addresses: " | |
9873964d CS |
59 | "{bus, clientaddr, subclientaddr1, subclientaddr2}"); |
60 | ||
90ab5ee9 | 61 | static bool reset; |
9873964d CS |
62 | module_param(reset, bool, 0); |
63 | MODULE_PARM_DESC(reset, "Set to one to force a hardware chip reset"); | |
64 | ||
90ab5ee9 | 65 | static bool init; |
9873964d CS |
66 | module_param(init, bool, 0); |
67 | MODULE_PARM_DESC(init, "Set to one to force extra software initialization"); | |
68 | ||
69 | /* The W83791D registers */ | |
70 | static const u8 W83791D_REG_IN[NUMBER_OF_VIN] = { | |
71 | 0x20, /* VCOREA in DataSheet */ | |
72 | 0x21, /* VINR0 in DataSheet */ | |
73 | 0x22, /* +3.3VIN in DataSheet */ | |
74 | 0x23, /* VDD5V in DataSheet */ | |
75 | 0x24, /* +12VIN in DataSheet */ | |
76 | 0x25, /* -12VIN in DataSheet */ | |
77 | 0x26, /* -5VIN in DataSheet */ | |
78 | 0xB0, /* 5VSB in DataSheet */ | |
79 | 0xB1, /* VBAT in DataSheet */ | |
80 | 0xB2 /* VINR1 in DataSheet */ | |
81 | }; | |
82 | ||
83 | static const u8 W83791D_REG_IN_MAX[NUMBER_OF_VIN] = { | |
84 | 0x2B, /* VCOREA High Limit in DataSheet */ | |
85 | 0x2D, /* VINR0 High Limit in DataSheet */ | |
86 | 0x2F, /* +3.3VIN High Limit in DataSheet */ | |
87 | 0x31, /* VDD5V High Limit in DataSheet */ | |
88 | 0x33, /* +12VIN High Limit in DataSheet */ | |
89 | 0x35, /* -12VIN High Limit in DataSheet */ | |
90 | 0x37, /* -5VIN High Limit in DataSheet */ | |
91 | 0xB4, /* 5VSB High Limit in DataSheet */ | |
92 | 0xB6, /* VBAT High Limit in DataSheet */ | |
93 | 0xB8 /* VINR1 High Limit in DataSheet */ | |
94 | }; | |
95 | static const u8 W83791D_REG_IN_MIN[NUMBER_OF_VIN] = { | |
96 | 0x2C, /* VCOREA Low Limit in DataSheet */ | |
97 | 0x2E, /* VINR0 Low Limit in DataSheet */ | |
98 | 0x30, /* +3.3VIN Low Limit in DataSheet */ | |
99 | 0x32, /* VDD5V Low Limit in DataSheet */ | |
100 | 0x34, /* +12VIN Low Limit in DataSheet */ | |
101 | 0x36, /* -12VIN Low Limit in DataSheet */ | |
102 | 0x38, /* -5VIN Low Limit in DataSheet */ | |
103 | 0xB5, /* 5VSB Low Limit in DataSheet */ | |
104 | 0xB7, /* VBAT Low Limit in DataSheet */ | |
105 | 0xB9 /* VINR1 Low Limit in DataSheet */ | |
106 | }; | |
107 | static const u8 W83791D_REG_FAN[NUMBER_OF_FANIN] = { | |
108 | 0x28, /* FAN 1 Count in DataSheet */ | |
109 | 0x29, /* FAN 2 Count in DataSheet */ | |
110 | 0x2A, /* FAN 3 Count in DataSheet */ | |
111 | 0xBA, /* FAN 4 Count in DataSheet */ | |
112 | 0xBB, /* FAN 5 Count in DataSheet */ | |
113 | }; | |
114 | static const u8 W83791D_REG_FAN_MIN[NUMBER_OF_FANIN] = { | |
115 | 0x3B, /* FAN 1 Count Low Limit in DataSheet */ | |
116 | 0x3C, /* FAN 2 Count Low Limit in DataSheet */ | |
117 | 0x3D, /* FAN 3 Count Low Limit in DataSheet */ | |
118 | 0xBC, /* FAN 4 Count Low Limit in DataSheet */ | |
119 | 0xBD, /* FAN 5 Count Low Limit in DataSheet */ | |
120 | }; | |
121 | ||
6495ce18 MH |
122 | static const u8 W83791D_REG_PWM[NUMBER_OF_PWM] = { |
123 | 0x81, /* PWM 1 duty cycle register in DataSheet */ | |
124 | 0x83, /* PWM 2 duty cycle register in DataSheet */ | |
125 | 0x94, /* PWM 3 duty cycle register in DataSheet */ | |
126 | 0xA0, /* PWM 4 duty cycle register in DataSheet */ | |
127 | 0xA1, /* PWM 5 duty cycle register in DataSheet */ | |
128 | }; | |
129 | ||
a5a4598c MH |
130 | static const u8 W83791D_REG_TEMP_TARGET[3] = { |
131 | 0x85, /* PWM 1 target temperature for temp 1 */ | |
132 | 0x86, /* PWM 2 target temperature for temp 2 */ | |
133 | 0x96, /* PWM 3 target temperature for temp 3 */ | |
134 | }; | |
135 | ||
136 | static const u8 W83791D_REG_TEMP_TOL[2] = { | |
137 | 0x87, /* PWM 1/2 temperature tolerance */ | |
138 | 0x97, /* PWM 3 temperature tolerance */ | |
139 | }; | |
140 | ||
9873964d CS |
141 | static const u8 W83791D_REG_FAN_CFG[2] = { |
142 | 0x84, /* FAN 1/2 configuration */ | |
143 | 0x95, /* FAN 3 configuration */ | |
144 | }; | |
145 | ||
146 | static const u8 W83791D_REG_FAN_DIV[3] = { | |
147 | 0x47, /* contains FAN1 and FAN2 Divisor */ | |
148 | 0x4b, /* contains FAN3 Divisor */ | |
149 | 0x5C, /* contains FAN4 and FAN5 Divisor */ | |
150 | }; | |
151 | ||
152 | #define W83791D_REG_BANK 0x4E | |
153 | #define W83791D_REG_TEMP2_CONFIG 0xC2 | |
154 | #define W83791D_REG_TEMP3_CONFIG 0xCA | |
155 | ||
156 | static const u8 W83791D_REG_TEMP1[3] = { | |
157 | 0x27, /* TEMP 1 in DataSheet */ | |
158 | 0x39, /* TEMP 1 Over in DataSheet */ | |
159 | 0x3A, /* TEMP 1 Hyst in DataSheet */ | |
160 | }; | |
161 | ||
162 | static const u8 W83791D_REG_TEMP_ADD[2][6] = { | |
163 | {0xC0, /* TEMP 2 in DataSheet */ | |
164 | 0xC1, /* TEMP 2(0.5 deg) in DataSheet */ | |
165 | 0xC5, /* TEMP 2 Over High part in DataSheet */ | |
166 | 0xC6, /* TEMP 2 Over Low part in DataSheet */ | |
167 | 0xC3, /* TEMP 2 Thyst High part in DataSheet */ | |
168 | 0xC4}, /* TEMP 2 Thyst Low part in DataSheet */ | |
169 | {0xC8, /* TEMP 3 in DataSheet */ | |
170 | 0xC9, /* TEMP 3(0.5 deg) in DataSheet */ | |
171 | 0xCD, /* TEMP 3 Over High part in DataSheet */ | |
172 | 0xCE, /* TEMP 3 Over Low part in DataSheet */ | |
173 | 0xCB, /* TEMP 3 Thyst High part in DataSheet */ | |
174 | 0xCC} /* TEMP 3 Thyst Low part in DataSheet */ | |
175 | }; | |
176 | ||
177 | #define W83791D_REG_BEEP_CONFIG 0x4D | |
178 | ||
179 | static const u8 W83791D_REG_BEEP_CTRL[3] = { | |
180 | 0x56, /* BEEP Control Register 1 */ | |
181 | 0x57, /* BEEP Control Register 2 */ | |
182 | 0xA3, /* BEEP Control Register 3 */ | |
183 | }; | |
184 | ||
6e1ecd9b | 185 | #define W83791D_REG_GPIO 0x15 |
9873964d CS |
186 | #define W83791D_REG_CONFIG 0x40 |
187 | #define W83791D_REG_VID_FANDIV 0x47 | |
188 | #define W83791D_REG_DID_VID4 0x49 | |
189 | #define W83791D_REG_WCHIPID 0x58 | |
190 | #define W83791D_REG_CHIPMAN 0x4F | |
191 | #define W83791D_REG_PIN 0x4B | |
192 | #define W83791D_REG_I2C_SUBADDR 0x4A | |
193 | ||
194 | #define W83791D_REG_ALARM1 0xA9 /* realtime status register1 */ | |
195 | #define W83791D_REG_ALARM2 0xAA /* realtime status register2 */ | |
196 | #define W83791D_REG_ALARM3 0xAB /* realtime status register3 */ | |
197 | ||
198 | #define W83791D_REG_VBAT 0x5D | |
199 | #define W83791D_REG_I2C_ADDR 0x48 | |
200 | ||
ec1c3194 GR |
201 | /* |
202 | * The SMBus locks itself. The Winbond W83791D has a bank select register | |
203 | * (index 0x4e), but the driver only accesses registers in bank 0. Since | |
204 | * we don't switch banks, we don't need any special code to handle | |
205 | * locking access between bank switches | |
206 | */ | |
9873964d CS |
207 | static inline int w83791d_read(struct i2c_client *client, u8 reg) |
208 | { | |
209 | return i2c_smbus_read_byte_data(client, reg); | |
210 | } | |
211 | ||
212 | static inline int w83791d_write(struct i2c_client *client, u8 reg, u8 value) | |
213 | { | |
214 | return i2c_smbus_write_byte_data(client, reg, value); | |
215 | } | |
216 | ||
ec1c3194 GR |
217 | /* |
218 | * The analog voltage inputs have 16mV LSB. Since the sysfs output is | |
219 | * in mV as would be measured on the chip input pin, need to just | |
220 | * multiply/divide by 16 to translate from/to register values. | |
221 | */ | |
9873964d CS |
222 | #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8) / 16), 0, 255)) |
223 | #define IN_FROM_REG(val) ((val) * 16) | |
224 | ||
225 | static u8 fan_to_reg(long rpm, int div) | |
226 | { | |
227 | if (rpm == 0) | |
228 | return 255; | |
229 | rpm = SENSORS_LIMIT(rpm, 1, 1000000); | |
230 | return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
231 | } | |
232 | ||
ec1c3194 | 233 | #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \ |
9873964d CS |
234 | ((val) == 255 ? 0 : \ |
235 | 1350000 / ((val) * (div)))) | |
236 | ||
237 | /* for temp1 which is 8-bit resolution, LSB = 1 degree Celsius */ | |
238 | #define TEMP1_FROM_REG(val) ((val) * 1000) | |
239 | #define TEMP1_TO_REG(val) ((val) <= -128000 ? -128 : \ | |
240 | (val) >= 127000 ? 127 : \ | |
241 | (val) < 0 ? ((val) - 500) / 1000 : \ | |
242 | ((val) + 500) / 1000) | |
243 | ||
ec1c3194 GR |
244 | /* |
245 | * for temp2 and temp3 which are 9-bit resolution, LSB = 0.5 degree Celsius | |
246 | * Assumes the top 8 bits are the integral amount and the bottom 8 bits | |
247 | * are the fractional amount. Since we only have 0.5 degree resolution, | |
248 | * the bottom 7 bits will always be zero | |
249 | */ | |
9873964d CS |
250 | #define TEMP23_FROM_REG(val) ((val) / 128 * 500) |
251 | #define TEMP23_TO_REG(val) ((val) <= -128000 ? 0x8000 : \ | |
252 | (val) >= 127500 ? 0x7F80 : \ | |
253 | (val) < 0 ? ((val) - 250) / 500 * 128 : \ | |
254 | ((val) + 250) / 500 * 128) | |
255 | ||
a5a4598c MH |
256 | /* for thermal cruise target temp, 7-bits, LSB = 1 degree Celsius */ |
257 | #define TARGET_TEMP_TO_REG(val) ((val) < 0 ? 0 : \ | |
258 | (val) >= 127000 ? 127 : \ | |
259 | ((val) + 500) / 1000) | |
260 | ||
261 | /* for thermal cruise temp tolerance, 4-bits, LSB = 1 degree Celsius */ | |
a9169813 | 262 | #define TOL_TEMP_TO_REG(val) ((val) >= 15000 ? 15 : \ |
a5a4598c | 263 | ((val) + 500) / 1000) |
9873964d CS |
264 | |
265 | #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff) | |
266 | #define BEEP_MASK_FROM_REG(val) ((val) & 0xffffff) | |
267 | ||
268 | #define DIV_FROM_REG(val) (1 << (val)) | |
269 | ||
270 | static u8 div_to_reg(int nr, long val) | |
271 | { | |
272 | int i; | |
9873964d | 273 | |
ad02ad85 MH |
274 | /* fan divisors max out at 128 */ |
275 | val = SENSORS_LIMIT(val, 1, 128) >> 1; | |
9873964d CS |
276 | for (i = 0; i < 7; i++) { |
277 | if (val == 0) | |
278 | break; | |
279 | val >>= 1; | |
280 | } | |
281 | return (u8) i; | |
282 | } | |
283 | ||
284 | struct w83791d_data { | |
1beeffe4 | 285 | struct device *hwmon_dev; |
9873964d CS |
286 | struct mutex update_lock; |
287 | ||
288 | char valid; /* !=0 if following fields are valid */ | |
289 | unsigned long last_updated; /* In jiffies */ | |
290 | ||
291 | /* array of 2 pointers to subclients */ | |
292 | struct i2c_client *lm75[2]; | |
293 | ||
294 | /* volts */ | |
295 | u8 in[NUMBER_OF_VIN]; /* Register value */ | |
296 | u8 in_max[NUMBER_OF_VIN]; /* Register value */ | |
297 | u8 in_min[NUMBER_OF_VIN]; /* Register value */ | |
298 | ||
299 | /* fans */ | |
300 | u8 fan[NUMBER_OF_FANIN]; /* Register value */ | |
301 | u8 fan_min[NUMBER_OF_FANIN]; /* Register value */ | |
302 | u8 fan_div[NUMBER_OF_FANIN]; /* Register encoding, shifted right */ | |
303 | ||
304 | /* Temperature sensors */ | |
305 | ||
306 | s8 temp1[3]; /* current, over, thyst */ | |
307 | s16 temp_add[2][3]; /* fixed point value. Top 8 bits are the | |
ec1c3194 GR |
308 | * integral part, bottom 8 bits are the |
309 | * fractional part. We only use the top | |
310 | * 9 bits as the resolution is only | |
311 | * to the 0.5 degree C... | |
312 | * two sensors with three values | |
313 | * (cur, over, hyst) | |
314 | */ | |
9873964d | 315 | |
6495ce18 MH |
316 | /* PWMs */ |
317 | u8 pwm[5]; /* pwm duty cycle */ | |
b5938f8c | 318 | u8 pwm_enable[3]; /* pwm enable status for fan 1-3 |
ec1c3194 GR |
319 | * (fan 4-5 only support manual mode) |
320 | */ | |
6495ce18 | 321 | |
a5a4598c MH |
322 | u8 temp_target[3]; /* pwm 1-3 target temperature */ |
323 | u8 temp_tolerance[3]; /* pwm 1-3 temperature tolerance */ | |
324 | ||
9873964d CS |
325 | /* Misc */ |
326 | u32 alarms; /* realtime status register encoding,combined */ | |
327 | u8 beep_enable; /* Global beep enable */ | |
328 | u32 beep_mask; /* Mask off specific beeps */ | |
329 | u8 vid; /* Register encoding, combined */ | |
330 | u8 vrm; /* hwmon-vid */ | |
331 | }; | |
332 | ||
cb0c1af3 JD |
333 | static int w83791d_probe(struct i2c_client *client, |
334 | const struct i2c_device_id *id); | |
310ec792 | 335 | static int w83791d_detect(struct i2c_client *client, |
cb0c1af3 JD |
336 | struct i2c_board_info *info); |
337 | static int w83791d_remove(struct i2c_client *client); | |
9873964d | 338 | |
7cbe1cee CP |
339 | static int w83791d_read(struct i2c_client *client, u8 reg); |
340 | static int w83791d_write(struct i2c_client *client, u8 reg, u8 value); | |
9873964d CS |
341 | static struct w83791d_data *w83791d_update_device(struct device *dev); |
342 | ||
343 | #ifdef DEBUG | |
344 | static void w83791d_print_debug(struct w83791d_data *data, struct device *dev); | |
345 | #endif | |
346 | ||
347 | static void w83791d_init_client(struct i2c_client *client); | |
348 | ||
cb0c1af3 | 349 | static const struct i2c_device_id w83791d_id[] = { |
1f86df49 | 350 | { "w83791d", 0 }, |
cb0c1af3 JD |
351 | { } |
352 | }; | |
353 | MODULE_DEVICE_TABLE(i2c, w83791d_id); | |
354 | ||
9873964d | 355 | static struct i2c_driver w83791d_driver = { |
cb0c1af3 | 356 | .class = I2C_CLASS_HWMON, |
9873964d CS |
357 | .driver = { |
358 | .name = "w83791d", | |
359 | }, | |
cb0c1af3 JD |
360 | .probe = w83791d_probe, |
361 | .remove = w83791d_remove, | |
362 | .id_table = w83791d_id, | |
363 | .detect = w83791d_detect, | |
c3813d6a | 364 | .address_list = normal_i2c, |
9873964d CS |
365 | }; |
366 | ||
367 | /* following are the sysfs callback functions */ | |
368 | #define show_in_reg(reg) \ | |
369 | static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \ | |
370 | char *buf) \ | |
371 | { \ | |
372 | struct sensor_device_attribute *sensor_attr = \ | |
373 | to_sensor_dev_attr(attr); \ | |
374 | struct w83791d_data *data = w83791d_update_device(dev); \ | |
375 | int nr = sensor_attr->index; \ | |
ec1c3194 | 376 | return sprintf(buf, "%d\n", IN_FROM_REG(data->reg[nr])); \ |
9873964d CS |
377 | } |
378 | ||
379 | show_in_reg(in); | |
380 | show_in_reg(in_min); | |
381 | show_in_reg(in_max); | |
382 | ||
383 | #define store_in_reg(REG, reg) \ | |
384 | static ssize_t store_in_##reg(struct device *dev, \ | |
385 | struct device_attribute *attr, \ | |
386 | const char *buf, size_t count) \ | |
387 | { \ | |
388 | struct sensor_device_attribute *sensor_attr = \ | |
389 | to_sensor_dev_attr(attr); \ | |
390 | struct i2c_client *client = to_i2c_client(dev); \ | |
391 | struct w83791d_data *data = i2c_get_clientdata(client); \ | |
9873964d | 392 | int nr = sensor_attr->index; \ |
ec1c3194 GR |
393 | unsigned long val; \ |
394 | int err = kstrtoul(buf, 10, &val); \ | |
395 | if (err) \ | |
396 | return err; \ | |
9873964d CS |
397 | mutex_lock(&data->update_lock); \ |
398 | data->in_##reg[nr] = IN_TO_REG(val); \ | |
399 | w83791d_write(client, W83791D_REG_IN_##REG[nr], data->in_##reg[nr]); \ | |
400 | mutex_unlock(&data->update_lock); \ | |
401 | \ | |
402 | return count; \ | |
403 | } | |
404 | store_in_reg(MIN, min); | |
405 | store_in_reg(MAX, max); | |
406 | ||
407 | static struct sensor_device_attribute sda_in_input[] = { | |
408 | SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0), | |
409 | SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1), | |
410 | SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2), | |
411 | SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3), | |
412 | SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4), | |
413 | SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5), | |
414 | SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6), | |
415 | SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7), | |
416 | SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8), | |
417 | SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9), | |
418 | }; | |
419 | ||
420 | static struct sensor_device_attribute sda_in_min[] = { | |
421 | SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0), | |
422 | SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1), | |
423 | SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2), | |
424 | SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3), | |
425 | SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4), | |
426 | SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5), | |
427 | SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6), | |
428 | SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7), | |
429 | SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8), | |
430 | SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9), | |
431 | }; | |
432 | ||
433 | static struct sensor_device_attribute sda_in_max[] = { | |
434 | SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0), | |
435 | SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1), | |
436 | SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2), | |
437 | SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3), | |
438 | SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4), | |
439 | SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5), | |
440 | SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6), | |
441 | SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7), | |
442 | SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8), | |
443 | SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9), | |
444 | }; | |
445 | ||
64383123 CS |
446 | |
447 | static ssize_t show_beep(struct device *dev, struct device_attribute *attr, | |
448 | char *buf) | |
449 | { | |
450 | struct sensor_device_attribute *sensor_attr = | |
451 | to_sensor_dev_attr(attr); | |
452 | struct w83791d_data *data = w83791d_update_device(dev); | |
453 | int bitnr = sensor_attr->index; | |
454 | ||
455 | return sprintf(buf, "%d\n", (data->beep_mask >> bitnr) & 1); | |
456 | } | |
457 | ||
458 | static ssize_t store_beep(struct device *dev, struct device_attribute *attr, | |
459 | const char *buf, size_t count) | |
460 | { | |
461 | struct sensor_device_attribute *sensor_attr = | |
462 | to_sensor_dev_attr(attr); | |
463 | struct i2c_client *client = to_i2c_client(dev); | |
464 | struct w83791d_data *data = i2c_get_clientdata(client); | |
465 | int bitnr = sensor_attr->index; | |
466 | int bytenr = bitnr / 8; | |
ec1c3194 GR |
467 | unsigned long val; |
468 | int err; | |
469 | ||
470 | err = kstrtoul(buf, 10, &val); | |
471 | if (err) | |
472 | return err; | |
473 | ||
474 | val = val ? 1 : 0; | |
64383123 CS |
475 | |
476 | mutex_lock(&data->update_lock); | |
477 | ||
478 | data->beep_mask &= ~(0xff << (bytenr * 8)); | |
479 | data->beep_mask |= w83791d_read(client, W83791D_REG_BEEP_CTRL[bytenr]) | |
480 | << (bytenr * 8); | |
481 | ||
482 | data->beep_mask &= ~(1 << bitnr); | |
483 | data->beep_mask |= val << bitnr; | |
484 | ||
485 | w83791d_write(client, W83791D_REG_BEEP_CTRL[bytenr], | |
486 | (data->beep_mask >> (bytenr * 8)) & 0xff); | |
487 | ||
488 | mutex_unlock(&data->update_lock); | |
489 | ||
490 | return count; | |
491 | } | |
492 | ||
493 | static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, | |
494 | char *buf) | |
495 | { | |
496 | struct sensor_device_attribute *sensor_attr = | |
497 | to_sensor_dev_attr(attr); | |
498 | struct w83791d_data *data = w83791d_update_device(dev); | |
499 | int bitnr = sensor_attr->index; | |
500 | ||
501 | return sprintf(buf, "%d\n", (data->alarms >> bitnr) & 1); | |
502 | } | |
503 | ||
ec1c3194 GR |
504 | /* |
505 | * Note: The bitmask for the beep enable/disable is different than | |
506 | * the bitmask for the alarm. | |
507 | */ | |
64383123 CS |
508 | static struct sensor_device_attribute sda_in_beep[] = { |
509 | SENSOR_ATTR(in0_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 0), | |
510 | SENSOR_ATTR(in1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 13), | |
511 | SENSOR_ATTR(in2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 2), | |
512 | SENSOR_ATTR(in3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 3), | |
513 | SENSOR_ATTR(in4_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 8), | |
514 | SENSOR_ATTR(in5_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 9), | |
515 | SENSOR_ATTR(in6_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 10), | |
516 | SENSOR_ATTR(in7_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 16), | |
517 | SENSOR_ATTR(in8_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 17), | |
518 | SENSOR_ATTR(in9_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 14), | |
519 | }; | |
520 | ||
521 | static struct sensor_device_attribute sda_in_alarm[] = { | |
522 | SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0), | |
523 | SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1), | |
524 | SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2), | |
525 | SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3), | |
526 | SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8), | |
527 | SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9), | |
528 | SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10), | |
529 | SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 19), | |
530 | SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 20), | |
531 | SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 14), | |
532 | }; | |
533 | ||
9873964d CS |
534 | #define show_fan_reg(reg) \ |
535 | static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \ | |
536 | char *buf) \ | |
537 | { \ | |
538 | struct sensor_device_attribute *sensor_attr = \ | |
539 | to_sensor_dev_attr(attr); \ | |
540 | struct w83791d_data *data = w83791d_update_device(dev); \ | |
541 | int nr = sensor_attr->index; \ | |
ec1c3194 | 542 | return sprintf(buf, "%d\n", \ |
9873964d CS |
543 | FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \ |
544 | } | |
545 | ||
546 | show_fan_reg(fan); | |
547 | show_fan_reg(fan_min); | |
548 | ||
549 | static ssize_t store_fan_min(struct device *dev, struct device_attribute *attr, | |
550 | const char *buf, size_t count) | |
551 | { | |
552 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
553 | struct i2c_client *client = to_i2c_client(dev); | |
554 | struct w83791d_data *data = i2c_get_clientdata(client); | |
9873964d | 555 | int nr = sensor_attr->index; |
ec1c3194 GR |
556 | unsigned long val; |
557 | int err; | |
558 | ||
559 | err = kstrtoul(buf, 10, &val); | |
560 | if (err) | |
561 | return err; | |
9873964d CS |
562 | |
563 | mutex_lock(&data->update_lock); | |
564 | data->fan_min[nr] = fan_to_reg(val, DIV_FROM_REG(data->fan_div[nr])); | |
565 | w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]); | |
566 | mutex_unlock(&data->update_lock); | |
567 | ||
568 | return count; | |
569 | } | |
570 | ||
571 | static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr, | |
572 | char *buf) | |
573 | { | |
574 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
575 | int nr = sensor_attr->index; | |
576 | struct w83791d_data *data = w83791d_update_device(dev); | |
577 | return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr])); | |
578 | } | |
579 | ||
ec1c3194 GR |
580 | /* |
581 | * Note: we save and restore the fan minimum here, because its value is | |
582 | * determined in part by the fan divisor. This follows the principle of | |
583 | * least surprise; the user doesn't expect the fan minimum to change just | |
584 | * because the divisor changed. | |
585 | */ | |
9873964d CS |
586 | static ssize_t store_fan_div(struct device *dev, struct device_attribute *attr, |
587 | const char *buf, size_t count) | |
588 | { | |
589 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
590 | struct i2c_client *client = to_i2c_client(dev); | |
591 | struct w83791d_data *data = i2c_get_clientdata(client); | |
592 | int nr = sensor_attr->index; | |
593 | unsigned long min; | |
594 | u8 tmp_fan_div; | |
595 | u8 fan_div_reg; | |
ad02ad85 | 596 | u8 vbat_reg; |
9873964d CS |
597 | int indx = 0; |
598 | u8 keep_mask = 0; | |
599 | u8 new_shift = 0; | |
ec1c3194 GR |
600 | unsigned long val; |
601 | int err; | |
602 | ||
603 | err = kstrtoul(buf, 10, &val); | |
604 | if (err) | |
605 | return err; | |
9873964d CS |
606 | |
607 | /* Save fan_min */ | |
608 | min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr])); | |
609 | ||
610 | mutex_lock(&data->update_lock); | |
ec1c3194 | 611 | data->fan_div[nr] = div_to_reg(nr, val); |
9873964d CS |
612 | |
613 | switch (nr) { | |
614 | case 0: | |
615 | indx = 0; | |
616 | keep_mask = 0xcf; | |
617 | new_shift = 4; | |
618 | break; | |
619 | case 1: | |
620 | indx = 0; | |
621 | keep_mask = 0x3f; | |
622 | new_shift = 6; | |
623 | break; | |
624 | case 2: | |
625 | indx = 1; | |
626 | keep_mask = 0x3f; | |
627 | new_shift = 6; | |
628 | break; | |
629 | case 3: | |
630 | indx = 2; | |
631 | keep_mask = 0xf8; | |
632 | new_shift = 0; | |
633 | break; | |
634 | case 4: | |
635 | indx = 2; | |
636 | keep_mask = 0x8f; | |
637 | new_shift = 4; | |
638 | break; | |
639 | #ifdef DEBUG | |
640 | default: | |
641 | dev_warn(dev, "store_fan_div: Unexpected nr seen: %d\n", nr); | |
642 | count = -EINVAL; | |
643 | goto err_exit; | |
644 | #endif | |
645 | } | |
646 | ||
647 | fan_div_reg = w83791d_read(client, W83791D_REG_FAN_DIV[indx]) | |
648 | & keep_mask; | |
649 | tmp_fan_div = (data->fan_div[nr] << new_shift) & ~keep_mask; | |
650 | ||
651 | w83791d_write(client, W83791D_REG_FAN_DIV[indx], | |
652 | fan_div_reg | tmp_fan_div); | |
653 | ||
ad02ad85 MH |
654 | /* Bit 2 of fans 0-2 is stored in the vbat register (bits 5-7) */ |
655 | if (nr < 3) { | |
656 | keep_mask = ~(1 << (nr + 5)); | |
657 | vbat_reg = w83791d_read(client, W83791D_REG_VBAT) | |
658 | & keep_mask; | |
659 | tmp_fan_div = (data->fan_div[nr] << (3 + nr)) & ~keep_mask; | |
660 | w83791d_write(client, W83791D_REG_VBAT, | |
661 | vbat_reg | tmp_fan_div); | |
662 | } | |
663 | ||
9873964d CS |
664 | /* Restore fan_min */ |
665 | data->fan_min[nr] = fan_to_reg(min, DIV_FROM_REG(data->fan_div[nr])); | |
666 | w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]); | |
667 | ||
668 | #ifdef DEBUG | |
669 | err_exit: | |
670 | #endif | |
671 | mutex_unlock(&data->update_lock); | |
672 | ||
673 | return count; | |
674 | } | |
675 | ||
676 | static struct sensor_device_attribute sda_fan_input[] = { | |
677 | SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0), | |
678 | SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1), | |
679 | SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2), | |
680 | SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3), | |
681 | SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4), | |
682 | }; | |
683 | ||
684 | static struct sensor_device_attribute sda_fan_min[] = { | |
685 | SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, | |
686 | show_fan_min, store_fan_min, 0), | |
687 | SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, | |
688 | show_fan_min, store_fan_min, 1), | |
689 | SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, | |
690 | show_fan_min, store_fan_min, 2), | |
691 | SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, | |
692 | show_fan_min, store_fan_min, 3), | |
693 | SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, | |
694 | show_fan_min, store_fan_min, 4), | |
695 | }; | |
696 | ||
697 | static struct sensor_device_attribute sda_fan_div[] = { | |
698 | SENSOR_ATTR(fan1_div, S_IWUSR | S_IRUGO, | |
699 | show_fan_div, store_fan_div, 0), | |
700 | SENSOR_ATTR(fan2_div, S_IWUSR | S_IRUGO, | |
701 | show_fan_div, store_fan_div, 1), | |
702 | SENSOR_ATTR(fan3_div, S_IWUSR | S_IRUGO, | |
703 | show_fan_div, store_fan_div, 2), | |
704 | SENSOR_ATTR(fan4_div, S_IWUSR | S_IRUGO, | |
705 | show_fan_div, store_fan_div, 3), | |
706 | SENSOR_ATTR(fan5_div, S_IWUSR | S_IRUGO, | |
707 | show_fan_div, store_fan_div, 4), | |
708 | }; | |
709 | ||
64383123 CS |
710 | static struct sensor_device_attribute sda_fan_beep[] = { |
711 | SENSOR_ATTR(fan1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 6), | |
712 | SENSOR_ATTR(fan2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 7), | |
713 | SENSOR_ATTR(fan3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 11), | |
714 | SENSOR_ATTR(fan4_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 21), | |
715 | SENSOR_ATTR(fan5_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 22), | |
716 | }; | |
717 | ||
718 | static struct sensor_device_attribute sda_fan_alarm[] = { | |
719 | SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6), | |
720 | SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7), | |
721 | SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11), | |
722 | SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 21), | |
723 | SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 22), | |
724 | }; | |
725 | ||
6495ce18 MH |
726 | /* read/write PWMs */ |
727 | static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, | |
728 | char *buf) | |
729 | { | |
730 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
731 | int nr = sensor_attr->index; | |
732 | struct w83791d_data *data = w83791d_update_device(dev); | |
733 | return sprintf(buf, "%u\n", data->pwm[nr]); | |
734 | } | |
735 | ||
736 | static ssize_t store_pwm(struct device *dev, struct device_attribute *attr, | |
737 | const char *buf, size_t count) | |
738 | { | |
739 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
740 | struct i2c_client *client = to_i2c_client(dev); | |
741 | struct w83791d_data *data = i2c_get_clientdata(client); | |
742 | int nr = sensor_attr->index; | |
743 | unsigned long val; | |
744 | ||
179c4fdb | 745 | if (kstrtoul(buf, 10, &val)) |
6495ce18 MH |
746 | return -EINVAL; |
747 | ||
748 | mutex_lock(&data->update_lock); | |
749 | data->pwm[nr] = SENSORS_LIMIT(val, 0, 255); | |
750 | w83791d_write(client, W83791D_REG_PWM[nr], data->pwm[nr]); | |
751 | mutex_unlock(&data->update_lock); | |
752 | return count; | |
753 | } | |
754 | ||
755 | static struct sensor_device_attribute sda_pwm[] = { | |
756 | SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, | |
757 | show_pwm, store_pwm, 0), | |
758 | SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, | |
759 | show_pwm, store_pwm, 1), | |
760 | SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, | |
761 | show_pwm, store_pwm, 2), | |
762 | SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, | |
763 | show_pwm, store_pwm, 3), | |
764 | SENSOR_ATTR(pwm5, S_IWUSR | S_IRUGO, | |
765 | show_pwm, store_pwm, 4), | |
766 | }; | |
767 | ||
b5938f8c MH |
768 | static ssize_t show_pwmenable(struct device *dev, struct device_attribute *attr, |
769 | char *buf) | |
770 | { | |
771 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
772 | int nr = sensor_attr->index; | |
773 | struct w83791d_data *data = w83791d_update_device(dev); | |
774 | return sprintf(buf, "%u\n", data->pwm_enable[nr] + 1); | |
775 | } | |
776 | ||
777 | static ssize_t store_pwmenable(struct device *dev, | |
778 | struct device_attribute *attr, const char *buf, size_t count) | |
779 | { | |
780 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
781 | struct i2c_client *client = to_i2c_client(dev); | |
782 | struct w83791d_data *data = i2c_get_clientdata(client); | |
783 | int nr = sensor_attr->index; | |
784 | unsigned long val; | |
785 | u8 reg_cfg_tmp; | |
786 | u8 reg_idx = 0; | |
787 | u8 val_shift = 0; | |
788 | u8 keep_mask = 0; | |
789 | ||
179c4fdb | 790 | int ret = kstrtoul(buf, 10, &val); |
b5938f8c MH |
791 | |
792 | if (ret || val < 1 || val > 3) | |
793 | return -EINVAL; | |
794 | ||
795 | mutex_lock(&data->update_lock); | |
796 | data->pwm_enable[nr] = val - 1; | |
797 | switch (nr) { | |
798 | case 0: | |
799 | reg_idx = 0; | |
800 | val_shift = 2; | |
801 | keep_mask = 0xf3; | |
802 | break; | |
803 | case 1: | |
804 | reg_idx = 0; | |
805 | val_shift = 4; | |
806 | keep_mask = 0xcf; | |
807 | break; | |
808 | case 2: | |
809 | reg_idx = 1; | |
810 | val_shift = 2; | |
811 | keep_mask = 0xf3; | |
812 | break; | |
813 | } | |
814 | ||
815 | reg_cfg_tmp = w83791d_read(client, W83791D_REG_FAN_CFG[reg_idx]); | |
816 | reg_cfg_tmp = (reg_cfg_tmp & keep_mask) | | |
817 | data->pwm_enable[nr] << val_shift; | |
818 | ||
819 | w83791d_write(client, W83791D_REG_FAN_CFG[reg_idx], reg_cfg_tmp); | |
820 | mutex_unlock(&data->update_lock); | |
821 | ||
822 | return count; | |
823 | } | |
824 | static struct sensor_device_attribute sda_pwmenable[] = { | |
825 | SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, | |
826 | show_pwmenable, store_pwmenable, 0), | |
827 | SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, | |
828 | show_pwmenable, store_pwmenable, 1), | |
829 | SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, | |
830 | show_pwmenable, store_pwmenable, 2), | |
831 | }; | |
832 | ||
a5a4598c MH |
833 | /* For Smart Fan I / Thermal Cruise */ |
834 | static ssize_t show_temp_target(struct device *dev, | |
835 | struct device_attribute *attr, char *buf) | |
836 | { | |
837 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
838 | struct w83791d_data *data = w83791d_update_device(dev); | |
839 | int nr = sensor_attr->index; | |
840 | return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp_target[nr])); | |
841 | } | |
842 | ||
843 | static ssize_t store_temp_target(struct device *dev, | |
844 | struct device_attribute *attr, const char *buf, size_t count) | |
845 | { | |
846 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
847 | struct i2c_client *client = to_i2c_client(dev); | |
848 | struct w83791d_data *data = i2c_get_clientdata(client); | |
849 | int nr = sensor_attr->index; | |
a9169813 | 850 | long val; |
a5a4598c MH |
851 | u8 target_mask; |
852 | ||
a9169813 | 853 | if (kstrtol(buf, 10, &val)) |
a5a4598c MH |
854 | return -EINVAL; |
855 | ||
856 | mutex_lock(&data->update_lock); | |
857 | data->temp_target[nr] = TARGET_TEMP_TO_REG(val); | |
858 | target_mask = w83791d_read(client, | |
859 | W83791D_REG_TEMP_TARGET[nr]) & 0x80; | |
860 | w83791d_write(client, W83791D_REG_TEMP_TARGET[nr], | |
861 | data->temp_target[nr] | target_mask); | |
862 | mutex_unlock(&data->update_lock); | |
863 | return count; | |
864 | } | |
865 | ||
866 | static struct sensor_device_attribute sda_temp_target[] = { | |
867 | SENSOR_ATTR(temp1_target, S_IWUSR | S_IRUGO, | |
868 | show_temp_target, store_temp_target, 0), | |
869 | SENSOR_ATTR(temp2_target, S_IWUSR | S_IRUGO, | |
870 | show_temp_target, store_temp_target, 1), | |
871 | SENSOR_ATTR(temp3_target, S_IWUSR | S_IRUGO, | |
872 | show_temp_target, store_temp_target, 2), | |
873 | }; | |
874 | ||
875 | static ssize_t show_temp_tolerance(struct device *dev, | |
876 | struct device_attribute *attr, char *buf) | |
877 | { | |
878 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
879 | struct w83791d_data *data = w83791d_update_device(dev); | |
880 | int nr = sensor_attr->index; | |
881 | return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp_tolerance[nr])); | |
882 | } | |
883 | ||
884 | static ssize_t store_temp_tolerance(struct device *dev, | |
885 | struct device_attribute *attr, const char *buf, size_t count) | |
886 | { | |
887 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | |
888 | struct i2c_client *client = to_i2c_client(dev); | |
889 | struct w83791d_data *data = i2c_get_clientdata(client); | |
890 | int nr = sensor_attr->index; | |
891 | unsigned long val; | |
892 | u8 target_mask; | |
893 | u8 reg_idx = 0; | |
894 | u8 val_shift = 0; | |
895 | u8 keep_mask = 0; | |
896 | ||
179c4fdb | 897 | if (kstrtoul(buf, 10, &val)) |
a5a4598c MH |
898 | return -EINVAL; |
899 | ||
900 | switch (nr) { | |
901 | case 0: | |
902 | reg_idx = 0; | |
903 | val_shift = 0; | |
904 | keep_mask = 0xf0; | |
905 | break; | |
906 | case 1: | |
907 | reg_idx = 0; | |
908 | val_shift = 4; | |
909 | keep_mask = 0x0f; | |
910 | break; | |
911 | case 2: | |
912 | reg_idx = 1; | |
913 | val_shift = 0; | |
914 | keep_mask = 0xf0; | |
915 | break; | |
916 | } | |
917 | ||
918 | mutex_lock(&data->update_lock); | |
919 | data->temp_tolerance[nr] = TOL_TEMP_TO_REG(val); | |
920 | target_mask = w83791d_read(client, | |
921 | W83791D_REG_TEMP_TOL[reg_idx]) & keep_mask; | |
922 | w83791d_write(client, W83791D_REG_TEMP_TOL[reg_idx], | |
923 | (data->temp_tolerance[nr] << val_shift) | target_mask); | |
924 | mutex_unlock(&data->update_lock); | |
925 | return count; | |
926 | } | |
927 | ||
928 | static struct sensor_device_attribute sda_temp_tolerance[] = { | |
929 | SENSOR_ATTR(temp1_tolerance, S_IWUSR | S_IRUGO, | |
930 | show_temp_tolerance, store_temp_tolerance, 0), | |
931 | SENSOR_ATTR(temp2_tolerance, S_IWUSR | S_IRUGO, | |
932 | show_temp_tolerance, store_temp_tolerance, 1), | |
933 | SENSOR_ATTR(temp3_tolerance, S_IWUSR | S_IRUGO, | |
934 | show_temp_tolerance, store_temp_tolerance, 2), | |
935 | }; | |
936 | ||
9873964d CS |
937 | /* read/write the temperature1, includes measured value and limits */ |
938 | static ssize_t show_temp1(struct device *dev, struct device_attribute *devattr, | |
939 | char *buf) | |
940 | { | |
941 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
942 | struct w83791d_data *data = w83791d_update_device(dev); | |
943 | return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[attr->index])); | |
944 | } | |
945 | ||
946 | static ssize_t store_temp1(struct device *dev, struct device_attribute *devattr, | |
947 | const char *buf, size_t count) | |
948 | { | |
949 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
950 | struct i2c_client *client = to_i2c_client(dev); | |
951 | struct w83791d_data *data = i2c_get_clientdata(client); | |
9873964d | 952 | int nr = attr->index; |
ec1c3194 GR |
953 | long val; |
954 | int err; | |
955 | ||
956 | err = kstrtol(buf, 10, &val); | |
957 | if (err) | |
958 | return err; | |
9873964d CS |
959 | |
960 | mutex_lock(&data->update_lock); | |
961 | data->temp1[nr] = TEMP1_TO_REG(val); | |
962 | w83791d_write(client, W83791D_REG_TEMP1[nr], data->temp1[nr]); | |
963 | mutex_unlock(&data->update_lock); | |
964 | return count; | |
965 | } | |
966 | ||
967 | /* read/write temperature2-3, includes measured value and limits */ | |
968 | static ssize_t show_temp23(struct device *dev, struct device_attribute *devattr, | |
969 | char *buf) | |
970 | { | |
971 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | |
972 | struct w83791d_data *data = w83791d_update_device(dev); | |
973 | int nr = attr->nr; | |
974 | int index = attr->index; | |
975 | return sprintf(buf, "%d\n", TEMP23_FROM_REG(data->temp_add[nr][index])); | |
976 | } | |
977 | ||
978 | static ssize_t store_temp23(struct device *dev, | |
979 | struct device_attribute *devattr, | |
980 | const char *buf, size_t count) | |
981 | { | |
982 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | |
983 | struct i2c_client *client = to_i2c_client(dev); | |
984 | struct w83791d_data *data = i2c_get_clientdata(client); | |
ec1c3194 GR |
985 | long val; |
986 | int err; | |
9873964d CS |
987 | int nr = attr->nr; |
988 | int index = attr->index; | |
989 | ||
ec1c3194 GR |
990 | err = kstrtol(buf, 10, &val); |
991 | if (err) | |
992 | return err; | |
993 | ||
9873964d CS |
994 | mutex_lock(&data->update_lock); |
995 | data->temp_add[nr][index] = TEMP23_TO_REG(val); | |
996 | w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2], | |
997 | data->temp_add[nr][index] >> 8); | |
998 | w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2 + 1], | |
999 | data->temp_add[nr][index] & 0x80); | |
1000 | mutex_unlock(&data->update_lock); | |
1001 | ||
1002 | return count; | |
1003 | } | |
1004 | ||
1005 | static struct sensor_device_attribute_2 sda_temp_input[] = { | |
1006 | SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp1, NULL, 0, 0), | |
1007 | SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp23, NULL, 0, 0), | |
1008 | SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp23, NULL, 1, 0), | |
1009 | }; | |
1010 | ||
1011 | static struct sensor_device_attribute_2 sda_temp_max[] = { | |
1012 | SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, | |
1013 | show_temp1, store_temp1, 0, 1), | |
1014 | SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, | |
1015 | show_temp23, store_temp23, 0, 1), | |
1016 | SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, | |
1017 | show_temp23, store_temp23, 1, 1), | |
1018 | }; | |
1019 | ||
1020 | static struct sensor_device_attribute_2 sda_temp_max_hyst[] = { | |
1021 | SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, | |
1022 | show_temp1, store_temp1, 0, 2), | |
1023 | SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, | |
1024 | show_temp23, store_temp23, 0, 2), | |
1025 | SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, | |
1026 | show_temp23, store_temp23, 1, 2), | |
1027 | }; | |
1028 | ||
ec1c3194 GR |
1029 | /* |
1030 | * Note: The bitmask for the beep enable/disable is different than | |
1031 | * the bitmask for the alarm. | |
1032 | */ | |
64383123 CS |
1033 | static struct sensor_device_attribute sda_temp_beep[] = { |
1034 | SENSOR_ATTR(temp1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 4), | |
1035 | SENSOR_ATTR(temp2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 5), | |
1036 | SENSOR_ATTR(temp3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 1), | |
1037 | }; | |
1038 | ||
1039 | static struct sensor_device_attribute sda_temp_alarm[] = { | |
1040 | SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4), | |
1041 | SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5), | |
1042 | SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13), | |
1043 | }; | |
9873964d CS |
1044 | |
1045 | /* get reatime status of all sensors items: voltage, temp, fan */ | |
1046 | static ssize_t show_alarms_reg(struct device *dev, | |
1047 | struct device_attribute *attr, char *buf) | |
1048 | { | |
1049 | struct w83791d_data *data = w83791d_update_device(dev); | |
1050 | return sprintf(buf, "%u\n", data->alarms); | |
1051 | } | |
1052 | ||
1053 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); | |
1054 | ||
1055 | /* Beep control */ | |
1056 | ||
1057 | #define GLOBAL_BEEP_ENABLE_SHIFT 15 | |
1058 | #define GLOBAL_BEEP_ENABLE_MASK (1 << GLOBAL_BEEP_ENABLE_SHIFT) | |
1059 | ||
1060 | static ssize_t show_beep_enable(struct device *dev, | |
1061 | struct device_attribute *attr, char *buf) | |
1062 | { | |
1063 | struct w83791d_data *data = w83791d_update_device(dev); | |
1064 | return sprintf(buf, "%d\n", data->beep_enable); | |
1065 | } | |
1066 | ||
1067 | static ssize_t show_beep_mask(struct device *dev, | |
1068 | struct device_attribute *attr, char *buf) | |
1069 | { | |
1070 | struct w83791d_data *data = w83791d_update_device(dev); | |
1071 | return sprintf(buf, "%d\n", BEEP_MASK_FROM_REG(data->beep_mask)); | |
1072 | } | |
1073 | ||
1074 | ||
1075 | static ssize_t store_beep_mask(struct device *dev, | |
1076 | struct device_attribute *attr, | |
1077 | const char *buf, size_t count) | |
1078 | { | |
1079 | struct i2c_client *client = to_i2c_client(dev); | |
1080 | struct w83791d_data *data = i2c_get_clientdata(client); | |
9873964d | 1081 | int i; |
ec1c3194 GR |
1082 | long val; |
1083 | int err; | |
1084 | ||
1085 | err = kstrtol(buf, 10, &val); | |
1086 | if (err) | |
1087 | return err; | |
9873964d CS |
1088 | |
1089 | mutex_lock(&data->update_lock); | |
1090 | ||
ec1c3194 GR |
1091 | /* |
1092 | * The beep_enable state overrides any enabling request from | |
1093 | * the masks | |
1094 | */ | |
9873964d CS |
1095 | data->beep_mask = BEEP_MASK_TO_REG(val) & ~GLOBAL_BEEP_ENABLE_MASK; |
1096 | data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT); | |
1097 | ||
1098 | val = data->beep_mask; | |
1099 | ||
1100 | for (i = 0; i < 3; i++) { | |
1101 | w83791d_write(client, W83791D_REG_BEEP_CTRL[i], (val & 0xff)); | |
1102 | val >>= 8; | |
1103 | } | |
1104 | ||
1105 | mutex_unlock(&data->update_lock); | |
1106 | ||
1107 | return count; | |
1108 | } | |
1109 | ||
1110 | static ssize_t store_beep_enable(struct device *dev, | |
1111 | struct device_attribute *attr, | |
1112 | const char *buf, size_t count) | |
1113 | { | |
1114 | struct i2c_client *client = to_i2c_client(dev); | |
1115 | struct w83791d_data *data = i2c_get_clientdata(client); | |
ec1c3194 GR |
1116 | long val; |
1117 | int err; | |
1118 | ||
1119 | err = kstrtol(buf, 10, &val); | |
1120 | if (err) | |
1121 | return err; | |
9873964d CS |
1122 | |
1123 | mutex_lock(&data->update_lock); | |
1124 | ||
1125 | data->beep_enable = val ? 1 : 0; | |
1126 | ||
1127 | /* Keep the full mask value in sync with the current enable */ | |
1128 | data->beep_mask &= ~GLOBAL_BEEP_ENABLE_MASK; | |
1129 | data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT); | |
1130 | ||
ec1c3194 GR |
1131 | /* |
1132 | * The global control is in the second beep control register | |
1133 | * so only need to update that register | |
1134 | */ | |
9873964d CS |
1135 | val = (data->beep_mask >> 8) & 0xff; |
1136 | ||
1137 | w83791d_write(client, W83791D_REG_BEEP_CTRL[1], val); | |
1138 | ||
1139 | mutex_unlock(&data->update_lock); | |
1140 | ||
1141 | return count; | |
1142 | } | |
1143 | ||
1144 | static struct sensor_device_attribute sda_beep_ctrl[] = { | |
1145 | SENSOR_ATTR(beep_enable, S_IRUGO | S_IWUSR, | |
1146 | show_beep_enable, store_beep_enable, 0), | |
1147 | SENSOR_ATTR(beep_mask, S_IRUGO | S_IWUSR, | |
1148 | show_beep_mask, store_beep_mask, 1) | |
1149 | }; | |
1150 | ||
1151 | /* cpu voltage regulation information */ | |
1152 | static ssize_t show_vid_reg(struct device *dev, | |
1153 | struct device_attribute *attr, char *buf) | |
1154 | { | |
1155 | struct w83791d_data *data = w83791d_update_device(dev); | |
1156 | return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); | |
1157 | } | |
1158 | ||
1159 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
1160 | ||
1161 | static ssize_t show_vrm_reg(struct device *dev, | |
1162 | struct device_attribute *attr, char *buf) | |
1163 | { | |
90d6619a | 1164 | struct w83791d_data *data = dev_get_drvdata(dev); |
9873964d CS |
1165 | return sprintf(buf, "%d\n", data->vrm); |
1166 | } | |
1167 | ||
1168 | static ssize_t store_vrm_reg(struct device *dev, | |
1169 | struct device_attribute *attr, | |
1170 | const char *buf, size_t count) | |
1171 | { | |
8f74efe8 | 1172 | struct w83791d_data *data = dev_get_drvdata(dev); |
ec1c3194 GR |
1173 | unsigned long val; |
1174 | int err; | |
9873964d | 1175 | |
ec1c3194 GR |
1176 | /* |
1177 | * No lock needed as vrm is internal to the driver | |
1178 | * (not read from a chip register) and so is not | |
1179 | * updated in w83791d_update_device() | |
1180 | */ | |
9873964d | 1181 | |
ec1c3194 GR |
1182 | err = kstrtoul(buf, 10, &val); |
1183 | if (err) | |
1184 | return err; | |
1185 | ||
1186 | data->vrm = val; | |
9873964d CS |
1187 | return count; |
1188 | } | |
1189 | ||
1190 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
1191 | ||
34fc921a | 1192 | #define IN_UNIT_ATTRS(X) \ |
ec1c3194 GR |
1193 | &sda_in_input[X].dev_attr.attr, \ |
1194 | &sda_in_min[X].dev_attr.attr, \ | |
1195 | &sda_in_max[X].dev_attr.attr, \ | |
1196 | &sda_in_beep[X].dev_attr.attr, \ | |
64383123 | 1197 | &sda_in_alarm[X].dev_attr.attr |
34fc921a JC |
1198 | |
1199 | #define FAN_UNIT_ATTRS(X) \ | |
ec1c3194 GR |
1200 | &sda_fan_input[X].dev_attr.attr, \ |
1201 | &sda_fan_min[X].dev_attr.attr, \ | |
1202 | &sda_fan_div[X].dev_attr.attr, \ | |
1203 | &sda_fan_beep[X].dev_attr.attr, \ | |
64383123 | 1204 | &sda_fan_alarm[X].dev_attr.attr |
34fc921a JC |
1205 | |
1206 | #define TEMP_UNIT_ATTRS(X) \ | |
ec1c3194 GR |
1207 | &sda_temp_input[X].dev_attr.attr, \ |
1208 | &sda_temp_max[X].dev_attr.attr, \ | |
1209 | &sda_temp_max_hyst[X].dev_attr.attr, \ | |
1210 | &sda_temp_beep[X].dev_attr.attr, \ | |
64383123 | 1211 | &sda_temp_alarm[X].dev_attr.attr |
34fc921a JC |
1212 | |
1213 | static struct attribute *w83791d_attributes[] = { | |
1214 | IN_UNIT_ATTRS(0), | |
1215 | IN_UNIT_ATTRS(1), | |
1216 | IN_UNIT_ATTRS(2), | |
1217 | IN_UNIT_ATTRS(3), | |
1218 | IN_UNIT_ATTRS(4), | |
1219 | IN_UNIT_ATTRS(5), | |
1220 | IN_UNIT_ATTRS(6), | |
1221 | IN_UNIT_ATTRS(7), | |
1222 | IN_UNIT_ATTRS(8), | |
1223 | IN_UNIT_ATTRS(9), | |
1224 | FAN_UNIT_ATTRS(0), | |
1225 | FAN_UNIT_ATTRS(1), | |
1226 | FAN_UNIT_ATTRS(2), | |
34fc921a JC |
1227 | TEMP_UNIT_ATTRS(0), |
1228 | TEMP_UNIT_ATTRS(1), | |
1229 | TEMP_UNIT_ATTRS(2), | |
1230 | &dev_attr_alarms.attr, | |
1231 | &sda_beep_ctrl[0].dev_attr.attr, | |
1232 | &sda_beep_ctrl[1].dev_attr.attr, | |
1233 | &dev_attr_cpu0_vid.attr, | |
1234 | &dev_attr_vrm.attr, | |
6495ce18 MH |
1235 | &sda_pwm[0].dev_attr.attr, |
1236 | &sda_pwm[1].dev_attr.attr, | |
1237 | &sda_pwm[2].dev_attr.attr, | |
b5938f8c MH |
1238 | &sda_pwmenable[0].dev_attr.attr, |
1239 | &sda_pwmenable[1].dev_attr.attr, | |
1240 | &sda_pwmenable[2].dev_attr.attr, | |
a5a4598c MH |
1241 | &sda_temp_target[0].dev_attr.attr, |
1242 | &sda_temp_target[1].dev_attr.attr, | |
1243 | &sda_temp_target[2].dev_attr.attr, | |
1244 | &sda_temp_tolerance[0].dev_attr.attr, | |
1245 | &sda_temp_tolerance[1].dev_attr.attr, | |
1246 | &sda_temp_tolerance[2].dev_attr.attr, | |
34fc921a JC |
1247 | NULL |
1248 | }; | |
1249 | ||
1250 | static const struct attribute_group w83791d_group = { | |
1251 | .attrs = w83791d_attributes, | |
1252 | }; | |
1253 | ||
ec1c3194 GR |
1254 | /* |
1255 | * Separate group of attributes for fan/pwm 4-5. Their pins can also be | |
1256 | * in use for GPIO in which case their sysfs-interface should not be made | |
1257 | * available | |
1258 | */ | |
6e1ecd9b MH |
1259 | static struct attribute *w83791d_attributes_fanpwm45[] = { |
1260 | FAN_UNIT_ATTRS(3), | |
1261 | FAN_UNIT_ATTRS(4), | |
6495ce18 MH |
1262 | &sda_pwm[3].dev_attr.attr, |
1263 | &sda_pwm[4].dev_attr.attr, | |
6e1ecd9b MH |
1264 | NULL |
1265 | }; | |
1266 | ||
1267 | static const struct attribute_group w83791d_group_fanpwm45 = { | |
1268 | .attrs = w83791d_attributes_fanpwm45, | |
1269 | }; | |
9873964d | 1270 | |
cb0c1af3 | 1271 | static int w83791d_detect_subclients(struct i2c_client *client) |
9873964d | 1272 | { |
cb0c1af3 | 1273 | struct i2c_adapter *adapter = client->adapter; |
9873964d | 1274 | struct w83791d_data *data = i2c_get_clientdata(client); |
cb0c1af3 | 1275 | int address = client->addr; |
9873964d CS |
1276 | int i, id, err; |
1277 | u8 val; | |
1278 | ||
1279 | id = i2c_adapter_id(adapter); | |
1280 | if (force_subclients[0] == id && force_subclients[1] == address) { | |
1281 | for (i = 2; i <= 3; i++) { | |
1282 | if (force_subclients[i] < 0x48 || | |
1283 | force_subclients[i] > 0x4f) { | |
1284 | dev_err(&client->dev, | |
1285 | "invalid subclient " | |
1286 | "address %d; must be 0x48-0x4f\n", | |
1287 | force_subclients[i]); | |
1288 | err = -ENODEV; | |
1289 | goto error_sc_0; | |
1290 | } | |
1291 | } | |
1292 | w83791d_write(client, W83791D_REG_I2C_SUBADDR, | |
1293 | (force_subclients[2] & 0x07) | | |
1294 | ((force_subclients[3] & 0x07) << 4)); | |
1295 | } | |
1296 | ||
1297 | val = w83791d_read(client, W83791D_REG_I2C_SUBADDR); | |
ec1c3194 | 1298 | if (!(val & 0x08)) |
cb0c1af3 | 1299 | data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (val & 0x7)); |
9873964d CS |
1300 | if (!(val & 0x80)) { |
1301 | if ((data->lm75[0] != NULL) && | |
1302 | ((val & 0x7) == ((val >> 4) & 0x7))) { | |
1303 | dev_err(&client->dev, | |
1304 | "duplicate addresses 0x%x, " | |
1305 | "use force_subclient\n", | |
1306 | data->lm75[0]->addr); | |
1307 | err = -ENODEV; | |
1308 | goto error_sc_1; | |
1309 | } | |
cb0c1af3 JD |
1310 | data->lm75[1] = i2c_new_dummy(adapter, |
1311 | 0x48 + ((val >> 4) & 0x7)); | |
9873964d CS |
1312 | } |
1313 | ||
1314 | return 0; | |
1315 | ||
1316 | /* Undo inits in case of errors */ | |
1317 | ||
1318 | error_sc_1: | |
cb0c1af3 JD |
1319 | if (data->lm75[0] != NULL) |
1320 | i2c_unregister_device(data->lm75[0]); | |
9873964d CS |
1321 | error_sc_0: |
1322 | return err; | |
1323 | } | |
1324 | ||
1325 | ||
cb0c1af3 | 1326 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
310ec792 | 1327 | static int w83791d_detect(struct i2c_client *client, |
cb0c1af3 | 1328 | struct i2c_board_info *info) |
9873964d | 1329 | { |
cb0c1af3 JD |
1330 | struct i2c_adapter *adapter = client->adapter; |
1331 | int val1, val2; | |
1332 | unsigned short address = client->addr; | |
9873964d | 1333 | |
ec1c3194 | 1334 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) |
cb0c1af3 | 1335 | return -ENODEV; |
9873964d | 1336 | |
3f8b8459 JD |
1337 | if (w83791d_read(client, W83791D_REG_CONFIG) & 0x80) |
1338 | return -ENODEV; | |
1339 | ||
1340 | val1 = w83791d_read(client, W83791D_REG_BANK); | |
1341 | val2 = w83791d_read(client, W83791D_REG_CHIPMAN); | |
1342 | /* Check for Winbond ID if in bank 0 */ | |
1343 | if (!(val1 & 0x07)) { | |
1344 | if ((!(val1 & 0x80) && val2 != 0xa3) || | |
ec1c3194 | 1345 | ((val1 & 0x80) && val2 != 0x5c)) { |
cb0c1af3 | 1346 | return -ENODEV; |
9873964d CS |
1347 | } |
1348 | } | |
ec1c3194 GR |
1349 | /* |
1350 | * If Winbond chip, address of chip and W83791D_REG_I2C_ADDR | |
1351 | * should match | |
1352 | */ | |
3f8b8459 JD |
1353 | if (w83791d_read(client, W83791D_REG_I2C_ADDR) != address) |
1354 | return -ENODEV; | |
9873964d | 1355 | |
3f8b8459 | 1356 | /* We want bank 0 and Vendor ID high byte */ |
9873964d CS |
1357 | val1 = w83791d_read(client, W83791D_REG_BANK) & 0x78; |
1358 | w83791d_write(client, W83791D_REG_BANK, val1 | 0x80); | |
1359 | ||
1360 | /* Verify it is a Winbond w83791d */ | |
3f8b8459 JD |
1361 | val1 = w83791d_read(client, W83791D_REG_WCHIPID); |
1362 | val2 = w83791d_read(client, W83791D_REG_CHIPMAN); | |
1363 | if (val1 != 0x71 || val2 != 0x5c) | |
1364 | return -ENODEV; | |
9873964d | 1365 | |
cb0c1af3 JD |
1366 | strlcpy(info->type, "w83791d", I2C_NAME_SIZE); |
1367 | ||
1368 | return 0; | |
1369 | } | |
1370 | ||
1371 | static int w83791d_probe(struct i2c_client *client, | |
1372 | const struct i2c_device_id *id) | |
1373 | { | |
1374 | struct w83791d_data *data; | |
1375 | struct device *dev = &client->dev; | |
16a515fd | 1376 | int i, err; |
6e1ecd9b | 1377 | u8 has_fanpwm45; |
9873964d CS |
1378 | |
1379 | #ifdef DEBUG | |
16a515fd | 1380 | int val1; |
9873964d CS |
1381 | val1 = w83791d_read(client, W83791D_REG_DID_VID4); |
1382 | dev_dbg(dev, "Device ID version: %d.%d (0x%02x)\n", | |
1383 | (val1 >> 5) & 0x07, (val1 >> 1) & 0x0f, val1); | |
1384 | #endif | |
1385 | ||
6e13bb06 GR |
1386 | data = devm_kzalloc(&client->dev, sizeof(struct w83791d_data), |
1387 | GFP_KERNEL); | |
1388 | if (!data) | |
1389 | return -ENOMEM; | |
9873964d | 1390 | |
cb0c1af3 JD |
1391 | i2c_set_clientdata(client, data); |
1392 | mutex_init(&data->update_lock); | |
9873964d | 1393 | |
cb0c1af3 JD |
1394 | err = w83791d_detect_subclients(client); |
1395 | if (err) | |
6e13bb06 | 1396 | return err; |
9873964d CS |
1397 | |
1398 | /* Initialize the chip */ | |
1399 | w83791d_init_client(client); | |
1400 | ||
ec1c3194 GR |
1401 | /* |
1402 | * If the fan_div is changed, make sure there is a rational | |
1403 | * fan_min in place | |
1404 | */ | |
1405 | for (i = 0; i < NUMBER_OF_FANIN; i++) | |
9873964d | 1406 | data->fan_min[i] = w83791d_read(client, W83791D_REG_FAN_MIN[i]); |
9873964d CS |
1407 | |
1408 | /* Register sysfs hooks */ | |
ec1c3194 GR |
1409 | err = sysfs_create_group(&client->dev.kobj, &w83791d_group); |
1410 | if (err) | |
34fc921a JC |
1411 | goto error3; |
1412 | ||
6e1ecd9b MH |
1413 | /* Check if pins of fan/pwm 4-5 are in use as GPIO */ |
1414 | has_fanpwm45 = w83791d_read(client, W83791D_REG_GPIO) & 0x10; | |
1415 | if (has_fanpwm45) { | |
1416 | err = sysfs_create_group(&client->dev.kobj, | |
1417 | &w83791d_group_fanpwm45); | |
1418 | if (err) | |
1419 | goto error4; | |
1420 | } | |
1421 | ||
34fc921a | 1422 | /* Everything is ready, now register the working device */ |
1beeffe4 TJ |
1423 | data->hwmon_dev = hwmon_device_register(dev); |
1424 | if (IS_ERR(data->hwmon_dev)) { | |
1425 | err = PTR_ERR(data->hwmon_dev); | |
6e1ecd9b | 1426 | goto error5; |
9873964d CS |
1427 | } |
1428 | ||
9873964d CS |
1429 | return 0; |
1430 | ||
6e1ecd9b MH |
1431 | error5: |
1432 | if (has_fanpwm45) | |
1433 | sysfs_remove_group(&client->dev.kobj, &w83791d_group_fanpwm45); | |
34fc921a JC |
1434 | error4: |
1435 | sysfs_remove_group(&client->dev.kobj, &w83791d_group); | |
9873964d | 1436 | error3: |
cb0c1af3 JD |
1437 | if (data->lm75[0] != NULL) |
1438 | i2c_unregister_device(data->lm75[0]); | |
1439 | if (data->lm75[1] != NULL) | |
1440 | i2c_unregister_device(data->lm75[1]); | |
9873964d CS |
1441 | return err; |
1442 | } | |
1443 | ||
cb0c1af3 | 1444 | static int w83791d_remove(struct i2c_client *client) |
9873964d CS |
1445 | { |
1446 | struct w83791d_data *data = i2c_get_clientdata(client); | |
9873964d | 1447 | |
cb0c1af3 JD |
1448 | hwmon_device_unregister(data->hwmon_dev); |
1449 | sysfs_remove_group(&client->dev.kobj, &w83791d_group); | |
9873964d | 1450 | |
cb0c1af3 JD |
1451 | if (data->lm75[0] != NULL) |
1452 | i2c_unregister_device(data->lm75[0]); | |
1453 | if (data->lm75[1] != NULL) | |
1454 | i2c_unregister_device(data->lm75[1]); | |
9873964d CS |
1455 | |
1456 | return 0; | |
1457 | } | |
1458 | ||
1459 | static void w83791d_init_client(struct i2c_client *client) | |
1460 | { | |
1461 | struct w83791d_data *data = i2c_get_clientdata(client); | |
1462 | u8 tmp; | |
1463 | u8 old_beep; | |
1464 | ||
ec1c3194 GR |
1465 | /* |
1466 | * The difference between reset and init is that reset | |
1467 | * does a hard reset of the chip via index 0x40, bit 7, | |
1468 | * but init simply forces certain registers to have "sane" | |
1469 | * values. The hope is that the BIOS has done the right | |
1470 | * thing (which is why the default is reset=0, init=0), | |
1471 | * but if not, reset is the hard hammer and init | |
1472 | * is the soft mallet both of which are trying to whack | |
1473 | * things into place... | |
1474 | * NOTE: The data sheet makes a distinction between | |
1475 | * "power on defaults" and "reset by MR". As far as I can tell, | |
1476 | * the hard reset puts everything into a power-on state so I'm | |
1477 | * not sure what "reset by MR" means or how it can happen. | |
1478 | */ | |
9873964d CS |
1479 | if (reset || init) { |
1480 | /* keep some BIOS settings when we... */ | |
1481 | old_beep = w83791d_read(client, W83791D_REG_BEEP_CONFIG); | |
1482 | ||
1483 | if (reset) { | |
1484 | /* ... reset the chip and ... */ | |
1485 | w83791d_write(client, W83791D_REG_CONFIG, 0x80); | |
1486 | } | |
1487 | ||
1488 | /* ... disable power-on abnormal beep */ | |
1489 | w83791d_write(client, W83791D_REG_BEEP_CONFIG, old_beep | 0x80); | |
1490 | ||
1491 | /* disable the global beep (not done by hard reset) */ | |
1492 | tmp = w83791d_read(client, W83791D_REG_BEEP_CTRL[1]); | |
1493 | w83791d_write(client, W83791D_REG_BEEP_CTRL[1], tmp & 0xef); | |
1494 | ||
1495 | if (init) { | |
1496 | /* Make sure monitoring is turned on for add-ons */ | |
1497 | tmp = w83791d_read(client, W83791D_REG_TEMP2_CONFIG); | |
1498 | if (tmp & 1) { | |
1499 | w83791d_write(client, W83791D_REG_TEMP2_CONFIG, | |
1500 | tmp & 0xfe); | |
1501 | } | |
1502 | ||
1503 | tmp = w83791d_read(client, W83791D_REG_TEMP3_CONFIG); | |
1504 | if (tmp & 1) { | |
1505 | w83791d_write(client, W83791D_REG_TEMP3_CONFIG, | |
1506 | tmp & 0xfe); | |
1507 | } | |
1508 | ||
1509 | /* Start monitoring */ | |
1510 | tmp = w83791d_read(client, W83791D_REG_CONFIG) & 0xf7; | |
1511 | w83791d_write(client, W83791D_REG_CONFIG, tmp | 0x01); | |
1512 | } | |
1513 | } | |
1514 | ||
1515 | data->vrm = vid_which_vrm(); | |
1516 | } | |
1517 | ||
1518 | static struct w83791d_data *w83791d_update_device(struct device *dev) | |
1519 | { | |
1520 | struct i2c_client *client = to_i2c_client(dev); | |
1521 | struct w83791d_data *data = i2c_get_clientdata(client); | |
1522 | int i, j; | |
1523 | u8 reg_array_tmp[3]; | |
ad02ad85 | 1524 | u8 vbat_reg; |
9873964d CS |
1525 | |
1526 | mutex_lock(&data->update_lock); | |
1527 | ||
1528 | if (time_after(jiffies, data->last_updated + (HZ * 3)) | |
1529 | || !data->valid) { | |
1530 | dev_dbg(dev, "Starting w83791d device update\n"); | |
1531 | ||
1532 | /* Update the voltages measured value and limits */ | |
1533 | for (i = 0; i < NUMBER_OF_VIN; i++) { | |
1534 | data->in[i] = w83791d_read(client, | |
1535 | W83791D_REG_IN[i]); | |
1536 | data->in_max[i] = w83791d_read(client, | |
1537 | W83791D_REG_IN_MAX[i]); | |
1538 | data->in_min[i] = w83791d_read(client, | |
1539 | W83791D_REG_IN_MIN[i]); | |
1540 | } | |
1541 | ||
1542 | /* Update the fan counts and limits */ | |
1543 | for (i = 0; i < NUMBER_OF_FANIN; i++) { | |
1544 | /* Update the Fan measured value and limits */ | |
1545 | data->fan[i] = w83791d_read(client, | |
1546 | W83791D_REG_FAN[i]); | |
1547 | data->fan_min[i] = w83791d_read(client, | |
1548 | W83791D_REG_FAN_MIN[i]); | |
1549 | } | |
1550 | ||
1551 | /* Update the fan divisor */ | |
1552 | for (i = 0; i < 3; i++) { | |
1553 | reg_array_tmp[i] = w83791d_read(client, | |
1554 | W83791D_REG_FAN_DIV[i]); | |
1555 | } | |
1556 | data->fan_div[0] = (reg_array_tmp[0] >> 4) & 0x03; | |
1557 | data->fan_div[1] = (reg_array_tmp[0] >> 6) & 0x03; | |
1558 | data->fan_div[2] = (reg_array_tmp[1] >> 6) & 0x03; | |
1559 | data->fan_div[3] = reg_array_tmp[2] & 0x07; | |
1560 | data->fan_div[4] = (reg_array_tmp[2] >> 4) & 0x07; | |
1561 | ||
ec1c3194 GR |
1562 | /* |
1563 | * The fan divisor for fans 0-2 get bit 2 from | |
1564 | * bits 5-7 respectively of vbat register | |
1565 | */ | |
ad02ad85 MH |
1566 | vbat_reg = w83791d_read(client, W83791D_REG_VBAT); |
1567 | for (i = 0; i < 3; i++) | |
1568 | data->fan_div[i] |= (vbat_reg >> (3 + i)) & 0x04; | |
1569 | ||
6495ce18 MH |
1570 | /* Update PWM duty cycle */ |
1571 | for (i = 0; i < NUMBER_OF_PWM; i++) { | |
1572 | data->pwm[i] = w83791d_read(client, | |
1573 | W83791D_REG_PWM[i]); | |
1574 | } | |
1575 | ||
b5938f8c MH |
1576 | /* Update PWM enable status */ |
1577 | for (i = 0; i < 2; i++) { | |
1578 | reg_array_tmp[i] = w83791d_read(client, | |
1579 | W83791D_REG_FAN_CFG[i]); | |
1580 | } | |
1581 | data->pwm_enable[0] = (reg_array_tmp[0] >> 2) & 0x03; | |
1582 | data->pwm_enable[1] = (reg_array_tmp[0] >> 4) & 0x03; | |
1583 | data->pwm_enable[2] = (reg_array_tmp[1] >> 2) & 0x03; | |
1584 | ||
a5a4598c MH |
1585 | /* Update PWM target temperature */ |
1586 | for (i = 0; i < 3; i++) { | |
1587 | data->temp_target[i] = w83791d_read(client, | |
1588 | W83791D_REG_TEMP_TARGET[i]) & 0x7f; | |
1589 | } | |
1590 | ||
1591 | /* Update PWM temperature tolerance */ | |
1592 | for (i = 0; i < 2; i++) { | |
1593 | reg_array_tmp[i] = w83791d_read(client, | |
1594 | W83791D_REG_TEMP_TOL[i]); | |
1595 | } | |
1596 | data->temp_tolerance[0] = reg_array_tmp[0] & 0x0f; | |
1597 | data->temp_tolerance[1] = (reg_array_tmp[0] >> 4) & 0x0f; | |
1598 | data->temp_tolerance[2] = reg_array_tmp[1] & 0x0f; | |
1599 | ||
9873964d CS |
1600 | /* Update the first temperature sensor */ |
1601 | for (i = 0; i < 3; i++) { | |
1602 | data->temp1[i] = w83791d_read(client, | |
1603 | W83791D_REG_TEMP1[i]); | |
1604 | } | |
1605 | ||
1606 | /* Update the rest of the temperature sensors */ | |
1607 | for (i = 0; i < 2; i++) { | |
1608 | for (j = 0; j < 3; j++) { | |
1609 | data->temp_add[i][j] = | |
1610 | (w83791d_read(client, | |
1611 | W83791D_REG_TEMP_ADD[i][j * 2]) << 8) | | |
1612 | w83791d_read(client, | |
1613 | W83791D_REG_TEMP_ADD[i][j * 2 + 1]); | |
1614 | } | |
1615 | } | |
1616 | ||
1617 | /* Update the realtime status */ | |
1618 | data->alarms = | |
1619 | w83791d_read(client, W83791D_REG_ALARM1) + | |
1620 | (w83791d_read(client, W83791D_REG_ALARM2) << 8) + | |
1621 | (w83791d_read(client, W83791D_REG_ALARM3) << 16); | |
1622 | ||
1623 | /* Update the beep configuration information */ | |
1624 | data->beep_mask = | |
1625 | w83791d_read(client, W83791D_REG_BEEP_CTRL[0]) + | |
1626 | (w83791d_read(client, W83791D_REG_BEEP_CTRL[1]) << 8) + | |
1627 | (w83791d_read(client, W83791D_REG_BEEP_CTRL[2]) << 16); | |
1628 | ||
125751cb | 1629 | /* Extract global beep enable flag */ |
9873964d CS |
1630 | data->beep_enable = |
1631 | (data->beep_mask >> GLOBAL_BEEP_ENABLE_SHIFT) & 0x01; | |
1632 | ||
1633 | /* Update the cpu voltage information */ | |
1634 | i = w83791d_read(client, W83791D_REG_VID_FANDIV); | |
1635 | data->vid = i & 0x0f; | |
1636 | data->vid |= (w83791d_read(client, W83791D_REG_DID_VID4) & 0x01) | |
1637 | << 4; | |
1638 | ||
1639 | data->last_updated = jiffies; | |
1640 | data->valid = 1; | |
1641 | } | |
1642 | ||
1643 | mutex_unlock(&data->update_lock); | |
1644 | ||
1645 | #ifdef DEBUG | |
1646 | w83791d_print_debug(data, dev); | |
1647 | #endif | |
1648 | ||
1649 | return data; | |
1650 | } | |
1651 | ||
1652 | #ifdef DEBUG | |
1653 | static void w83791d_print_debug(struct w83791d_data *data, struct device *dev) | |
1654 | { | |
1655 | int i = 0, j = 0; | |
1656 | ||
1657 | dev_dbg(dev, "======Start of w83791d debug values======\n"); | |
1658 | dev_dbg(dev, "%d set of Voltages: ===>\n", NUMBER_OF_VIN); | |
1659 | for (i = 0; i < NUMBER_OF_VIN; i++) { | |
1660 | dev_dbg(dev, "vin[%d] is: 0x%02x\n", i, data->in[i]); | |
1661 | dev_dbg(dev, "vin[%d] min is: 0x%02x\n", i, data->in_min[i]); | |
1662 | dev_dbg(dev, "vin[%d] max is: 0x%02x\n", i, data->in_max[i]); | |
1663 | } | |
1664 | dev_dbg(dev, "%d set of Fan Counts/Divisors: ===>\n", NUMBER_OF_FANIN); | |
1665 | for (i = 0; i < NUMBER_OF_FANIN; i++) { | |
1666 | dev_dbg(dev, "fan[%d] is: 0x%02x\n", i, data->fan[i]); | |
1667 | dev_dbg(dev, "fan[%d] min is: 0x%02x\n", i, data->fan_min[i]); | |
1668 | dev_dbg(dev, "fan_div[%d] is: 0x%02x\n", i, data->fan_div[i]); | |
1669 | } | |
1670 | ||
ec1c3194 GR |
1671 | /* |
1672 | * temperature math is signed, but only print out the | |
1673 | * bits that matter | |
1674 | */ | |
9873964d | 1675 | dev_dbg(dev, "%d set of Temperatures: ===>\n", NUMBER_OF_TEMPIN); |
ec1c3194 | 1676 | for (i = 0; i < 3; i++) |
9873964d | 1677 | dev_dbg(dev, "temp1[%d] is: 0x%02x\n", i, (u8) data->temp1[i]); |
9873964d CS |
1678 | for (i = 0; i < 2; i++) { |
1679 | for (j = 0; j < 3; j++) { | |
1680 | dev_dbg(dev, "temp_add[%d][%d] is: 0x%04x\n", i, j, | |
1681 | (u16) data->temp_add[i][j]); | |
1682 | } | |
1683 | } | |
1684 | ||
1685 | dev_dbg(dev, "Misc Information: ===>\n"); | |
1686 | dev_dbg(dev, "alarm is: 0x%08x\n", data->alarms); | |
1687 | dev_dbg(dev, "beep_mask is: 0x%08x\n", data->beep_mask); | |
1688 | dev_dbg(dev, "beep_enable is: %d\n", data->beep_enable); | |
1689 | dev_dbg(dev, "vid is: 0x%02x\n", data->vid); | |
1690 | dev_dbg(dev, "vrm is: 0x%02x\n", data->vrm); | |
1691 | dev_dbg(dev, "=======End of w83791d debug values========\n"); | |
1692 | dev_dbg(dev, "\n"); | |
1693 | } | |
1694 | #endif | |
1695 | ||
f0967eea | 1696 | module_i2c_driver(w83791d_driver); |
9873964d CS |
1697 | |
1698 | MODULE_AUTHOR("Charles Spirakis <bezaur@gmail.com>"); | |
1699 | MODULE_DESCRIPTION("W83791D driver"); | |
1700 | MODULE_LICENSE("GPL"); |