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6800c3d0 RM |
1 | /* |
2 | w83793.c - Linux kernel driver for hardware monitoring | |
3 | Copyright (C) 2006 Winbond Electronics Corp. | |
4 | Yuan Mu | |
5 | Rudolf Marek <r.marek@assembler.cz> | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation - version 2. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
19 | 02110-1301 USA. | |
20 | */ | |
21 | ||
22 | /* | |
23 | Supports following chips: | |
24 | ||
25 | Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
26 | w83793 10 12 8 6 0x7b 0x5ca3 yes no | |
27 | */ | |
28 | ||
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/i2c.h> | |
33 | #include <linux/hwmon.h> | |
34 | #include <linux/hwmon-vid.h> | |
35 | #include <linux/hwmon-sysfs.h> | |
36 | #include <linux/err.h> | |
37 | #include <linux/mutex.h> | |
38 | ||
39 | /* Addresses to scan */ | |
25e9c86d MH |
40 | static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, |
41 | I2C_CLIENT_END }; | |
6800c3d0 RM |
42 | |
43 | /* Insmod parameters */ | |
44 | I2C_CLIENT_INSMOD_1(w83793); | |
45 | I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: " | |
46 | "{bus, clientaddr, subclientaddr1, subclientaddr2}"); | |
47 | ||
48 | static int reset; | |
49 | module_param(reset, bool, 0); | |
50 | MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); | |
51 | ||
52 | /* | |
53 | Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved | |
54 | as ID, Bank Select registers | |
55 | */ | |
56 | #define W83793_REG_BANKSEL 0x00 | |
57 | #define W83793_REG_VENDORID 0x0d | |
58 | #define W83793_REG_CHIPID 0x0e | |
59 | #define W83793_REG_DEVICEID 0x0f | |
60 | ||
61 | #define W83793_REG_CONFIG 0x40 | |
62 | #define W83793_REG_MFC 0x58 | |
63 | #define W83793_REG_FANIN_CTRL 0x5c | |
64 | #define W83793_REG_FANIN_SEL 0x5d | |
65 | #define W83793_REG_I2C_ADDR 0x0b | |
66 | #define W83793_REG_I2C_SUBADDR 0x0c | |
67 | #define W83793_REG_VID_INA 0x05 | |
68 | #define W83793_REG_VID_INB 0x06 | |
69 | #define W83793_REG_VID_LATCHA 0x07 | |
70 | #define W83793_REG_VID_LATCHB 0x08 | |
71 | #define W83793_REG_VID_CTRL 0x59 | |
72 | ||
73 | static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f }; | |
74 | ||
75 | #define TEMP_READ 0 | |
76 | #define TEMP_CRIT 1 | |
77 | #define TEMP_CRIT_HYST 2 | |
78 | #define TEMP_WARN 3 | |
79 | #define TEMP_WARN_HYST 4 | |
80 | /* only crit and crit_hyst affect real-time alarm status | |
81 | current crit crit_hyst warn warn_hyst */ | |
82 | static u16 W83793_REG_TEMP[][5] = { | |
83 | {0x1c, 0x78, 0x79, 0x7a, 0x7b}, | |
84 | {0x1d, 0x7c, 0x7d, 0x7e, 0x7f}, | |
85 | {0x1e, 0x80, 0x81, 0x82, 0x83}, | |
86 | {0x1f, 0x84, 0x85, 0x86, 0x87}, | |
87 | {0x20, 0x88, 0x89, 0x8a, 0x8b}, | |
88 | {0x21, 0x8c, 0x8d, 0x8e, 0x8f}, | |
89 | }; | |
90 | ||
91 | #define W83793_REG_TEMP_LOW_BITS 0x22 | |
92 | ||
93 | #define W83793_REG_BEEP(index) (0x53 + (index)) | |
94 | #define W83793_REG_ALARM(index) (0x4b + (index)) | |
95 | ||
96 | #define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */ | |
97 | #define W83793_REG_IRQ_CTRL 0x50 | |
98 | #define W83793_REG_OVT_CTRL 0x51 | |
99 | #define W83793_REG_OVT_BEEP 0x52 | |
100 | ||
101 | #define IN_READ 0 | |
102 | #define IN_MAX 1 | |
103 | #define IN_LOW 2 | |
104 | static const u16 W83793_REG_IN[][3] = { | |
105 | /* Current, High, Low */ | |
106 | {0x10, 0x60, 0x61}, /* Vcore A */ | |
107 | {0x11, 0x62, 0x63}, /* Vcore B */ | |
108 | {0x12, 0x64, 0x65}, /* Vtt */ | |
109 | {0x14, 0x6a, 0x6b}, /* VSEN1 */ | |
110 | {0x15, 0x6c, 0x6d}, /* VSEN2 */ | |
111 | {0x16, 0x6e, 0x6f}, /* +3VSEN */ | |
112 | {0x17, 0x70, 0x71}, /* +12VSEN */ | |
113 | {0x18, 0x72, 0x73}, /* 5VDD */ | |
114 | {0x19, 0x74, 0x75}, /* 5VSB */ | |
115 | {0x1a, 0x76, 0x77}, /* VBAT */ | |
116 | }; | |
117 | ||
118 | /* Low Bits of Vcore A/B Vtt Read/High/Low */ | |
119 | static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 }; | |
120 | static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 }; | |
ddca933b | 121 | static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 }; |
6800c3d0 RM |
122 | |
123 | #define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */ | |
124 | #define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */ | |
125 | ||
126 | #define W83793_REG_PWM_DEFAULT 0xb2 | |
127 | #define W83793_REG_PWM_ENABLE 0x207 | |
128 | #define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */ | |
129 | #define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */ | |
130 | #define W83793_REG_TEMP_CRITICAL 0xc5 | |
131 | ||
132 | #define PWM_DUTY 0 | |
133 | #define PWM_START 1 | |
134 | #define PWM_NONSTOP 2 | |
5aebefb0 | 135 | #define PWM_STOP_TIME 3 |
6800c3d0 RM |
136 | #define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \ |
137 | (nr) == 1 ? 0x220 : 0x218) + (index)) | |
138 | ||
139 | /* bit field, fan1 is bit0, fan2 is bit1 ... */ | |
140 | #define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index)) | |
141 | #define W83793_REG_TEMP_TOL(index) (0x208 + (index)) | |
142 | #define W83793_REG_TEMP_CRUISE(index) (0x210 + (index)) | |
143 | #define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index)) | |
144 | #define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr)) | |
145 | #define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr)) | |
146 | ||
147 | static inline unsigned long FAN_FROM_REG(u16 val) | |
148 | { | |
149 | if ((val >= 0xfff) || (val == 0)) | |
150 | return 0; | |
151 | return (1350000UL / val); | |
152 | } | |
153 | ||
154 | static inline u16 FAN_TO_REG(long rpm) | |
155 | { | |
156 | if (rpm <= 0) | |
157 | return 0x0fff; | |
158 | return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); | |
159 | } | |
160 | ||
161 | static inline unsigned long TIME_FROM_REG(u8 reg) | |
162 | { | |
163 | return (reg * 100); | |
164 | } | |
165 | ||
166 | static inline u8 TIME_TO_REG(unsigned long val) | |
167 | { | |
168 | return SENSORS_LIMIT((val + 50) / 100, 0, 0xff); | |
169 | } | |
170 | ||
171 | static inline long TEMP_FROM_REG(s8 reg) | |
172 | { | |
173 | return (reg * 1000); | |
174 | } | |
175 | ||
176 | static inline s8 TEMP_TO_REG(long val, s8 min, s8 max) | |
177 | { | |
178 | return SENSORS_LIMIT((val + (val < 0 ? -500 : 500)) / 1000, min, max); | |
179 | } | |
180 | ||
181 | struct w83793_data { | |
6800c3d0 | 182 | struct i2c_client *lm75[2]; |
1beeffe4 | 183 | struct device *hwmon_dev; |
6800c3d0 RM |
184 | struct mutex update_lock; |
185 | char valid; /* !=0 if following fields are valid */ | |
186 | unsigned long last_updated; /* In jiffies */ | |
187 | unsigned long last_nonvolatile; /* In jiffies, last time we update the | |
188 | nonvolatile registers */ | |
189 | ||
190 | u8 bank; | |
191 | u8 vrm; | |
192 | u8 vid[2]; | |
193 | u8 in[10][3]; /* Register value, read/high/low */ | |
194 | u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */ | |
195 | ||
196 | u16 has_fan; /* Only fan1- fan5 has own pins */ | |
197 | u16 fan[12]; /* Register value combine */ | |
198 | u16 fan_min[12]; /* Register value combine */ | |
199 | ||
200 | s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */ | |
201 | u8 temp_low_bits; /* Additional resolution TD1-TD4 */ | |
202 | u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits | |
203 | byte 1: Temp R1,R2 mode, each has 1 bit */ | |
204 | u8 temp_critical; /* If reached all fan will be at full speed */ | |
205 | u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */ | |
206 | ||
207 | u8 has_pwm; | |
46bed4df | 208 | u8 has_temp; |
c70a8c34 | 209 | u8 has_vid; |
6800c3d0 RM |
210 | u8 pwm_enable; /* Register value, each Temp has 1 bit */ |
211 | u8 pwm_uptime; /* Register value */ | |
212 | u8 pwm_downtime; /* Register value */ | |
213 | u8 pwm_default; /* All fan default pwm, next poweron valid */ | |
214 | u8 pwm[8][3]; /* Register value */ | |
215 | u8 pwm_stop_time[8]; | |
216 | u8 temp_cruise[6]; | |
217 | ||
218 | u8 alarms[5]; /* realtime status registers */ | |
219 | u8 beeps[5]; | |
220 | u8 beep_enable; | |
221 | u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */ | |
222 | u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */ | |
223 | u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */ | |
224 | }; | |
225 | ||
226 | static u8 w83793_read_value(struct i2c_client *client, u16 reg); | |
227 | static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value); | |
a7f13a6e JD |
228 | static int w83793_probe(struct i2c_client *client, |
229 | const struct i2c_device_id *id); | |
230 | static int w83793_detect(struct i2c_client *client, int kind, | |
231 | struct i2c_board_info *info); | |
232 | static int w83793_remove(struct i2c_client *client); | |
6800c3d0 RM |
233 | static void w83793_init_client(struct i2c_client *client); |
234 | static void w83793_update_nonvolatile(struct device *dev); | |
235 | static struct w83793_data *w83793_update_device(struct device *dev); | |
236 | ||
a7f13a6e JD |
237 | static const struct i2c_device_id w83793_id[] = { |
238 | { "w83793", w83793 }, | |
239 | { } | |
240 | }; | |
241 | MODULE_DEVICE_TABLE(i2c, w83793_id); | |
242 | ||
6800c3d0 | 243 | static struct i2c_driver w83793_driver = { |
a7f13a6e | 244 | .class = I2C_CLASS_HWMON, |
6800c3d0 RM |
245 | .driver = { |
246 | .name = "w83793", | |
247 | }, | |
a7f13a6e JD |
248 | .probe = w83793_probe, |
249 | .remove = w83793_remove, | |
250 | .id_table = w83793_id, | |
251 | .detect = w83793_detect, | |
252 | .address_data = &addr_data, | |
6800c3d0 RM |
253 | }; |
254 | ||
255 | static ssize_t | |
256 | show_vrm(struct device *dev, struct device_attribute *attr, char *buf) | |
257 | { | |
8f74efe8 | 258 | struct w83793_data *data = dev_get_drvdata(dev); |
6800c3d0 RM |
259 | return sprintf(buf, "%d\n", data->vrm); |
260 | } | |
261 | ||
262 | static ssize_t | |
263 | show_vid(struct device *dev, struct device_attribute *attr, char *buf) | |
264 | { | |
265 | struct w83793_data *data = w83793_update_device(dev); | |
266 | struct sensor_device_attribute_2 *sensor_attr = | |
267 | to_sensor_dev_attr_2(attr); | |
268 | int index = sensor_attr->index; | |
269 | ||
270 | return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm)); | |
271 | } | |
272 | ||
273 | static ssize_t | |
274 | store_vrm(struct device *dev, struct device_attribute *attr, | |
275 | const char *buf, size_t count) | |
276 | { | |
8f74efe8 | 277 | struct w83793_data *data = dev_get_drvdata(dev); |
6800c3d0 RM |
278 | data->vrm = simple_strtoul(buf, NULL, 10); |
279 | return count; | |
280 | } | |
281 | ||
282 | #define ALARM_STATUS 0 | |
283 | #define BEEP_ENABLE 1 | |
284 | static ssize_t | |
285 | show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) | |
286 | { | |
287 | struct w83793_data *data = w83793_update_device(dev); | |
288 | struct sensor_device_attribute_2 *sensor_attr = | |
289 | to_sensor_dev_attr_2(attr); | |
290 | int nr = sensor_attr->nr; | |
291 | int index = sensor_attr->index >> 3; | |
292 | int bit = sensor_attr->index & 0x07; | |
293 | u8 val; | |
294 | ||
295 | if (ALARM_STATUS == nr) { | |
296 | val = (data->alarms[index] >> (bit)) & 1; | |
297 | } else { /* BEEP_ENABLE */ | |
298 | val = (data->beeps[index] >> (bit)) & 1; | |
299 | } | |
300 | ||
301 | return sprintf(buf, "%u\n", val); | |
302 | } | |
303 | ||
304 | static ssize_t | |
305 | store_beep(struct device *dev, struct device_attribute *attr, | |
306 | const char *buf, size_t count) | |
307 | { | |
308 | struct i2c_client *client = to_i2c_client(dev); | |
309 | struct w83793_data *data = i2c_get_clientdata(client); | |
310 | struct sensor_device_attribute_2 *sensor_attr = | |
311 | to_sensor_dev_attr_2(attr); | |
312 | int index = sensor_attr->index >> 3; | |
313 | int shift = sensor_attr->index & 0x07; | |
314 | u8 beep_bit = 1 << shift; | |
315 | u8 val; | |
316 | ||
317 | val = simple_strtoul(buf, NULL, 10); | |
318 | if (val != 0 && val != 1) | |
319 | return -EINVAL; | |
320 | ||
321 | mutex_lock(&data->update_lock); | |
322 | data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index)); | |
323 | data->beeps[index] &= ~beep_bit; | |
324 | data->beeps[index] |= val << shift; | |
325 | w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]); | |
326 | mutex_unlock(&data->update_lock); | |
327 | ||
328 | return count; | |
329 | } | |
330 | ||
331 | static ssize_t | |
332 | show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf) | |
333 | { | |
334 | struct w83793_data *data = w83793_update_device(dev); | |
335 | return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01); | |
336 | } | |
337 | ||
338 | static ssize_t | |
339 | store_beep_enable(struct device *dev, struct device_attribute *attr, | |
340 | const char *buf, size_t count) | |
341 | { | |
342 | struct i2c_client *client = to_i2c_client(dev); | |
343 | struct w83793_data *data = i2c_get_clientdata(client); | |
344 | u8 val = simple_strtoul(buf, NULL, 10); | |
345 | ||
346 | if (val != 0 && val != 1) | |
347 | return -EINVAL; | |
348 | ||
349 | mutex_lock(&data->update_lock); | |
350 | data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP) | |
351 | & 0xfd; | |
352 | data->beep_enable |= val << 1; | |
353 | w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable); | |
354 | mutex_unlock(&data->update_lock); | |
355 | ||
356 | return count; | |
357 | } | |
358 | ||
359 | /* Write any value to clear chassis alarm */ | |
360 | static ssize_t | |
361 | store_chassis_clear(struct device *dev, | |
362 | struct device_attribute *attr, const char *buf, | |
363 | size_t count) | |
364 | { | |
365 | struct i2c_client *client = to_i2c_client(dev); | |
366 | struct w83793_data *data = i2c_get_clientdata(client); | |
367 | u8 val; | |
368 | ||
369 | mutex_lock(&data->update_lock); | |
370 | val = w83793_read_value(client, W83793_REG_CLR_CHASSIS); | |
371 | val |= 0x80; | |
372 | w83793_write_value(client, W83793_REG_CLR_CHASSIS, val); | |
373 | mutex_unlock(&data->update_lock); | |
374 | return count; | |
375 | } | |
376 | ||
377 | #define FAN_INPUT 0 | |
378 | #define FAN_MIN 1 | |
379 | static ssize_t | |
380 | show_fan(struct device *dev, struct device_attribute *attr, char *buf) | |
381 | { | |
382 | struct sensor_device_attribute_2 *sensor_attr = | |
383 | to_sensor_dev_attr_2(attr); | |
384 | int nr = sensor_attr->nr; | |
385 | int index = sensor_attr->index; | |
386 | struct w83793_data *data = w83793_update_device(dev); | |
387 | u16 val; | |
388 | ||
389 | if (FAN_INPUT == nr) { | |
390 | val = data->fan[index] & 0x0fff; | |
391 | } else { | |
392 | val = data->fan_min[index] & 0x0fff; | |
393 | } | |
394 | ||
395 | return sprintf(buf, "%lu\n", FAN_FROM_REG(val)); | |
396 | } | |
397 | ||
398 | static ssize_t | |
399 | store_fan_min(struct device *dev, struct device_attribute *attr, | |
400 | const char *buf, size_t count) | |
401 | { | |
402 | struct sensor_device_attribute_2 *sensor_attr = | |
403 | to_sensor_dev_attr_2(attr); | |
404 | int index = sensor_attr->index; | |
405 | struct i2c_client *client = to_i2c_client(dev); | |
406 | struct w83793_data *data = i2c_get_clientdata(client); | |
407 | u16 val = FAN_TO_REG(simple_strtoul(buf, NULL, 10)); | |
408 | ||
409 | mutex_lock(&data->update_lock); | |
410 | data->fan_min[index] = val; | |
411 | w83793_write_value(client, W83793_REG_FAN_MIN(index), | |
412 | (val >> 8) & 0xff); | |
413 | w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff); | |
414 | mutex_unlock(&data->update_lock); | |
415 | ||
416 | return count; | |
417 | } | |
418 | ||
6800c3d0 RM |
419 | static ssize_t |
420 | show_pwm(struct device *dev, struct device_attribute *attr, char *buf) | |
421 | { | |
422 | struct sensor_device_attribute_2 *sensor_attr = | |
423 | to_sensor_dev_attr_2(attr); | |
424 | struct w83793_data *data = w83793_update_device(dev); | |
425 | u16 val; | |
426 | int nr = sensor_attr->nr; | |
427 | int index = sensor_attr->index; | |
428 | ||
429 | if (PWM_STOP_TIME == nr) | |
430 | val = TIME_FROM_REG(data->pwm_stop_time[index]); | |
431 | else | |
432 | val = (data->pwm[index][nr] & 0x3f) << 2; | |
433 | ||
434 | return sprintf(buf, "%d\n", val); | |
435 | } | |
436 | ||
437 | static ssize_t | |
438 | store_pwm(struct device *dev, struct device_attribute *attr, | |
439 | const char *buf, size_t count) | |
440 | { | |
441 | struct i2c_client *client = to_i2c_client(dev); | |
442 | struct w83793_data *data = i2c_get_clientdata(client); | |
443 | struct sensor_device_attribute_2 *sensor_attr = | |
444 | to_sensor_dev_attr_2(attr); | |
445 | int nr = sensor_attr->nr; | |
446 | int index = sensor_attr->index; | |
447 | u8 val; | |
448 | ||
449 | mutex_lock(&data->update_lock); | |
450 | if (PWM_STOP_TIME == nr) { | |
451 | val = TIME_TO_REG(simple_strtoul(buf, NULL, 10)); | |
452 | data->pwm_stop_time[index] = val; | |
453 | w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index), | |
454 | val); | |
455 | } else { | |
456 | val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff) | |
457 | >> 2; | |
458 | data->pwm[index][nr] = | |
459 | w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0; | |
460 | data->pwm[index][nr] |= val; | |
461 | w83793_write_value(client, W83793_REG_PWM(index, nr), | |
462 | data->pwm[index][nr]); | |
463 | } | |
464 | ||
465 | mutex_unlock(&data->update_lock); | |
466 | return count; | |
467 | } | |
468 | ||
469 | static ssize_t | |
470 | show_temp(struct device *dev, struct device_attribute *attr, char *buf) | |
471 | { | |
472 | struct sensor_device_attribute_2 *sensor_attr = | |
473 | to_sensor_dev_attr_2(attr); | |
474 | int nr = sensor_attr->nr; | |
475 | int index = sensor_attr->index; | |
476 | struct w83793_data *data = w83793_update_device(dev); | |
477 | long temp = TEMP_FROM_REG(data->temp[index][nr]); | |
478 | ||
479 | if (TEMP_READ == nr && index < 4) { /* Only TD1-TD4 have low bits */ | |
480 | int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250; | |
481 | temp += temp > 0 ? low : -low; | |
482 | } | |
483 | return sprintf(buf, "%ld\n", temp); | |
484 | } | |
485 | ||
486 | static ssize_t | |
487 | store_temp(struct device *dev, struct device_attribute *attr, | |
488 | const char *buf, size_t count) | |
489 | { | |
490 | struct sensor_device_attribute_2 *sensor_attr = | |
491 | to_sensor_dev_attr_2(attr); | |
492 | int nr = sensor_attr->nr; | |
493 | int index = sensor_attr->index; | |
494 | struct i2c_client *client = to_i2c_client(dev); | |
495 | struct w83793_data *data = i2c_get_clientdata(client); | |
496 | long tmp = simple_strtol(buf, NULL, 10); | |
497 | ||
498 | mutex_lock(&data->update_lock); | |
499 | data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127); | |
500 | w83793_write_value(client, W83793_REG_TEMP[index][nr], | |
501 | data->temp[index][nr]); | |
502 | mutex_unlock(&data->update_lock); | |
503 | return count; | |
504 | } | |
505 | ||
506 | /* | |
507 | TD1-TD4 | |
508 | each has 4 mode:(2 bits) | |
509 | 0: Stop monitor | |
510 | 1: Use internal temp sensor(default) | |
ddca933b | 511 | 2: Reserved |
6800c3d0 RM |
512 | 3: Use sensor in Intel CPU and get result by PECI |
513 | ||
514 | TR1-TR2 | |
515 | each has 2 mode:(1 bit) | |
516 | 0: Disable temp sensor monitor | |
517 | 1: To enable temp sensors monitor | |
518 | */ | |
519 | ||
ddca933b GJ |
520 | /* 0 disable, 6 PECI */ |
521 | static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 }; | |
6800c3d0 RM |
522 | |
523 | static ssize_t | |
524 | show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) | |
525 | { | |
526 | struct w83793_data *data = w83793_update_device(dev); | |
527 | struct sensor_device_attribute_2 *sensor_attr = | |
528 | to_sensor_dev_attr_2(attr); | |
529 | int index = sensor_attr->index; | |
530 | u8 mask = (index < 4) ? 0x03 : 0x01; | |
531 | u8 shift = (index < 4) ? (2 * index) : (index - 4); | |
532 | u8 tmp; | |
533 | index = (index < 4) ? 0 : 1; | |
534 | ||
535 | tmp = (data->temp_mode[index] >> shift) & mask; | |
536 | ||
537 | /* for the internal sensor, found out if diode or thermistor */ | |
538 | if (tmp == 1) { | |
539 | tmp = index == 0 ? 3 : 4; | |
540 | } else { | |
541 | tmp = TO_TEMP_MODE[tmp]; | |
542 | } | |
543 | ||
544 | return sprintf(buf, "%d\n", tmp); | |
545 | } | |
546 | ||
547 | static ssize_t | |
548 | store_temp_mode(struct device *dev, struct device_attribute *attr, | |
549 | const char *buf, size_t count) | |
550 | { | |
551 | struct i2c_client *client = to_i2c_client(dev); | |
552 | struct w83793_data *data = i2c_get_clientdata(client); | |
553 | struct sensor_device_attribute_2 *sensor_attr = | |
554 | to_sensor_dev_attr_2(attr); | |
555 | int index = sensor_attr->index; | |
556 | u8 mask = (index < 4) ? 0x03 : 0x01; | |
557 | u8 shift = (index < 4) ? (2 * index) : (index - 4); | |
558 | u8 val = simple_strtoul(buf, NULL, 10); | |
559 | ||
560 | /* transform the sysfs interface values into table above */ | |
ddca933b | 561 | if ((val == 6) && (index < 4)) { |
6800c3d0 RM |
562 | val -= 3; |
563 | } else if ((val == 3 && index < 4) | |
46bed4df | 564 | || (val == 4 && index >= 4)) { |
6800c3d0 RM |
565 | /* transform diode or thermistor into internal enable */ |
566 | val = !!val; | |
567 | } else { | |
568 | return -EINVAL; | |
569 | } | |
570 | ||
571 | index = (index < 4) ? 0 : 1; | |
572 | mutex_lock(&data->update_lock); | |
573 | data->temp_mode[index] = | |
574 | w83793_read_value(client, W83793_REG_TEMP_MODE[index]); | |
575 | data->temp_mode[index] &= ~(mask << shift); | |
576 | data->temp_mode[index] |= val << shift; | |
577 | w83793_write_value(client, W83793_REG_TEMP_MODE[index], | |
578 | data->temp_mode[index]); | |
579 | mutex_unlock(&data->update_lock); | |
580 | ||
581 | return count; | |
582 | } | |
583 | ||
584 | #define SETUP_PWM_DEFAULT 0 | |
585 | #define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */ | |
586 | #define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */ | |
587 | #define SETUP_TEMP_CRITICAL 3 | |
588 | static ssize_t | |
589 | show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) | |
590 | { | |
591 | struct sensor_device_attribute_2 *sensor_attr = | |
592 | to_sensor_dev_attr_2(attr); | |
593 | int nr = sensor_attr->nr; | |
594 | struct w83793_data *data = w83793_update_device(dev); | |
595 | u32 val = 0; | |
596 | ||
597 | if (SETUP_PWM_DEFAULT == nr) { | |
598 | val = (data->pwm_default & 0x3f) << 2; | |
599 | } else if (SETUP_PWM_UPTIME == nr) { | |
600 | val = TIME_FROM_REG(data->pwm_uptime); | |
601 | } else if (SETUP_PWM_DOWNTIME == nr) { | |
602 | val = TIME_FROM_REG(data->pwm_downtime); | |
603 | } else if (SETUP_TEMP_CRITICAL == nr) { | |
604 | val = TEMP_FROM_REG(data->temp_critical & 0x7f); | |
605 | } | |
606 | ||
607 | return sprintf(buf, "%d\n", val); | |
608 | } | |
609 | ||
610 | static ssize_t | |
611 | store_sf_setup(struct device *dev, struct device_attribute *attr, | |
612 | const char *buf, size_t count) | |
613 | { | |
614 | struct sensor_device_attribute_2 *sensor_attr = | |
615 | to_sensor_dev_attr_2(attr); | |
616 | int nr = sensor_attr->nr; | |
617 | struct i2c_client *client = to_i2c_client(dev); | |
618 | struct w83793_data *data = i2c_get_clientdata(client); | |
619 | ||
620 | mutex_lock(&data->update_lock); | |
621 | if (SETUP_PWM_DEFAULT == nr) { | |
622 | data->pwm_default = | |
623 | w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0; | |
624 | data->pwm_default |= SENSORS_LIMIT(simple_strtoul(buf, NULL, | |
625 | 10), | |
626 | 0, 0xff) >> 2; | |
627 | w83793_write_value(client, W83793_REG_PWM_DEFAULT, | |
628 | data->pwm_default); | |
629 | } else if (SETUP_PWM_UPTIME == nr) { | |
630 | data->pwm_uptime = TIME_TO_REG(simple_strtoul(buf, NULL, 10)); | |
631 | data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0; | |
632 | w83793_write_value(client, W83793_REG_PWM_UPTIME, | |
633 | data->pwm_uptime); | |
634 | } else if (SETUP_PWM_DOWNTIME == nr) { | |
635 | data->pwm_downtime = TIME_TO_REG(simple_strtoul(buf, NULL, 10)); | |
636 | data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0; | |
637 | w83793_write_value(client, W83793_REG_PWM_DOWNTIME, | |
638 | data->pwm_downtime); | |
639 | } else { /* SETUP_TEMP_CRITICAL */ | |
640 | data->temp_critical = | |
641 | w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80; | |
642 | data->temp_critical |= TEMP_TO_REG(simple_strtol(buf, NULL, 10), | |
643 | 0, 0x7f); | |
644 | w83793_write_value(client, W83793_REG_TEMP_CRITICAL, | |
645 | data->temp_critical); | |
646 | } | |
647 | ||
648 | mutex_unlock(&data->update_lock); | |
649 | return count; | |
650 | } | |
651 | ||
652 | /* | |
653 | Temp SmartFan control | |
654 | TEMP_FAN_MAP | |
655 | Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1... | |
656 | It's possible two or more temp channels control the same fan, w83793 | |
657 | always prefers to pick the most critical request and applies it to | |
658 | the related Fan. | |
659 | It's possible one fan is not in any mapping of 6 temp channels, this | |
660 | means the fan is manual mode | |
661 | ||
662 | TEMP_PWM_ENABLE | |
663 | Each temp channel has its own SmartFan mode, and temp channel | |
664 | control fans that are set by TEMP_FAN_MAP | |
665 | 0: SmartFanII mode | |
666 | 1: Thermal Cruise Mode | |
667 | ||
668 | TEMP_CRUISE | |
669 | Target temperature in thermal cruise mode, w83793 will try to turn | |
670 | fan speed to keep the temperature of target device around this | |
671 | temperature. | |
672 | ||
673 | TEMP_TOLERANCE | |
674 | If Temp higher or lower than target with this tolerance, w83793 | |
675 | will take actions to speed up or slow down the fan to keep the | |
676 | temperature within the tolerance range. | |
677 | */ | |
678 | ||
679 | #define TEMP_FAN_MAP 0 | |
680 | #define TEMP_PWM_ENABLE 1 | |
681 | #define TEMP_CRUISE 2 | |
682 | #define TEMP_TOLERANCE 3 | |
683 | static ssize_t | |
684 | show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf) | |
685 | { | |
686 | struct sensor_device_attribute_2 *sensor_attr = | |
687 | to_sensor_dev_attr_2(attr); | |
688 | int nr = sensor_attr->nr; | |
689 | int index = sensor_attr->index; | |
690 | struct w83793_data *data = w83793_update_device(dev); | |
691 | u32 val; | |
692 | ||
693 | if (TEMP_FAN_MAP == nr) { | |
694 | val = data->temp_fan_map[index]; | |
695 | } else if (TEMP_PWM_ENABLE == nr) { | |
696 | /* +2 to transfrom into 2 and 3 to conform with sysfs intf */ | |
697 | val = ((data->pwm_enable >> index) & 0x01) + 2; | |
698 | } else if (TEMP_CRUISE == nr) { | |
699 | val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f); | |
700 | } else { /* TEMP_TOLERANCE */ | |
701 | val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0); | |
702 | val = TEMP_FROM_REG(val & 0x0f); | |
703 | } | |
704 | return sprintf(buf, "%d\n", val); | |
705 | } | |
706 | ||
707 | static ssize_t | |
708 | store_sf_ctrl(struct device *dev, struct device_attribute *attr, | |
709 | const char *buf, size_t count) | |
710 | { | |
711 | struct sensor_device_attribute_2 *sensor_attr = | |
712 | to_sensor_dev_attr_2(attr); | |
713 | int nr = sensor_attr->nr; | |
714 | int index = sensor_attr->index; | |
715 | struct i2c_client *client = to_i2c_client(dev); | |
716 | struct w83793_data *data = i2c_get_clientdata(client); | |
717 | u32 val; | |
718 | ||
719 | mutex_lock(&data->update_lock); | |
720 | if (TEMP_FAN_MAP == nr) { | |
721 | val = simple_strtoul(buf, NULL, 10) & 0xff; | |
722 | w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val); | |
723 | data->temp_fan_map[index] = val; | |
724 | } else if (TEMP_PWM_ENABLE == nr) { | |
725 | val = simple_strtoul(buf, NULL, 10); | |
726 | if (2 == val || 3 == val) { | |
727 | data->pwm_enable = | |
728 | w83793_read_value(client, W83793_REG_PWM_ENABLE); | |
729 | if (val - 2) | |
730 | data->pwm_enable |= 1 << index; | |
731 | else | |
732 | data->pwm_enable &= ~(1 << index); | |
733 | w83793_write_value(client, W83793_REG_PWM_ENABLE, | |
734 | data->pwm_enable); | |
735 | } else { | |
736 | mutex_unlock(&data->update_lock); | |
737 | return -EINVAL; | |
738 | } | |
739 | } else if (TEMP_CRUISE == nr) { | |
740 | data->temp_cruise[index] = | |
741 | w83793_read_value(client, W83793_REG_TEMP_CRUISE(index)); | |
742 | val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f); | |
743 | data->temp_cruise[index] &= 0x80; | |
744 | data->temp_cruise[index] |= val; | |
745 | ||
746 | w83793_write_value(client, W83793_REG_TEMP_CRUISE(index), | |
747 | data->temp_cruise[index]); | |
748 | } else { /* TEMP_TOLERANCE */ | |
749 | int i = index >> 1; | |
750 | u8 shift = (index & 0x01) ? 4 : 0; | |
751 | data->tolerance[i] = | |
752 | w83793_read_value(client, W83793_REG_TEMP_TOL(i)); | |
753 | ||
754 | val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x0f); | |
755 | data->tolerance[i] &= ~(0x0f << shift); | |
756 | data->tolerance[i] |= val << shift; | |
757 | w83793_write_value(client, W83793_REG_TEMP_TOL(i), | |
758 | data->tolerance[i]); | |
759 | } | |
760 | ||
761 | mutex_unlock(&data->update_lock); | |
762 | return count; | |
763 | } | |
764 | ||
765 | static ssize_t | |
766 | show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf) | |
767 | { | |
768 | struct sensor_device_attribute_2 *sensor_attr = | |
769 | to_sensor_dev_attr_2(attr); | |
770 | int nr = sensor_attr->nr; | |
771 | int index = sensor_attr->index; | |
772 | struct w83793_data *data = w83793_update_device(dev); | |
773 | ||
774 | return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2); | |
775 | } | |
776 | ||
777 | static ssize_t | |
778 | store_sf2_pwm(struct device *dev, struct device_attribute *attr, | |
779 | const char *buf, size_t count) | |
780 | { | |
781 | struct i2c_client *client = to_i2c_client(dev); | |
782 | struct w83793_data *data = i2c_get_clientdata(client); | |
783 | struct sensor_device_attribute_2 *sensor_attr = | |
784 | to_sensor_dev_attr_2(attr); | |
785 | int nr = sensor_attr->nr; | |
786 | int index = sensor_attr->index; | |
787 | u8 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff) >> 2; | |
788 | ||
789 | mutex_lock(&data->update_lock); | |
790 | data->sf2_pwm[index][nr] = | |
791 | w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0; | |
792 | data->sf2_pwm[index][nr] |= val; | |
793 | w83793_write_value(client, W83793_REG_SF2_PWM(index, nr), | |
794 | data->sf2_pwm[index][nr]); | |
795 | mutex_unlock(&data->update_lock); | |
796 | return count; | |
797 | } | |
798 | ||
799 | static ssize_t | |
800 | show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf) | |
801 | { | |
802 | struct sensor_device_attribute_2 *sensor_attr = | |
803 | to_sensor_dev_attr_2(attr); | |
804 | int nr = sensor_attr->nr; | |
805 | int index = sensor_attr->index; | |
806 | struct w83793_data *data = w83793_update_device(dev); | |
807 | ||
808 | return sprintf(buf, "%ld\n", | |
809 | TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f)); | |
810 | } | |
811 | ||
812 | static ssize_t | |
813 | store_sf2_temp(struct device *dev, struct device_attribute *attr, | |
814 | const char *buf, size_t count) | |
815 | { | |
816 | struct i2c_client *client = to_i2c_client(dev); | |
817 | struct w83793_data *data = i2c_get_clientdata(client); | |
818 | struct sensor_device_attribute_2 *sensor_attr = | |
819 | to_sensor_dev_attr_2(attr); | |
820 | int nr = sensor_attr->nr; | |
821 | int index = sensor_attr->index; | |
822 | u8 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f); | |
823 | ||
824 | mutex_lock(&data->update_lock); | |
825 | data->sf2_temp[index][nr] = | |
826 | w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80; | |
827 | data->sf2_temp[index][nr] |= val; | |
828 | w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr), | |
829 | data->sf2_temp[index][nr]); | |
830 | mutex_unlock(&data->update_lock); | |
831 | return count; | |
832 | } | |
833 | ||
834 | /* only Vcore A/B and Vtt have additional 2 bits precision */ | |
835 | static ssize_t | |
836 | show_in(struct device *dev, struct device_attribute *attr, char *buf) | |
837 | { | |
838 | struct sensor_device_attribute_2 *sensor_attr = | |
839 | to_sensor_dev_attr_2(attr); | |
840 | int nr = sensor_attr->nr; | |
841 | int index = sensor_attr->index; | |
842 | struct w83793_data *data = w83793_update_device(dev); | |
843 | u16 val = data->in[index][nr]; | |
844 | ||
845 | if (index < 3) { | |
846 | val <<= 2; | |
847 | val += (data->in_low_bits[nr] >> (index * 2)) & 0x3; | |
848 | } | |
ddca933b GJ |
849 | /* voltage inputs 5VDD and 5VSB needs 150mV offset */ |
850 | val = val * scale_in[index] + scale_in_add[index]; | |
851 | return sprintf(buf, "%d\n", val); | |
6800c3d0 RM |
852 | } |
853 | ||
854 | static ssize_t | |
855 | store_in(struct device *dev, struct device_attribute *attr, | |
856 | const char *buf, size_t count) | |
857 | { | |
858 | struct sensor_device_attribute_2 *sensor_attr = | |
859 | to_sensor_dev_attr_2(attr); | |
860 | int nr = sensor_attr->nr; | |
861 | int index = sensor_attr->index; | |
862 | struct i2c_client *client = to_i2c_client(dev); | |
863 | struct w83793_data *data = i2c_get_clientdata(client); | |
864 | u32 val; | |
865 | ||
866 | val = | |
867 | (simple_strtoul(buf, NULL, 10) + | |
868 | scale_in[index] / 2) / scale_in[index]; | |
869 | mutex_lock(&data->update_lock); | |
870 | if (index > 2) { | |
ddca933b GJ |
871 | /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */ |
872 | if (1 == nr || 2 == nr) { | |
873 | val -= scale_in_add[index] / scale_in[index]; | |
874 | } | |
6800c3d0 RM |
875 | val = SENSORS_LIMIT(val, 0, 255); |
876 | } else { | |
877 | val = SENSORS_LIMIT(val, 0, 0x3FF); | |
878 | data->in_low_bits[nr] = | |
879 | w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]); | |
880 | data->in_low_bits[nr] &= ~(0x03 << (2 * index)); | |
881 | data->in_low_bits[nr] |= (val & 0x03) << (2 * index); | |
882 | w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr], | |
883 | data->in_low_bits[nr]); | |
884 | val >>= 2; | |
885 | } | |
886 | data->in[index][nr] = val; | |
887 | w83793_write_value(client, W83793_REG_IN[index][nr], | |
888 | data->in[index][nr]); | |
889 | mutex_unlock(&data->update_lock); | |
890 | return count; | |
891 | } | |
892 | ||
893 | #define NOT_USED -1 | |
894 | ||
895 | #define SENSOR_ATTR_IN(index) \ | |
896 | SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ | |
897 | IN_READ, index), \ | |
898 | SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ | |
899 | store_in, IN_MAX, index), \ | |
900 | SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ | |
901 | store_in, IN_LOW, index), \ | |
902 | SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ | |
903 | NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \ | |
904 | SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ | |
905 | show_alarm_beep, store_beep, BEEP_ENABLE, \ | |
906 | index + ((index > 2) ? 1 : 0)) | |
907 | ||
908 | #define SENSOR_ATTR_FAN(index) \ | |
909 | SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ | |
910 | NULL, ALARM_STATUS, index + 17), \ | |
911 | SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ | |
912 | show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \ | |
913 | SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ | |
914 | NULL, FAN_INPUT, index - 1), \ | |
915 | SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ | |
916 | show_fan, store_fan_min, FAN_MIN, index - 1) | |
917 | ||
918 | #define SENSOR_ATTR_PWM(index) \ | |
919 | SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ | |
920 | store_pwm, PWM_DUTY, index - 1), \ | |
921 | SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ | |
922 | show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ | |
923 | SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ | |
924 | show_pwm, store_pwm, PWM_START, index - 1), \ | |
925 | SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ | |
926 | show_pwm, store_pwm, PWM_STOP_TIME, index - 1) | |
927 | ||
928 | #define SENSOR_ATTR_TEMP(index) \ | |
929 | SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \ | |
930 | show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ | |
931 | SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ | |
932 | NULL, TEMP_READ, index - 1), \ | |
933 | SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ | |
934 | store_temp, TEMP_CRIT, index - 1), \ | |
935 | SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ | |
936 | show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ | |
937 | SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \ | |
938 | store_temp, TEMP_WARN, index - 1), \ | |
939 | SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \ | |
940 | show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ | |
941 | SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ | |
942 | show_alarm_beep, NULL, ALARM_STATUS, index + 11), \ | |
943 | SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ | |
944 | show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \ | |
945 | SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \ | |
946 | S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \ | |
947 | TEMP_FAN_MAP, index - 1), \ | |
948 | SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ | |
949 | show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \ | |
950 | index - 1), \ | |
951 | SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \ | |
952 | show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \ | |
953 | SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\ | |
954 | store_sf_ctrl, TEMP_TOLERANCE, index - 1), \ | |
955 | SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ | |
956 | show_sf2_pwm, store_sf2_pwm, 0, index - 1), \ | |
957 | SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ | |
958 | show_sf2_pwm, store_sf2_pwm, 1, index - 1), \ | |
959 | SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ | |
960 | show_sf2_pwm, store_sf2_pwm, 2, index - 1), \ | |
961 | SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ | |
962 | show_sf2_pwm, store_sf2_pwm, 3, index - 1), \ | |
963 | SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ | |
964 | show_sf2_pwm, store_sf2_pwm, 4, index - 1), \ | |
965 | SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ | |
966 | show_sf2_pwm, store_sf2_pwm, 5, index - 1), \ | |
967 | SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ | |
968 | show_sf2_pwm, store_sf2_pwm, 6, index - 1), \ | |
969 | SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ | |
970 | show_sf2_temp, store_sf2_temp, 0, index - 1), \ | |
971 | SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ | |
972 | show_sf2_temp, store_sf2_temp, 1, index - 1), \ | |
973 | SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ | |
974 | show_sf2_temp, store_sf2_temp, 2, index - 1), \ | |
975 | SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ | |
976 | show_sf2_temp, store_sf2_temp, 3, index - 1), \ | |
977 | SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ | |
978 | show_sf2_temp, store_sf2_temp, 4, index - 1), \ | |
979 | SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ | |
980 | show_sf2_temp, store_sf2_temp, 5, index - 1), \ | |
981 | SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ | |
982 | show_sf2_temp, store_sf2_temp, 6, index - 1) | |
983 | ||
984 | static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = { | |
985 | SENSOR_ATTR_IN(0), | |
986 | SENSOR_ATTR_IN(1), | |
987 | SENSOR_ATTR_IN(2), | |
988 | SENSOR_ATTR_IN(3), | |
989 | SENSOR_ATTR_IN(4), | |
990 | SENSOR_ATTR_IN(5), | |
991 | SENSOR_ATTR_IN(6), | |
992 | SENSOR_ATTR_IN(7), | |
993 | SENSOR_ATTR_IN(8), | |
994 | SENSOR_ATTR_IN(9), | |
6800c3d0 RM |
995 | SENSOR_ATTR_FAN(1), |
996 | SENSOR_ATTR_FAN(2), | |
997 | SENSOR_ATTR_FAN(3), | |
998 | SENSOR_ATTR_FAN(4), | |
999 | SENSOR_ATTR_FAN(5), | |
1000 | SENSOR_ATTR_PWM(1), | |
1001 | SENSOR_ATTR_PWM(2), | |
1002 | SENSOR_ATTR_PWM(3), | |
1003 | }; | |
1004 | ||
46bed4df GJ |
1005 | static struct sensor_device_attribute_2 w83793_temp[] = { |
1006 | SENSOR_ATTR_TEMP(1), | |
1007 | SENSOR_ATTR_TEMP(2), | |
1008 | SENSOR_ATTR_TEMP(3), | |
1009 | SENSOR_ATTR_TEMP(4), | |
1010 | SENSOR_ATTR_TEMP(5), | |
1011 | SENSOR_ATTR_TEMP(6), | |
1012 | }; | |
1013 | ||
6800c3d0 RM |
1014 | /* Fan6-Fan12 */ |
1015 | static struct sensor_device_attribute_2 w83793_left_fan[] = { | |
1016 | SENSOR_ATTR_FAN(6), | |
1017 | SENSOR_ATTR_FAN(7), | |
1018 | SENSOR_ATTR_FAN(8), | |
1019 | SENSOR_ATTR_FAN(9), | |
1020 | SENSOR_ATTR_FAN(10), | |
1021 | SENSOR_ATTR_FAN(11), | |
1022 | SENSOR_ATTR_FAN(12), | |
1023 | }; | |
1024 | ||
1025 | /* Pwm4-Pwm8 */ | |
1026 | static struct sensor_device_attribute_2 w83793_left_pwm[] = { | |
1027 | SENSOR_ATTR_PWM(4), | |
1028 | SENSOR_ATTR_PWM(5), | |
1029 | SENSOR_ATTR_PWM(6), | |
1030 | SENSOR_ATTR_PWM(7), | |
1031 | SENSOR_ATTR_PWM(8), | |
1032 | }; | |
1033 | ||
c70a8c34 | 1034 | static struct sensor_device_attribute_2 w83793_vid[] = { |
6800c3d0 RM |
1035 | SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0), |
1036 | SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1), | |
c70a8c34 | 1037 | }; |
93c75a4a | 1038 | static DEVICE_ATTR(vrm, S_IWUSR | S_IRUGO, show_vrm, store_vrm); |
c70a8c34 GJ |
1039 | |
1040 | static struct sensor_device_attribute_2 sda_single_files[] = { | |
6800c3d0 RM |
1041 | SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep, |
1042 | store_chassis_clear, ALARM_STATUS, 30), | |
1043 | SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable, | |
1044 | store_beep_enable, NOT_USED, NOT_USED), | |
1045 | SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, | |
1046 | store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), | |
1047 | SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, | |
1048 | store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), | |
1049 | SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, | |
1050 | store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), | |
1051 | SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup, | |
1052 | store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED), | |
1053 | }; | |
1054 | ||
1055 | static void w83793_init_client(struct i2c_client *client) | |
1056 | { | |
1057 | if (reset) { | |
1058 | w83793_write_value(client, W83793_REG_CONFIG, 0x80); | |
1059 | } | |
1060 | ||
1061 | /* Start monitoring */ | |
1062 | w83793_write_value(client, W83793_REG_CONFIG, | |
1063 | w83793_read_value(client, W83793_REG_CONFIG) | 0x01); | |
1064 | ||
1065 | } | |
1066 | ||
a7f13a6e | 1067 | static int w83793_remove(struct i2c_client *client) |
6800c3d0 RM |
1068 | { |
1069 | struct w83793_data *data = i2c_get_clientdata(client); | |
1070 | struct device *dev = &client->dev; | |
a7f13a6e | 1071 | int i; |
6800c3d0 | 1072 | |
a7f13a6e | 1073 | hwmon_device_unregister(data->hwmon_dev); |
6800c3d0 | 1074 | |
a7f13a6e JD |
1075 | for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) |
1076 | device_remove_file(dev, | |
1077 | &w83793_sensor_attr_2[i].dev_attr); | |
6800c3d0 | 1078 | |
a7f13a6e JD |
1079 | for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) |
1080 | device_remove_file(dev, &sda_single_files[i].dev_attr); | |
6800c3d0 | 1081 | |
a7f13a6e JD |
1082 | for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) |
1083 | device_remove_file(dev, &w83793_vid[i].dev_attr); | |
1084 | device_remove_file(dev, &dev_attr_vrm); | |
c70a8c34 | 1085 | |
a7f13a6e JD |
1086 | for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++) |
1087 | device_remove_file(dev, &w83793_left_fan[i].dev_attr); | |
6800c3d0 | 1088 | |
a7f13a6e JD |
1089 | for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++) |
1090 | device_remove_file(dev, &w83793_left_pwm[i].dev_attr); | |
46bed4df | 1091 | |
a7f13a6e JD |
1092 | for (i = 0; i < ARRAY_SIZE(w83793_temp); i++) |
1093 | device_remove_file(dev, &w83793_temp[i].dev_attr); | |
6800c3d0 | 1094 | |
a7f13a6e JD |
1095 | if (data->lm75[0] != NULL) |
1096 | i2c_unregister_device(data->lm75[0]); | |
1097 | if (data->lm75[1] != NULL) | |
1098 | i2c_unregister_device(data->lm75[1]); | |
6800c3d0 | 1099 | |
a7f13a6e | 1100 | kfree(data); |
6800c3d0 RM |
1101 | |
1102 | return 0; | |
1103 | } | |
1104 | ||
1105 | static int | |
a7f13a6e | 1106 | w83793_detect_subclients(struct i2c_client *client) |
6800c3d0 RM |
1107 | { |
1108 | int i, id, err; | |
a7f13a6e | 1109 | int address = client->addr; |
6800c3d0 | 1110 | u8 tmp; |
a7f13a6e | 1111 | struct i2c_adapter *adapter = client->adapter; |
6800c3d0 RM |
1112 | struct w83793_data *data = i2c_get_clientdata(client); |
1113 | ||
1114 | id = i2c_adapter_id(adapter); | |
1115 | if (force_subclients[0] == id && force_subclients[1] == address) { | |
1116 | for (i = 2; i <= 3; i++) { | |
1117 | if (force_subclients[i] < 0x48 | |
1118 | || force_subclients[i] > 0x4f) { | |
1119 | dev_err(&client->dev, | |
1120 | "invalid subclient " | |
1121 | "address %d; must be 0x48-0x4f\n", | |
1122 | force_subclients[i]); | |
1123 | err = -EINVAL; | |
1124 | goto ERROR_SC_0; | |
1125 | } | |
1126 | } | |
1127 | w83793_write_value(client, W83793_REG_I2C_SUBADDR, | |
1128 | (force_subclients[2] & 0x07) | | |
1129 | ((force_subclients[3] & 0x07) << 4)); | |
1130 | } | |
1131 | ||
1132 | tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR); | |
1133 | if (!(tmp & 0x08)) { | |
a7f13a6e | 1134 | data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (tmp & 0x7)); |
6800c3d0 RM |
1135 | } |
1136 | if (!(tmp & 0x80)) { | |
1137 | if ((data->lm75[0] != NULL) | |
1138 | && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) { | |
1139 | dev_err(&client->dev, | |
1140 | "duplicate addresses 0x%x, " | |
1141 | "use force_subclients\n", data->lm75[0]->addr); | |
1142 | err = -ENODEV; | |
1143 | goto ERROR_SC_1; | |
1144 | } | |
a7f13a6e JD |
1145 | data->lm75[1] = i2c_new_dummy(adapter, |
1146 | 0x48 + ((tmp >> 4) & 0x7)); | |
6800c3d0 RM |
1147 | } |
1148 | ||
1149 | return 0; | |
1150 | ||
1151 | /* Undo inits in case of errors */ | |
1152 | ||
1153 | ERROR_SC_1: | |
a7f13a6e JD |
1154 | if (data->lm75[0] != NULL) |
1155 | i2c_unregister_device(data->lm75[0]); | |
6800c3d0 RM |
1156 | ERROR_SC_0: |
1157 | return err; | |
1158 | } | |
1159 | ||
a7f13a6e JD |
1160 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
1161 | static int w83793_detect(struct i2c_client *client, int kind, | |
1162 | struct i2c_board_info *info) | |
6800c3d0 | 1163 | { |
a7f13a6e JD |
1164 | u8 tmp, bank; |
1165 | struct i2c_adapter *adapter = client->adapter; | |
1166 | unsigned short address = client->addr; | |
6800c3d0 RM |
1167 | |
1168 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { | |
a7f13a6e | 1169 | return -ENODEV; |
6800c3d0 RM |
1170 | } |
1171 | ||
a7f13a6e | 1172 | bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL); |
6800c3d0 | 1173 | |
6800c3d0 | 1174 | if (kind < 0) { |
a7f13a6e | 1175 | tmp = bank & 0x80 ? 0x5c : 0xa3; |
6800c3d0 RM |
1176 | /* Check Winbond vendor ID */ |
1177 | if (tmp != i2c_smbus_read_byte_data(client, | |
1178 | W83793_REG_VENDORID)) { | |
1179 | pr_debug("w83793: Detection failed at check " | |
1180 | "vendor id\n"); | |
a7f13a6e | 1181 | return -ENODEV; |
6800c3d0 RM |
1182 | } |
1183 | ||
1184 | /* If Winbond chip, address of chip and W83793_REG_I2C_ADDR | |
1185 | should match */ | |
a7f13a6e | 1186 | if ((bank & 0x07) == 0 |
6800c3d0 RM |
1187 | && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) != |
1188 | (address << 1)) { | |
1189 | pr_debug("w83793: Detection failed at check " | |
1190 | "i2c addr\n"); | |
a7f13a6e | 1191 | return -ENODEV; |
6800c3d0 RM |
1192 | } |
1193 | ||
1194 | } | |
1195 | ||
1196 | /* We have either had a force parameter, or we have already detected the | |
1197 | Winbond. Determine the chip type now */ | |
1198 | ||
1199 | if (kind <= 0) { | |
a7f13a6e JD |
1200 | if (0x7b == i2c_smbus_read_byte_data(client, |
1201 | W83793_REG_CHIPID)) { | |
6800c3d0 RM |
1202 | kind = w83793; |
1203 | } else { | |
1204 | if (kind == 0) | |
1205 | dev_warn(&adapter->dev, "w83793: Ignoring " | |
1206 | "'force' parameter for unknown chip " | |
1207 | "at address 0x%02x\n", address); | |
a7f13a6e | 1208 | return -ENODEV; |
6800c3d0 RM |
1209 | } |
1210 | } | |
1211 | ||
a7f13a6e JD |
1212 | strlcpy(info->type, "w83793", I2C_NAME_SIZE); |
1213 | ||
1214 | return 0; | |
1215 | } | |
6800c3d0 | 1216 | |
a7f13a6e JD |
1217 | static int w83793_probe(struct i2c_client *client, |
1218 | const struct i2c_device_id *id) | |
1219 | { | |
1220 | struct device *dev = &client->dev; | |
1221 | struct w83793_data *data; | |
1222 | int i, tmp, val, err; | |
1223 | int files_fan = ARRAY_SIZE(w83793_left_fan) / 7; | |
1224 | int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5; | |
1225 | int files_temp = ARRAY_SIZE(w83793_temp) / 6; | |
1226 | ||
1227 | data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL); | |
1228 | if (!data) { | |
1229 | err = -ENOMEM; | |
1230 | goto exit; | |
1231 | } | |
1232 | ||
1233 | i2c_set_clientdata(client, data); | |
1234 | data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL); | |
6800c3d0 RM |
1235 | mutex_init(&data->update_lock); |
1236 | ||
a7f13a6e JD |
1237 | err = w83793_detect_subclients(client); |
1238 | if (err) | |
6800c3d0 RM |
1239 | goto free_mem; |
1240 | ||
6800c3d0 RM |
1241 | /* Initialize the chip */ |
1242 | w83793_init_client(client); | |
1243 | ||
6800c3d0 RM |
1244 | /* |
1245 | Only fan 1-5 has their own input pins, | |
1246 | Pwm 1-3 has their own pins | |
1247 | */ | |
1248 | data->has_fan = 0x1f; | |
1249 | data->has_pwm = 0x07; | |
1250 | tmp = w83793_read_value(client, W83793_REG_MFC); | |
1251 | val = w83793_read_value(client, W83793_REG_FANIN_CTRL); | |
1252 | ||
1253 | /* check the function of pins 49-56 */ | |
93c75a4a JD |
1254 | if (tmp & 0x80) { |
1255 | data->has_vid |= 0x2; /* has VIDB */ | |
1256 | } else { | |
6800c3d0 RM |
1257 | data->has_pwm |= 0x18; /* pwm 4,5 */ |
1258 | if (val & 0x01) { /* fan 6 */ | |
1259 | data->has_fan |= 0x20; | |
1260 | data->has_pwm |= 0x20; | |
1261 | } | |
1262 | if (val & 0x02) { /* fan 7 */ | |
1263 | data->has_fan |= 0x40; | |
1264 | data->has_pwm |= 0x40; | |
1265 | } | |
1266 | if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */ | |
1267 | data->has_fan |= 0x80; | |
1268 | data->has_pwm |= 0x80; | |
1269 | } | |
1270 | } | |
1271 | ||
93c75a4a JD |
1272 | /* check the function of pins 37-40 */ |
1273 | if (!(tmp & 0x29)) | |
1274 | data->has_vid |= 0x1; /* has VIDA */ | |
6800c3d0 RM |
1275 | if (0x08 == (tmp & 0x0c)) { |
1276 | if (val & 0x08) /* fan 9 */ | |
1277 | data->has_fan |= 0x100; | |
1278 | if (val & 0x10) /* fan 10 */ | |
1279 | data->has_fan |= 0x200; | |
1280 | } | |
6800c3d0 RM |
1281 | if (0x20 == (tmp & 0x30)) { |
1282 | if (val & 0x20) /* fan 11 */ | |
1283 | data->has_fan |= 0x400; | |
1284 | if (val & 0x40) /* fan 12 */ | |
1285 | data->has_fan |= 0x800; | |
1286 | } | |
1287 | ||
1288 | if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */ | |
1289 | data->has_fan |= 0x80; | |
1290 | data->has_pwm |= 0x80; | |
1291 | } | |
1292 | ||
c9294315 RM |
1293 | tmp = w83793_read_value(client, W83793_REG_FANIN_SEL); |
1294 | if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */ | |
1295 | data->has_fan |= 0x100; | |
1296 | } | |
1297 | if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */ | |
1298 | data->has_fan |= 0x200; | |
1299 | } | |
1300 | if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */ | |
1301 | data->has_fan |= 0x400; | |
1302 | } | |
1303 | if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */ | |
1304 | data->has_fan |= 0x800; | |
1305 | } | |
1306 | ||
46bed4df GJ |
1307 | /* check the temp1-6 mode, ignore former AMDSI selected inputs */ |
1308 | tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[0]); | |
1309 | if (tmp & 0x01) | |
1310 | data->has_temp |= 0x01; | |
1311 | if (tmp & 0x04) | |
1312 | data->has_temp |= 0x02; | |
1313 | if (tmp & 0x10) | |
1314 | data->has_temp |= 0x04; | |
1315 | if (tmp & 0x40) | |
1316 | data->has_temp |= 0x08; | |
1317 | ||
1318 | tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[1]); | |
1319 | if (tmp & 0x01) | |
1320 | data->has_temp |= 0x10; | |
1321 | if (tmp & 0x02) | |
1322 | data->has_temp |= 0x20; | |
1323 | ||
6800c3d0 RM |
1324 | /* Register sysfs hooks */ |
1325 | for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) { | |
1326 | err = device_create_file(dev, | |
1327 | &w83793_sensor_attr_2[i].dev_attr); | |
1328 | if (err) | |
1329 | goto exit_remove; | |
1330 | } | |
1331 | ||
c70a8c34 GJ |
1332 | for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) { |
1333 | if (!(data->has_vid & (1 << i))) | |
1334 | continue; | |
1335 | err = device_create_file(dev, &w83793_vid[i].dev_attr); | |
1336 | if (err) | |
1337 | goto exit_remove; | |
1338 | } | |
93c75a4a JD |
1339 | if (data->has_vid) { |
1340 | data->vrm = vid_which_vrm(); | |
1341 | err = device_create_file(dev, &dev_attr_vrm); | |
1342 | if (err) | |
1343 | goto exit_remove; | |
1344 | } | |
c70a8c34 | 1345 | |
6800c3d0 RM |
1346 | for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { |
1347 | err = device_create_file(dev, &sda_single_files[i].dev_attr); | |
1348 | if (err) | |
1349 | goto exit_remove; | |
1350 | ||
1351 | } | |
1352 | ||
46bed4df GJ |
1353 | for (i = 0; i < 6; i++) { |
1354 | int j; | |
1355 | if (!(data->has_temp & (1 << i))) | |
1356 | continue; | |
1357 | for (j = 0; j < files_temp; j++) { | |
1358 | err = device_create_file(dev, | |
1359 | &w83793_temp[(i) * files_temp | |
1360 | + j].dev_attr); | |
1361 | if (err) | |
1362 | goto exit_remove; | |
1363 | } | |
1364 | } | |
1365 | ||
6800c3d0 RM |
1366 | for (i = 5; i < 12; i++) { |
1367 | int j; | |
1368 | if (!(data->has_fan & (1 << i))) | |
1369 | continue; | |
1370 | for (j = 0; j < files_fan; j++) { | |
1371 | err = device_create_file(dev, | |
1372 | &w83793_left_fan[(i - 5) * files_fan | |
1373 | + j].dev_attr); | |
1374 | if (err) | |
1375 | goto exit_remove; | |
1376 | } | |
1377 | } | |
1378 | ||
1379 | for (i = 3; i < 8; i++) { | |
1380 | int j; | |
1381 | if (!(data->has_pwm & (1 << i))) | |
1382 | continue; | |
1383 | for (j = 0; j < files_pwm; j++) { | |
1384 | err = device_create_file(dev, | |
1385 | &w83793_left_pwm[(i - 3) * files_pwm | |
1386 | + j].dev_attr); | |
1387 | if (err) | |
1388 | goto exit_remove; | |
1389 | } | |
1390 | } | |
1391 | ||
1beeffe4 TJ |
1392 | data->hwmon_dev = hwmon_device_register(dev); |
1393 | if (IS_ERR(data->hwmon_dev)) { | |
1394 | err = PTR_ERR(data->hwmon_dev); | |
6800c3d0 RM |
1395 | goto exit_remove; |
1396 | } | |
1397 | ||
1398 | return 0; | |
1399 | ||
1400 | /* Unregister sysfs hooks */ | |
1401 | ||
1402 | exit_remove: | |
1403 | for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) | |
1404 | device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr); | |
1405 | ||
1406 | for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) | |
1407 | device_remove_file(dev, &sda_single_files[i].dev_attr); | |
1408 | ||
c70a8c34 GJ |
1409 | for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) |
1410 | device_remove_file(dev, &w83793_vid[i].dev_attr); | |
1411 | ||
6800c3d0 RM |
1412 | for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++) |
1413 | device_remove_file(dev, &w83793_left_fan[i].dev_attr); | |
1414 | ||
1415 | for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++) | |
1416 | device_remove_file(dev, &w83793_left_pwm[i].dev_attr); | |
1417 | ||
46bed4df GJ |
1418 | for (i = 0; i < ARRAY_SIZE(w83793_temp); i++) |
1419 | device_remove_file(dev, &w83793_temp[i].dev_attr); | |
1420 | ||
a7f13a6e JD |
1421 | if (data->lm75[0] != NULL) |
1422 | i2c_unregister_device(data->lm75[0]); | |
1423 | if (data->lm75[1] != NULL) | |
1424 | i2c_unregister_device(data->lm75[1]); | |
6800c3d0 RM |
1425 | free_mem: |
1426 | kfree(data); | |
1427 | exit: | |
1428 | return err; | |
1429 | } | |
1430 | ||
1431 | static void w83793_update_nonvolatile(struct device *dev) | |
1432 | { | |
1433 | struct i2c_client *client = to_i2c_client(dev); | |
1434 | struct w83793_data *data = i2c_get_clientdata(client); | |
1435 | int i, j; | |
1436 | /* | |
1437 | They are somewhat "stable" registers, and to update them everytime | |
1438 | takes so much time, it's just not worthy. Update them in a long | |
1439 | interval to avoid exception. | |
1440 | */ | |
1441 | if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300) | |
1442 | || !data->valid)) | |
1443 | return; | |
1444 | /* update voltage limits */ | |
1445 | for (i = 1; i < 3; i++) { | |
1446 | for (j = 0; j < ARRAY_SIZE(data->in); j++) { | |
1447 | data->in[j][i] = | |
1448 | w83793_read_value(client, W83793_REG_IN[j][i]); | |
1449 | } | |
1450 | data->in_low_bits[i] = | |
1451 | w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]); | |
1452 | } | |
1453 | ||
1454 | for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) { | |
1455 | /* Update the Fan measured value and limits */ | |
1456 | if (!(data->has_fan & (1 << i))) { | |
1457 | continue; | |
1458 | } | |
1459 | data->fan_min[i] = | |
1460 | w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8; | |
1461 | data->fan_min[i] |= | |
1462 | w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1); | |
1463 | } | |
1464 | ||
1465 | for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) { | |
46bed4df GJ |
1466 | if (!(data->has_temp & (1 << i))) |
1467 | continue; | |
6800c3d0 RM |
1468 | data->temp_fan_map[i] = |
1469 | w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i)); | |
1470 | for (j = 1; j < 5; j++) { | |
1471 | data->temp[i][j] = | |
1472 | w83793_read_value(client, W83793_REG_TEMP[i][j]); | |
1473 | } | |
1474 | data->temp_cruise[i] = | |
1475 | w83793_read_value(client, W83793_REG_TEMP_CRUISE(i)); | |
1476 | for (j = 0; j < 7; j++) { | |
1477 | data->sf2_pwm[i][j] = | |
1478 | w83793_read_value(client, W83793_REG_SF2_PWM(i, j)); | |
1479 | data->sf2_temp[i][j] = | |
1480 | w83793_read_value(client, | |
1481 | W83793_REG_SF2_TEMP(i, j)); | |
1482 | } | |
1483 | } | |
1484 | ||
1485 | for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++) | |
1486 | data->temp_mode[i] = | |
1487 | w83793_read_value(client, W83793_REG_TEMP_MODE[i]); | |
1488 | ||
1489 | for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) { | |
1490 | data->tolerance[i] = | |
1491 | w83793_read_value(client, W83793_REG_TEMP_TOL(i)); | |
1492 | } | |
1493 | ||
1494 | for (i = 0; i < ARRAY_SIZE(data->pwm); i++) { | |
1495 | if (!(data->has_pwm & (1 << i))) | |
1496 | continue; | |
1497 | data->pwm[i][PWM_NONSTOP] = | |
1498 | w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP)); | |
1499 | data->pwm[i][PWM_START] = | |
1500 | w83793_read_value(client, W83793_REG_PWM(i, PWM_START)); | |
1501 | data->pwm_stop_time[i] = | |
1502 | w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i)); | |
1503 | } | |
1504 | ||
1505 | data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT); | |
1506 | data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE); | |
1507 | data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME); | |
1508 | data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME); | |
1509 | data->temp_critical = | |
1510 | w83793_read_value(client, W83793_REG_TEMP_CRITICAL); | |
1511 | data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP); | |
1512 | ||
1513 | for (i = 0; i < ARRAY_SIZE(data->beeps); i++) { | |
1514 | data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i)); | |
1515 | } | |
1516 | ||
1517 | data->last_nonvolatile = jiffies; | |
1518 | } | |
1519 | ||
1520 | static struct w83793_data *w83793_update_device(struct device *dev) | |
1521 | { | |
1522 | struct i2c_client *client = to_i2c_client(dev); | |
1523 | struct w83793_data *data = i2c_get_clientdata(client); | |
1524 | int i; | |
1525 | ||
1526 | mutex_lock(&data->update_lock); | |
1527 | ||
1528 | if (!(time_after(jiffies, data->last_updated + HZ * 2) | |
1529 | || !data->valid)) | |
1530 | goto END; | |
1531 | ||
1532 | /* Update the voltages measured value and limits */ | |
1533 | for (i = 0; i < ARRAY_SIZE(data->in); i++) | |
1534 | data->in[i][IN_READ] = | |
1535 | w83793_read_value(client, W83793_REG_IN[i][IN_READ]); | |
1536 | ||
1537 | data->in_low_bits[IN_READ] = | |
1538 | w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]); | |
1539 | ||
1540 | for (i = 0; i < ARRAY_SIZE(data->fan); i++) { | |
1541 | if (!(data->has_fan & (1 << i))) { | |
1542 | continue; | |
1543 | } | |
1544 | data->fan[i] = | |
1545 | w83793_read_value(client, W83793_REG_FAN(i)) << 8; | |
1546 | data->fan[i] |= | |
1547 | w83793_read_value(client, W83793_REG_FAN(i) + 1); | |
1548 | } | |
1549 | ||
46bed4df GJ |
1550 | for (i = 0; i < ARRAY_SIZE(data->temp); i++) { |
1551 | if (!(data->has_temp & (1 << i))) | |
1552 | continue; | |
6800c3d0 RM |
1553 | data->temp[i][TEMP_READ] = |
1554 | w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]); | |
46bed4df | 1555 | } |
6800c3d0 RM |
1556 | |
1557 | data->temp_low_bits = | |
1558 | w83793_read_value(client, W83793_REG_TEMP_LOW_BITS); | |
1559 | ||
1560 | for (i = 0; i < ARRAY_SIZE(data->pwm); i++) { | |
1561 | if (data->has_pwm & (1 << i)) | |
1562 | data->pwm[i][PWM_DUTY] = | |
1563 | w83793_read_value(client, | |
1564 | W83793_REG_PWM(i, PWM_DUTY)); | |
1565 | } | |
1566 | ||
1567 | for (i = 0; i < ARRAY_SIZE(data->alarms); i++) | |
1568 | data->alarms[i] = | |
1569 | w83793_read_value(client, W83793_REG_ALARM(i)); | |
c70a8c34 GJ |
1570 | if (data->has_vid & 0x01) |
1571 | data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA); | |
1572 | if (data->has_vid & 0x02) | |
1573 | data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB); | |
6800c3d0 RM |
1574 | w83793_update_nonvolatile(dev); |
1575 | data->last_updated = jiffies; | |
1576 | data->valid = 1; | |
1577 | ||
1578 | END: | |
1579 | mutex_unlock(&data->update_lock); | |
1580 | return data; | |
1581 | } | |
1582 | ||
1583 | /* Ignore the possibility that somebody change bank outside the driver | |
1584 | Must be called with data->update_lock held, except during initialization */ | |
1585 | static u8 w83793_read_value(struct i2c_client *client, u16 reg) | |
1586 | { | |
1587 | struct w83793_data *data = i2c_get_clientdata(client); | |
1588 | u8 res = 0xff; | |
1589 | u8 new_bank = reg >> 8; | |
1590 | ||
1591 | new_bank |= data->bank & 0xfc; | |
1592 | if (data->bank != new_bank) { | |
1593 | if (i2c_smbus_write_byte_data | |
1594 | (client, W83793_REG_BANKSEL, new_bank) >= 0) | |
1595 | data->bank = new_bank; | |
1596 | else { | |
1597 | dev_err(&client->dev, | |
1598 | "set bank to %d failed, fall back " | |
1599 | "to bank %d, read reg 0x%x error\n", | |
1600 | new_bank, data->bank, reg); | |
1601 | res = 0x0; /* read 0x0 from the chip */ | |
1602 | goto END; | |
1603 | } | |
1604 | } | |
1605 | res = i2c_smbus_read_byte_data(client, reg & 0xff); | |
1606 | END: | |
1607 | return res; | |
1608 | } | |
1609 | ||
1610 | /* Must be called with data->update_lock held, except during initialization */ | |
1611 | static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value) | |
1612 | { | |
1613 | struct w83793_data *data = i2c_get_clientdata(client); | |
1614 | int res; | |
1615 | u8 new_bank = reg >> 8; | |
1616 | ||
1617 | new_bank |= data->bank & 0xfc; | |
1618 | if (data->bank != new_bank) { | |
1619 | if ((res = i2c_smbus_write_byte_data | |
1620 | (client, W83793_REG_BANKSEL, new_bank)) >= 0) | |
1621 | data->bank = new_bank; | |
1622 | else { | |
1623 | dev_err(&client->dev, | |
1624 | "set bank to %d failed, fall back " | |
1625 | "to bank %d, write reg 0x%x error\n", | |
1626 | new_bank, data->bank, reg); | |
1627 | goto END; | |
1628 | } | |
1629 | } | |
1630 | ||
1631 | res = i2c_smbus_write_byte_data(client, reg & 0xff, value); | |
1632 | END: | |
1633 | return res; | |
1634 | } | |
1635 | ||
1636 | static int __init sensors_w83793_init(void) | |
1637 | { | |
1638 | return i2c_add_driver(&w83793_driver); | |
1639 | } | |
1640 | ||
1641 | static void __exit sensors_w83793_exit(void) | |
1642 | { | |
1643 | i2c_del_driver(&w83793_driver); | |
1644 | } | |
1645 | ||
1646 | MODULE_AUTHOR("Yuan Mu"); | |
1647 | MODULE_DESCRIPTION("w83793 driver"); | |
1648 | MODULE_LICENSE("GPL"); | |
1649 | ||
1650 | module_init(sensors_w83793_init); | |
1651 | module_exit(sensors_w83793_exit); |