[deliverable/linux.git] / drivers / hwtracing / coresight / coresight-tpiu.c

/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
 *
 * Description: CoreSight Trace Port Interface Unit driver
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/pm_runtime.h>
#include <linux/coresight.h>
#include <linux/amba/bus.h>
#include <linux/clk.h>

#include "coresight-priv.h"

#define TPIU_SUPP_PORTSZ	0x000
#define TPIU_CURR_PORTSZ	0x004
#define TPIU_SUPP_TRIGMODES	0x100
#define TPIU_TRIG_CNTRVAL	0x104
#define TPIU_TRIG_MULT		0x108
#define TPIU_SUPP_TESTPATM	0x200
#define TPIU_CURR_TESTPATM	0x204
#define TPIU_TEST_PATREPCNTR	0x208
#define TPIU_FFSR		0x300
#define TPIU_FFCR		0x304
#define TPIU_FSYNC_CNTR		0x308
#define TPIU_EXTCTL_INPORT	0x400
#define TPIU_EXTCTL_OUTPORT	0x404
#define TPIU_ITTRFLINACK	0xee4
#define TPIU_ITTRFLIN		0xee8
#define TPIU_ITATBDATA0		0xeec
#define TPIU_ITATBCTR2		0xef0
#define TPIU_ITATBCTR1		0xef4
#define TPIU_ITATBCTR0		0xef8

/** register definition **/
/* FFCR - 0x304 */
#define FFCR_FON_MAN		BIT(6)

/**
 * @base:	memory mapped base address for this component.
 * @dev:	the device entity associated to this component.
 * @atclk:	optional clock for the core parts of the TPIU.
 * @csdev:	component vitals needed by the framework.
 */
struct tpiu_drvdata {
	void __iomem		*base;
	struct device		*dev;
	struct clk		*atclk;
	struct coresight_device	*csdev;
};

static void tpiu_enable_hw(struct tpiu_drvdata *drvdata)
{
	CS_UNLOCK(drvdata->base);

	/* TODO: fill this up */

	CS_LOCK(drvdata->base);
}

static int tpiu_enable(struct coresight_device *csdev, u32 mode)
{
	struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);

	tpiu_enable_hw(drvdata);

	dev_info(drvdata->dev, "TPIU enabled\n");
	return 0;
}

static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
{
	CS_UNLOCK(drvdata->base);

	/* Clear formatter controle reg. */
	writel_relaxed(0x0, drvdata->base + TPIU_FFCR);
	/* Generate manual flush */
	writel_relaxed(FFCR_FON_MAN, drvdata->base + TPIU_FFCR);

	CS_LOCK(drvdata->base);
}

static void tpiu_disable(struct coresight_device *csdev)
{
	struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);

	tpiu_disable_hw(drvdata);

	dev_info(drvdata->dev, "TPIU disabled\n");
}

static const struct coresight_ops_sink tpiu_sink_ops = {
	.enable		= tpiu_enable,
	.disable	= tpiu_disable,
};

static const struct coresight_ops tpiu_cs_ops = {
	.sink_ops	= &tpiu_sink_ops,
};

static int tpiu_probe(struct amba_device *adev, const struct amba_id *id)
{
	int ret;
	void __iomem *base;
	struct device *dev = &adev->dev;
	struct coresight_platform_data *pdata = NULL;
	struct tpiu_drvdata *drvdata;
	struct resource *res = &adev->res;
	struct coresight_desc desc = { 0 };
	struct device_node *np = adev->dev.of_node;

	if (np) {
		pdata = of_get_coresight_platform_data(dev, np);
		if (IS_ERR(pdata))
			return PTR_ERR(pdata);
		adev->dev.platform_data = pdata;
	}

	drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
	if (!drvdata)
		return -ENOMEM;

	drvdata->dev = &adev->dev;
	drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
	if (!IS_ERR(drvdata->atclk)) {
		ret = clk_prepare_enable(drvdata->atclk);
		if (ret)
			return ret;
	}
	dev_set_drvdata(dev, drvdata);

	/* Validity for the resource is already checked by the AMBA core */
	base = devm_ioremap_resource(dev, res);
	if (IS_ERR(base))
		return PTR_ERR(base);

	drvdata->base = base;

	/* Disable tpiu to support older devices */
	tpiu_disable_hw(drvdata);

	pm_runtime_put(&adev->dev);

	desc.type = CORESIGHT_DEV_TYPE_SINK;
	desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
	desc.ops = &tpiu_cs_ops;
	desc.pdata = pdata;
	desc.dev = dev;
	drvdata->csdev = coresight_register(&desc);
	if (IS_ERR(drvdata->csdev))
		return PTR_ERR(drvdata->csdev);

	return 0;
}

#ifdef CONFIG_PM
static int tpiu_runtime_suspend(struct device *dev)
{
	struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);

	if (drvdata && !IS_ERR(drvdata->atclk))
		clk_disable_unprepare(drvdata->atclk);

	return 0;
}

static int tpiu_runtime_resume(struct device *dev)
{
	struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);

	if (drvdata && !IS_ERR(drvdata->atclk))
		clk_prepare_enable(drvdata->atclk);

	return 0;
}
#endif

static const struct dev_pm_ops tpiu_dev_pm_ops = {
	SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL)
};

static struct amba_id tpiu_ids[] = {
	{
		.id	= 0x0003b912,
		.mask	= 0x0003ffff,
	},
	{
		.id	= 0x0004b912,
		.mask	= 0x0007ffff,
	},
	{ 0, 0},
};

static struct amba_driver tpiu_driver = {
	.drv = {
		.name	= "coresight-tpiu",
		.owner	= THIS_MODULE,
		.pm	= &tpiu_dev_pm_ops,
		.suppress_bind_attrs = true,
	},
	.probe		= tpiu_probe,
	.id_table	= tpiu_ids,
};
builtin_amba_driver(tpiu_driver);
Commit	Line	Data
dc161b9f	1	/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
941943cf PG	2	*
941943cf PG	3	* Description: CoreSight Trace Port Interface Unit driver
dc161b9f PP	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 and
	7	* only version 2 as published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*/
	14
	15	#include <linux/kernel.h>
dc161b9f PP	16	#include <linux/init.h>
	17	#include <linux/device.h>
	18	#include <linux/io.h>
	19	#include <linux/err.h>
	20	#include <linux/slab.h>
b5913d64	21	#include <linux/pm_runtime.h>
dc161b9f PP	22	#include <linux/coresight.h>
dc161b9f PP	23	#include <linux/amba/bus.h>
db341d3d	24	#include <linux/clk.h>
dc161b9f PP	25
	26	#include "coresight-priv.h"
	27
	28	#define TPIU_SUPP_PORTSZ 0x000
	29	#define TPIU_CURR_PORTSZ 0x004
	30	#define TPIU_SUPP_TRIGMODES 0x100
	31	#define TPIU_TRIG_CNTRVAL 0x104
	32	#define TPIU_TRIG_MULT 0x108
	33	#define TPIU_SUPP_TESTPATM 0x200
	34	#define TPIU_CURR_TESTPATM 0x204
	35	#define TPIU_TEST_PATREPCNTR 0x208
	36	#define TPIU_FFSR 0x300
	37	#define TPIU_FFCR 0x304
	38	#define TPIU_FSYNC_CNTR 0x308
	39	#define TPIU_EXTCTL_INPORT 0x400
	40	#define TPIU_EXTCTL_OUTPORT 0x404
	41	#define TPIU_ITTRFLINACK 0xee4
	42	#define TPIU_ITTRFLIN 0xee8
	43	#define TPIU_ITATBDATA0 0xeec
	44	#define TPIU_ITATBCTR2 0xef0
	45	#define TPIU_ITATBCTR1 0xef4
	46	#define TPIU_ITATBCTR0 0xef8
	47
	48	/ register definition /
	49	/* FFCR - 0x304 */
	50	#define FFCR_FON_MAN BIT(6)
	51
	52	/**
	53	* @base: memory mapped base address for this component.
	54	* @dev: the device entity associated to this component.
db341d3d	55	* @atclk: optional clock for the core parts of the TPIU.
dc161b9f	56	* @csdev: component vitals needed by the framework.
dc161b9f PP	57	*/
	58	struct tpiu_drvdata {
	59	void __iomem *base;
	60	struct device *dev;
db341d3d	61	struct clk *atclk;
dc161b9f	62	struct coresight_device *csdev;
dc161b9f PP	63	};
	64
	65	static void tpiu_enable_hw(struct tpiu_drvdata *drvdata)
	66	{
	67	CS_UNLOCK(drvdata->base);
	68
	69	/* TODO: fill this up */
	70
	71	CS_LOCK(drvdata->base);
	72	}
	73
e827d455	74	static int tpiu_enable(struct coresight_device *csdev, u32 mode)
dc161b9f PP	75	{
dc161b9f PP	76	struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
dc161b9f PP	77
	78	tpiu_enable_hw(drvdata);
	79
	80	dev_info(drvdata->dev, "TPIU enabled\n");
	81	return 0;
	82	}
	83
	84	static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
	85	{
	86	CS_UNLOCK(drvdata->base);
	87
	88	/* Clear formatter controle reg. */
	89	writel_relaxed(0x0, drvdata->base + TPIU_FFCR);
	90	/* Generate manual flush */
	91	writel_relaxed(FFCR_FON_MAN, drvdata->base + TPIU_FFCR);
	92
	93	CS_LOCK(drvdata->base);
	94	}
	95
	96	static void tpiu_disable(struct coresight_device *csdev)
	97	{
	98	struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
	99
	100	tpiu_disable_hw(drvdata);
dc161b9f PP	101
	102	dev_info(drvdata->dev, "TPIU disabled\n");
	103	}
	104
	105	static const struct coresight_ops_sink tpiu_sink_ops = {
	106	.enable = tpiu_enable,
	107	.disable = tpiu_disable,
	108	};
	109
	110	static const struct coresight_ops tpiu_cs_ops = {
	111	.sink_ops = &tpiu_sink_ops,
	112	};
	113
	114	static int tpiu_probe(struct amba_device adev, const struct amba_id id)
	115	{
db341d3d	116	int ret;
dc161b9f PP	117	void __iomem *base;
	118	struct device *dev = &adev->dev;
	119	struct coresight_platform_data *pdata = NULL;
	120	struct tpiu_drvdata *drvdata;
	121	struct resource *res = &adev->res;
9486295a	122	struct coresight_desc desc = { 0 };
dc161b9f PP	123	struct device_node *np = adev->dev.of_node;
	124
	125	if (np) {
	126	pdata = of_get_coresight_platform_data(dev, np);
	127	if (IS_ERR(pdata))
	128	return PTR_ERR(pdata);
	129	adev->dev.platform_data = pdata;
	130	}
	131
	132	drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
	133	if (!drvdata)
	134	return -ENOMEM;
	135
	136	drvdata->dev = &adev->dev;
db341d3d LW	137	drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
	138	if (!IS_ERR(drvdata->atclk)) {
	139	ret = clk_prepare_enable(drvdata->atclk);
	140	if (ret)
	141	return ret;
	142	}
dc161b9f PP	143	dev_set_drvdata(dev, drvdata);
	144
	145	/* Validity for the resource is already checked by the AMBA core */
	146	base = devm_ioremap_resource(dev, res);
	147	if (IS_ERR(base))
	148	return PTR_ERR(base);
	149
	150	drvdata->base = base;
	151
dc161b9f PP	152	/* Disable tpiu to support older devices */
	153	tpiu_disable_hw(drvdata);
	154
b5913d64	155	pm_runtime_put(&adev->dev);
dc161b9f	156
9486295a SP	157	desc.type = CORESIGHT_DEV_TYPE_SINK;
	158	desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
	159	desc.ops = &tpiu_cs_ops;
	160	desc.pdata = pdata;
	161	desc.dev = dev;
	162	drvdata->csdev = coresight_register(&desc);
dc161b9f PP	163	if (IS_ERR(drvdata->csdev))
	164	return PTR_ERR(drvdata->csdev);
	165
dc161b9f PP	166	return 0;
	167	}
	168
db341d3d LW	169	#ifdef CONFIG_PM
	170	static int tpiu_runtime_suspend(struct device *dev)
	171	{
	172	struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
	173
	174	if (drvdata && !IS_ERR(drvdata->atclk))
	175	clk_disable_unprepare(drvdata->atclk);
	176
	177	return 0;
	178	}
	179
	180	static int tpiu_runtime_resume(struct device *dev)
	181	{
	182	struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
	183
	184	if (drvdata && !IS_ERR(drvdata->atclk))
	185	clk_prepare_enable(drvdata->atclk);
	186
	187	return 0;
	188	}
	189	#endif
	190
	191	static const struct dev_pm_ops tpiu_dev_pm_ops = {
	192	SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL)
	193	};
	194
dc161b9f PP	195	static struct amba_id tpiu_ids[] = {
	196	{
	197	.id = 0x0003b912,
	198	.mask = 0x0003ffff,
	199	},
4339b699 LW	200	{
	201	.id = 0x0004b912,
	202	.mask = 0x0007ffff,
	203	},
dc161b9f PP	204	{ 0, 0},
	205	};
	206
	207	static struct amba_driver tpiu_driver = {
	208	.drv = {
	209	.name = "coresight-tpiu",
	210	.owner = THIS_MODULE,
db341d3d	211	.pm = &tpiu_dev_pm_ops,
b15f0fb6	212	.suppress_bind_attrs = true,
dc161b9f PP	213	},
dc161b9f PP	214	.probe = tpiu_probe,
dc161b9f PP	215	.id_table = tpiu_ids,
dc161b9f PP	216	};
941943cf	217	builtin_amba_driver(tpiu_driver);