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1da177e4 LT |
1 | /* |
2 | ali15x3.c - Part of lm_sensors, Linux kernel modules for hardware | |
3 | monitoring | |
4 | Copyright (c) 1999 Frodo Looijaard <frodol@dds.nl> and | |
5 | Philip Edelbrock <phil@netroedge.com> and | |
6 | Mark D. Studebaker <mdsxyz123@yahoo.com> | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | /* | |
24 | This is the driver for the SMB Host controller on | |
25 | Acer Labs Inc. (ALI) M1541 and M1543C South Bridges. | |
26 | ||
27 | The M1543C is a South bridge for desktop systems. | |
28 | The M1533 is a South bridge for portable systems. | |
29 | They are part of the following ALI chipsets: | |
30 | "Aladdin Pro 2": Includes the M1621 Slot 1 North bridge | |
31 | with AGP and 100MHz CPU Front Side bus | |
32 | "Aladdin V": Includes the M1541 Socket 7 North bridge | |
33 | with AGP and 100MHz CPU Front Side bus | |
34 | "Aladdin IV": Includes the M1541 Socket 7 North bridge | |
35 | with host bus up to 83.3 MHz. | |
36 | For an overview of these chips see http://www.acerlabs.com | |
37 | ||
38 | The M1533/M1543C devices appear as FOUR separate devices | |
39 | on the PCI bus. An output of lspci will show something similar | |
40 | to the following: | |
41 | ||
42 | 00:02.0 USB Controller: Acer Laboratories Inc. M5237 | |
43 | 00:03.0 Bridge: Acer Laboratories Inc. M7101 | |
44 | 00:07.0 ISA bridge: Acer Laboratories Inc. M1533 | |
45 | 00:0f.0 IDE interface: Acer Laboratories Inc. M5229 | |
46 | ||
47 | The SMB controller is part of the 7101 device, which is an | |
48 | ACPI-compliant Power Management Unit (PMU). | |
49 | ||
50 | The whole 7101 device has to be enabled for the SMB to work. | |
51 | You can't just enable the SMB alone. | |
52 | The SMB and the ACPI have separate I/O spaces. | |
53 | We make sure that the SMB is enabled. We leave the ACPI alone. | |
54 | ||
55 | This driver controls the SMB Host only. | |
56 | The SMB Slave controller on the M15X3 is not enabled. | |
57 | ||
58 | This driver does not use interrupts. | |
59 | */ | |
60 | ||
61 | /* Note: we assume there can only be one ALI15X3, with one SMBus interface */ | |
62 | ||
1da177e4 LT |
63 | #include <linux/module.h> |
64 | #include <linux/pci.h> | |
65 | #include <linux/kernel.h> | |
66 | #include <linux/stddef.h> | |
67 | #include <linux/sched.h> | |
68 | #include <linux/ioport.h> | |
69 | #include <linux/delay.h> | |
70 | #include <linux/i2c.h> | |
71 | #include <linux/init.h> | |
72 | #include <asm/io.h> | |
73 | ||
74 | /* ALI15X3 SMBus address offsets */ | |
75 | #define SMBHSTSTS (0 + ali15x3_smba) | |
76 | #define SMBHSTCNT (1 + ali15x3_smba) | |
77 | #define SMBHSTSTART (2 + ali15x3_smba) | |
78 | #define SMBHSTCMD (7 + ali15x3_smba) | |
79 | #define SMBHSTADD (3 + ali15x3_smba) | |
80 | #define SMBHSTDAT0 (4 + ali15x3_smba) | |
81 | #define SMBHSTDAT1 (5 + ali15x3_smba) | |
82 | #define SMBBLKDAT (6 + ali15x3_smba) | |
83 | ||
84 | /* PCI Address Constants */ | |
85 | #define SMBCOM 0x004 | |
86 | #define SMBBA 0x014 | |
87 | #define SMBATPC 0x05B /* used to unlock xxxBA registers */ | |
88 | #define SMBHSTCFG 0x0E0 | |
89 | #define SMBSLVC 0x0E1 | |
90 | #define SMBCLK 0x0E2 | |
91 | #define SMBREV 0x008 | |
92 | ||
93 | /* Other settings */ | |
94 | #define MAX_TIMEOUT 200 /* times 1/100 sec */ | |
95 | #define ALI15X3_SMB_IOSIZE 32 | |
96 | ||
97 | /* this is what the Award 1004 BIOS sets them to on a ASUS P5A MB. | |
98 | We don't use these here. If the bases aren't set to some value we | |
99 | tell user to upgrade BIOS and we fail. | |
100 | */ | |
101 | #define ALI15X3_SMB_DEFAULTBASE 0xE800 | |
102 | ||
103 | /* ALI15X3 address lock bits */ | |
104 | #define ALI15X3_LOCK 0x06 | |
105 | ||
106 | /* ALI15X3 command constants */ | |
107 | #define ALI15X3_ABORT 0x02 | |
108 | #define ALI15X3_T_OUT 0x04 | |
109 | #define ALI15X3_QUICK 0x00 | |
110 | #define ALI15X3_BYTE 0x10 | |
111 | #define ALI15X3_BYTE_DATA 0x20 | |
112 | #define ALI15X3_WORD_DATA 0x30 | |
113 | #define ALI15X3_BLOCK_DATA 0x40 | |
114 | #define ALI15X3_BLOCK_CLR 0x80 | |
115 | ||
116 | /* ALI15X3 status register bits */ | |
117 | #define ALI15X3_STS_IDLE 0x04 | |
118 | #define ALI15X3_STS_BUSY 0x08 | |
119 | #define ALI15X3_STS_DONE 0x10 | |
120 | #define ALI15X3_STS_DEV 0x20 /* device error */ | |
121 | #define ALI15X3_STS_COLL 0x40 /* collision or no response */ | |
122 | #define ALI15X3_STS_TERM 0x80 /* terminated by abort */ | |
123 | #define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */ | |
124 | ||
125 | ||
126 | /* If force_addr is set to anything different from 0, we forcibly enable | |
127 | the device at the given address. */ | |
60507095 | 128 | static u16 force_addr; |
1da177e4 LT |
129 | module_param(force_addr, ushort, 0); |
130 | MODULE_PARM_DESC(force_addr, | |
131 | "Initialize the base address of the i2c controller"); | |
132 | ||
d6072f84 | 133 | static struct pci_driver ali15x3_driver; |
60507095 | 134 | static unsigned short ali15x3_smba; |
1da177e4 LT |
135 | |
136 | static int ali15x3_setup(struct pci_dev *ALI15X3_dev) | |
137 | { | |
138 | u16 a; | |
139 | unsigned char temp; | |
140 | ||
141 | /* Check the following things: | |
142 | - SMB I/O address is initialized | |
143 | - Device is enabled | |
144 | - We can use the addresses | |
145 | */ | |
146 | ||
147 | /* Unlock the register. | |
148 | The data sheet says that the address registers are read-only | |
149 | if the lock bits are 1, but in fact the address registers | |
150 | are zero unless you clear the lock bits. | |
151 | */ | |
152 | pci_read_config_byte(ALI15X3_dev, SMBATPC, &temp); | |
153 | if (temp & ALI15X3_LOCK) { | |
154 | temp &= ~ALI15X3_LOCK; | |
155 | pci_write_config_byte(ALI15X3_dev, SMBATPC, temp); | |
156 | } | |
157 | ||
158 | /* Determine the address of the SMBus area */ | |
159 | pci_read_config_word(ALI15X3_dev, SMBBA, &ali15x3_smba); | |
160 | ali15x3_smba &= (0xffff & ~(ALI15X3_SMB_IOSIZE - 1)); | |
161 | if (ali15x3_smba == 0 && force_addr == 0) { | |
162 | dev_err(&ALI15X3_dev->dev, "ALI15X3_smb region uninitialized " | |
163 | "- upgrade BIOS or use force_addr=0xaddr\n"); | |
164 | return -ENODEV; | |
165 | } | |
166 | ||
167 | if(force_addr) | |
168 | ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1); | |
169 | ||
d6072f84 JD |
170 | if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE, |
171 | ali15x3_driver.name)) { | |
1da177e4 LT |
172 | dev_err(&ALI15X3_dev->dev, |
173 | "ALI15X3_smb region 0x%x already in use!\n", | |
174 | ali15x3_smba); | |
175 | return -ENODEV; | |
176 | } | |
177 | ||
178 | if(force_addr) { | |
179 | dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n", | |
180 | ali15x3_smba); | |
181 | if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev, | |
182 | SMBBA, | |
183 | ali15x3_smba)) | |
184 | goto error; | |
185 | if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev, | |
186 | SMBBA, &a)) | |
187 | goto error; | |
188 | if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) { | |
189 | /* make sure it works */ | |
190 | dev_err(&ALI15X3_dev->dev, | |
191 | "force address failed - not supported?\n"); | |
192 | goto error; | |
193 | } | |
194 | } | |
195 | /* check if whole device is enabled */ | |
196 | pci_read_config_byte(ALI15X3_dev, SMBCOM, &temp); | |
197 | if ((temp & 1) == 0) { | |
198 | dev_info(&ALI15X3_dev->dev, "enabling SMBus device\n"); | |
199 | pci_write_config_byte(ALI15X3_dev, SMBCOM, temp | 0x01); | |
200 | } | |
201 | ||
202 | /* Is SMB Host controller enabled? */ | |
203 | pci_read_config_byte(ALI15X3_dev, SMBHSTCFG, &temp); | |
204 | if ((temp & 1) == 0) { | |
205 | dev_info(&ALI15X3_dev->dev, "enabling SMBus controller\n"); | |
206 | pci_write_config_byte(ALI15X3_dev, SMBHSTCFG, temp | 0x01); | |
207 | } | |
208 | ||
209 | /* set SMB clock to 74KHz as recommended in data sheet */ | |
210 | pci_write_config_byte(ALI15X3_dev, SMBCLK, 0x20); | |
211 | ||
212 | /* | |
213 | The interrupt routing for SMB is set up in register 0x77 in the | |
214 | 1533 ISA Bridge device, NOT in the 7101 device. | |
215 | Don't bother with finding the 1533 device and reading the register. | |
216 | if ((....... & 0x0F) == 1) | |
217 | dev_dbg(&ALI15X3_dev->dev, "ALI15X3 using Interrupt 9 for SMBus.\n"); | |
218 | */ | |
219 | pci_read_config_byte(ALI15X3_dev, SMBREV, &temp); | |
220 | dev_dbg(&ALI15X3_dev->dev, "SMBREV = 0x%X\n", temp); | |
221 | dev_dbg(&ALI15X3_dev->dev, "iALI15X3_smba = 0x%X\n", ali15x3_smba); | |
222 | ||
223 | return 0; | |
224 | error: | |
225 | release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE); | |
226 | return -ENODEV; | |
227 | } | |
228 | ||
229 | /* Another internally used function */ | |
230 | static int ali15x3_transaction(struct i2c_adapter *adap) | |
231 | { | |
232 | int temp; | |
233 | int result = 0; | |
234 | int timeout = 0; | |
235 | ||
236 | dev_dbg(&adap->dev, "Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, " | |
237 | "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS), | |
238 | inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD), | |
239 | inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1)); | |
240 | ||
241 | /* get status */ | |
242 | temp = inb_p(SMBHSTSTS); | |
243 | ||
244 | /* Make sure the SMBus host is ready to start transmitting */ | |
245 | /* Check the busy bit first */ | |
246 | if (temp & ALI15X3_STS_BUSY) { | |
247 | /* | |
248 | If the host controller is still busy, it may have timed out in the | |
249 | previous transaction, resulting in a "SMBus Timeout" Dev. | |
250 | I've tried the following to reset a stuck busy bit. | |
251 | 1. Reset the controller with an ABORT command. | |
252 | (this doesn't seem to clear the controller if an external | |
253 | device is hung) | |
254 | 2. Reset the controller and the other SMBus devices with a | |
255 | T_OUT command. (this clears the host busy bit if an | |
256 | external device is hung, but it comes back upon a new access | |
257 | to a device) | |
258 | 3. Disable and reenable the controller in SMBHSTCFG | |
259 | Worst case, nothing seems to work except power reset. | |
260 | */ | |
261 | /* Abort - reset the host controller */ | |
262 | /* | |
263 | Try resetting entire SMB bus, including other devices - | |
264 | This may not work either - it clears the BUSY bit but | |
265 | then the BUSY bit may come back on when you try and use the chip again. | |
266 | If that's the case you are stuck. | |
267 | */ | |
268 | dev_info(&adap->dev, "Resetting entire SMB Bus to " | |
269 | "clear busy condition (%02x)\n", temp); | |
270 | outb_p(ALI15X3_T_OUT, SMBHSTCNT); | |
271 | temp = inb_p(SMBHSTSTS); | |
272 | } | |
273 | ||
274 | /* now check the error bits and the busy bit */ | |
275 | if (temp & (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) { | |
276 | /* do a clear-on-write */ | |
277 | outb_p(0xFF, SMBHSTSTS); | |
278 | if ((temp = inb_p(SMBHSTSTS)) & | |
279 | (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) { | |
280 | /* this is probably going to be correctable only by a power reset | |
281 | as one of the bits now appears to be stuck */ | |
282 | /* This may be a bus or device with electrical problems. */ | |
283 | dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - " | |
284 | "controller or device on bus is probably hung\n", | |
285 | temp); | |
286 | return -1; | |
287 | } | |
288 | } else { | |
289 | /* check and clear done bit */ | |
290 | if (temp & ALI15X3_STS_DONE) { | |
291 | outb_p(temp, SMBHSTSTS); | |
292 | } | |
293 | } | |
294 | ||
295 | /* start the transaction by writing anything to the start register */ | |
296 | outb_p(0xFF, SMBHSTSTART); | |
297 | ||
298 | /* We will always wait for a fraction of a second! */ | |
299 | timeout = 0; | |
300 | do { | |
301 | msleep(1); | |
302 | temp = inb_p(SMBHSTSTS); | |
303 | } while ((!(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE))) | |
304 | && (timeout++ < MAX_TIMEOUT)); | |
305 | ||
306 | /* If the SMBus is still busy, we give up */ | |
307 | if (timeout >= MAX_TIMEOUT) { | |
308 | result = -1; | |
309 | dev_err(&adap->dev, "SMBus Timeout!\n"); | |
310 | } | |
311 | ||
312 | if (temp & ALI15X3_STS_TERM) { | |
313 | result = -1; | |
314 | dev_dbg(&adap->dev, "Error: Failed bus transaction\n"); | |
315 | } | |
316 | ||
317 | /* | |
318 | Unfortunately the ALI SMB controller maps "no response" and "bus | |
319 | collision" into a single bit. No reponse is the usual case so don't | |
320 | do a printk. | |
321 | This means that bus collisions go unreported. | |
322 | */ | |
323 | if (temp & ALI15X3_STS_COLL) { | |
324 | result = -1; | |
325 | dev_dbg(&adap->dev, | |
326 | "Error: no response or bus collision ADD=%02x\n", | |
327 | inb_p(SMBHSTADD)); | |
328 | } | |
329 | ||
330 | /* haven't ever seen this */ | |
331 | if (temp & ALI15X3_STS_DEV) { | |
332 | result = -1; | |
333 | dev_err(&adap->dev, "Error: device error\n"); | |
334 | } | |
335 | dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, " | |
336 | "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS), | |
337 | inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD), | |
338 | inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1)); | |
339 | return result; | |
340 | } | |
341 | ||
342 | /* Return -1 on error. */ | |
343 | static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr, | |
344 | unsigned short flags, char read_write, u8 command, | |
345 | int size, union i2c_smbus_data * data) | |
346 | { | |
347 | int i, len; | |
348 | int temp; | |
349 | int timeout; | |
350 | ||
351 | /* clear all the bits (clear-on-write) */ | |
352 | outb_p(0xFF, SMBHSTSTS); | |
353 | /* make sure SMBus is idle */ | |
354 | temp = inb_p(SMBHSTSTS); | |
355 | for (timeout = 0; | |
356 | (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); | |
357 | timeout++) { | |
358 | msleep(1); | |
359 | temp = inb_p(SMBHSTSTS); | |
360 | } | |
361 | if (timeout >= MAX_TIMEOUT) { | |
362 | dev_err(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp); | |
363 | } | |
364 | ||
365 | switch (size) { | |
366 | case I2C_SMBUS_PROC_CALL: | |
367 | dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n"); | |
368 | return -1; | |
369 | case I2C_SMBUS_QUICK: | |
370 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | |
371 | SMBHSTADD); | |
372 | size = ALI15X3_QUICK; | |
373 | break; | |
374 | case I2C_SMBUS_BYTE: | |
375 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | |
376 | SMBHSTADD); | |
377 | if (read_write == I2C_SMBUS_WRITE) | |
378 | outb_p(command, SMBHSTCMD); | |
379 | size = ALI15X3_BYTE; | |
380 | break; | |
381 | case I2C_SMBUS_BYTE_DATA: | |
382 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | |
383 | SMBHSTADD); | |
384 | outb_p(command, SMBHSTCMD); | |
385 | if (read_write == I2C_SMBUS_WRITE) | |
386 | outb_p(data->byte, SMBHSTDAT0); | |
387 | size = ALI15X3_BYTE_DATA; | |
388 | break; | |
389 | case I2C_SMBUS_WORD_DATA: | |
390 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | |
391 | SMBHSTADD); | |
392 | outb_p(command, SMBHSTCMD); | |
393 | if (read_write == I2C_SMBUS_WRITE) { | |
394 | outb_p(data->word & 0xff, SMBHSTDAT0); | |
395 | outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1); | |
396 | } | |
397 | size = ALI15X3_WORD_DATA; | |
398 | break; | |
399 | case I2C_SMBUS_BLOCK_DATA: | |
400 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | |
401 | SMBHSTADD); | |
402 | outb_p(command, SMBHSTCMD); | |
403 | if (read_write == I2C_SMBUS_WRITE) { | |
404 | len = data->block[0]; | |
405 | if (len < 0) { | |
406 | len = 0; | |
407 | data->block[0] = len; | |
408 | } | |
409 | if (len > 32) { | |
410 | len = 32; | |
411 | data->block[0] = len; | |
412 | } | |
413 | outb_p(len, SMBHSTDAT0); | |
414 | /* Reset SMBBLKDAT */ | |
415 | outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT); | |
416 | for (i = 1; i <= len; i++) | |
417 | outb_p(data->block[i], SMBBLKDAT); | |
418 | } | |
419 | size = ALI15X3_BLOCK_DATA; | |
420 | break; | |
421 | } | |
422 | ||
423 | outb_p(size, SMBHSTCNT); /* output command */ | |
424 | ||
425 | if (ali15x3_transaction(adap)) /* Error in transaction */ | |
426 | return -1; | |
427 | ||
428 | if ((read_write == I2C_SMBUS_WRITE) || (size == ALI15X3_QUICK)) | |
429 | return 0; | |
430 | ||
431 | ||
432 | switch (size) { | |
433 | case ALI15X3_BYTE: /* Result put in SMBHSTDAT0 */ | |
434 | data->byte = inb_p(SMBHSTDAT0); | |
435 | break; | |
436 | case ALI15X3_BYTE_DATA: | |
437 | data->byte = inb_p(SMBHSTDAT0); | |
438 | break; | |
439 | case ALI15X3_WORD_DATA: | |
440 | data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8); | |
441 | break; | |
442 | case ALI15X3_BLOCK_DATA: | |
443 | len = inb_p(SMBHSTDAT0); | |
444 | if (len > 32) | |
445 | len = 32; | |
446 | data->block[0] = len; | |
447 | /* Reset SMBBLKDAT */ | |
448 | outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT); | |
449 | for (i = 1; i <= data->block[0]; i++) { | |
450 | data->block[i] = inb_p(SMBBLKDAT); | |
451 | dev_dbg(&adap->dev, "Blk: len=%d, i=%d, data=%02x\n", | |
452 | len, i, data->block[i]); | |
453 | } | |
454 | break; | |
455 | } | |
456 | return 0; | |
457 | } | |
458 | ||
459 | static u32 ali15x3_func(struct i2c_adapter *adapter) | |
460 | { | |
461 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | | |
462 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | | |
463 | I2C_FUNC_SMBUS_BLOCK_DATA; | |
464 | } | |
465 | ||
466 | static struct i2c_algorithm smbus_algorithm = { | |
1da177e4 LT |
467 | .smbus_xfer = ali15x3_access, |
468 | .functionality = ali15x3_func, | |
469 | }; | |
470 | ||
471 | static struct i2c_adapter ali15x3_adapter = { | |
472 | .owner = THIS_MODULE, | |
473 | .class = I2C_CLASS_HWMON, | |
474 | .algo = &smbus_algorithm, | |
1da177e4 LT |
475 | }; |
476 | ||
477 | static struct pci_device_id ali15x3_ids[] = { | |
478 | { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) }, | |
479 | { 0, } | |
480 | }; | |
481 | ||
482 | MODULE_DEVICE_TABLE (pci, ali15x3_ids); | |
483 | ||
484 | static int __devinit ali15x3_probe(struct pci_dev *dev, const struct pci_device_id *id) | |
485 | { | |
486 | if (ali15x3_setup(dev)) { | |
487 | dev_err(&dev->dev, | |
488 | "ALI15X3 not detected, module not inserted.\n"); | |
489 | return -ENODEV; | |
490 | } | |
491 | ||
492 | /* set up the driverfs linkage to our parent device */ | |
493 | ali15x3_adapter.dev.parent = &dev->dev; | |
494 | ||
495 | snprintf(ali15x3_adapter.name, I2C_NAME_SIZE, | |
496 | "SMBus ALI15X3 adapter at %04x", ali15x3_smba); | |
497 | return i2c_add_adapter(&ali15x3_adapter); | |
498 | } | |
499 | ||
500 | static void __devexit ali15x3_remove(struct pci_dev *dev) | |
501 | { | |
502 | i2c_del_adapter(&ali15x3_adapter); | |
503 | release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE); | |
504 | } | |
505 | ||
506 | static struct pci_driver ali15x3_driver = { | |
ccd7aa0c | 507 | .owner = THIS_MODULE, |
1da177e4 LT |
508 | .name = "ali15x3_smbus", |
509 | .id_table = ali15x3_ids, | |
510 | .probe = ali15x3_probe, | |
511 | .remove = __devexit_p(ali15x3_remove), | |
512 | }; | |
513 | ||
514 | static int __init i2c_ali15x3_init(void) | |
515 | { | |
516 | return pci_register_driver(&ali15x3_driver); | |
517 | } | |
518 | ||
519 | static void __exit i2c_ali15x3_exit(void) | |
520 | { | |
521 | pci_unregister_driver(&ali15x3_driver); | |
522 | } | |
523 | ||
524 | MODULE_AUTHOR ("Frodo Looijaard <frodol@dds.nl>, " | |
525 | "Philip Edelbrock <phil@netroedge.com>, " | |
526 | "and Mark D. Studebaker <mdsxyz123@yahoo.com>"); | |
527 | MODULE_DESCRIPTION("ALI15X3 SMBus driver"); | |
528 | MODULE_LICENSE("GPL"); | |
529 | ||
530 | module_init(i2c_ali15x3_init); | |
531 | module_exit(i2c_ali15x3_exit); |