[deliverable/linux.git] / drivers / i2c / busses / i2c-nforce2.c

/*
    SMBus driver for nVidia nForce2 MCP

    Added nForce3 Pro 150  Thomas Leibold <thomas@plx.com>,
	Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
    Copyright (c) 2003  Hans-Frieder Vogt <hfvogt@arcor.de>,
    Based on
    SMBus 2.0 driver for AMD-8111 IO-Hub
    Copyright (c) 2002 Vojtech Pavlik

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

/*
    SUPPORTED DEVICES		PCI ID
    nForce2 MCP			0064
    nForce2 Ultra 400 MCP	0084
    nForce3 Pro150 MCP		00D4
    nForce3 250Gb MCP		00E4
    nForce4 MCP			0052
    nForce4 MCP-04		0034
    nForce MCP51		0264
    nForce MCP55		0368
    nForce MCP61		03EB
    nForce MCP65		0446
    nForce MCP67		0542
    nForce MCP73		07D8
    nForce MCP78S		0752
    nForce MCP79		0AA2

    This driver supports the 2 SMBuses that are included in the MCP of the
    nForce2/3/4/5xx chipsets.
*/

/* Note: we assume there can only be one nForce2, with two SMBus interfaces */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/dmi.h>
#include <linux/acpi.h>
#include <linux/slab.h>
#include <linux/io.h>

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Hans-Frieder Vogt <hfvogt@gmx.net>");
MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");


struct nforce2_smbus {
	struct i2c_adapter adapter;
	int base;
	int size;
	int blockops;
	int can_abort;
};


/*
 * nVidia nForce2 SMBus control register definitions
 * (Newer incarnations use standard BARs 4 and 5 instead)
 */
#define NFORCE_PCI_SMB1	0x50
#define NFORCE_PCI_SMB2	0x54


/*
 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
 */
#define NVIDIA_SMB_PRTCL	(smbus->base + 0x00)	/* protocol, PEC */
#define NVIDIA_SMB_STS		(smbus->base + 0x01)	/* status */
#define NVIDIA_SMB_ADDR		(smbus->base + 0x02)	/* address */
#define NVIDIA_SMB_CMD		(smbus->base + 0x03)	/* command */
#define NVIDIA_SMB_DATA		(smbus->base + 0x04)	/* 32 data registers */
#define NVIDIA_SMB_BCNT		(smbus->base + 0x24)	/* number of data
							   bytes */
#define NVIDIA_SMB_STATUS_ABRT	(smbus->base + 0x3c)	/* register used to
							   check the status of
							   the abort command */
#define NVIDIA_SMB_CTRL		(smbus->base + 0x3e)	/* control register */

#define NVIDIA_SMB_STATUS_ABRT_STS	0x01		/* Bit to notify that
							   abort succeeded */
#define NVIDIA_SMB_CTRL_ABORT	0x20
#define NVIDIA_SMB_STS_DONE	0x80
#define NVIDIA_SMB_STS_ALRM	0x40
#define NVIDIA_SMB_STS_RES	0x20
#define NVIDIA_SMB_STS_STATUS	0x1f

#define NVIDIA_SMB_PRTCL_WRITE			0x00
#define NVIDIA_SMB_PRTCL_READ			0x01
#define NVIDIA_SMB_PRTCL_QUICK			0x02
#define NVIDIA_SMB_PRTCL_BYTE			0x04
#define NVIDIA_SMB_PRTCL_BYTE_DATA		0x06
#define NVIDIA_SMB_PRTCL_WORD_DATA		0x08
#define NVIDIA_SMB_PRTCL_BLOCK_DATA		0x0a
#define NVIDIA_SMB_PRTCL_PEC			0x80

/* Misc definitions */
#define MAX_TIMEOUT	100

/* We disable the second SMBus channel on these boards */
static const struct dmi_system_id nforce2_dmi_blacklist2[] = {
	{
		.ident = "DFI Lanparty NF4 Expert",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"),
			DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"),
		},
	},
	{ }
};

static struct pci_driver nforce2_driver;

/* For multiplexing support, we need a global reference to the 1st
   SMBus channel */
#if defined CONFIG_I2C_NFORCE2_S4985 || defined CONFIG_I2C_NFORCE2_S4985_MODULE
struct i2c_adapter *nforce2_smbus;
EXPORT_SYMBOL_GPL(nforce2_smbus);

static void nforce2_set_reference(struct i2c_adapter *adap)
{
	nforce2_smbus = adap;
}
#else
static inline void nforce2_set_reference(struct i2c_adapter *adap) { }
#endif

static void nforce2_abort(struct i2c_adapter *adap)
{
	struct nforce2_smbus *smbus = adap->algo_data;
	int timeout = 0;
	unsigned char temp;

	dev_dbg(&adap->dev, "Aborting current transaction\n");

	outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL);
	do {
		msleep(1);
		temp = inb_p(NVIDIA_SMB_STATUS_ABRT);
	} while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) &&
			(timeout++ < MAX_TIMEOUT));
	if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS))
		dev_err(&adap->dev, "Can't reset the smbus\n");
	outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT);
}

static int nforce2_check_status(struct i2c_adapter *adap)
{
	struct nforce2_smbus *smbus = adap->algo_data;
	int timeout = 0;
	unsigned char temp;

	do {
		msleep(1);
		temp = inb_p(NVIDIA_SMB_STS);
	} while ((!temp) && (timeout++ < MAX_TIMEOUT));

	if (timeout > MAX_TIMEOUT) {
		dev_dbg(&adap->dev, "SMBus Timeout!\n");
		if (smbus->can_abort)
			nforce2_abort(adap);
		return -ETIMEDOUT;
	}
	if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
		dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
		return -EIO;
	}
	return 0;
}

/* Return negative errno on error */
static s32 nforce2_access(struct i2c_adapter *adap, u16 addr,
		unsigned short flags, char read_write,
		u8 command, int size, union i2c_smbus_data *data)
{
	struct nforce2_smbus *smbus = adap->algo_data;
	unsigned char protocol, pec;
	u8 len;
	int i, status;

	protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
		NVIDIA_SMB_PRTCL_WRITE;
	pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;

	switch (size) {
	case I2C_SMBUS_QUICK:
		protocol |= NVIDIA_SMB_PRTCL_QUICK;
		read_write = I2C_SMBUS_WRITE;
		break;

	case I2C_SMBUS_BYTE:
		if (read_write == I2C_SMBUS_WRITE)
			outb_p(command, NVIDIA_SMB_CMD);
		protocol |= NVIDIA_SMB_PRTCL_BYTE;
		break;

	case I2C_SMBUS_BYTE_DATA:
		outb_p(command, NVIDIA_SMB_CMD);
		if (read_write == I2C_SMBUS_WRITE)
			outb_p(data->byte, NVIDIA_SMB_DATA);
		protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
		break;

	case I2C_SMBUS_WORD_DATA:
		outb_p(command, NVIDIA_SMB_CMD);
		if (read_write == I2C_SMBUS_WRITE) {
			outb_p(data->word, NVIDIA_SMB_DATA);
			outb_p(data->word >> 8, NVIDIA_SMB_DATA + 1);
		}
		protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
		break;

	case I2C_SMBUS_BLOCK_DATA:
		outb_p(command, NVIDIA_SMB_CMD);
		if (read_write == I2C_SMBUS_WRITE) {
			len = data->block[0];
			if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
				dev_err(&adap->dev,
					"Transaction failed (requested block size: %d)\n",
					len);
				return -EINVAL;
			}
			outb_p(len, NVIDIA_SMB_BCNT);
			for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
				outb_p(data->block[i + 1],
				       NVIDIA_SMB_DATA + i);
		}
		protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
		break;

	default:
		dev_err(&adap->dev, "Unsupported transaction %d\n", size);
		return -EOPNOTSUPP;
	}

	outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
	outb_p(protocol, NVIDIA_SMB_PRTCL);

	status = nforce2_check_status(adap);
	if (status)
		return status;

	if (read_write == I2C_SMBUS_WRITE)
		return 0;

	switch (size) {
	case I2C_SMBUS_BYTE:
	case I2C_SMBUS_BYTE_DATA:
		data->byte = inb_p(NVIDIA_SMB_DATA);
		break;

	case I2C_SMBUS_WORD_DATA:
		data->word = inb_p(NVIDIA_SMB_DATA) |
			     (inb_p(NVIDIA_SMB_DATA + 1) << 8);
		break;

	case I2C_SMBUS_BLOCK_DATA:
		len = inb_p(NVIDIA_SMB_BCNT);
		if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
			dev_err(&adap->dev,
				"Transaction failed (received block size: 0x%02x)\n",
				len);
			return -EPROTO;
		}
		for (i = 0; i < len; i++)
			data->block[i + 1] = inb_p(NVIDIA_SMB_DATA + i);
		data->block[0] = len;
		break;
	}

	return 0;
}


static u32 nforce2_func(struct i2c_adapter *adapter)
{
	/* other functionality might be possible, but is not tested */
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	       I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
	       I2C_FUNC_SMBUS_PEC |
	       (((struct nforce2_smbus *)adapter->algo_data)->blockops ?
		I2C_FUNC_SMBUS_BLOCK_DATA : 0);
}

static struct i2c_algorithm smbus_algorithm = {
	.smbus_xfer	= nforce2_access,
	.functionality	= nforce2_func,
};


static const struct pci_device_id nforce2_ids[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS) },
	{ 0 }
};

MODULE_DEVICE_TABLE(pci, nforce2_ids);


static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg,
			     struct nforce2_smbus *smbus, const char *name)
{
	int error;

	smbus->base = pci_resource_start(dev, bar);
	if (smbus->base) {
		smbus->size = pci_resource_len(dev, bar);
	} else {
		/* Older incarnations of the device used non-standard BARs */
		u16 iobase;

		if (pci_read_config_word(dev, alt_reg, &iobase)
		    != PCIBIOS_SUCCESSFUL) {
			dev_err(&dev->dev, "Error reading PCI config for %s\n",
				name);
			return -EIO;
		}

		smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
		smbus->size = 64;
	}

	error = acpi_check_region(smbus->base, smbus->size,
				  nforce2_driver.name);
	if (error)
		return error;

	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
		dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
			smbus->base, smbus->base+smbus->size-1, name);
		return -EBUSY;
	}
	smbus->adapter.owner = THIS_MODULE;
	smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
	smbus->adapter.algo = &smbus_algorithm;
	smbus->adapter.algo_data = smbus;
	smbus->adapter.dev.parent = &dev->dev;
	snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
		"SMBus nForce2 adapter at %04x", smbus->base);

	error = i2c_add_adapter(&smbus->adapter);
	if (error) {
		dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
		release_region(smbus->base, smbus->size);
		return error;
	}
	dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n",
		smbus->base);
	return 0;
}


static int nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	struct nforce2_smbus *smbuses;
	int res1, res2;

	/* we support 2 SMBus adapters */
	smbuses = kzalloc(2 * sizeof(struct nforce2_smbus), GFP_KERNEL);
	if (!smbuses)
		return -ENOMEM;
	pci_set_drvdata(dev, smbuses);

	switch (dev->device) {
	case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS:
	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
		smbuses[0].blockops = 1;
		smbuses[1].blockops = 1;
		smbuses[0].can_abort = 1;
		smbuses[1].can_abort = 1;
	}

	/* SMBus adapter 1 */
	res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
	if (res1 < 0)
		smbuses[0].base = 0;	/* to have a check value */

	/* SMBus adapter 2 */
	if (dmi_check_system(nforce2_dmi_blacklist2)) {
		dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n");
		res2 = -EPERM;
		smbuses[1].base = 0;
	} else {
		res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1],
					 "SMB2");
		if (res2 < 0)
			smbuses[1].base = 0;	/* to have a check value */
	}

	if ((res1 < 0) && (res2 < 0)) {
		/* we did not find even one of the SMBuses, so we give up */
		kfree(smbuses);
		return -ENODEV;
	}

	nforce2_set_reference(&smbuses[0].adapter);
	return 0;
}


static void nforce2_remove(struct pci_dev *dev)
{
	struct nforce2_smbus *smbuses = pci_get_drvdata(dev);

	nforce2_set_reference(NULL);
	if (smbuses[0].base) {
		i2c_del_adapter(&smbuses[0].adapter);
		release_region(smbuses[0].base, smbuses[0].size);
	}
	if (smbuses[1].base) {
		i2c_del_adapter(&smbuses[1].adapter);
		release_region(smbuses[1].base, smbuses[1].size);
	}
	kfree(smbuses);
}

static struct pci_driver nforce2_driver = {
	.name		= "nForce2_smbus",
	.id_table	= nforce2_ids,
	.probe		= nforce2_probe,
	.remove		= nforce2_remove,
};

module_pci_driver(nforce2_driver);
Commit	Line	Data
1da177e4 LT	1	/*
	2	SMBus driver for nVidia nForce2 MCP
	3
	4	Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>,
	5	Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
	6	Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
	7	Based on
	8	SMBus 2.0 driver for AMD-8111 IO-Hub
	9	Copyright (c) 2002 Vojtech Pavlik
	10
	11	This program is free software; you can redistribute it and/or modify
	12	it under the terms of the GNU General Public License as published by
	13	the Free Software Foundation; either version 2 of the License, or
	14	(at your option) any later version.
	15
	16	This program is distributed in the hope that it will be useful,
	17	but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	GNU General Public License for more details.
	20
	21	You should have received a copy of the GNU General Public License
	22	along with this program; if not, write to the Free Software
	23	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	24	*/
	25
	26	/*
	27	SUPPORTED DEVICES PCI ID
	28	nForce2 MCP 0064
	29	nForce2 Ultra 400 MCP 0084
	30	nForce3 Pro150 MCP 00D4
	31	nForce3 250Gb MCP 00E4
	32	nForce4 MCP 0052
7c72ccf0	33	nForce4 MCP-04 0034
d2dd14ac JD	34	nForce MCP51 0264
d2dd14ac JD	35	nForce MCP55 0368
f75803de JD	36	nForce MCP61 03EB
f75803de JD	37	nForce MCP65 0446
d2dd14ac JD	38	nForce MCP67 0542
	39	nForce MCP73 07D8
	40	nForce MCP78S 0752
	41	nForce MCP79 0AA2
1da177e4 LT	42
1da177e4 LT	43	This driver supports the 2 SMBuses that are included in the MCP of the
ad04d5c3	44	nForce2/3/4/5xx chipsets.
1da177e4 LT	45	*/
	46
	47	/* Note: we assume there can only be one nForce2, with two SMBus interfaces */
	48
1da177e4 LT	49	#include <linux/module.h>
	50	#include <linux/pci.h>
	51	#include <linux/kernel.h>
	52	#include <linux/stddef.h>
1da177e4	53	#include <linux/ioport.h>
1da177e4 LT	54	#include <linux/i2c.h>
1da177e4 LT	55	#include <linux/delay.h>
08851d6e	56	#include <linux/dmi.h>
54fb4a05	57	#include <linux/acpi.h>
5a0e3ad6	58	#include <linux/slab.h>
21782180	59	#include <linux/io.h>
1da177e4 LT	60
1da177e4 LT	61	MODULE_LICENSE("GPL");
5c38dc89	62	MODULE_AUTHOR("Hans-Frieder Vogt <hfvogt@gmx.net>");
ad04d5c3	63	MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
1da177e4 LT	64
	65
	66	struct nforce2_smbus {
1da177e4 LT	67	struct i2c_adapter adapter;
	68	int base;
	69	int size;
b53c8221	70	int blockops;
d49584c4	71	int can_abort;
1da177e4 LT	72	};
	73
	74
	75	/*
	76	* nVidia nForce2 SMBus control register definitions
5c7ae658	77	* (Newer incarnations use standard BARs 4 and 5 instead)
1da177e4 LT	78	*/
	79	#define NFORCE_PCI_SMB1 0x50
	80	#define NFORCE_PCI_SMB2 0x54
	81
	82
	83	/*
	84	* ACPI 2.0 chapter 13 SMBus 2.0 EC register model
	85	*/
	86	#define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
	87	#define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
	88	#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
	89	#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
	90	#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
b53c8221 OR	91	#define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data
b53c8221 OR	92	bytes */
d49584c4 OR	93	#define NVIDIA_SMB_STATUS_ABRT (smbus->base + 0x3c) /* register used to
	94	check the status of
	95	the abort command */
	96	#define NVIDIA_SMB_CTRL (smbus->base + 0x3e) /* control register */
	97
	98	#define NVIDIA_SMB_STATUS_ABRT_STS 0x01 /* Bit to notify that
	99	abort succeeded */
	100	#define NVIDIA_SMB_CTRL_ABORT 0x20
1da177e4 LT	101	#define NVIDIA_SMB_STS_DONE 0x80
	102	#define NVIDIA_SMB_STS_ALRM 0x40
	103	#define NVIDIA_SMB_STS_RES 0x20
	104	#define NVIDIA_SMB_STS_STATUS 0x1f
	105
	106	#define NVIDIA_SMB_PRTCL_WRITE 0x00
	107	#define NVIDIA_SMB_PRTCL_READ 0x01
	108	#define NVIDIA_SMB_PRTCL_QUICK 0x02
	109	#define NVIDIA_SMB_PRTCL_BYTE 0x04
	110	#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
	111	#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
b53c8221	112	#define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
1da177e4 LT	113	#define NVIDIA_SMB_PRTCL_PEC 0x80
1da177e4 LT	114
41535497 OR	115	/* Misc definitions */
	116	#define MAX_TIMEOUT 100
	117
08851d6e	118	/* We disable the second SMBus channel on these boards */
0b255e92	119	static const struct dmi_system_id nforce2_dmi_blacklist2[] = {
08851d6e JD	120	{
	121	.ident = "DFI Lanparty NF4 Expert",
	122	.matches = {
	123	DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"),
	124	DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"),
	125	},
	126	},
	127	{ }
	128	};
	129
d6072f84	130	static struct pci_driver nforce2_driver;
1da177e4	131
279e9024 JD	132	/* For multiplexing support, we need a global reference to the 1st
	133	SMBus channel */
	134	#if defined CONFIG_I2C_NFORCE2_S4985 \|\| defined CONFIG_I2C_NFORCE2_S4985_MODULE
	135	struct i2c_adapter *nforce2_smbus;
	136	EXPORT_SYMBOL_GPL(nforce2_smbus);
	137
	138	static void nforce2_set_reference(struct i2c_adapter *adap)
	139	{
	140	nforce2_smbus = adap;
	141	}
	142	#else
	143	static inline void nforce2_set_reference(struct i2c_adapter *adap) { }
	144	#endif
	145
d49584c4 OR	146	static void nforce2_abort(struct i2c_adapter *adap)
	147	{
	148	struct nforce2_smbus *smbus = adap->algo_data;
	149	int timeout = 0;
	150	unsigned char temp;
	151
	152	dev_dbg(&adap->dev, "Aborting current transaction\n");
	153
	154	outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL);
	155	do {
	156	msleep(1);
	157	temp = inb_p(NVIDIA_SMB_STATUS_ABRT);
	158	} while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) &&
	159	(timeout++ < MAX_TIMEOUT));
	160	if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS))
	161	dev_err(&adap->dev, "Can't reset the smbus\n");
	162	outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT);
	163	}
	164
41535497 OR	165	static int nforce2_check_status(struct i2c_adapter *adap)
	166	{
	167	struct nforce2_smbus *smbus = adap->algo_data;
	168	int timeout = 0;
	169	unsigned char temp;
	170
	171	do {
	172	msleep(1);
	173	temp = inb_p(NVIDIA_SMB_STS);
	174	} while ((!temp) && (timeout++ < MAX_TIMEOUT));
	175
4ccc28f7	176	if (timeout > MAX_TIMEOUT) {
41535497	177	dev_dbg(&adap->dev, "SMBus Timeout!\n");
d49584c4 OR	178	if (smbus->can_abort)
d49584c4 OR	179	nforce2_abort(adap);
97140342	180	return -ETIMEDOUT;
41535497 OR	181	}
	182	if (!(temp & NVIDIA_SMB_STS_DONE) \|\| (temp & NVIDIA_SMB_STS_STATUS)) {
	183	dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
97140342	184	return -EIO;
41535497 OR	185	}
	186	return 0;
	187	}
	188
97140342	189	/* Return negative errno on error */
5c38dc89	190	static s32 nforce2_access(struct i2c_adapter *adap, u16 addr,
1da177e4	191	unsigned short flags, char read_write,
5c38dc89	192	u8 command, int size, union i2c_smbus_data *data)
1da177e4 LT	193	{
1da177e4 LT	194	struct nforce2_smbus *smbus = adap->algo_data;
41535497	195	unsigned char protocol, pec;
b53c8221	196	u8 len;
97140342	197	int i, status;
1da177e4 LT	198
	199	protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
	200	NVIDIA_SMB_PRTCL_WRITE;
	201	pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
	202
	203	switch (size) {
5c38dc89 LN	204	case I2C_SMBUS_QUICK:
	205	protocol \|= NVIDIA_SMB_PRTCL_QUICK;
	206	read_write = I2C_SMBUS_WRITE;
	207	break;
1da177e4	208
5c38dc89 LN	209	case I2C_SMBUS_BYTE:
5c38dc89 LN	210	if (read_write == I2C_SMBUS_WRITE)
1da177e4	211	outb_p(command, NVIDIA_SMB_CMD);
5c38dc89 LN	212	protocol \|= NVIDIA_SMB_PRTCL_BYTE;
	213	break;
	214
	215	case I2C_SMBUS_BYTE_DATA:
	216	outb_p(command, NVIDIA_SMB_CMD);
	217	if (read_write == I2C_SMBUS_WRITE)
	218	outb_p(data->byte, NVIDIA_SMB_DATA);
	219	protocol \|= NVIDIA_SMB_PRTCL_BYTE_DATA;
	220	break;
	221
	222	case I2C_SMBUS_WORD_DATA:
	223	outb_p(command, NVIDIA_SMB_CMD);
	224	if (read_write == I2C_SMBUS_WRITE) {
	225	outb_p(data->word, NVIDIA_SMB_DATA);
	226	outb_p(data->word >> 8, NVIDIA_SMB_DATA + 1);
	227	}
	228	protocol \|= NVIDIA_SMB_PRTCL_WORD_DATA \| pec;
	229	break;
	230
	231	case I2C_SMBUS_BLOCK_DATA:
	232	outb_p(command, NVIDIA_SMB_CMD);
	233	if (read_write == I2C_SMBUS_WRITE) {
	234	len = data->block[0];
	235	if ((len == 0) \|\| (len > I2C_SMBUS_BLOCK_MAX)) {
	236	dev_err(&adap->dev,
	237	"Transaction failed (requested block size: %d)\n",
	238	len);
	239	return -EINVAL;
b53c8221	240	}
5c38dc89 LN	241	outb_p(len, NVIDIA_SMB_BCNT);
	242	for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
	243	outb_p(data->block[i + 1],
	244	NVIDIA_SMB_DATA + i);
	245	}
	246	protocol \|= NVIDIA_SMB_PRTCL_BLOCK_DATA \| pec;
	247	break;
b53c8221	248
5c38dc89 LN	249	default:
	250	dev_err(&adap->dev, "Unsupported transaction %d\n", size);
	251	return -EOPNOTSUPP;
1da177e4 LT	252	}
	253
	254	outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
	255	outb_p(protocol, NVIDIA_SMB_PRTCL);
	256
97140342 DB	257	status = nforce2_check_status(adap);
	258	if (status)
	259	return status;
1da177e4 LT	260
	261	if (read_write == I2C_SMBUS_WRITE)
	262	return 0;
	263
	264	switch (size) {
5c38dc89 LN	265	case I2C_SMBUS_BYTE:
	266	case I2C_SMBUS_BYTE_DATA:
	267	data->byte = inb_p(NVIDIA_SMB_DATA);
	268	break;
	269
	270	case I2C_SMBUS_WORD_DATA:
	271	data->word = inb_p(NVIDIA_SMB_DATA) \|
	272	(inb_p(NVIDIA_SMB_DATA + 1) << 8);
	273	break;
	274
	275	case I2C_SMBUS_BLOCK_DATA:
	276	len = inb_p(NVIDIA_SMB_BCNT);
	277	if ((len <= 0) \|\| (len > I2C_SMBUS_BLOCK_MAX)) {
	278	dev_err(&adap->dev,
	279	"Transaction failed (received block size: 0x%02x)\n",
	280	len);
	281	return -EPROTO;
	282	}
	283	for (i = 0; i < len; i++)
	284	data->block[i + 1] = inb_p(NVIDIA_SMB_DATA + i);
	285	data->block[0] = len;
	286	break;
1da177e4 LT	287	}
	288
	289	return 0;
	290	}
	291
	292
	293	static u32 nforce2_func(struct i2c_adapter *adapter)
	294	{
	295	/* other functionality might be possible, but is not tested */
	296	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
b53c8221	297	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
ac3f5753	298	I2C_FUNC_SMBUS_PEC \|
5c38dc89	299	(((struct nforce2_smbus *)adapter->algo_data)->blockops ?
b53c8221	300	I2C_FUNC_SMBUS_BLOCK_DATA : 0);
1da177e4 LT	301	}
1da177e4 LT	302
ad04d5c3 HFV	303	static struct i2c_algorithm smbus_algorithm = {
	304	.smbus_xfer = nforce2_access,
	305	.functionality = nforce2_func,
	306	};
	307
1da177e4	308
392debf1	309	static const struct pci_device_id nforce2_ids[] = {
1da177e4 LT	310	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
	311	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
	312	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
	313	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
	314	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
7c72ccf0	315	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
5c7ae658 JD	316	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
5c7ae658 JD	317	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
f75803de JD	318	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
f75803de JD	319	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
d2dd14ac JD	320	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS) },
	321	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS) },
	322	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS) },
	323	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS) },
1da177e4 LT	324	{ 0 }
	325	};
	326
5c38dc89	327	MODULE_DEVICE_TABLE(pci, nforce2_ids);
1da177e4 LT	328
1da177e4 LT	329
0b255e92 BP	330	static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg,
0b255e92 BP	331	struct nforce2_smbus smbus, const char name)
1da177e4	332	{
1da177e4 LT	333	int error;
1da177e4 LT	334
5c7ae658 JD	335	smbus->base = pci_resource_start(dev, bar);
	336	if (smbus->base) {
	337	smbus->size = pci_resource_len(dev, bar);
	338	} else {
	339	/* Older incarnations of the device used non-standard BARs */
	340	u16 iobase;
	341
	342	if (pci_read_config_word(dev, alt_reg, &iobase)
	343	!= PCIBIOS_SUCCESSFUL) {
	344	dev_err(&dev->dev, "Error reading PCI config for %s\n",
	345	name);
97140342	346	return -EIO;
5c7ae658 JD	347	}
	348
	349	smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
ad04d5c3	350	smbus->size = 64;
1da177e4	351	}
1da177e4	352
54fb4a05 JD	353	error = acpi_check_region(smbus->base, smbus->size,
	354	nforce2_driver.name);
	355	if (error)
7c1f59c9	356	return error;
54fb4a05	357
d6072f84	358	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
1da177e4 LT	359	dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
1da177e4 LT	360	smbus->base, smbus->base+smbus->size-1, name);
97140342	361	return -EBUSY;
1da177e4	362	}
ad04d5c3	363	smbus->adapter.owner = THIS_MODULE;
3401b2ff	364	smbus->adapter.class = I2C_CLASS_HWMON \| I2C_CLASS_SPD;
ad04d5c3	365	smbus->adapter.algo = &smbus_algorithm;
1da177e4 LT	366	smbus->adapter.algo_data = smbus;
1da177e4 LT	367	smbus->adapter.dev.parent = &dev->dev;
2096b956	368	snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
1da177e4 LT	369	"SMBus nForce2 adapter at %04x", smbus->base);
	370
	371	error = i2c_add_adapter(&smbus->adapter);
	372	if (error) {
	373	dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
	374	release_region(smbus->base, smbus->size);
97140342	375	return error;
1da177e4	376	}
5c38dc89 LN	377	dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n",
5c38dc89 LN	378	smbus->base);
1da177e4 LT	379	return 0;
	380	}
	381
	382
0b255e92	383	static int nforce2_probe(struct pci_dev dev, const struct pci_device_id id)
1da177e4 LT	384	{
	385	struct nforce2_smbus *smbuses;
	386	int res1, res2;
	387
	388	/* we support 2 SMBus adapters */
5c38dc89 LN	389	smbuses = kzalloc(2 * sizeof(struct nforce2_smbus), GFP_KERNEL);
5c38dc89 LN	390	if (!smbuses)
1da177e4	391	return -ENOMEM;
1da177e4 LT	392	pci_set_drvdata(dev, smbuses);
1da177e4 LT	393
5c38dc89	394	switch (dev->device) {
541b6a7a	395	case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS:
b53c8221 OR	396	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
	397	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
	398	smbuses[0].blockops = 1;
	399	smbuses[1].blockops = 1;
d49584c4 OR	400	smbuses[0].can_abort = 1;
d49584c4 OR	401	smbuses[1].can_abort = 1;
b53c8221 OR	402	}
b53c8221 OR	403
1da177e4	404	/* SMBus adapter 1 */
5c7ae658	405	res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
7c4fda1a	406	if (res1 < 0)
1da177e4	407	smbuses[0].base = 0; /* to have a check value */
7c4fda1a	408
5c7ae658	409	/* SMBus adapter 2 */
08851d6e JD	410	if (dmi_check_system(nforce2_dmi_blacklist2)) {
	411	dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n");
	412	res2 = -EPERM;
	413	smbuses[1].base = 0;
	414	} else {
	415	res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1],
	416	"SMB2");
7c4fda1a	417	if (res2 < 0)
08851d6e	418	smbuses[1].base = 0; /* to have a check value */
1da177e4	419	}
7c4fda1a	420
1da177e4 LT	421	if ((res1 < 0) && (res2 < 0)) {
	422	/* we did not find even one of the SMBuses, so we give up */
	423	kfree(smbuses);
	424	return -ENODEV;
	425	}
	426
279e9024	427	nforce2_set_reference(&smbuses[0].adapter);
1da177e4 LT	428	return 0;
	429	}
	430
	431
0b255e92	432	static void nforce2_remove(struct pci_dev *dev)
1da177e4	433	{
b18a5c80	434	struct nforce2_smbus *smbuses = pci_get_drvdata(dev);
1da177e4	435
279e9024	436	nforce2_set_reference(NULL);
1da177e4 LT	437	if (smbuses[0].base) {
	438	i2c_del_adapter(&smbuses[0].adapter);
	439	release_region(smbuses[0].base, smbuses[0].size);
	440	}
	441	if (smbuses[1].base) {
	442	i2c_del_adapter(&smbuses[1].adapter);
	443	release_region(smbuses[1].base, smbuses[1].size);
	444	}
	445	kfree(smbuses);
	446	}
	447
	448	static struct pci_driver nforce2_driver = {
	449	.name = "nForce2_smbus",
	450	.id_table = nforce2_ids,
	451	.probe = nforce2_probe,
0b255e92	452	.remove = nforce2_remove,
1da177e4 LT	453	};
1da177e4 LT	454
56f21788	455	module_pci_driver(nforce2_driver);