Merge branch 'tracing-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / drivers / i2c / busses / i2c-powermac.c
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1/*
2 i2c Support for Apple SMU Controller
3
4 Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp.
5 <benh@kernel.crashing.org>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20
21*/
22
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23#include <linux/module.h>
24#include <linux/kernel.h>
25#include <linux/types.h>
26#include <linux/i2c.h>
27#include <linux/init.h>
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28#include <linux/device.h>
29#include <linux/platform_device.h>
30#include <asm/prom.h>
31#include <asm/pmac_low_i2c.h>
32
33MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
34MODULE_DESCRIPTION("I2C driver for Apple PowerMac");
35MODULE_LICENSE("GPL");
36
37/*
38 * SMBUS-type transfer entrypoint
39 */
40static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap,
41 u16 addr,
42 unsigned short flags,
43 char read_write,
44 u8 command,
45 int size,
46 union i2c_smbus_data* data)
47{
48 struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
49 int rc = 0;
50 int read = (read_write == I2C_SMBUS_READ);
51 int addrdir = (addr << 1) | read;
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52 int mode, subsize, len;
53 u32 subaddr;
54 u8 *buf;
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55 u8 local[2];
56
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57 if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE) {
58 mode = pmac_i2c_mode_std;
59 subsize = 0;
60 subaddr = 0;
61 } else {
62 mode = read ? pmac_i2c_mode_combined : pmac_i2c_mode_stdsub;
63 subsize = 1;
64 subaddr = command;
65 }
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66
67 switch (size) {
68 case I2C_SMBUS_QUICK:
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69 buf = NULL;
70 len = 0;
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71 break;
72 case I2C_SMBUS_BYTE:
a28d3af2 73 case I2C_SMBUS_BYTE_DATA:
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74 buf = &data->byte;
75 len = 1;
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76 break;
77 case I2C_SMBUS_WORD_DATA:
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78 if (!read) {
79 local[0] = data->word & 0xff;
80 local[1] = (data->word >> 8) & 0xff;
81 }
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82 buf = local;
83 len = 2;
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84 break;
85
86 /* Note that these are broken vs. the expected smbus API where
96acafe0 87 * on reads, the length is actually returned from the function,
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88 * but I think the current API makes no sense and I don't want
89 * any driver that I haven't verified for correctness to go
90 * anywhere near a pmac i2c bus anyway ...
91 *
92 * I'm also not completely sure what kind of phases to do between
93 * the actual command and the data (what I am _supposed_ to do that
94 * is). For now, I assume writes are a single stream and reads have
95 * a repeat start/addr phase (but not stop in between)
96 */
97 case I2C_SMBUS_BLOCK_DATA:
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98 buf = data->block;
99 len = data->block[0] + 1;
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100 break;
101 case I2C_SMBUS_I2C_BLOCK_DATA:
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102 buf = &data->block[1];
103 len = data->block[0];
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104 break;
105
106 default:
02864d58 107 return -EINVAL;
a28d3af2 108 }
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109
110 rc = pmac_i2c_open(bus, 0);
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111 if (rc) {
112 dev_err(&adap->dev, "Failed to open I2C, err %d\n", rc);
02864d58 113 return rc;
d7d838a6 114 }
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115
116 rc = pmac_i2c_setmode(bus, mode);
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117 if (rc) {
118 dev_err(&adap->dev, "Failed to set I2C mode %d, err %d\n",
119 mode, rc);
02864d58 120 goto bail;
d7d838a6 121 }
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122
123 rc = pmac_i2c_xfer(bus, addrdir, subsize, subaddr, buf, len);
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124 if (rc) {
125 dev_err(&adap->dev,
126 "I2C transfer at 0x%02x failed, size %d, err %d\n",
127 addrdir >> 1, size, rc);
02864d58 128 goto bail;
d7d838a6 129 }
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130
131 if (size == I2C_SMBUS_WORD_DATA && read) {
132 data->word = ((u16)local[1]) << 8;
133 data->word |= local[0];
134 }
135
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136 bail:
137 pmac_i2c_close(bus);
138 return rc;
139}
140
141/*
142 * Generic i2c master transfer entrypoint. This driver only support single
143 * messages (for "lame i2c" transfers). Anything else should use the smbus
144 * entry point
145 */
146static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
147 struct i2c_msg *msgs,
148 int num)
149{
150 struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
151 int rc = 0;
152 int read;
153 int addrdir;
154
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155 if (num != 1) {
156 dev_err(&adap->dev,
157 "Multi-message I2C transactions not supported\n");
158 return -EOPNOTSUPP;
159 }
160
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161 if (msgs->flags & I2C_M_TEN)
162 return -EINVAL;
163 read = (msgs->flags & I2C_M_RD) != 0;
164 addrdir = (msgs->addr << 1) | read;
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165
166 rc = pmac_i2c_open(bus, 0);
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167 if (rc) {
168 dev_err(&adap->dev, "Failed to open I2C, err %d\n", rc);
a28d3af2 169 return rc;
d7d838a6 170 }
a28d3af2 171 rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
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172 if (rc) {
173 dev_err(&adap->dev, "Failed to set I2C mode %d, err %d\n",
174 pmac_i2c_mode_std, rc);
a28d3af2 175 goto bail;
d7d838a6 176 }
a28d3af2 177 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
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178 if (rc < 0)
179 dev_err(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
180 addrdir & 1 ? "read from" : "write to", addrdir >> 1,
181 rc);
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182 bail:
183 pmac_i2c_close(bus);
8ced8eee 184 return rc < 0 ? rc : 1;
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185}
186
187static u32 i2c_powermac_func(struct i2c_adapter * adapter)
188{
189 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
190 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
191 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_I2C;
192}
193
194/* For now, we only handle smbus */
8f9082c5 195static const struct i2c_algorithm i2c_powermac_algorithm = {
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196 .smbus_xfer = i2c_powermac_smbus_xfer,
197 .master_xfer = i2c_powermac_master_xfer,
198 .functionality = i2c_powermac_func,
199};
200
201
4ebb52d3 202static int __devexit i2c_powermac_remove(struct platform_device *dev)
a28d3af2 203{
9f2545c1 204 struct i2c_adapter *adapter = platform_get_drvdata(dev);
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205 int rc;
206
207 rc = i2c_del_adapter(adapter);
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208 /* We aren't that prepared to deal with this... */
209 if (rc)
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210 printk(KERN_WARNING
211 "i2c-powermac.c: Failed to remove bus %s !\n",
a28d3af2 212 adapter->name);
9f2545c1 213 platform_set_drvdata(dev, NULL);
6dfa5ca3 214 memset(adapter, 0, sizeof(*adapter));
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215
216 return 0;
217}
218
219
4ebb52d3 220static int __devinit i2c_powermac_probe(struct platform_device *dev)
a28d3af2 221{
9f2545c1 222 struct pmac_i2c_bus *bus = dev->dev.platform_data;
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223 struct device_node *parent = NULL;
224 struct i2c_adapter *adapter;
018a3d1d 225 const char *basename;
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226 int rc;
227
228 if (bus == NULL)
229 return -EINVAL;
bc6286e5 230 adapter = pmac_i2c_get_adapter(bus);
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231
232 /* Ok, now we need to make up a name for the interface that will
233 * match what we used to do in the past, that is basically the
234 * controller's parent device node for keywest. PMU didn't have a
235 * naming convention and SMU has a different one
236 */
237 switch(pmac_i2c_get_type(bus)) {
238 case pmac_i2c_bus_keywest:
239 parent = of_get_parent(pmac_i2c_get_controller(bus));
240 if (parent == NULL)
241 return -EINVAL;
242 basename = parent->name;
243 break;
244 case pmac_i2c_bus_pmu:
245 basename = "pmu";
246 break;
247 case pmac_i2c_bus_smu:
248 /* This is not what we used to do but I'm fixing drivers at
249 * the same time as this change
250 */
251 basename = "smu";
252 break;
253 default:
254 return -EINVAL;
255 }
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256 snprintf(adapter->name, sizeof(adapter->name), "%s %d", basename,
257 pmac_i2c_get_channel(bus));
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258 of_node_put(parent);
259
9f2545c1 260 platform_set_drvdata(dev, adapter);
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261 adapter->algo = &i2c_powermac_algorithm;
262 i2c_set_adapdata(adapter, bus);
9f2545c1 263 adapter->dev.parent = &dev->dev;
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264 rc = i2c_add_adapter(adapter);
265 if (rc) {
266 printk(KERN_ERR "i2c-powermac: Adapter %s registration "
bc6286e5 267 "failed\n", adapter->name);
6dfa5ca3 268 memset(adapter, 0, sizeof(*adapter));
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269 }
270
bc6286e5 271 printk(KERN_INFO "PowerMac i2c bus %s registered\n", adapter->name);
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272
273 if (!strncmp(basename, "uni-n", 5)) {
274 struct device_node *np;
275 const u32 *prop;
276 struct i2c_board_info info;
277
278 /* Instantiate I2C motion sensor if present */
279 np = of_find_node_by_name(NULL, "accelerometer");
280 if (np && of_device_is_compatible(np, "AAPL,accelerometer_1") &&
281 (prop = of_get_property(np, "reg", NULL))) {
282 int i2c_bus;
283 const char *tmp_bus;
284
285 /* look for bus either using "reg" or by path */
286 tmp_bus = strstr(np->full_name, "/i2c-bus@");
287 if (tmp_bus)
288 i2c_bus = *(tmp_bus + 9) - '0';
289 else
290 i2c_bus = ((*prop) >> 8) & 0x0f;
291
292 if (pmac_i2c_get_channel(bus) == i2c_bus) {
293 memset(&info, 0, sizeof(struct i2c_board_info));
294 info.addr = ((*prop) & 0xff) >> 1;
295 strlcpy(info.type, "ams", I2C_NAME_SIZE);
296 i2c_new_device(adapter, &info);
297 }
298 }
299 }
300
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301 return rc;
302}
303
304
add8eda7
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305/* work with hotplug and coldplug */
306MODULE_ALIAS("platform:i2c-powermac");
307
9f2545c1 308static struct platform_driver i2c_powermac_driver = {
a28d3af2 309 .probe = i2c_powermac_probe,
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310 .remove = __devexit_p(i2c_powermac_remove),
311 .driver = {
312 .name = "i2c-powermac",
313 .bus = &platform_bus_type,
314 },
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315};
316
317static int __init i2c_powermac_init(void)
318{
9f2545c1 319 platform_driver_register(&i2c_powermac_driver);
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320 return 0;
321}
322
323
324static void __exit i2c_powermac_cleanup(void)
325{
9f2545c1 326 platform_driver_unregister(&i2c_powermac_driver);
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327}
328
329module_init(i2c_powermac_init);
330module_exit(i2c_powermac_cleanup);
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