Commit | Line | Data |
---|---|---|
99c3adb4 | 1 | /* |
1da177e4 LT |
2 | Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com> |
3 | ||
4 | National Semiconductor SCx200 ACCESS.bus support | |
16ffc5c9 | 5 | Also supports the AMD CS5535 and AMD CS5536 |
99c3adb4 | 6 | |
1da177e4 LT |
7 | Based on i2c-keywest.c which is: |
8 | Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org> | |
9 | Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com> | |
99c3adb4 | 10 | |
1da177e4 LT |
11 | This program is free software; you can redistribute it and/or |
12 | modify it under the terms of the GNU General Public License as | |
13 | published by the Free Software Foundation; either version 2 of the | |
14 | License, or (at your option) any later version. | |
99c3adb4 | 15 | |
1da177e4 LT |
16 | This program is distributed in the hope that it will be useful, |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | General Public License for more details. | |
1da177e4 LT |
20 | */ |
21 | ||
401e72b5 JC |
22 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
23 | ||
1da177e4 LT |
24 | #include <linux/module.h> |
25 | #include <linux/errno.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/i2c.h> | |
1da177e4 | 29 | #include <linux/pci.h> |
de8255cc | 30 | #include <linux/platform_device.h> |
1da177e4 | 31 | #include <linux/delay.h> |
3fb9a655 | 32 | #include <linux/mutex.h> |
5a0e3ad6 | 33 | #include <linux/slab.h> |
21782180 | 34 | #include <linux/io.h> |
1da177e4 LT |
35 | |
36 | #include <linux/scx200.h> | |
37 | ||
1da177e4 LT |
38 | MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>"); |
39 | MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver"); | |
de8255cc | 40 | MODULE_ALIAS("platform:cs5535-smb"); |
1da177e4 LT |
41 | MODULE_LICENSE("GPL"); |
42 | ||
43 | #define MAX_DEVICES 4 | |
44 | static int base[MAX_DEVICES] = { 0x820, 0x840 }; | |
45 | module_param_array(base, int, NULL, 0); | |
46 | MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers"); | |
47 | ||
f933ff50 | 48 | #define POLL_TIMEOUT (HZ/5) |
1da177e4 LT |
49 | |
50 | enum scx200_acb_state { | |
51 | state_idle, | |
52 | state_address, | |
53 | state_command, | |
54 | state_repeat_start, | |
55 | state_quick, | |
56 | state_read, | |
57 | state_write, | |
58 | }; | |
59 | ||
60 | static const char *scx200_acb_state_name[] = { | |
61 | "idle", | |
62 | "address", | |
63 | "command", | |
64 | "repeat_start", | |
65 | "quick", | |
66 | "read", | |
67 | "write", | |
68 | }; | |
69 | ||
70 | /* Physical interface */ | |
99c3adb4 | 71 | struct scx200_acb_iface { |
1da177e4 LT |
72 | struct scx200_acb_iface *next; |
73 | struct i2c_adapter adapter; | |
74 | unsigned base; | |
3fb9a655 | 75 | struct mutex mutex; |
1da177e4 LT |
76 | |
77 | /* State machine data */ | |
78 | enum scx200_acb_state state; | |
79 | int result; | |
80 | u8 address_byte; | |
81 | u8 command; | |
82 | u8 *ptr; | |
83 | char needs_reset; | |
84 | unsigned len; | |
85 | }; | |
86 | ||
87 | /* Register Definitions */ | |
88 | #define ACBSDA (iface->base + 0) | |
89 | #define ACBST (iface->base + 1) | |
90 | #define ACBST_SDAST 0x40 /* SDA Status */ | |
99c3adb4 | 91 | #define ACBST_BER 0x20 |
1da177e4 LT |
92 | #define ACBST_NEGACK 0x10 /* Negative Acknowledge */ |
93 | #define ACBST_STASTR 0x08 /* Stall After Start */ | |
94 | #define ACBST_MASTER 0x02 | |
95 | #define ACBCST (iface->base + 2) | |
96 | #define ACBCST_BB 0x02 | |
97 | #define ACBCTL1 (iface->base + 3) | |
98 | #define ACBCTL1_STASTRE 0x80 | |
99 | #define ACBCTL1_NMINTE 0x40 | |
99c3adb4 BG |
100 | #define ACBCTL1_ACK 0x10 |
101 | #define ACBCTL1_STOP 0x02 | |
102 | #define ACBCTL1_START 0x01 | |
1da177e4 LT |
103 | #define ACBADDR (iface->base + 4) |
104 | #define ACBCTL2 (iface->base + 5) | |
105 | #define ACBCTL2_ENABLE 0x01 | |
106 | ||
107 | /************************************************************************/ | |
108 | ||
109 | static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status) | |
110 | { | |
111 | const char *errmsg; | |
112 | ||
ef4d9275 BG |
113 | dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n", |
114 | scx200_acb_state_name[iface->state], status); | |
1da177e4 LT |
115 | |
116 | if (status & ACBST_BER) { | |
117 | errmsg = "bus error"; | |
118 | goto error; | |
119 | } | |
120 | if (!(status & ACBST_MASTER)) { | |
121 | errmsg = "not master"; | |
122 | goto error; | |
123 | } | |
9b7b6d3b BG |
124 | if (status & ACBST_NEGACK) { |
125 | dev_dbg(&iface->adapter.dev, "negative ack in state %s\n", | |
126 | scx200_acb_state_name[iface->state]); | |
127 | ||
128 | iface->state = state_idle; | |
129 | iface->result = -ENXIO; | |
130 | ||
131 | outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); | |
132 | outb(ACBST_STASTR | ACBST_NEGACK, ACBST); | |
95563d34 JC |
133 | |
134 | /* Reset the status register */ | |
135 | outb(0, ACBST); | |
9b7b6d3b BG |
136 | return; |
137 | } | |
1da177e4 LT |
138 | |
139 | switch (iface->state) { | |
140 | case state_idle: | |
141 | dev_warn(&iface->adapter.dev, "interrupt in idle state\n"); | |
142 | break; | |
143 | ||
144 | case state_address: | |
145 | /* Do a pointer write first */ | |
146 | outb(iface->address_byte & ~1, ACBSDA); | |
147 | ||
148 | iface->state = state_command; | |
149 | break; | |
150 | ||
151 | case state_command: | |
152 | outb(iface->command, ACBSDA); | |
153 | ||
154 | if (iface->address_byte & 1) | |
155 | iface->state = state_repeat_start; | |
156 | else | |
157 | iface->state = state_write; | |
158 | break; | |
159 | ||
160 | case state_repeat_start: | |
161 | outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1); | |
162 | /* fallthrough */ | |
99c3adb4 | 163 | |
1da177e4 LT |
164 | case state_quick: |
165 | if (iface->address_byte & 1) { | |
99c3adb4 | 166 | if (iface->len == 1) |
1da177e4 LT |
167 | outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1); |
168 | else | |
169 | outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1); | |
170 | outb(iface->address_byte, ACBSDA); | |
171 | ||
172 | iface->state = state_read; | |
173 | } else { | |
174 | outb(iface->address_byte, ACBSDA); | |
175 | ||
176 | iface->state = state_write; | |
177 | } | |
178 | break; | |
179 | ||
180 | case state_read: | |
fd627a01 TA |
181 | /* Set ACK if _next_ byte will be the last one */ |
182 | if (iface->len == 2) | |
1da177e4 LT |
183 | outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1); |
184 | else | |
185 | outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1); | |
186 | ||
fd627a01 | 187 | if (iface->len == 1) { |
1da177e4 LT |
188 | iface->result = 0; |
189 | iface->state = state_idle; | |
190 | outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); | |
191 | } | |
192 | ||
fd627a01 TA |
193 | *iface->ptr++ = inb(ACBSDA); |
194 | --iface->len; | |
195 | ||
1da177e4 LT |
196 | break; |
197 | ||
198 | case state_write: | |
199 | if (iface->len == 0) { | |
200 | iface->result = 0; | |
201 | iface->state = state_idle; | |
202 | outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); | |
203 | break; | |
204 | } | |
99c3adb4 | 205 | |
1da177e4 LT |
206 | outb(*iface->ptr++, ACBSDA); |
207 | --iface->len; | |
99c3adb4 | 208 | |
1da177e4 LT |
209 | break; |
210 | } | |
211 | ||
212 | return; | |
213 | ||
1da177e4 | 214 | error: |
fce96f3e WT |
215 | dev_err(&iface->adapter.dev, |
216 | "%s in state %s (addr=0x%02x, len=%d, status=0x%02x)\n", errmsg, | |
217 | scx200_acb_state_name[iface->state], iface->address_byte, | |
218 | iface->len, status); | |
1da177e4 LT |
219 | |
220 | iface->state = state_idle; | |
221 | iface->result = -EIO; | |
222 | iface->needs_reset = 1; | |
223 | } | |
224 | ||
1da177e4 LT |
225 | static void scx200_acb_poll(struct scx200_acb_iface *iface) |
226 | { | |
9b7b6d3b | 227 | u8 status; |
1da177e4 LT |
228 | unsigned long timeout; |
229 | ||
230 | timeout = jiffies + POLL_TIMEOUT; | |
3e3183ba | 231 | while (1) { |
1da177e4 | 232 | status = inb(ACBST); |
95563d34 JC |
233 | |
234 | /* Reset the status register to avoid the hang */ | |
235 | outb(0, ACBST); | |
236 | ||
1da177e4 LT |
237 | if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) { |
238 | scx200_acb_machine(iface, status); | |
239 | return; | |
240 | } | |
3e3183ba DW |
241 | if (time_after(jiffies, timeout)) |
242 | break; | |
243 | cpu_relax(); | |
244 | cond_resched(); | |
1da177e4 LT |
245 | } |
246 | ||
9b7b6d3b BG |
247 | dev_err(&iface->adapter.dev, "timeout in state %s\n", |
248 | scx200_acb_state_name[iface->state]); | |
249 | ||
250 | iface->state = state_idle; | |
251 | iface->result = -EIO; | |
252 | iface->needs_reset = 1; | |
1da177e4 | 253 | } |
1da177e4 LT |
254 | |
255 | static void scx200_acb_reset(struct scx200_acb_iface *iface) | |
256 | { | |
257 | /* Disable the ACCESS.bus device and Configure the SCL | |
99c3adb4 | 258 | frequency: 16 clock cycles */ |
1da177e4 LT |
259 | outb(0x70, ACBCTL2); |
260 | /* Polling mode */ | |
261 | outb(0, ACBCTL1); | |
262 | /* Disable slave address */ | |
263 | outb(0, ACBADDR); | |
264 | /* Enable the ACCESS.bus device */ | |
265 | outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2); | |
266 | /* Free STALL after START */ | |
267 | outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1); | |
268 | /* Send a STOP */ | |
269 | outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); | |
270 | /* Clear BER, NEGACK and STASTR bits */ | |
271 | outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST); | |
272 | /* Clear BB bit */ | |
273 | outb(inb(ACBCST) | ACBCST_BB, ACBCST); | |
274 | } | |
275 | ||
276 | static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter, | |
99c3adb4 BG |
277 | u16 address, unsigned short flags, |
278 | char rw, u8 command, int size, | |
279 | union i2c_smbus_data *data) | |
1da177e4 LT |
280 | { |
281 | struct scx200_acb_iface *iface = i2c_get_adapdata(adapter); | |
282 | int len; | |
283 | u8 *buffer; | |
284 | u16 cur_word; | |
285 | int rc; | |
286 | ||
287 | switch (size) { | |
288 | case I2C_SMBUS_QUICK: | |
99c3adb4 BG |
289 | len = 0; |
290 | buffer = NULL; | |
291 | break; | |
292 | ||
1da177e4 | 293 | case I2C_SMBUS_BYTE: |
9b7b6d3b BG |
294 | len = 1; |
295 | buffer = rw ? &data->byte : &command; | |
99c3adb4 BG |
296 | break; |
297 | ||
1da177e4 | 298 | case I2C_SMBUS_BYTE_DATA: |
99c3adb4 BG |
299 | len = 1; |
300 | buffer = &data->byte; | |
301 | break; | |
302 | ||
1da177e4 LT |
303 | case I2C_SMBUS_WORD_DATA: |
304 | len = 2; | |
99c3adb4 BG |
305 | cur_word = cpu_to_le16(data->word); |
306 | buffer = (u8 *)&cur_word; | |
1da177e4 | 307 | break; |
99c3adb4 | 308 | |
c3efacaa | 309 | case I2C_SMBUS_I2C_BLOCK_DATA: |
99c3adb4 | 310 | len = data->block[0]; |
c3efacaa JD |
311 | if (len == 0 || len > I2C_SMBUS_BLOCK_MAX) |
312 | return -EINVAL; | |
99c3adb4 | 313 | buffer = &data->block[1]; |
1da177e4 | 314 | break; |
99c3adb4 | 315 | |
1da177e4 | 316 | default: |
99c3adb4 | 317 | return -EINVAL; |
1da177e4 LT |
318 | } |
319 | ||
ef4d9275 BG |
320 | dev_dbg(&adapter->dev, |
321 | "size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n", | |
322 | size, address, command, len, rw); | |
1da177e4 LT |
323 | |
324 | if (!len && rw == I2C_SMBUS_READ) { | |
ef4d9275 | 325 | dev_dbg(&adapter->dev, "zero length read\n"); |
1da177e4 LT |
326 | return -EINVAL; |
327 | } | |
328 | ||
3fb9a655 | 329 | mutex_lock(&iface->mutex); |
1da177e4 | 330 | |
9b7b6d3b | 331 | iface->address_byte = (address << 1) | rw; |
1da177e4 LT |
332 | iface->command = command; |
333 | iface->ptr = buffer; | |
334 | iface->len = len; | |
335 | iface->result = -EINVAL; | |
336 | iface->needs_reset = 0; | |
337 | ||
338 | outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1); | |
339 | ||
340 | if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE) | |
341 | iface->state = state_quick; | |
342 | else | |
343 | iface->state = state_address; | |
344 | ||
1da177e4 LT |
345 | while (iface->state != state_idle) |
346 | scx200_acb_poll(iface); | |
1da177e4 LT |
347 | |
348 | if (iface->needs_reset) | |
349 | scx200_acb_reset(iface); | |
350 | ||
351 | rc = iface->result; | |
352 | ||
3fb9a655 | 353 | mutex_unlock(&iface->mutex); |
1da177e4 LT |
354 | |
355 | if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ) | |
99c3adb4 | 356 | data->word = le16_to_cpu(cur_word); |
1da177e4 LT |
357 | |
358 | #ifdef DEBUG | |
ef4d9275 | 359 | dev_dbg(&adapter->dev, "transfer done, result: %d", rc); |
1da177e4 LT |
360 | if (buffer) { |
361 | int i; | |
362 | printk(" data:"); | |
363 | for (i = 0; i < len; ++i) | |
364 | printk(" %02x", buffer[i]); | |
365 | } | |
366 | printk("\n"); | |
367 | #endif | |
368 | ||
369 | return rc; | |
370 | } | |
371 | ||
372 | static u32 scx200_acb_func(struct i2c_adapter *adapter) | |
373 | { | |
374 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | | |
375 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | | |
c3efacaa | 376 | I2C_FUNC_SMBUS_I2C_BLOCK; |
1da177e4 LT |
377 | } |
378 | ||
379 | /* For now, we only handle combined mode (smbus) */ | |
8f9082c5 | 380 | static const struct i2c_algorithm scx200_acb_algorithm = { |
1da177e4 LT |
381 | .smbus_xfer = scx200_acb_smbus_xfer, |
382 | .functionality = scx200_acb_func, | |
383 | }; | |
384 | ||
385 | static struct scx200_acb_iface *scx200_acb_list; | |
9d9c01ce | 386 | static DEFINE_MUTEX(scx200_acb_list_mutex); |
1da177e4 | 387 | |
0b255e92 | 388 | static int scx200_acb_probe(struct scx200_acb_iface *iface) |
1da177e4 LT |
389 | { |
390 | u8 val; | |
391 | ||
392 | /* Disable the ACCESS.bus device and Configure the SCL | |
99c3adb4 | 393 | frequency: 16 clock cycles */ |
1da177e4 LT |
394 | outb(0x70, ACBCTL2); |
395 | ||
396 | if (inb(ACBCTL2) != 0x70) { | |
401e72b5 | 397 | pr_debug("ACBCTL2 readback failed\n"); |
1da177e4 LT |
398 | return -ENXIO; |
399 | } | |
400 | ||
401 | outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1); | |
402 | ||
403 | val = inb(ACBCTL1); | |
404 | if (val) { | |
401e72b5 | 405 | pr_debug("disabled, but ACBCTL1=0x%02x\n", val); |
1da177e4 LT |
406 | return -ENXIO; |
407 | } | |
408 | ||
409 | outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2); | |
410 | ||
411 | outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1); | |
412 | ||
413 | val = inb(ACBCTL1); | |
414 | if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) { | |
401e72b5 JC |
415 | pr_debug("enabled, but NMINTE won't be set, ACBCTL1=0x%02x\n", |
416 | val); | |
1da177e4 LT |
417 | return -ENXIO; |
418 | } | |
419 | ||
420 | return 0; | |
421 | } | |
422 | ||
0b255e92 | 423 | static struct scx200_acb_iface *scx200_create_iface(const char *text, |
12a917f6 | 424 | struct device *dev, int index) |
1da177e4 LT |
425 | { |
426 | struct scx200_acb_iface *iface; | |
427 | struct i2c_adapter *adapter; | |
1da177e4 | 428 | |
5263ebb5 | 429 | iface = kzalloc(sizeof(*iface), GFP_KERNEL); |
46797a2a | 430 | if (!iface) |
80cd3a87 | 431 | return NULL; |
1da177e4 | 432 | |
1da177e4 LT |
433 | adapter = &iface->adapter; |
434 | i2c_set_adapdata(adapter, iface); | |
2096b956 | 435 | snprintf(adapter->name, sizeof(adapter->name), "%s ACB%d", text, index); |
1da177e4 | 436 | adapter->owner = THIS_MODULE; |
1da177e4 | 437 | adapter->algo = &scx200_acb_algorithm; |
3401b2ff | 438 | adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; |
12a917f6 | 439 | adapter->dev.parent = dev; |
1da177e4 | 440 | |
3fb9a655 | 441 | mutex_init(&iface->mutex); |
1da177e4 | 442 | |
80cd3a87 JC |
443 | return iface; |
444 | } | |
445 | ||
0b255e92 | 446 | static int scx200_acb_create(struct scx200_acb_iface *iface) |
80cd3a87 JC |
447 | { |
448 | struct i2c_adapter *adapter; | |
449 | int rc; | |
450 | ||
451 | adapter = &iface->adapter; | |
1da177e4 LT |
452 | |
453 | rc = scx200_acb_probe(iface); | |
454 | if (rc) { | |
401e72b5 | 455 | pr_warn("probe failed\n"); |
80cd3a87 | 456 | return rc; |
1da177e4 LT |
457 | } |
458 | ||
459 | scx200_acb_reset(iface); | |
460 | ||
461 | if (i2c_add_adapter(adapter) < 0) { | |
401e72b5 | 462 | pr_err("failed to register\n"); |
80cd3a87 | 463 | return -ENODEV; |
1da177e4 LT |
464 | } |
465 | ||
de8255cc AS |
466 | if (!adapter->dev.parent) { |
467 | /* If there's no dev, we're tracking (ISA) ifaces manually */ | |
468 | mutex_lock(&scx200_acb_list_mutex); | |
469 | iface->next = scx200_acb_list; | |
470 | scx200_acb_list = iface; | |
471 | mutex_unlock(&scx200_acb_list_mutex); | |
472 | } | |
1da177e4 LT |
473 | |
474 | return 0; | |
80cd3a87 | 475 | } |
1da177e4 | 476 | |
0b255e92 | 477 | static struct scx200_acb_iface *scx200_create_dev(const char *text, |
de8255cc | 478 | unsigned long base, int index, struct device *dev) |
80cd3a87 JC |
479 | { |
480 | struct scx200_acb_iface *iface; | |
481 | int rc; | |
482 | ||
de8255cc | 483 | iface = scx200_create_iface(text, dev, index); |
80cd3a87 JC |
484 | |
485 | if (iface == NULL) | |
de8255cc | 486 | return NULL; |
80cd3a87 | 487 | |
de8255cc | 488 | if (!request_region(base, 8, iface->adapter.name)) { |
401e72b5 | 489 | pr_err("can't allocate io 0x%lx-0x%lx\n", base, base + 8 - 1); |
80cd3a87 JC |
490 | goto errout_free; |
491 | } | |
492 | ||
de8255cc | 493 | iface->base = base; |
80cd3a87 JC |
494 | rc = scx200_acb_create(iface); |
495 | ||
496 | if (rc == 0) | |
de8255cc | 497 | return iface; |
80cd3a87 | 498 | |
de8255cc | 499 | release_region(base, 8); |
9b7b6d3b BG |
500 | errout_free: |
501 | kfree(iface); | |
de8255cc | 502 | return NULL; |
1da177e4 LT |
503 | } |
504 | ||
0b255e92 | 505 | static int scx200_probe(struct platform_device *pdev) |
80cd3a87 JC |
506 | { |
507 | struct scx200_acb_iface *iface; | |
de8255cc | 508 | struct resource *res; |
80cd3a87 | 509 | |
de8255cc AS |
510 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); |
511 | if (!res) { | |
512 | dev_err(&pdev->dev, "can't fetch device resource info\n"); | |
513 | return -ENODEV; | |
80cd3a87 JC |
514 | } |
515 | ||
de8255cc AS |
516 | iface = scx200_create_dev("CS5535", res->start, 0, &pdev->dev); |
517 | if (!iface) | |
518 | return -EIO; | |
80cd3a87 | 519 | |
de8255cc AS |
520 | dev_info(&pdev->dev, "SCx200 device '%s' registered\n", |
521 | iface->adapter.name); | |
522 | platform_set_drvdata(pdev, iface); | |
1da177e4 | 523 | |
de8255cc | 524 | return 0; |
80cd3a87 JC |
525 | } |
526 | ||
0b255e92 | 527 | static void scx200_cleanup_iface(struct scx200_acb_iface *iface) |
de8255cc AS |
528 | { |
529 | i2c_del_adapter(&iface->adapter); | |
530 | release_region(iface->base, 8); | |
531 | kfree(iface); | |
532 | } | |
16ffc5c9 | 533 | |
0b255e92 | 534 | static int scx200_remove(struct platform_device *pdev) |
16ffc5c9 | 535 | { |
de8255cc | 536 | struct scx200_acb_iface *iface; |
80cd3a87 | 537 | |
de8255cc | 538 | iface = platform_get_drvdata(pdev); |
de8255cc | 539 | scx200_cleanup_iface(iface); |
80cd3a87 | 540 | |
de8255cc AS |
541 | return 0; |
542 | } | |
80cd3a87 | 543 | |
6fcf84a2 | 544 | static struct platform_driver scx200_pci_driver = { |
de8255cc AS |
545 | .driver = { |
546 | .name = "cs5535-smb", | |
de8255cc AS |
547 | }, |
548 | .probe = scx200_probe, | |
0b255e92 | 549 | .remove = scx200_remove, |
de8255cc | 550 | }; |
80cd3a87 | 551 | |
392debf1 | 552 | static const struct pci_device_id scx200_isa[] = { |
de8255cc AS |
553 | { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) }, |
554 | { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) }, | |
555 | { 0, } | |
556 | }; | |
80cd3a87 | 557 | |
de8255cc AS |
558 | static __init void scx200_scan_isa(void) |
559 | { | |
560 | int i; | |
80cd3a87 | 561 | |
de8255cc AS |
562 | if (!pci_dev_present(scx200_isa)) |
563 | return; | |
80cd3a87 | 564 | |
de8255cc AS |
565 | for (i = 0; i < MAX_DEVICES; ++i) { |
566 | if (base[i] == 0) | |
567 | continue; | |
16ffc5c9 | 568 | |
de8255cc AS |
569 | /* XXX: should we care about failures? */ |
570 | scx200_create_dev("SCx200", base[i], i, NULL); | |
16ffc5c9 | 571 | } |
16ffc5c9 BG |
572 | } |
573 | ||
1da177e4 LT |
574 | static int __init scx200_acb_init(void) |
575 | { | |
401e72b5 | 576 | pr_debug("NatSemi SCx200 ACCESS.bus Driver\n"); |
1da177e4 | 577 | |
de8255cc AS |
578 | /* First scan for ISA-based devices */ |
579 | scx200_scan_isa(); /* XXX: should we care about errors? */ | |
1da177e4 | 580 | |
6f9c2963 JD |
581 | /* If at least one bus was created, init must succeed */ |
582 | if (scx200_acb_list) | |
583 | return 0; | |
de8255cc AS |
584 | |
585 | /* No ISA devices; register the platform driver for PCI-based devices */ | |
6fcf84a2 | 586 | return platform_driver_register(&scx200_pci_driver); |
1da177e4 LT |
587 | } |
588 | ||
589 | static void __exit scx200_acb_cleanup(void) | |
590 | { | |
591 | struct scx200_acb_iface *iface; | |
99c3adb4 | 592 | |
6fcf84a2 | 593 | platform_driver_unregister(&scx200_pci_driver); |
de8255cc | 594 | |
9d9c01ce | 595 | mutex_lock(&scx200_acb_list_mutex); |
1da177e4 LT |
596 | while ((iface = scx200_acb_list) != NULL) { |
597 | scx200_acb_list = iface->next; | |
9d9c01ce | 598 | mutex_unlock(&scx200_acb_list_mutex); |
1da177e4 | 599 | |
de8255cc | 600 | scx200_cleanup_iface(iface); |
80cd3a87 | 601 | |
9d9c01ce | 602 | mutex_lock(&scx200_acb_list_mutex); |
1da177e4 | 603 | } |
9d9c01ce | 604 | mutex_unlock(&scx200_acb_list_mutex); |
1da177e4 LT |
605 | } |
606 | ||
607 | module_init(scx200_acb_init); | |
608 | module_exit(scx200_acb_cleanup); |