Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1998-2000 Michel Aubry, Maintainer |
3 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer | |
4 | * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer | |
5 | * | |
6 | * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) | |
7 | * May be copied or modified under the terms of the GNU General Public License | |
ccd32e22 | 8 | * Copyright (C) 2002 Alan Cox |
1da177e4 | 9 | * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> |
21b82477 | 10 | * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> |
95ba8c17 | 11 | * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> |
1da177e4 LT |
12 | * |
13 | * (U)DMA capable version of ali 1533/1543(C), 1535(D) | |
14 | * | |
15 | ********************************************************************** | |
16 | * 9/7/99 --Parts from the above author are included and need to be | |
17 | * converted into standard interface, once I finish the thought. | |
18 | * | |
19 | * Recent changes | |
20 | * Don't use LBA48 mode on ALi <= 0xC4 | |
21 | * Don't poke 0x79 with a non ALi northbridge | |
22 | * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang) | |
23 | * Allow UDMA6 on revisions > 0xC4 | |
24 | * | |
25 | * Documentation | |
26 | * Chipset documentation available under NDA only | |
27 | * | |
28 | */ | |
29 | ||
1da177e4 LT |
30 | #include <linux/module.h> |
31 | #include <linux/types.h> | |
32 | #include <linux/kernel.h> | |
33 | #include <linux/pci.h> | |
1da177e4 LT |
34 | #include <linux/ide.h> |
35 | #include <linux/init.h> | |
95ba8c17 | 36 | #include <linux/dmi.h> |
1da177e4 LT |
37 | |
38 | #include <asm/io.h> | |
39 | ||
ced3ec8a BZ |
40 | #define DRV_NAME "alim15x3" |
41 | ||
63b1623e BZ |
42 | /* |
43 | * Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking | |
44 | * (this is DANGEROUS and could result in data corruption). | |
45 | */ | |
46 | static int wdc_udma; | |
47 | ||
48 | module_param(wdc_udma, bool, 0); | |
49 | MODULE_PARM_DESC(wdc_udma, | |
50 | "allow UDMA on M1543C-E chipset for WDC disks (DANGEROUS)"); | |
51 | ||
1da177e4 LT |
52 | /* |
53 | * ALi devices are not plug in. Otherwise these static values would | |
54 | * need to go. They ought to go away anyway | |
55 | */ | |
56 | ||
57 | static u8 m5229_revision; | |
58 | static u8 chip_is_1543c_e; | |
59 | static struct pci_dev *isa_dev; | |
60 | ||
1da177e4 | 61 | /** |
88b2b32b | 62 | * ali_set_pio_mode - set host controller for PIO mode |
26bcb879 BZ |
63 | * @drive: drive |
64 | * @pio: PIO mode number | |
21b82477 | 65 | * |
26bcb879 | 66 | * Program the controller for the given PIO mode. |
1da177e4 | 67 | */ |
26bcb879 | 68 | |
88b2b32b | 69 | static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio) |
1da177e4 | 70 | { |
898ec223 | 71 | ide_hwif_t *hwif = drive->hwif; |
36501650 | 72 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
288911af BZ |
73 | struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio); |
74 | int s_time = t->setup, a_time = t->active, c_time = t->cycle; | |
1da177e4 LT |
75 | u8 s_clc, a_clc, r_clc; |
76 | unsigned long flags; | |
30e5ee4d | 77 | int bus_speed = ide_pci_clk ? ide_pci_clk : 33; |
1da177e4 LT |
78 | int port = hwif->channel ? 0x5c : 0x58; |
79 | int portFIFO = hwif->channel ? 0x55 : 0x54; | |
123995b9 | 80 | u8 cd_dma_fifo = 0, unit = drive->dn & 1; |
1da177e4 | 81 | |
1da177e4 LT |
82 | if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8) |
83 | s_clc = 0; | |
84 | if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8) | |
85 | a_clc = 0; | |
1da177e4 | 86 | |
1da177e4 LT |
87 | if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) { |
88 | r_clc = 1; | |
89 | } else { | |
90 | if (r_clc >= 16) | |
91 | r_clc = 0; | |
92 | } | |
93 | local_irq_save(flags); | |
94 | ||
95 | /* | |
96 | * PIO mode => ATA FIFO on, ATAPI FIFO off | |
97 | */ | |
98 | pci_read_config_byte(dev, portFIFO, &cd_dma_fifo); | |
99 | if (drive->media==ide_disk) { | |
100 | if (unit) { | |
101 | pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50); | |
102 | } else { | |
103 | pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05); | |
104 | } | |
105 | } else { | |
106 | if (unit) { | |
107 | pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F); | |
108 | } else { | |
109 | pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0); | |
110 | } | |
111 | } | |
112 | ||
113 | pci_write_config_byte(dev, port, s_clc); | |
123995b9 | 114 | pci_write_config_byte(dev, port + unit + 2, (a_clc << 4) | r_clc); |
1da177e4 | 115 | local_irq_restore(flags); |
21b82477 SS |
116 | } |
117 | ||
1da177e4 | 118 | /** |
2d5eaa6d BZ |
119 | * ali_udma_filter - compute UDMA mask |
120 | * @drive: IDE device | |
1da177e4 | 121 | * |
2d5eaa6d BZ |
122 | * Return available UDMA modes. |
123 | * | |
124 | * The actual rules for the ALi are: | |
1da177e4 LT |
125 | * No UDMA on revisions <= 0x20 |
126 | * Disk only for revisions < 0xC2 | |
63b1623e | 127 | * Not WDC drives on M1543C-E (?) |
1da177e4 | 128 | */ |
1da177e4 | 129 | |
2d5eaa6d | 130 | static u8 ali_udma_filter(ide_drive_t *drive) |
1da177e4 | 131 | { |
2d5eaa6d BZ |
132 | if (m5229_revision > 0x20 && m5229_revision < 0xC2) { |
133 | if (drive->media != ide_disk) | |
134 | return 0; | |
4dde4492 BZ |
135 | if (wdc_udma == 0 && chip_is_1543c_e && |
136 | strstr((char *)&drive->id[ATA_ID_PROD], "WDC ")) | |
2d5eaa6d | 137 | return 0; |
1da177e4 LT |
138 | } |
139 | ||
2d5eaa6d | 140 | return drive->hwif->ultra_mask; |
1da177e4 LT |
141 | } |
142 | ||
143 | /** | |
88b2b32b BZ |
144 | * ali_set_dma_mode - set host controller for DMA mode |
145 | * @drive: drive | |
146 | * @speed: DMA mode | |
1da177e4 LT |
147 | * |
148 | * Configure the hardware for the desired IDE transfer mode. | |
1da177e4 | 149 | */ |
f212ff28 | 150 | |
88b2b32b | 151 | static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed) |
1da177e4 | 152 | { |
898ec223 | 153 | ide_hwif_t *hwif = drive->hwif; |
36501650 | 154 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
1da177e4 | 155 | u8 speed1 = speed; |
123995b9 | 156 | u8 unit = drive->dn & 1; |
1da177e4 LT |
157 | u8 tmpbyte = 0x00; |
158 | int m5229_udma = (hwif->channel) ? 0x57 : 0x56; | |
159 | ||
160 | if (speed == XFER_UDMA_6) | |
161 | speed1 = 0x47; | |
162 | ||
163 | if (speed < XFER_UDMA_0) { | |
164 | u8 ultra_enable = (unit) ? 0x7f : 0xf7; | |
165 | /* | |
166 | * clear "ultra enable" bit | |
167 | */ | |
168 | pci_read_config_byte(dev, m5229_udma, &tmpbyte); | |
169 | tmpbyte &= ultra_enable; | |
170 | pci_write_config_byte(dev, m5229_udma, tmpbyte); | |
171 | ||
a6fe837e BZ |
172 | /* |
173 | * FIXME: Oh, my... DMA timings are never set. | |
174 | */ | |
1da177e4 LT |
175 | } else { |
176 | pci_read_config_byte(dev, m5229_udma, &tmpbyte); | |
177 | tmpbyte &= (0x0f << ((1-unit) << 2)); | |
178 | /* | |
179 | * enable ultra dma and set timing | |
180 | */ | |
181 | tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2)); | |
182 | pci_write_config_byte(dev, m5229_udma, tmpbyte); | |
183 | if (speed >= XFER_UDMA_3) { | |
184 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
185 | tmpbyte |= 1; | |
186 | pci_write_config_byte(dev, 0x4b, tmpbyte); | |
187 | } | |
188 | } | |
1da177e4 LT |
189 | } |
190 | ||
1da177e4 LT |
191 | /** |
192 | * ali15x3_dma_setup - begin a DMA phase | |
193 | * @drive: target device | |
194 | * | |
195 | * Returns 1 if the DMA cannot be performed, zero on success. | |
196 | */ | |
197 | ||
198 | static int ali15x3_dma_setup(ide_drive_t *drive) | |
199 | { | |
200 | if (m5229_revision < 0xC2 && drive->media != ide_disk) { | |
b65fac32 | 201 | if (rq_data_dir(drive->hwif->rq)) |
1da177e4 LT |
202 | return 1; /* try PIO instead of DMA */ |
203 | } | |
204 | return ide_dma_setup(drive); | |
205 | } | |
206 | ||
207 | /** | |
208 | * init_chipset_ali15x3 - Initialise an ALi IDE controller | |
209 | * @dev: PCI device | |
1da177e4 LT |
210 | * |
211 | * This function initializes the ALI IDE controller and where | |
212 | * appropriate also sets up the 1533 southbridge. | |
213 | */ | |
a326b02b | 214 | |
2ed0ef54 | 215 | static int init_chipset_ali15x3(struct pci_dev *dev) |
1da177e4 LT |
216 | { |
217 | unsigned long flags; | |
218 | u8 tmpbyte; | |
b1489009 | 219 | struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0)); |
1da177e4 | 220 | |
44c10138 | 221 | m5229_revision = dev->revision; |
1da177e4 | 222 | |
b1489009 | 223 | isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
1da177e4 | 224 | |
1da177e4 LT |
225 | local_irq_save(flags); |
226 | ||
227 | if (m5229_revision < 0xC2) { | |
228 | /* | |
229 | * revision 0x20 (1543-E, 1543-F) | |
230 | * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E) | |
231 | * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7 | |
232 | */ | |
233 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
234 | /* | |
235 | * clear bit 7 | |
236 | */ | |
237 | pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F); | |
cad221aa BZ |
238 | /* |
239 | * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010 | |
240 | */ | |
241 | if (m5229_revision >= 0x20 && isa_dev) { | |
242 | pci_read_config_byte(isa_dev, 0x5e, &tmpbyte); | |
243 | chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0; | |
244 | } | |
b1489009 | 245 | goto out; |
1da177e4 LT |
246 | } |
247 | ||
248 | /* | |
249 | * 1543C-B?, 1535, 1535D, 1553 | |
250 | * Note 1: not all "motherboard" support this detection | |
251 | * Note 2: if no udma 66 device, the detection may "error". | |
252 | * but in this case, we will not set the device to | |
253 | * ultra 66, the detection result is not important | |
254 | */ | |
255 | ||
256 | /* | |
257 | * enable "Cable Detection", m5229, 0x4b, bit3 | |
258 | */ | |
259 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
260 | pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08); | |
261 | ||
262 | /* | |
263 | * We should only tune the 1533 enable if we are using an ALi | |
264 | * North bridge. We might have no north found on some zany | |
265 | * box without a device at 0:0.0. The ALi bridge will be at | |
266 | * 0:0.0 so if we didn't find one we know what is cooking. | |
267 | */ | |
b1489009 AC |
268 | if (north && north->vendor != PCI_VENDOR_ID_AL) |
269 | goto out; | |
1da177e4 LT |
270 | |
271 | if (m5229_revision < 0xC5 && isa_dev) | |
272 | { | |
273 | /* | |
274 | * set south-bridge's enable bit, m1533, 0x79 | |
275 | */ | |
276 | ||
277 | pci_read_config_byte(isa_dev, 0x79, &tmpbyte); | |
278 | if (m5229_revision == 0xC2) { | |
279 | /* | |
280 | * 1543C-B0 (m1533, 0x79, bit 2) | |
281 | */ | |
282 | pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04); | |
283 | } else if (m5229_revision >= 0xC3) { | |
284 | /* | |
285 | * 1553/1535 (m1533, 0x79, bit 1) | |
286 | */ | |
287 | pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02); | |
288 | } | |
289 | } | |
cad221aa | 290 | |
b1489009 | 291 | out: |
cad221aa BZ |
292 | /* |
293 | * CD_ROM DMA on (m5229, 0x53, bit0) | |
294 | * Enable this bit even if we want to use PIO. | |
295 | * PIO FIFO off (m5229, 0x53, bit1) | |
296 | * The hardware will use 0x54h and 0x55h to control PIO FIFO. | |
297 | * (Not on later devices it seems) | |
298 | * | |
299 | * 0x53 changes meaning on later revs - we must no touch | |
300 | * bit 1 on them. Need to check if 0x20 is the right break. | |
301 | */ | |
302 | if (m5229_revision >= 0x20) { | |
303 | pci_read_config_byte(dev, 0x53, &tmpbyte); | |
304 | ||
305 | if (m5229_revision <= 0x20) | |
306 | tmpbyte = (tmpbyte & (~0x02)) | 0x01; | |
307 | else if (m5229_revision == 0xc7 || m5229_revision == 0xc8) | |
308 | tmpbyte |= 0x03; | |
309 | else | |
310 | tmpbyte |= 0x01; | |
311 | ||
312 | pci_write_config_byte(dev, 0x53, tmpbyte); | |
313 | } | |
b1489009 AC |
314 | pci_dev_put(north); |
315 | pci_dev_put(isa_dev); | |
1da177e4 LT |
316 | local_irq_restore(flags); |
317 | return 0; | |
318 | } | |
319 | ||
95ba8c17 BZ |
320 | /* |
321 | * Cable special cases | |
322 | */ | |
323 | ||
1855256c | 324 | static const struct dmi_system_id cable_dmi_table[] = { |
95ba8c17 BZ |
325 | { |
326 | .ident = "HP Pavilion N5430", | |
327 | .matches = { | |
328 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
8663fd6d | 329 | DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), |
95ba8c17 BZ |
330 | }, |
331 | }, | |
03e6f489 DE |
332 | { |
333 | .ident = "Toshiba Satellite S1800-814", | |
334 | .matches = { | |
335 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | |
336 | DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), | |
337 | }, | |
338 | }, | |
95ba8c17 BZ |
339 | { } |
340 | }; | |
341 | ||
342 | static int ali_cable_override(struct pci_dev *pdev) | |
343 | { | |
344 | /* Fujitsu P2000 */ | |
345 | if (pdev->subsystem_vendor == 0x10CF && | |
346 | pdev->subsystem_device == 0x10AF) | |
347 | return 1; | |
348 | ||
d151456a BZ |
349 | /* Mitac 8317 (Winbook-A) and relatives */ |
350 | if (pdev->subsystem_vendor == 0x1071 && | |
351 | pdev->subsystem_device == 0x8317) | |
352 | return 1; | |
353 | ||
95ba8c17 BZ |
354 | /* Systems by DMI */ |
355 | if (dmi_check_system(cable_dmi_table)) | |
356 | return 1; | |
357 | ||
358 | return 0; | |
359 | } | |
360 | ||
1da177e4 | 361 | /** |
ac95beed | 362 | * ali_cable_detect - cable detection |
1da177e4 LT |
363 | * @hwif: IDE interface |
364 | * | |
365 | * This checks if the controller and the cable are capable | |
366 | * of UDMA66 transfers. It doesn't check the drives. | |
367 | * But see note 2 below! | |
368 | * | |
369 | * FIXME: frobs bits that are not defined on newer ALi devicea | |
370 | */ | |
371 | ||
f454cbe8 | 372 | static u8 ali_cable_detect(ide_hwif_t *hwif) |
1da177e4 | 373 | { |
36501650 | 374 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
1da177e4 | 375 | unsigned long flags; |
95ba8c17 | 376 | u8 cbl = ATA_CBL_PATA40, tmpbyte; |
1da177e4 LT |
377 | |
378 | local_irq_save(flags); | |
379 | ||
380 | if (m5229_revision >= 0xC2) { | |
381 | /* | |
95ba8c17 BZ |
382 | * m5229 80-pin cable detection (from Host View) |
383 | * | |
384 | * 0x4a bit0 is 0 => primary channel has 80-pin | |
385 | * 0x4a bit1 is 0 => secondary channel has 80-pin | |
386 | * | |
387 | * Certain laptops use short but suitable cables | |
388 | * and don't implement the detect logic. | |
1da177e4 | 389 | */ |
95ba8c17 BZ |
390 | if (ali_cable_override(dev)) |
391 | cbl = ATA_CBL_PATA40_SHORT; | |
392 | else { | |
393 | pci_read_config_byte(dev, 0x4a, &tmpbyte); | |
394 | if ((tmpbyte & (1 << hwif->channel)) == 0) | |
395 | cbl = ATA_CBL_PATA80; | |
396 | } | |
1da177e4 LT |
397 | } |
398 | ||
1da177e4 LT |
399 | local_irq_restore(flags); |
400 | ||
95ba8c17 | 401 | return cbl; |
1da177e4 LT |
402 | } |
403 | ||
6d1cee44 | 404 | #if !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) |
1da177e4 LT |
405 | /** |
406 | * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff | |
407 | * @hwif: interface to configure | |
408 | * | |
409 | * Obtain the IRQ tables for an ALi based IDE solution on the PC | |
410 | * class platforms. This part of the code isn't applicable to the | |
6d1cee44 | 411 | * Sparc and PowerPC systems. |
1da177e4 LT |
412 | */ |
413 | ||
c2f12589 | 414 | static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif) |
1da177e4 | 415 | { |
36501650 | 416 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
1da177e4 LT |
417 | u8 ideic, inmir; |
418 | s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6, | |
419 | 1, 11, 0, 12, 0, 14, 0, 15 }; | |
420 | int irq = -1; | |
421 | ||
36501650 | 422 | if (dev->device == PCI_DEVICE_ID_AL_M5229) |
1da177e4 LT |
423 | hwif->irq = hwif->channel ? 15 : 14; |
424 | ||
425 | if (isa_dev) { | |
426 | /* | |
427 | * read IDE interface control | |
428 | */ | |
429 | pci_read_config_byte(isa_dev, 0x58, &ideic); | |
430 | ||
431 | /* bit0, bit1 */ | |
432 | ideic = ideic & 0x03; | |
433 | ||
434 | /* get IRQ for IDE Controller */ | |
435 | if ((hwif->channel && ideic == 0x03) || | |
436 | (!hwif->channel && !ideic)) { | |
437 | /* | |
438 | * get SIRQ1 routing table | |
439 | */ | |
440 | pci_read_config_byte(isa_dev, 0x44, &inmir); | |
441 | inmir = inmir & 0x0f; | |
442 | irq = irq_routing_table[inmir]; | |
443 | } else if (hwif->channel && !(ideic & 0x01)) { | |
444 | /* | |
445 | * get SIRQ2 routing table | |
446 | */ | |
447 | pci_read_config_byte(isa_dev, 0x75, &inmir); | |
448 | inmir = inmir & 0x0f; | |
449 | irq = irq_routing_table[inmir]; | |
450 | } | |
451 | if(irq >= 0) | |
452 | hwif->irq = irq; | |
453 | } | |
1da177e4 | 454 | } |
6d1cee44 AV |
455 | #else |
456 | #define init_hwif_ali15x3 NULL | |
457 | #endif /* !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) */ | |
1da177e4 LT |
458 | |
459 | /** | |
460 | * init_dma_ali15x3 - set up DMA on ALi15x3 | |
461 | * @hwif: IDE interface | |
b123f56e | 462 | * @d: IDE port info |
1da177e4 | 463 | * |
b123f56e | 464 | * Set up the DMA functionality on the ALi 15x3. |
1da177e4 LT |
465 | */ |
466 | ||
b123f56e BZ |
467 | static int __devinit init_dma_ali15x3(ide_hwif_t *hwif, |
468 | const struct ide_port_info *d) | |
1da177e4 | 469 | { |
b123f56e BZ |
470 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
471 | unsigned long base = ide_pci_dma_base(hwif, d); | |
472 | ||
ebb00fb5 BZ |
473 | if (base == 0) |
474 | return -1; | |
475 | ||
476 | hwif->dma_base = base; | |
477 | ||
478 | if (ide_pci_check_simplex(hwif, d) < 0) | |
479 | return -1; | |
480 | ||
481 | if (ide_pci_set_master(dev, d->name) < 0) | |
b123f56e BZ |
482 | return -1; |
483 | ||
0ecdca26 | 484 | if (!hwif->channel) |
b123f56e BZ |
485 | outb(inb(base + 2) & 0x60, base + 2); |
486 | ||
487 | printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", | |
488 | hwif->name, base, base + 7); | |
489 | ||
490 | if (ide_allocate_dma_engine(hwif)) | |
491 | return -1; | |
492 | ||
b123f56e | 493 | return 0; |
1da177e4 LT |
494 | } |
495 | ||
ac95beed BZ |
496 | static const struct ide_port_ops ali_port_ops = { |
497 | .set_pio_mode = ali_set_pio_mode, | |
498 | .set_dma_mode = ali_set_dma_mode, | |
499 | .udma_filter = ali_udma_filter, | |
500 | .cable_detect = ali_cable_detect, | |
501 | }; | |
502 | ||
f37afdac BZ |
503 | static const struct ide_dma_ops ali_dma_ops = { |
504 | .dma_host_set = ide_dma_host_set, | |
5e37bdc0 | 505 | .dma_setup = ali15x3_dma_setup, |
f37afdac BZ |
506 | .dma_exec_cmd = ide_dma_exec_cmd, |
507 | .dma_start = ide_dma_start, | |
653bcf52 | 508 | .dma_end = ide_dma_end, |
f37afdac BZ |
509 | .dma_test_irq = ide_dma_test_irq, |
510 | .dma_lost_irq = ide_dma_lost_irq, | |
511 | .dma_timeout = ide_dma_timeout, | |
592b5315 | 512 | .dma_sff_read_status = ide_dma_sff_read_status, |
5e37bdc0 BZ |
513 | }; |
514 | ||
85620436 | 515 | static const struct ide_port_info ali15x3_chipset __devinitdata = { |
ced3ec8a | 516 | .name = DRV_NAME, |
1da177e4 LT |
517 | .init_chipset = init_chipset_ali15x3, |
518 | .init_hwif = init_hwif_ali15x3, | |
519 | .init_dma = init_dma_ali15x3, | |
ac95beed | 520 | .port_ops = &ali_port_ops, |
3f023b01 | 521 | .dma_ops = &sff_dma_ops, |
4099d143 | 522 | .pio_mask = ATA_PIO5, |
5f8b6c34 BZ |
523 | .swdma_mask = ATA_SWDMA2, |
524 | .mwdma_mask = ATA_MWDMA2, | |
1da177e4 LT |
525 | }; |
526 | ||
527 | /** | |
528 | * alim15x3_init_one - set up an ALi15x3 IDE controller | |
529 | * @dev: PCI device to set up | |
530 | * | |
531 | * Perform the actual set up for an ALi15x3 that has been found by the | |
532 | * hot plug layer. | |
533 | */ | |
534 | ||
535 | static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |
536 | { | |
039788e1 | 537 | struct ide_port_info d = ali15x3_chipset; |
8ac2b42a | 538 | u8 rev = dev->revision, idx = id->driver_data; |
1da177e4 | 539 | |
28328307 BZ |
540 | /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ |
541 | if (rev <= 0xC4) | |
542 | d.host_flags |= IDE_HFLAG_NO_LBA48_DMA; | |
543 | ||
544 | if (rev >= 0x20) { | |
545 | if (rev == 0x20) | |
546 | d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA; | |
547 | ||
548 | if (rev < 0xC2) | |
549 | d.udma_mask = ATA_UDMA2; | |
550 | else if (rev == 0xC2 || rev == 0xC3) | |
551 | d.udma_mask = ATA_UDMA4; | |
552 | else if (rev == 0xC4) | |
553 | d.udma_mask = ATA_UDMA5; | |
554 | else | |
555 | d.udma_mask = ATA_UDMA6; | |
5e37bdc0 BZ |
556 | |
557 | d.dma_ops = &ali_dma_ops; | |
6d36b95f BZ |
558 | } else { |
559 | d.host_flags |= IDE_HFLAG_NO_DMA; | |
560 | ||
561 | d.mwdma_mask = d.swdma_mask = 0; | |
28328307 BZ |
562 | } |
563 | ||
8ac2b42a BZ |
564 | if (idx == 0) |
565 | d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; | |
566 | ||
6cdf6eb3 | 567 | return ide_pci_init_one(dev, &d, NULL); |
1da177e4 LT |
568 | } |
569 | ||
570 | ||
9cbcc5e3 BZ |
571 | static const struct pci_device_id alim15x3_pci_tbl[] = { |
572 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 }, | |
8ac2b42a | 573 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 }, |
1da177e4 LT |
574 | { 0, }, |
575 | }; | |
576 | MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl); | |
577 | ||
a9ab09e2 | 578 | static struct pci_driver alim15x3_pci_driver = { |
1da177e4 LT |
579 | .name = "ALI15x3_IDE", |
580 | .id_table = alim15x3_pci_tbl, | |
581 | .probe = alim15x3_init_one, | |
8ee3f3b6 | 582 | .remove = ide_pci_remove, |
feb22b7f BZ |
583 | .suspend = ide_pci_suspend, |
584 | .resume = ide_pci_resume, | |
1da177e4 LT |
585 | }; |
586 | ||
82ab1eec | 587 | static int __init ali15x3_ide_init(void) |
1da177e4 | 588 | { |
a9ab09e2 | 589 | return ide_pci_register_driver(&alim15x3_pci_driver); |
1da177e4 LT |
590 | } |
591 | ||
8ee3f3b6 BZ |
592 | static void __exit ali15x3_ide_exit(void) |
593 | { | |
95964018 | 594 | pci_unregister_driver(&alim15x3_pci_driver); |
8ee3f3b6 BZ |
595 | } |
596 | ||
1da177e4 | 597 | module_init(ali15x3_ide_init); |
8ee3f3b6 | 598 | module_exit(ali15x3_ide_exit); |
1da177e4 LT |
599 | |
600 | MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox"); | |
601 | MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE"); | |
602 | MODULE_LICENSE("GPL"); |