Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
204f47c5 BZ |
2 | * IDE DMA support (including IDE PCI BM-DMA). |
3 | * | |
59bca8cc BZ |
4 | * Copyright (C) 1995-1998 Mark Lord |
5 | * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> | |
6 | * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz | |
58f189fc | 7 | * |
1da177e4 | 8 | * May be copied or modified under the terms of the GNU General Public License |
204f47c5 BZ |
9 | * |
10 | * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies). | |
1da177e4 LT |
11 | */ |
12 | ||
13 | /* | |
14 | * Special Thanks to Mark for his Six years of work. | |
1da177e4 LT |
15 | */ |
16 | ||
17 | /* | |
1da177e4 LT |
18 | * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for |
19 | * fixing the problem with the BIOS on some Acer motherboards. | |
20 | * | |
21 | * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing | |
22 | * "TX" chipset compatibility and for providing patches for the "TX" chipset. | |
23 | * | |
24 | * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack | |
25 | * at generic DMA -- his patches were referred to when preparing this code. | |
26 | * | |
27 | * Most importantly, thanks to Robert Bringman <rob@mars.trion.com> | |
28 | * for supplying a Promise UDMA board & WD UDMA drive for this work! | |
1da177e4 LT |
29 | */ |
30 | ||
1da177e4 | 31 | #include <linux/types.h> |
5a0e3ad6 | 32 | #include <linux/gfp.h> |
1da177e4 | 33 | #include <linux/kernel.h> |
1da177e4 | 34 | #include <linux/ide.h> |
1da177e4 | 35 | #include <linux/scatterlist.h> |
5c05ff68 | 36 | #include <linux/dma-mapping.h> |
1da177e4 | 37 | |
db3f99ef | 38 | static const struct drive_list_entry drive_whitelist[] = { |
c2d3ce8c JH |
39 | { "Micropolis 2112A" , NULL }, |
40 | { "CONNER CTMA 4000" , NULL }, | |
41 | { "CONNER CTT8000-A" , NULL }, | |
42 | { "ST34342A" , NULL }, | |
1da177e4 LT |
43 | { NULL , NULL } |
44 | }; | |
45 | ||
db3f99ef | 46 | static const struct drive_list_entry drive_blacklist[] = { |
c2d3ce8c JH |
47 | { "WDC AC11000H" , NULL }, |
48 | { "WDC AC22100H" , NULL }, | |
49 | { "WDC AC32500H" , NULL }, | |
50 | { "WDC AC33100H" , NULL }, | |
51 | { "WDC AC31600H" , NULL }, | |
1da177e4 LT |
52 | { "WDC AC32100H" , "24.09P07" }, |
53 | { "WDC AC23200L" , "21.10N21" }, | |
c2d3ce8c JH |
54 | { "Compaq CRD-8241B" , NULL }, |
55 | { "CRD-8400B" , NULL }, | |
56 | { "CRD-8480B", NULL }, | |
57 | { "CRD-8482B", NULL }, | |
58 | { "CRD-84" , NULL }, | |
59 | { "SanDisk SDP3B" , NULL }, | |
60 | { "SanDisk SDP3B-64" , NULL }, | |
61 | { "SANYO CD-ROM CRD" , NULL }, | |
62 | { "HITACHI CDR-8" , NULL }, | |
63 | { "HITACHI CDR-8335" , NULL }, | |
64 | { "HITACHI CDR-8435" , NULL }, | |
65 | { "Toshiba CD-ROM XM-6202B" , NULL }, | |
66 | { "TOSHIBA CD-ROM XM-1702BC", NULL }, | |
67 | { "CD-532E-A" , NULL }, | |
68 | { "E-IDE CD-ROM CR-840", NULL }, | |
69 | { "CD-ROM Drive/F5A", NULL }, | |
70 | { "WPI CDD-820", NULL }, | |
71 | { "SAMSUNG CD-ROM SC-148C", NULL }, | |
72 | { "SAMSUNG CD-ROM SC", NULL }, | |
73 | { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL }, | |
74 | { "_NEC DV5800A", NULL }, | |
5a6248ca | 75 | { "SAMSUNG CD-ROM SN-124", "N001" }, |
c2d3ce8c | 76 | { "Seagate STT20000A", NULL }, |
b0bc65b9 | 77 | { "CD-ROM CDR_U200", "1.09" }, |
1da177e4 LT |
78 | { NULL , NULL } |
79 | ||
80 | }; | |
81 | ||
1da177e4 LT |
82 | /** |
83 | * ide_dma_intr - IDE DMA interrupt handler | |
84 | * @drive: the drive the interrupt is for | |
85 | * | |
db3f99ef | 86 | * Handle an interrupt completing a read/write DMA transfer on an |
1da177e4 LT |
87 | * IDE device |
88 | */ | |
db3f99ef BZ |
89 | |
90 | ide_startstop_t ide_dma_intr(ide_drive_t *drive) | |
1da177e4 | 91 | { |
b73c7ee2 | 92 | ide_hwif_t *hwif = drive->hwif; |
f094d4d8 | 93 | struct ide_cmd *cmd = &hwif->cmd; |
1da177e4 LT |
94 | u8 stat = 0, dma_stat = 0; |
95 | ||
88b4132e | 96 | drive->waiting_for_dma = 0; |
b73c7ee2 | 97 | dma_stat = hwif->dma_ops->dma_end(drive); |
f094d4d8 | 98 | ide_dma_unmap_sg(drive, cmd); |
374e042c | 99 | stat = hwif->tp_ops->read_status(hwif); |
c47137a9 | 100 | |
3a7d2484 | 101 | if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) { |
1da177e4 | 102 | if (!dma_stat) { |
2230d90d BZ |
103 | if ((cmd->tf_flags & IDE_TFLAG_FS) == 0) |
104 | ide_finish_cmd(drive, cmd, stat); | |
105 | else | |
130e8867 | 106 | ide_complete_rq(drive, 0, |
9780e2dd | 107 | blk_rq_sectors(cmd->rq) << 9); |
1da177e4 LT |
108 | return ide_stopped; |
109 | } | |
db3f99ef BZ |
110 | printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n", |
111 | drive->name, __func__, dma_stat); | |
1da177e4 LT |
112 | } |
113 | return ide_error(drive, "dma_intr", stat); | |
114 | } | |
1da177e4 | 115 | |
2dbe7e91 | 116 | int ide_dma_good_drive(ide_drive_t *drive) |
75d7d963 BZ |
117 | { |
118 | return ide_in_drive_list(drive->id, drive_whitelist); | |
119 | } | |
120 | ||
1da177e4 | 121 | /** |
f094d4d8 BZ |
122 | * ide_dma_map_sg - map IDE scatter gather for DMA I/O |
123 | * @drive: the drive to map the DMA table for | |
22981694 | 124 | * @cmd: command |
1da177e4 | 125 | * |
5c05ff68 BZ |
126 | * Perform the DMA mapping magic necessary to access the source or |
127 | * target buffers of a request via DMA. The lower layers of the | |
1da177e4 | 128 | * kernel provide the necessary cache management so that we can |
5c05ff68 | 129 | * operate in a portable fashion. |
1da177e4 LT |
130 | */ |
131 | ||
f094d4d8 | 132 | static int ide_dma_map_sg(ide_drive_t *drive, struct ide_cmd *cmd) |
1da177e4 | 133 | { |
db3f99ef | 134 | ide_hwif_t *hwif = drive->hwif; |
1da177e4 | 135 | struct scatterlist *sg = hwif->sg_table; |
5d82720a | 136 | int i; |
1da177e4 | 137 | |
22981694 | 138 | if (cmd->tf_flags & IDE_TFLAG_WRITE) |
b6308ee0 | 139 | cmd->sg_dma_direction = DMA_TO_DEVICE; |
22981694 BZ |
140 | else |
141 | cmd->sg_dma_direction = DMA_FROM_DEVICE; | |
1da177e4 | 142 | |
b6308ee0 | 143 | i = dma_map_sg(hwif->dev, sg, cmd->sg_nents, cmd->sg_dma_direction); |
f094d4d8 | 144 | if (i) { |
b6308ee0 BZ |
145 | cmd->orig_sg_nents = cmd->sg_nents; |
146 | cmd->sg_nents = i; | |
5d82720a FT |
147 | } |
148 | ||
149 | return i; | |
1da177e4 | 150 | } |
1da177e4 | 151 | |
1da177e4 | 152 | /** |
f094d4d8 | 153 | * ide_dma_unmap_sg - clean up DMA mapping |
1da177e4 LT |
154 | * @drive: The drive to unmap |
155 | * | |
156 | * Teardown mappings after DMA has completed. This must be called | |
157 | * after the completion of each use of ide_build_dmatable and before | |
158 | * the next use of ide_build_dmatable. Failure to do so will cause | |
159 | * an oops as only one mapping can be live for each target at a given | |
160 | * time. | |
161 | */ | |
db3f99ef | 162 | |
f094d4d8 | 163 | void ide_dma_unmap_sg(ide_drive_t *drive, struct ide_cmd *cmd) |
1da177e4 | 164 | { |
36501650 | 165 | ide_hwif_t *hwif = drive->hwif; |
1da177e4 | 166 | |
b6308ee0 BZ |
167 | dma_unmap_sg(hwif->dev, hwif->sg_table, cmd->orig_sg_nents, |
168 | cmd->sg_dma_direction); | |
1da177e4 | 169 | } |
f094d4d8 | 170 | EXPORT_SYMBOL_GPL(ide_dma_unmap_sg); |
1da177e4 | 171 | |
1da177e4 | 172 | /** |
7469aaf6 | 173 | * ide_dma_off_quietly - Generic DMA kill |
1da177e4 LT |
174 | * @drive: drive to control |
175 | * | |
db3f99ef | 176 | * Turn off the current DMA on this IDE controller. |
1da177e4 LT |
177 | */ |
178 | ||
7469aaf6 | 179 | void ide_dma_off_quietly(ide_drive_t *drive) |
1da177e4 | 180 | { |
97100fc8 | 181 | drive->dev_flags &= ~IDE_DFLAG_USING_DMA; |
1da177e4 LT |
182 | ide_toggle_bounce(drive, 0); |
183 | ||
5e37bdc0 | 184 | drive->hwif->dma_ops->dma_host_set(drive, 0); |
1da177e4 | 185 | } |
7469aaf6 | 186 | EXPORT_SYMBOL(ide_dma_off_quietly); |
1da177e4 LT |
187 | |
188 | /** | |
7469aaf6 | 189 | * ide_dma_off - disable DMA on a device |
1da177e4 LT |
190 | * @drive: drive to disable DMA on |
191 | * | |
192 | * Disable IDE DMA for a device on this IDE controller. | |
193 | * Inform the user that DMA has been disabled. | |
194 | */ | |
195 | ||
7469aaf6 | 196 | void ide_dma_off(ide_drive_t *drive) |
1da177e4 LT |
197 | { |
198 | printk(KERN_INFO "%s: DMA disabled\n", drive->name); | |
4a546e04 | 199 | ide_dma_off_quietly(drive); |
1da177e4 | 200 | } |
7469aaf6 | 201 | EXPORT_SYMBOL(ide_dma_off); |
1da177e4 | 202 | |
1da177e4 | 203 | /** |
4a546e04 | 204 | * ide_dma_on - Enable DMA on a device |
1da177e4 LT |
205 | * @drive: drive to enable DMA on |
206 | * | |
207 | * Enable IDE DMA for a device on this IDE controller. | |
208 | */ | |
4a546e04 BZ |
209 | |
210 | void ide_dma_on(ide_drive_t *drive) | |
1da177e4 | 211 | { |
97100fc8 | 212 | drive->dev_flags |= IDE_DFLAG_USING_DMA; |
1da177e4 LT |
213 | ide_toggle_bounce(drive, 1); |
214 | ||
5e37bdc0 | 215 | drive->hwif->dma_ops->dma_host_set(drive, 1); |
1da177e4 LT |
216 | } |
217 | ||
db3f99ef | 218 | int __ide_dma_bad_drive(ide_drive_t *drive) |
1da177e4 | 219 | { |
4dde4492 | 220 | u16 *id = drive->id; |
1da177e4 | 221 | |
65e5f2e3 | 222 | int blacklist = ide_in_drive_list(id, drive_blacklist); |
1da177e4 LT |
223 | if (blacklist) { |
224 | printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n", | |
4dde4492 | 225 | drive->name, (char *)&id[ATA_ID_PROD]); |
1da177e4 LT |
226 | return blacklist; |
227 | } | |
228 | return 0; | |
229 | } | |
1da177e4 LT |
230 | EXPORT_SYMBOL(__ide_dma_bad_drive); |
231 | ||
2d5eaa6d BZ |
232 | static const u8 xfer_mode_bases[] = { |
233 | XFER_UDMA_0, | |
234 | XFER_MW_DMA_0, | |
235 | XFER_SW_DMA_0, | |
236 | }; | |
237 | ||
7670df73 | 238 | static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode) |
2d5eaa6d | 239 | { |
4dde4492 | 240 | u16 *id = drive->id; |
2d5eaa6d | 241 | ide_hwif_t *hwif = drive->hwif; |
ac95beed | 242 | const struct ide_port_ops *port_ops = hwif->port_ops; |
2d5eaa6d BZ |
243 | unsigned int mask = 0; |
244 | ||
db3f99ef | 245 | switch (base) { |
2d5eaa6d | 246 | case XFER_UDMA_0: |
4dde4492 | 247 | if ((id[ATA_ID_FIELD_VALID] & 4) == 0) |
2d5eaa6d | 248 | break; |
8d64fcd9 | 249 | mask = id[ATA_ID_UDMA_MODES]; |
ac95beed | 250 | if (port_ops && port_ops->udma_filter) |
8d64fcd9 | 251 | mask &= port_ops->udma_filter(drive); |
851dd33b | 252 | else |
8d64fcd9 | 253 | mask &= hwif->ultra_mask; |
2d5eaa6d | 254 | |
7670df73 BZ |
255 | /* |
256 | * avoid false cable warning from eighty_ninty_three() | |
257 | */ | |
258 | if (req_mode > XFER_UDMA_2) { | |
259 | if ((mask & 0x78) && (eighty_ninty_three(drive) == 0)) | |
260 | mask &= 0x07; | |
261 | } | |
2d5eaa6d BZ |
262 | break; |
263 | case XFER_MW_DMA_0: | |
8d64fcd9 | 264 | mask = id[ATA_ID_MWDMA_MODES]; |
74638c84 SS |
265 | |
266 | /* Also look for the CF specific MWDMA modes... */ | |
267 | if (ata_id_is_cfa(id) && (id[ATA_ID_CFA_MODES] & 0x38)) { | |
268 | u8 mode = ((id[ATA_ID_CFA_MODES] & 0x38) >> 3) - 1; | |
269 | ||
270 | mask |= ((2 << mode) - 1) << 3; | |
271 | } | |
272 | ||
ac95beed | 273 | if (port_ops && port_ops->mdma_filter) |
8d64fcd9 | 274 | mask &= port_ops->mdma_filter(drive); |
b4e44369 | 275 | else |
8d64fcd9 | 276 | mask &= hwif->mwdma_mask; |
2d5eaa6d BZ |
277 | break; |
278 | case XFER_SW_DMA_0: | |
8d64fcd9 SS |
279 | mask = id[ATA_ID_SWDMA_MODES]; |
280 | if (!(mask & ATA_SWDMA2) && (id[ATA_ID_OLD_DMA_MODES] >> 8)) { | |
48fb2688 | 281 | u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8; |
15a4f943 BZ |
282 | |
283 | /* | |
284 | * if the mode is valid convert it to the mask | |
285 | * (the maximum allowed mode is XFER_SW_DMA_2) | |
286 | */ | |
287 | if (mode <= 2) | |
8d64fcd9 | 288 | mask = (2 << mode) - 1; |
15a4f943 | 289 | } |
8d64fcd9 | 290 | mask &= hwif->swdma_mask; |
2d5eaa6d BZ |
291 | break; |
292 | default: | |
293 | BUG(); | |
294 | break; | |
295 | } | |
296 | ||
297 | return mask; | |
298 | } | |
299 | ||
300 | /** | |
7670df73 | 301 | * ide_find_dma_mode - compute DMA speed |
2d5eaa6d | 302 | * @drive: IDE device |
7670df73 BZ |
303 | * @req_mode: requested mode |
304 | * | |
305 | * Checks the drive/host capabilities and finds the speed to use for | |
306 | * the DMA transfer. The speed is then limited by the requested mode. | |
2d5eaa6d | 307 | * |
7670df73 BZ |
308 | * Returns 0 if the drive/host combination is incapable of DMA transfers |
309 | * or if the requested mode is not a DMA mode. | |
2d5eaa6d BZ |
310 | */ |
311 | ||
7670df73 | 312 | u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode) |
2d5eaa6d BZ |
313 | { |
314 | ide_hwif_t *hwif = drive->hwif; | |
315 | unsigned int mask; | |
316 | int x, i; | |
317 | u8 mode = 0; | |
318 | ||
33c1002e BZ |
319 | if (drive->media != ide_disk) { |
320 | if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA) | |
321 | return 0; | |
322 | } | |
2d5eaa6d BZ |
323 | |
324 | for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) { | |
7670df73 BZ |
325 | if (req_mode < xfer_mode_bases[i]) |
326 | continue; | |
327 | mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode); | |
2d5eaa6d BZ |
328 | x = fls(mask) - 1; |
329 | if (x >= 0) { | |
330 | mode = xfer_mode_bases[i] + x; | |
331 | break; | |
332 | } | |
333 | } | |
334 | ||
75d7d963 BZ |
335 | if (hwif->chipset == ide_acorn && mode == 0) { |
336 | /* | |
337 | * is this correct? | |
338 | */ | |
4dde4492 BZ |
339 | if (ide_dma_good_drive(drive) && |
340 | drive->id[ATA_ID_EIDE_DMA_TIME] < 150) | |
75d7d963 BZ |
341 | mode = XFER_MW_DMA_1; |
342 | } | |
343 | ||
3ab7efe8 BZ |
344 | mode = min(mode, req_mode); |
345 | ||
346 | printk(KERN_INFO "%s: %s mode selected\n", drive->name, | |
d34887da | 347 | mode ? ide_xfer_verbose(mode) : "no DMA"); |
2d5eaa6d | 348 | |
3ab7efe8 | 349 | return mode; |
2d5eaa6d | 350 | } |
2d5eaa6d | 351 | |
0ae2e178 | 352 | static int ide_tune_dma(ide_drive_t *drive) |
29e744d0 | 353 | { |
8704de8f | 354 | ide_hwif_t *hwif = drive->hwif; |
29e744d0 BZ |
355 | u8 speed; |
356 | ||
97100fc8 BZ |
357 | if (ata_id_has_dma(drive->id) == 0 || |
358 | (drive->dev_flags & IDE_DFLAG_NODMA)) | |
122ab088 BZ |
359 | return 0; |
360 | ||
361 | /* consult the list of known "bad" drives */ | |
362 | if (__ide_dma_bad_drive(drive)) | |
29e744d0 BZ |
363 | return 0; |
364 | ||
8704de8f | 365 | if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA) |
0ae2e178 BZ |
366 | return config_drive_for_dma(drive); |
367 | ||
29e744d0 BZ |
368 | speed = ide_max_dma_mode(drive); |
369 | ||
951784b6 BZ |
370 | if (!speed) |
371 | return 0; | |
29e744d0 | 372 | |
88b2b32b | 373 | if (ide_set_dma_mode(drive, speed)) |
4728d546 | 374 | return 0; |
29e744d0 | 375 | |
4728d546 | 376 | return 1; |
29e744d0 BZ |
377 | } |
378 | ||
0ae2e178 BZ |
379 | static int ide_dma_check(ide_drive_t *drive) |
380 | { | |
381 | ide_hwif_t *hwif = drive->hwif; | |
0ae2e178 | 382 | |
ba4b2e60 | 383 | if (ide_tune_dma(drive)) |
0ae2e178 BZ |
384 | return 0; |
385 | ||
386 | /* TODO: always do PIO fallback */ | |
387 | if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA) | |
388 | return -1; | |
389 | ||
390 | ide_set_max_pio(drive); | |
391 | ||
ba4b2e60 | 392 | return -1; |
0ae2e178 BZ |
393 | } |
394 | ||
3608b5d7 BZ |
395 | int ide_set_dma(ide_drive_t *drive) |
396 | { | |
3608b5d7 BZ |
397 | int rc; |
398 | ||
7b905994 BZ |
399 | /* |
400 | * Force DMAing for the beginning of the check. | |
401 | * Some chipsets appear to do interesting | |
402 | * things, if not checked and cleared. | |
403 | * PARANOIA!!! | |
404 | */ | |
4a546e04 | 405 | ide_dma_off_quietly(drive); |
3608b5d7 | 406 | |
7b905994 BZ |
407 | rc = ide_dma_check(drive); |
408 | if (rc) | |
409 | return rc; | |
3608b5d7 | 410 | |
4a546e04 BZ |
411 | ide_dma_on(drive); |
412 | ||
413 | return 0; | |
3608b5d7 BZ |
414 | } |
415 | ||
578cfa0d BZ |
416 | void ide_check_dma_crc(ide_drive_t *drive) |
417 | { | |
418 | u8 mode; | |
419 | ||
420 | ide_dma_off_quietly(drive); | |
421 | drive->crc_count = 0; | |
422 | mode = drive->current_speed; | |
423 | /* | |
424 | * Don't try non Ultra-DMA modes without iCRC's. Force the | |
425 | * device to PIO and make the user enable SWDMA/MWDMA modes. | |
426 | */ | |
427 | if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7) | |
428 | mode--; | |
429 | else | |
430 | mode = XFER_PIO_4; | |
431 | ide_set_xfer_rate(drive, mode); | |
432 | if (drive->current_speed >= XFER_SW_DMA_0) | |
433 | ide_dma_on(drive); | |
434 | } | |
435 | ||
de23ec9c | 436 | void ide_dma_lost_irq(ide_drive_t *drive) |
1da177e4 | 437 | { |
de23ec9c | 438 | printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name); |
1da177e4 | 439 | } |
de23ec9c | 440 | EXPORT_SYMBOL_GPL(ide_dma_lost_irq); |
1da177e4 | 441 | |
65ca5377 BZ |
442 | /* |
443 | * un-busy the port etc, and clear any pending DMA status. we want to | |
444 | * retry the current request in pio mode instead of risking tossing it | |
445 | * all away | |
446 | */ | |
447 | ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) | |
448 | { | |
449 | ide_hwif_t *hwif = drive->hwif; | |
35c9b4da | 450 | const struct ide_dma_ops *dma_ops = hwif->dma_ops; |
f094d4d8 | 451 | struct ide_cmd *cmd = &hwif->cmd; |
65ca5377 BZ |
452 | struct request *rq; |
453 | ide_startstop_t ret = ide_stopped; | |
454 | ||
455 | /* | |
456 | * end current dma transaction | |
457 | */ | |
458 | ||
459 | if (error < 0) { | |
460 | printk(KERN_WARNING "%s: DMA timeout error\n", drive->name); | |
88b4132e | 461 | drive->waiting_for_dma = 0; |
35c9b4da | 462 | (void)dma_ops->dma_end(drive); |
f094d4d8 | 463 | ide_dma_unmap_sg(drive, cmd); |
65ca5377 BZ |
464 | ret = ide_error(drive, "dma timeout error", |
465 | hwif->tp_ops->read_status(hwif)); | |
466 | } else { | |
467 | printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name); | |
35c9b4da BZ |
468 | if (dma_ops->dma_clear) |
469 | dma_ops->dma_clear(drive); | |
1cee52de BZ |
470 | printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name); |
471 | if (dma_ops->dma_test_irq(drive) == 0) { | |
472 | ide_dump_status(drive, "DMA timeout", | |
473 | hwif->tp_ops->read_status(hwif)); | |
88b4132e | 474 | drive->waiting_for_dma = 0; |
1cee52de | 475 | (void)dma_ops->dma_end(drive); |
f094d4d8 | 476 | ide_dma_unmap_sg(drive, cmd); |
1cee52de | 477 | } |
65ca5377 BZ |
478 | } |
479 | ||
480 | /* | |
481 | * disable dma for now, but remember that we did so because of | |
482 | * a timeout -- we'll reenable after we finish this next request | |
483 | * (or rather the first chunk of it) in pio. | |
484 | */ | |
485 | drive->dev_flags |= IDE_DFLAG_DMA_PIO_RETRY; | |
486 | drive->retry_pio++; | |
487 | ide_dma_off_quietly(drive); | |
488 | ||
489 | /* | |
490 | * un-busy drive etc and make sure request is sane | |
491 | */ | |
65ca5377 | 492 | rq = hwif->rq; |
586cf268 TH |
493 | if (rq) { |
494 | hwif->rq = NULL; | |
495 | rq->errors = 0; | |
6072f749 | 496 | ide_requeue_and_plug(drive, rq); |
586cf268 | 497 | } |
65ca5377 BZ |
498 | return ret; |
499 | } | |
500 | ||
0d1bad21 | 501 | void ide_release_dma_engine(ide_hwif_t *hwif) |
1da177e4 LT |
502 | { |
503 | if (hwif->dmatable_cpu) { | |
2bbd57ca | 504 | int prd_size = hwif->prd_max_nents * hwif->prd_ent_size; |
36501650 | 505 | |
2bbd57ca BZ |
506 | dma_free_coherent(hwif->dev, prd_size, |
507 | hwif->dmatable_cpu, hwif->dmatable_dma); | |
1da177e4 LT |
508 | hwif->dmatable_cpu = NULL; |
509 | } | |
1da177e4 | 510 | } |
2bbd57ca | 511 | EXPORT_SYMBOL_GPL(ide_release_dma_engine); |
1da177e4 | 512 | |
b8e73fba | 513 | int ide_allocate_dma_engine(ide_hwif_t *hwif) |
1da177e4 | 514 | { |
2bbd57ca | 515 | int prd_size; |
36501650 | 516 | |
2bbd57ca BZ |
517 | if (hwif->prd_max_nents == 0) |
518 | hwif->prd_max_nents = PRD_ENTRIES; | |
519 | if (hwif->prd_ent_size == 0) | |
520 | hwif->prd_ent_size = PRD_BYTES; | |
1da177e4 | 521 | |
2bbd57ca | 522 | prd_size = hwif->prd_max_nents * hwif->prd_ent_size; |
1da177e4 | 523 | |
2bbd57ca BZ |
524 | hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size, |
525 | &hwif->dmatable_dma, | |
526 | GFP_ATOMIC); | |
527 | if (hwif->dmatable_cpu == NULL) { | |
528 | printk(KERN_ERR "%s: unable to allocate PRD table\n", | |
5e59c236 | 529 | hwif->name); |
2bbd57ca BZ |
530 | return -ENOMEM; |
531 | } | |
1da177e4 | 532 | |
2bbd57ca | 533 | return 0; |
1da177e4 | 534 | } |
b8e73fba | 535 | EXPORT_SYMBOL_GPL(ide_allocate_dma_engine); |
5ae5412d BZ |
536 | |
537 | int ide_dma_prepare(ide_drive_t *drive, struct ide_cmd *cmd) | |
538 | { | |
8a4a5738 BZ |
539 | const struct ide_dma_ops *dma_ops = drive->hwif->dma_ops; |
540 | ||
5ae5412d | 541 | if ((drive->dev_flags & IDE_DFLAG_USING_DMA) == 0 || |
f094d4d8 BZ |
542 | (dma_ops->dma_check && dma_ops->dma_check(drive, cmd))) |
543 | goto out; | |
544 | ide_map_sg(drive, cmd); | |
545 | if (ide_dma_map_sg(drive, cmd) == 0) | |
546 | goto out_map; | |
547 | if (dma_ops->dma_setup(drive, cmd)) | |
548 | goto out_dma_unmap; | |
88b4132e | 549 | drive->waiting_for_dma = 1; |
5ae5412d | 550 | return 0; |
f094d4d8 BZ |
551 | out_dma_unmap: |
552 | ide_dma_unmap_sg(drive, cmd); | |
553 | out_map: | |
554 | ide_map_sg(drive, cmd); | |
555 | out: | |
556 | return 1; | |
5ae5412d | 557 | } |