Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
204f47c5 BZ |
2 | * IDE DMA support (including IDE PCI BM-DMA). |
3 | * | |
59bca8cc BZ |
4 | * Copyright (C) 1995-1998 Mark Lord |
5 | * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> | |
6 | * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz | |
58f189fc | 7 | * |
1da177e4 | 8 | * May be copied or modified under the terms of the GNU General Public License |
204f47c5 BZ |
9 | * |
10 | * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies). | |
1da177e4 LT |
11 | */ |
12 | ||
13 | /* | |
14 | * Special Thanks to Mark for his Six years of work. | |
1da177e4 LT |
15 | */ |
16 | ||
17 | /* | |
1da177e4 LT |
18 | * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for |
19 | * fixing the problem with the BIOS on some Acer motherboards. | |
20 | * | |
21 | * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing | |
22 | * "TX" chipset compatibility and for providing patches for the "TX" chipset. | |
23 | * | |
24 | * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack | |
25 | * at generic DMA -- his patches were referred to when preparing this code. | |
26 | * | |
27 | * Most importantly, thanks to Robert Bringman <rob@mars.trion.com> | |
28 | * for supplying a Promise UDMA board & WD UDMA drive for this work! | |
1da177e4 LT |
29 | */ |
30 | ||
1da177e4 LT |
31 | #include <linux/types.h> |
32 | #include <linux/kernel.h> | |
1da177e4 | 33 | #include <linux/ide.h> |
1da177e4 | 34 | #include <linux/scatterlist.h> |
5c05ff68 | 35 | #include <linux/dma-mapping.h> |
1da177e4 | 36 | |
db3f99ef | 37 | static const struct drive_list_entry drive_whitelist[] = { |
c2d3ce8c JH |
38 | { "Micropolis 2112A" , NULL }, |
39 | { "CONNER CTMA 4000" , NULL }, | |
40 | { "CONNER CTT8000-A" , NULL }, | |
41 | { "ST34342A" , NULL }, | |
1da177e4 LT |
42 | { NULL , NULL } |
43 | }; | |
44 | ||
db3f99ef | 45 | static const struct drive_list_entry drive_blacklist[] = { |
c2d3ce8c JH |
46 | { "WDC AC11000H" , NULL }, |
47 | { "WDC AC22100H" , NULL }, | |
48 | { "WDC AC32500H" , NULL }, | |
49 | { "WDC AC33100H" , NULL }, | |
50 | { "WDC AC31600H" , NULL }, | |
1da177e4 LT |
51 | { "WDC AC32100H" , "24.09P07" }, |
52 | { "WDC AC23200L" , "21.10N21" }, | |
c2d3ce8c JH |
53 | { "Compaq CRD-8241B" , NULL }, |
54 | { "CRD-8400B" , NULL }, | |
55 | { "CRD-8480B", NULL }, | |
56 | { "CRD-8482B", NULL }, | |
57 | { "CRD-84" , NULL }, | |
58 | { "SanDisk SDP3B" , NULL }, | |
59 | { "SanDisk SDP3B-64" , NULL }, | |
60 | { "SANYO CD-ROM CRD" , NULL }, | |
61 | { "HITACHI CDR-8" , NULL }, | |
62 | { "HITACHI CDR-8335" , NULL }, | |
63 | { "HITACHI CDR-8435" , NULL }, | |
64 | { "Toshiba CD-ROM XM-6202B" , NULL }, | |
65 | { "TOSHIBA CD-ROM XM-1702BC", NULL }, | |
66 | { "CD-532E-A" , NULL }, | |
67 | { "E-IDE CD-ROM CR-840", NULL }, | |
68 | { "CD-ROM Drive/F5A", NULL }, | |
69 | { "WPI CDD-820", NULL }, | |
70 | { "SAMSUNG CD-ROM SC-148C", NULL }, | |
71 | { "SAMSUNG CD-ROM SC", NULL }, | |
72 | { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL }, | |
73 | { "_NEC DV5800A", NULL }, | |
5a6248ca | 74 | { "SAMSUNG CD-ROM SN-124", "N001" }, |
c2d3ce8c | 75 | { "Seagate STT20000A", NULL }, |
b0bc65b9 | 76 | { "CD-ROM CDR_U200", "1.09" }, |
1da177e4 LT |
77 | { NULL , NULL } |
78 | ||
79 | }; | |
80 | ||
1da177e4 LT |
81 | /** |
82 | * ide_dma_intr - IDE DMA interrupt handler | |
83 | * @drive: the drive the interrupt is for | |
84 | * | |
db3f99ef | 85 | * Handle an interrupt completing a read/write DMA transfer on an |
1da177e4 LT |
86 | * IDE device |
87 | */ | |
db3f99ef BZ |
88 | |
89 | ide_startstop_t ide_dma_intr(ide_drive_t *drive) | |
1da177e4 | 90 | { |
b73c7ee2 | 91 | ide_hwif_t *hwif = drive->hwif; |
1da177e4 LT |
92 | u8 stat = 0, dma_stat = 0; |
93 | ||
b73c7ee2 | 94 | dma_stat = hwif->dma_ops->dma_end(drive); |
374e042c | 95 | stat = hwif->tp_ops->read_status(hwif); |
c47137a9 | 96 | |
3a7d2484 | 97 | if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) { |
1da177e4 | 98 | if (!dma_stat) { |
db3f99ef | 99 | struct request *rq = hwif->hwgroup->rq; |
1da177e4 | 100 | |
4d7a984b | 101 | task_end_request(drive, rq, stat); |
1da177e4 LT |
102 | return ide_stopped; |
103 | } | |
db3f99ef BZ |
104 | printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n", |
105 | drive->name, __func__, dma_stat); | |
1da177e4 LT |
106 | } |
107 | return ide_error(drive, "dma_intr", stat); | |
108 | } | |
1da177e4 LT |
109 | EXPORT_SYMBOL_GPL(ide_dma_intr); |
110 | ||
2dbe7e91 | 111 | int ide_dma_good_drive(ide_drive_t *drive) |
75d7d963 BZ |
112 | { |
113 | return ide_in_drive_list(drive->id, drive_whitelist); | |
114 | } | |
115 | ||
1da177e4 LT |
116 | /** |
117 | * ide_build_sglist - map IDE scatter gather for DMA I/O | |
118 | * @drive: the drive to build the DMA table for | |
119 | * @rq: the request holding the sg list | |
120 | * | |
5c05ff68 BZ |
121 | * Perform the DMA mapping magic necessary to access the source or |
122 | * target buffers of a request via DMA. The lower layers of the | |
1da177e4 | 123 | * kernel provide the necessary cache management so that we can |
5c05ff68 | 124 | * operate in a portable fashion. |
1da177e4 LT |
125 | */ |
126 | ||
127 | int ide_build_sglist(ide_drive_t *drive, struct request *rq) | |
128 | { | |
db3f99ef | 129 | ide_hwif_t *hwif = drive->hwif; |
1da177e4 LT |
130 | struct scatterlist *sg = hwif->sg_table; |
131 | ||
1da177e4 LT |
132 | ide_map_sg(drive, rq); |
133 | ||
134 | if (rq_data_dir(rq) == READ) | |
5c05ff68 | 135 | hwif->sg_dma_direction = DMA_FROM_DEVICE; |
1da177e4 | 136 | else |
5c05ff68 | 137 | hwif->sg_dma_direction = DMA_TO_DEVICE; |
1da177e4 | 138 | |
5c05ff68 BZ |
139 | return dma_map_sg(hwif->dev, sg, hwif->sg_nents, |
140 | hwif->sg_dma_direction); | |
1da177e4 | 141 | } |
1da177e4 LT |
142 | EXPORT_SYMBOL_GPL(ide_build_sglist); |
143 | ||
1da177e4 LT |
144 | /** |
145 | * ide_destroy_dmatable - clean up DMA mapping | |
146 | * @drive: The drive to unmap | |
147 | * | |
148 | * Teardown mappings after DMA has completed. This must be called | |
149 | * after the completion of each use of ide_build_dmatable and before | |
150 | * the next use of ide_build_dmatable. Failure to do so will cause | |
151 | * an oops as only one mapping can be live for each target at a given | |
152 | * time. | |
153 | */ | |
db3f99ef BZ |
154 | |
155 | void ide_destroy_dmatable(ide_drive_t *drive) | |
1da177e4 | 156 | { |
36501650 | 157 | ide_hwif_t *hwif = drive->hwif; |
1da177e4 | 158 | |
5c05ff68 | 159 | dma_unmap_sg(hwif->dev, hwif->sg_table, hwif->sg_nents, |
36501650 | 160 | hwif->sg_dma_direction); |
1da177e4 | 161 | } |
1da177e4 LT |
162 | EXPORT_SYMBOL_GPL(ide_destroy_dmatable); |
163 | ||
1da177e4 | 164 | /** |
7469aaf6 | 165 | * ide_dma_off_quietly - Generic DMA kill |
1da177e4 LT |
166 | * @drive: drive to control |
167 | * | |
db3f99ef | 168 | * Turn off the current DMA on this IDE controller. |
1da177e4 LT |
169 | */ |
170 | ||
7469aaf6 | 171 | void ide_dma_off_quietly(ide_drive_t *drive) |
1da177e4 | 172 | { |
97100fc8 | 173 | drive->dev_flags &= ~IDE_DFLAG_USING_DMA; |
1da177e4 LT |
174 | ide_toggle_bounce(drive, 0); |
175 | ||
5e37bdc0 | 176 | drive->hwif->dma_ops->dma_host_set(drive, 0); |
1da177e4 | 177 | } |
7469aaf6 | 178 | EXPORT_SYMBOL(ide_dma_off_quietly); |
1da177e4 LT |
179 | |
180 | /** | |
7469aaf6 | 181 | * ide_dma_off - disable DMA on a device |
1da177e4 LT |
182 | * @drive: drive to disable DMA on |
183 | * | |
184 | * Disable IDE DMA for a device on this IDE controller. | |
185 | * Inform the user that DMA has been disabled. | |
186 | */ | |
187 | ||
7469aaf6 | 188 | void ide_dma_off(ide_drive_t *drive) |
1da177e4 LT |
189 | { |
190 | printk(KERN_INFO "%s: DMA disabled\n", drive->name); | |
4a546e04 | 191 | ide_dma_off_quietly(drive); |
1da177e4 | 192 | } |
7469aaf6 | 193 | EXPORT_SYMBOL(ide_dma_off); |
1da177e4 | 194 | |
1da177e4 | 195 | /** |
4a546e04 | 196 | * ide_dma_on - Enable DMA on a device |
1da177e4 LT |
197 | * @drive: drive to enable DMA on |
198 | * | |
199 | * Enable IDE DMA for a device on this IDE controller. | |
200 | */ | |
4a546e04 BZ |
201 | |
202 | void ide_dma_on(ide_drive_t *drive) | |
1da177e4 | 203 | { |
97100fc8 | 204 | drive->dev_flags |= IDE_DFLAG_USING_DMA; |
1da177e4 LT |
205 | ide_toggle_bounce(drive, 1); |
206 | ||
5e37bdc0 | 207 | drive->hwif->dma_ops->dma_host_set(drive, 1); |
1da177e4 LT |
208 | } |
209 | ||
db3f99ef | 210 | int __ide_dma_bad_drive(ide_drive_t *drive) |
1da177e4 | 211 | { |
4dde4492 | 212 | u16 *id = drive->id; |
1da177e4 | 213 | |
65e5f2e3 | 214 | int blacklist = ide_in_drive_list(id, drive_blacklist); |
1da177e4 LT |
215 | if (blacklist) { |
216 | printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n", | |
4dde4492 | 217 | drive->name, (char *)&id[ATA_ID_PROD]); |
1da177e4 LT |
218 | return blacklist; |
219 | } | |
220 | return 0; | |
221 | } | |
1da177e4 LT |
222 | EXPORT_SYMBOL(__ide_dma_bad_drive); |
223 | ||
2d5eaa6d BZ |
224 | static const u8 xfer_mode_bases[] = { |
225 | XFER_UDMA_0, | |
226 | XFER_MW_DMA_0, | |
227 | XFER_SW_DMA_0, | |
228 | }; | |
229 | ||
7670df73 | 230 | static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode) |
2d5eaa6d | 231 | { |
4dde4492 | 232 | u16 *id = drive->id; |
2d5eaa6d | 233 | ide_hwif_t *hwif = drive->hwif; |
ac95beed | 234 | const struct ide_port_ops *port_ops = hwif->port_ops; |
2d5eaa6d BZ |
235 | unsigned int mask = 0; |
236 | ||
db3f99ef | 237 | switch (base) { |
2d5eaa6d | 238 | case XFER_UDMA_0: |
4dde4492 | 239 | if ((id[ATA_ID_FIELD_VALID] & 4) == 0) |
2d5eaa6d BZ |
240 | break; |
241 | ||
ac95beed BZ |
242 | if (port_ops && port_ops->udma_filter) |
243 | mask = port_ops->udma_filter(drive); | |
851dd33b SS |
244 | else |
245 | mask = hwif->ultra_mask; | |
4dde4492 | 246 | mask &= id[ATA_ID_UDMA_MODES]; |
2d5eaa6d | 247 | |
7670df73 BZ |
248 | /* |
249 | * avoid false cable warning from eighty_ninty_three() | |
250 | */ | |
251 | if (req_mode > XFER_UDMA_2) { | |
252 | if ((mask & 0x78) && (eighty_ninty_three(drive) == 0)) | |
253 | mask &= 0x07; | |
254 | } | |
2d5eaa6d BZ |
255 | break; |
256 | case XFER_MW_DMA_0: | |
4dde4492 | 257 | if ((id[ATA_ID_FIELD_VALID] & 2) == 0) |
b4e44369 | 258 | break; |
ac95beed BZ |
259 | if (port_ops && port_ops->mdma_filter) |
260 | mask = port_ops->mdma_filter(drive); | |
b4e44369 SS |
261 | else |
262 | mask = hwif->mwdma_mask; | |
4dde4492 | 263 | mask &= id[ATA_ID_MWDMA_MODES]; |
2d5eaa6d BZ |
264 | break; |
265 | case XFER_SW_DMA_0: | |
4dde4492 BZ |
266 | if (id[ATA_ID_FIELD_VALID] & 2) { |
267 | mask = id[ATA_ID_SWDMA_MODES] & hwif->swdma_mask; | |
48fb2688 BZ |
268 | } else if (id[ATA_ID_OLD_DMA_MODES] >> 8) { |
269 | u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8; | |
15a4f943 BZ |
270 | |
271 | /* | |
272 | * if the mode is valid convert it to the mask | |
273 | * (the maximum allowed mode is XFER_SW_DMA_2) | |
274 | */ | |
275 | if (mode <= 2) | |
276 | mask = ((2 << mode) - 1) & hwif->swdma_mask; | |
277 | } | |
2d5eaa6d BZ |
278 | break; |
279 | default: | |
280 | BUG(); | |
281 | break; | |
282 | } | |
283 | ||
284 | return mask; | |
285 | } | |
286 | ||
287 | /** | |
7670df73 | 288 | * ide_find_dma_mode - compute DMA speed |
2d5eaa6d | 289 | * @drive: IDE device |
7670df73 BZ |
290 | * @req_mode: requested mode |
291 | * | |
292 | * Checks the drive/host capabilities and finds the speed to use for | |
293 | * the DMA transfer. The speed is then limited by the requested mode. | |
2d5eaa6d | 294 | * |
7670df73 BZ |
295 | * Returns 0 if the drive/host combination is incapable of DMA transfers |
296 | * or if the requested mode is not a DMA mode. | |
2d5eaa6d BZ |
297 | */ |
298 | ||
7670df73 | 299 | u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode) |
2d5eaa6d BZ |
300 | { |
301 | ide_hwif_t *hwif = drive->hwif; | |
302 | unsigned int mask; | |
303 | int x, i; | |
304 | u8 mode = 0; | |
305 | ||
33c1002e BZ |
306 | if (drive->media != ide_disk) { |
307 | if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA) | |
308 | return 0; | |
309 | } | |
2d5eaa6d BZ |
310 | |
311 | for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) { | |
7670df73 BZ |
312 | if (req_mode < xfer_mode_bases[i]) |
313 | continue; | |
314 | mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode); | |
2d5eaa6d BZ |
315 | x = fls(mask) - 1; |
316 | if (x >= 0) { | |
317 | mode = xfer_mode_bases[i] + x; | |
318 | break; | |
319 | } | |
320 | } | |
321 | ||
75d7d963 BZ |
322 | if (hwif->chipset == ide_acorn && mode == 0) { |
323 | /* | |
324 | * is this correct? | |
325 | */ | |
4dde4492 BZ |
326 | if (ide_dma_good_drive(drive) && |
327 | drive->id[ATA_ID_EIDE_DMA_TIME] < 150) | |
75d7d963 BZ |
328 | mode = XFER_MW_DMA_1; |
329 | } | |
330 | ||
3ab7efe8 BZ |
331 | mode = min(mode, req_mode); |
332 | ||
333 | printk(KERN_INFO "%s: %s mode selected\n", drive->name, | |
d34887da | 334 | mode ? ide_xfer_verbose(mode) : "no DMA"); |
2d5eaa6d | 335 | |
3ab7efe8 | 336 | return mode; |
2d5eaa6d | 337 | } |
7670df73 | 338 | EXPORT_SYMBOL_GPL(ide_find_dma_mode); |
2d5eaa6d | 339 | |
0ae2e178 | 340 | static int ide_tune_dma(ide_drive_t *drive) |
29e744d0 | 341 | { |
8704de8f | 342 | ide_hwif_t *hwif = drive->hwif; |
29e744d0 BZ |
343 | u8 speed; |
344 | ||
97100fc8 BZ |
345 | if (ata_id_has_dma(drive->id) == 0 || |
346 | (drive->dev_flags & IDE_DFLAG_NODMA)) | |
122ab088 BZ |
347 | return 0; |
348 | ||
349 | /* consult the list of known "bad" drives */ | |
350 | if (__ide_dma_bad_drive(drive)) | |
29e744d0 BZ |
351 | return 0; |
352 | ||
3ab7efe8 BZ |
353 | if (ide_id_dma_bug(drive)) |
354 | return 0; | |
355 | ||
8704de8f | 356 | if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA) |
0ae2e178 BZ |
357 | return config_drive_for_dma(drive); |
358 | ||
29e744d0 BZ |
359 | speed = ide_max_dma_mode(drive); |
360 | ||
951784b6 BZ |
361 | if (!speed) |
362 | return 0; | |
29e744d0 | 363 | |
88b2b32b | 364 | if (ide_set_dma_mode(drive, speed)) |
4728d546 | 365 | return 0; |
29e744d0 | 366 | |
4728d546 | 367 | return 1; |
29e744d0 BZ |
368 | } |
369 | ||
0ae2e178 BZ |
370 | static int ide_dma_check(ide_drive_t *drive) |
371 | { | |
372 | ide_hwif_t *hwif = drive->hwif; | |
0ae2e178 | 373 | |
ba4b2e60 | 374 | if (ide_tune_dma(drive)) |
0ae2e178 BZ |
375 | return 0; |
376 | ||
377 | /* TODO: always do PIO fallback */ | |
378 | if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA) | |
379 | return -1; | |
380 | ||
381 | ide_set_max_pio(drive); | |
382 | ||
ba4b2e60 | 383 | return -1; |
0ae2e178 BZ |
384 | } |
385 | ||
3ab7efe8 | 386 | int ide_id_dma_bug(ide_drive_t *drive) |
1da177e4 | 387 | { |
4dde4492 | 388 | u16 *id = drive->id; |
1da177e4 | 389 | |
4dde4492 BZ |
390 | if (id[ATA_ID_FIELD_VALID] & 4) { |
391 | if ((id[ATA_ID_UDMA_MODES] >> 8) && | |
392 | (id[ATA_ID_MWDMA_MODES] >> 8)) | |
3ab7efe8 | 393 | goto err_out; |
4dde4492 BZ |
394 | } else if (id[ATA_ID_FIELD_VALID] & 2) { |
395 | if ((id[ATA_ID_MWDMA_MODES] >> 8) && | |
396 | (id[ATA_ID_SWDMA_MODES] >> 8)) | |
3ab7efe8 | 397 | goto err_out; |
1da177e4 | 398 | } |
3ab7efe8 BZ |
399 | return 0; |
400 | err_out: | |
401 | printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name); | |
402 | return 1; | |
1da177e4 LT |
403 | } |
404 | ||
3608b5d7 BZ |
405 | int ide_set_dma(ide_drive_t *drive) |
406 | { | |
3608b5d7 BZ |
407 | int rc; |
408 | ||
7b905994 BZ |
409 | /* |
410 | * Force DMAing for the beginning of the check. | |
411 | * Some chipsets appear to do interesting | |
412 | * things, if not checked and cleared. | |
413 | * PARANOIA!!! | |
414 | */ | |
4a546e04 | 415 | ide_dma_off_quietly(drive); |
3608b5d7 | 416 | |
7b905994 BZ |
417 | rc = ide_dma_check(drive); |
418 | if (rc) | |
419 | return rc; | |
3608b5d7 | 420 | |
4a546e04 BZ |
421 | ide_dma_on(drive); |
422 | ||
423 | return 0; | |
3608b5d7 BZ |
424 | } |
425 | ||
578cfa0d BZ |
426 | void ide_check_dma_crc(ide_drive_t *drive) |
427 | { | |
428 | u8 mode; | |
429 | ||
430 | ide_dma_off_quietly(drive); | |
431 | drive->crc_count = 0; | |
432 | mode = drive->current_speed; | |
433 | /* | |
434 | * Don't try non Ultra-DMA modes without iCRC's. Force the | |
435 | * device to PIO and make the user enable SWDMA/MWDMA modes. | |
436 | */ | |
437 | if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7) | |
438 | mode--; | |
439 | else | |
440 | mode = XFER_PIO_4; | |
441 | ide_set_xfer_rate(drive, mode); | |
442 | if (drive->current_speed >= XFER_SW_DMA_0) | |
443 | ide_dma_on(drive); | |
444 | } | |
445 | ||
de23ec9c | 446 | void ide_dma_lost_irq(ide_drive_t *drive) |
1da177e4 | 447 | { |
de23ec9c | 448 | printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name); |
1da177e4 | 449 | } |
de23ec9c | 450 | EXPORT_SYMBOL_GPL(ide_dma_lost_irq); |
1da177e4 | 451 | |
ffa15a69 | 452 | void ide_dma_timeout(ide_drive_t *drive) |
1da177e4 | 453 | { |
db3f99ef | 454 | ide_hwif_t *hwif = drive->hwif; |
c283f5db | 455 | |
1da177e4 | 456 | printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name); |
1da177e4 | 457 | |
5e37bdc0 | 458 | if (hwif->dma_ops->dma_test_irq(drive)) |
c283f5db SS |
459 | return; |
460 | ||
ffa15a69 BZ |
461 | ide_dump_status(drive, "DMA timeout", hwif->tp_ops->read_status(hwif)); |
462 | ||
5e37bdc0 | 463 | hwif->dma_ops->dma_end(drive); |
1da177e4 | 464 | } |
ffa15a69 | 465 | EXPORT_SYMBOL_GPL(ide_dma_timeout); |
1da177e4 | 466 | |
0d1bad21 | 467 | void ide_release_dma_engine(ide_hwif_t *hwif) |
1da177e4 LT |
468 | { |
469 | if (hwif->dmatable_cpu) { | |
2bbd57ca | 470 | int prd_size = hwif->prd_max_nents * hwif->prd_ent_size; |
36501650 | 471 | |
2bbd57ca BZ |
472 | dma_free_coherent(hwif->dev, prd_size, |
473 | hwif->dmatable_cpu, hwif->dmatable_dma); | |
1da177e4 LT |
474 | hwif->dmatable_cpu = NULL; |
475 | } | |
1da177e4 | 476 | } |
2bbd57ca | 477 | EXPORT_SYMBOL_GPL(ide_release_dma_engine); |
1da177e4 | 478 | |
b8e73fba | 479 | int ide_allocate_dma_engine(ide_hwif_t *hwif) |
1da177e4 | 480 | { |
2bbd57ca | 481 | int prd_size; |
36501650 | 482 | |
2bbd57ca BZ |
483 | if (hwif->prd_max_nents == 0) |
484 | hwif->prd_max_nents = PRD_ENTRIES; | |
485 | if (hwif->prd_ent_size == 0) | |
486 | hwif->prd_ent_size = PRD_BYTES; | |
1da177e4 | 487 | |
2bbd57ca | 488 | prd_size = hwif->prd_max_nents * hwif->prd_ent_size; |
1da177e4 | 489 | |
2bbd57ca BZ |
490 | hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size, |
491 | &hwif->dmatable_dma, | |
492 | GFP_ATOMIC); | |
493 | if (hwif->dmatable_cpu == NULL) { | |
494 | printk(KERN_ERR "%s: unable to allocate PRD table\n", | |
5e59c236 | 495 | hwif->name); |
2bbd57ca BZ |
496 | return -ENOMEM; |
497 | } | |
1da177e4 | 498 | |
2bbd57ca | 499 | return 0; |
1da177e4 | 500 | } |
b8e73fba | 501 | EXPORT_SYMBOL_GPL(ide_allocate_dma_engine); |