[deliverable/linux.git] / drivers / ide / tx4938ide.c

/*
 * TX4938 internal IDE driver
 * Based on tx4939ide.c.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * (C) Copyright TOSHIBA CORPORATION 2005-2007
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>

#include <asm/ide.h>
#include <asm/txx9/tx4938.h>

static void tx4938ide_tune_ebusc(unsigned int ebus_ch,
				 unsigned int gbus_clock,
				 u8 pio)
{
	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
	u64 cr = __raw_readq(&tx4938_ebuscptr->cr[ebus_ch]);
	unsigned int sp = (cr >> 4) & 3;
	unsigned int clock = gbus_clock / (4 - sp);
	unsigned int cycle = 1000000000 / clock;
	unsigned int shwt;
	int wt;

	/* Minimum DIOx- active time */
	wt = DIV_ROUND_UP(t->act8b, cycle) - 2;
	/* IORDY setup time: 35ns */
	wt = max_t(int, wt, DIV_ROUND_UP(35, cycle));
	/* actual wait-cycle is max(wt & ~1, 1) */
	if (wt > 2 && (wt & 1))
		wt++;
	wt &= ~1;
	/* Address-valid to DIOR/DIOW setup */
	shwt = DIV_ROUND_UP(t->setup, cycle);

	/* -DIOx recovery time (SHWT * 4) and cycle time requirement */
	while ((shwt * 4 + wt + (wt ? 2 : 3)) * cycle < t->cycle)
		shwt++;
	if (shwt > 7) {
		pr_warning("tx4938ide: SHWT violation (%d)\n", shwt);
		shwt = 7;
	}
	pr_debug("tx4938ide: ebus %d, bus cycle %dns, WT %d, SHWT %d\n",
		 ebus_ch, cycle, wt, shwt);

	__raw_writeq((cr & ~0x3f007ull) | (wt << 12) | shwt,
		     &tx4938_ebuscptr->cr[ebus_ch]);
}

static void tx4938ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	ide_hwif_t *hwif = drive->hwif;
	struct tx4938ide_platform_info *pdata = hwif->dev->platform_data;
	u8 safe = pio;
	ide_drive_t *pair;

	pair = ide_get_pair_dev(drive);
	if (pair)
		safe = min(safe, ide_get_best_pio_mode(pair, 255, 5));
	tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, safe);
}

#ifdef __BIG_ENDIAN

/* custom iops (independent from SWAP_IO_SPACE) */
static u8 tx4938ide_inb(unsigned long port)
{
	return __raw_readb((void __iomem *)port);
}

static void tx4938ide_outb(u8 value, unsigned long port)
{
	__raw_writeb(value, (void __iomem *)port);
}

static void tx4938ide_tf_load(ide_drive_t *drive, struct ide_cmd *cmd)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_io_ports *io_ports = &hwif->io_ports;
	struct ide_taskfile *tf = &cmd->tf;
	u8 HIHI = cmd->tf_flags & IDE_TFLAG_LBA48 ? 0xE0 : 0xEF;

	if (cmd->ftf_flags & IDE_FTFLAG_FLAGGED)
		HIHI = 0xFF;

	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
		tx4938ide_outb(tf->hob_feature, io_ports->feature_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
		tx4938ide_outb(tf->hob_nsect, io_ports->nsect_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
		tx4938ide_outb(tf->hob_lbal, io_ports->lbal_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
		tx4938ide_outb(tf->hob_lbam, io_ports->lbam_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
		tx4938ide_outb(tf->hob_lbah, io_ports->lbah_addr);

	if (cmd->tf_flags & IDE_TFLAG_OUT_FEATURE)
		tx4938ide_outb(tf->feature, io_ports->feature_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_NSECT)
		tx4938ide_outb(tf->nsect, io_ports->nsect_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_LBAL)
		tx4938ide_outb(tf->lbal, io_ports->lbal_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_LBAM)
		tx4938ide_outb(tf->lbam, io_ports->lbam_addr);
	if (cmd->tf_flags & IDE_TFLAG_OUT_LBAH)
		tx4938ide_outb(tf->lbah, io_ports->lbah_addr);

	if (cmd->tf_flags & IDE_TFLAG_OUT_DEVICE)
		tx4938ide_outb((tf->device & HIHI) | drive->select,
			       io_ports->device_addr);
}

static void tx4938ide_tf_read(ide_drive_t *drive, struct ide_cmd *cmd)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_io_ports *io_ports = &hwif->io_ports;
	struct ide_taskfile *tf = &cmd->tf;

	/* be sure we're looking at the low order bits */
	tx4938ide_outb(ATA_DEVCTL_OBS, io_ports->ctl_addr);

	if (cmd->tf_flags & IDE_TFLAG_IN_ERROR)
		tf->error  = tx4938ide_inb(io_ports->feature_addr);
	if (cmd->tf_flags & IDE_TFLAG_IN_NSECT)
		tf->nsect  = tx4938ide_inb(io_ports->nsect_addr);
	if (cmd->tf_flags & IDE_TFLAG_IN_LBAL)
		tf->lbal   = tx4938ide_inb(io_ports->lbal_addr);
	if (cmd->tf_flags & IDE_TFLAG_IN_LBAM)
		tf->lbam   = tx4938ide_inb(io_ports->lbam_addr);
	if (cmd->tf_flags & IDE_TFLAG_IN_LBAH)
		tf->lbah   = tx4938ide_inb(io_ports->lbah_addr);
	if (cmd->tf_flags & IDE_TFLAG_IN_DEVICE)
		tf->device = tx4938ide_inb(io_ports->device_addr);

	if (cmd->tf_flags & IDE_TFLAG_LBA48) {
		tx4938ide_outb(ATA_HOB | ATA_DEVCTL_OBS, io_ports->ctl_addr);

		if (cmd->tf_flags & IDE_TFLAG_IN_HOB_ERROR)
			tf->hob_error = tx4938ide_inb(io_ports->feature_addr);
		if (cmd->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
			tf->hob_nsect = tx4938ide_inb(io_ports->nsect_addr);
		if (cmd->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
			tf->hob_lbal  = tx4938ide_inb(io_ports->lbal_addr);
		if (cmd->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
			tf->hob_lbam  = tx4938ide_inb(io_ports->lbam_addr);
		if (cmd->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
			tf->hob_lbah  = tx4938ide_inb(io_ports->lbah_addr);
	}
}

static void tx4938ide_input_data_swap(ide_drive_t *drive, struct ide_cmd *cmd,
				void *buf, unsigned int len)
{
	unsigned long port = drive->hwif->io_ports.data_addr;
	unsigned short *ptr = buf;
	unsigned int count = (len + 1) / 2;

	while (count--)
		*ptr++ = cpu_to_le16(__raw_readw((void __iomem *)port));
	__ide_flush_dcache_range((unsigned long)buf, roundup(len, 2));
}

static void tx4938ide_output_data_swap(ide_drive_t *drive, struct ide_cmd *cmd,
				void *buf, unsigned int len)
{
	unsigned long port = drive->hwif->io_ports.data_addr;
	unsigned short *ptr = buf;
	unsigned int count = (len + 1) / 2;

	while (count--) {
		__raw_writew(le16_to_cpu(*ptr), (void __iomem *)port);
		ptr++;
	}
	__ide_flush_dcache_range((unsigned long)buf, roundup(len, 2));
}

static const struct ide_tp_ops tx4938ide_tp_ops = {
	.exec_command		= ide_exec_command,
	.read_status		= ide_read_status,
	.read_altstatus		= ide_read_altstatus,
	.write_devctl		= ide_write_devctl,

	.dev_select		= ide_dev_select,
	.tf_load		= tx4938ide_tf_load,
	.tf_read		= tx4938ide_tf_read,

	.input_data		= tx4938ide_input_data_swap,
	.output_data		= tx4938ide_output_data_swap,
};

#endif	/* __BIG_ENDIAN */

static const struct ide_port_ops tx4938ide_port_ops = {
	.set_pio_mode		= tx4938ide_set_pio_mode,
};

static const struct ide_port_info tx4938ide_port_info __initdata = {
	.port_ops		= &tx4938ide_port_ops,
#ifdef __BIG_ENDIAN
	.tp_ops			= &tx4938ide_tp_ops,
#endif
	.host_flags		= IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA,
	.pio_mask		= ATA_PIO5,
	.chipset		= ide_generic,
};

static int __init tx4938ide_probe(struct platform_device *pdev)
{
	hw_regs_t hw;
	hw_regs_t *hws[] = { &hw, NULL, NULL, NULL };
	struct ide_host *host;
	struct resource *res;
	struct tx4938ide_platform_info *pdata = pdev->dev.platform_data;
	int irq, ret, i;
	unsigned long mapbase, mapctl;
	struct ide_port_info d = tx4938ide_port_info;

	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return -ENODEV;
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res)
		return -ENODEV;

	if (!devm_request_mem_region(&pdev->dev, res->start,
				     res->end - res->start + 1, "tx4938ide"))
		return -EBUSY;
	mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start,
					      8 << pdata->ioport_shift);
	mapctl = (unsigned long)devm_ioremap(&pdev->dev,
					     res->start + 0x10000 +
					     (6 << pdata->ioport_shift),
					     1 << pdata->ioport_shift);
	if (!mapbase || !mapctl)
		return -EBUSY;

	memset(&hw, 0, sizeof(hw));
	if (pdata->ioport_shift) {
		unsigned long port = mapbase;
		unsigned long ctl = mapctl;

		hw.io_ports_array[0] = port;
#ifdef __BIG_ENDIAN
		port++;
		ctl++;
#endif
		for (i = 1; i <= 7; i++)
			hw.io_ports_array[i] =
				port + (i << pdata->ioport_shift);
		hw.io_ports.ctl_addr = ctl;
	} else
		ide_std_init_ports(&hw, mapbase, mapctl);
	hw.irq = irq;
	hw.dev = &pdev->dev;

	pr_info("TX4938 IDE interface (base %#lx, ctl %#lx, irq %d)\n",
		mapbase, mapctl, hw.irq);
	if (pdata->gbus_clock)
		tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, 0);
	else
		d.port_ops = NULL;
	ret = ide_host_add(&d, hws, &host);
	if (!ret)
		platform_set_drvdata(pdev, host);
	return ret;
}

static int __exit tx4938ide_remove(struct platform_device *pdev)
{
	struct ide_host *host = platform_get_drvdata(pdev);

	ide_host_remove(host);
	return 0;
}

static struct platform_driver tx4938ide_driver = {
	.driver		= {
		.name	= "tx4938ide",
		.owner	= THIS_MODULE,
	},
	.remove = __exit_p(tx4938ide_remove),
};

static int __init tx4938ide_init(void)
{
	return platform_driver_probe(&tx4938ide_driver, tx4938ide_probe);
}

static void __exit tx4938ide_exit(void)
{
	platform_driver_unregister(&tx4938ide_driver);
}

module_init(tx4938ide_init);
module_exit(tx4938ide_exit);

MODULE_DESCRIPTION("TX4938 internal IDE driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:tx4938ide");
Commit	Line	Data
28502848 AN	1	/*
	2	* TX4938 internal IDE driver
	3	* Based on tx4939ide.c.
	4	*
	5	* This file is subject to the terms and conditions of the GNU General Public
	6	* License. See the file "COPYING" in the main directory of this archive
	7	* for more details.
	8	*
	9	* (C) Copyright TOSHIBA CORPORATION 2005-2007
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/types.h>
	14	#include <linux/ide.h>
	15	#include <linux/init.h>
	16	#include <linux/platform_device.h>
	17	#include <linux/io.h>
15a453a9 BZ	18
15a453a9 BZ	19	#include <asm/ide.h>
28502848 AN	20	#include <asm/txx9/tx4938.h>
	21
	22	static void tx4938ide_tune_ebusc(unsigned int ebus_ch,
	23	unsigned int gbus_clock,
	24	u8 pio)
	25	{
	26	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
	27	u64 cr = __raw_readq(&tx4938_ebuscptr->cr[ebus_ch]);
	28	unsigned int sp = (cr >> 4) & 3;
	29	unsigned int clock = gbus_clock / (4 - sp);
	30	unsigned int cycle = 1000000000 / clock;
7afa0535 AN	31	unsigned int shwt;
7afa0535 AN	32	int wt;
28502848 AN	33
	34	/* Minimum DIOx- active time */
	35	wt = DIV_ROUND_UP(t->act8b, cycle) - 2;
	36	/* IORDY setup time: 35ns */
7afa0535	37	wt = max_t(int, wt, DIV_ROUND_UP(35, cycle));
28502848 AN	38	/* actual wait-cycle is max(wt & ~1, 1) */
	39	if (wt > 2 && (wt & 1))
	40	wt++;
	41	wt &= ~1;
	42	/* Address-valid to DIOR/DIOW setup */
	43	shwt = DIV_ROUND_UP(t->setup, cycle);
	44
630a8b25 AN	45	/* -DIOx recovery time (SHWT * 4) and cycle time requirement */
	46	while ((shwt * 4 + wt + (wt ? 2 : 3)) * cycle < t->cycle)
	47	shwt++;
	48	if (shwt > 7) {
	49	pr_warning("tx4938ide: SHWT violation (%d)\n", shwt);
	50	shwt = 7;
	51	}
28502848 AN	52	pr_debug("tx4938ide: ebus %d, bus cycle %dns, WT %d, SHWT %d\n",
	53	ebus_ch, cycle, wt, shwt);
	54
630a8b25	55	__raw_writeq((cr & ~0x3f007ull) \| (wt << 12) \| shwt,
28502848 AN	56	&tx4938_ebuscptr->cr[ebus_ch]);
	57	}
	58
	59	static void tx4938ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
	60	{
	61	ide_hwif_t *hwif = drive->hwif;
	62	struct tx4938ide_platform_info *pdata = hwif->dev->platform_data;
	63	u8 safe = pio;
	64	ide_drive_t *pair;
	65
	66	pair = ide_get_pair_dev(drive);
	67	if (pair)
	68	safe = min(safe, ide_get_best_pio_mode(pair, 255, 5));
	69	tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, safe);
	70	}
	71
	72	#ifdef __BIG_ENDIAN
	73
	74	/* custom iops (independent from SWAP_IO_SPACE) */
	75	static u8 tx4938ide_inb(unsigned long port)
	76	{
	77	return __raw_readb((void __iomem *)port);
	78	}
	79
	80	static void tx4938ide_outb(u8 value, unsigned long port)
	81	{
	82	__raw_writeb(value, (void __iomem *)port);
	83	}
	84
22aa4b32	85	static void tx4938ide_tf_load(ide_drive_t drive, struct ide_cmd cmd)
28502848 AN	86	{
	87	ide_hwif_t *hwif = drive->hwif;
	88	struct ide_io_ports *io_ports = &hwif->io_ports;
22aa4b32 BZ	89	struct ide_taskfile *tf = &cmd->tf;
22aa4b32 BZ	90	u8 HIHI = cmd->tf_flags & IDE_TFLAG_LBA48 ? 0xE0 : 0xEF;
28502848	91
22aa4b32	92	if (cmd->ftf_flags & IDE_FTFLAG_FLAGGED)
28502848 AN	93	HIHI = 0xFF;
28502848 AN	94
22aa4b32	95	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
28502848	96	tx4938ide_outb(tf->hob_feature, io_ports->feature_addr);
22aa4b32	97	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
28502848	98	tx4938ide_outb(tf->hob_nsect, io_ports->nsect_addr);
22aa4b32	99	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
28502848	100	tx4938ide_outb(tf->hob_lbal, io_ports->lbal_addr);
22aa4b32	101	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
28502848	102	tx4938ide_outb(tf->hob_lbam, io_ports->lbam_addr);
22aa4b32	103	if (cmd->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
28502848 AN	104	tx4938ide_outb(tf->hob_lbah, io_ports->lbah_addr);
28502848 AN	105
22aa4b32	106	if (cmd->tf_flags & IDE_TFLAG_OUT_FEATURE)
28502848	107	tx4938ide_outb(tf->feature, io_ports->feature_addr);
22aa4b32	108	if (cmd->tf_flags & IDE_TFLAG_OUT_NSECT)
28502848	109	tx4938ide_outb(tf->nsect, io_ports->nsect_addr);
22aa4b32	110	if (cmd->tf_flags & IDE_TFLAG_OUT_LBAL)
28502848	111	tx4938ide_outb(tf->lbal, io_ports->lbal_addr);
22aa4b32	112	if (cmd->tf_flags & IDE_TFLAG_OUT_LBAM)
28502848	113	tx4938ide_outb(tf->lbam, io_ports->lbam_addr);
22aa4b32	114	if (cmd->tf_flags & IDE_TFLAG_OUT_LBAH)
28502848 AN	115	tx4938ide_outb(tf->lbah, io_ports->lbah_addr);
28502848 AN	116
22aa4b32	117	if (cmd->tf_flags & IDE_TFLAG_OUT_DEVICE)
28502848 AN	118	tx4938ide_outb((tf->device & HIHI) \| drive->select,
	119	io_ports->device_addr);
	120	}
	121
22aa4b32	122	static void tx4938ide_tf_read(ide_drive_t drive, struct ide_cmd cmd)
28502848 AN	123	{
	124	ide_hwif_t *hwif = drive->hwif;
	125	struct ide_io_ports *io_ports = &hwif->io_ports;
22aa4b32	126	struct ide_taskfile *tf = &cmd->tf;
28502848	127
28502848	128	/* be sure we're looking at the low order bits */
4d74c3fc	129	tx4938ide_outb(ATA_DEVCTL_OBS, io_ports->ctl_addr);
28502848	130
67625119 SS	131	if (cmd->tf_flags & IDE_TFLAG_IN_ERROR)
67625119 SS	132	tf->error = tx4938ide_inb(io_ports->feature_addr);
22aa4b32	133	if (cmd->tf_flags & IDE_TFLAG_IN_NSECT)
28502848	134	tf->nsect = tx4938ide_inb(io_ports->nsect_addr);
22aa4b32	135	if (cmd->tf_flags & IDE_TFLAG_IN_LBAL)
28502848	136	tf->lbal = tx4938ide_inb(io_ports->lbal_addr);
22aa4b32	137	if (cmd->tf_flags & IDE_TFLAG_IN_LBAM)
28502848	138	tf->lbam = tx4938ide_inb(io_ports->lbam_addr);
22aa4b32	139	if (cmd->tf_flags & IDE_TFLAG_IN_LBAH)
28502848	140	tf->lbah = tx4938ide_inb(io_ports->lbah_addr);
22aa4b32	141	if (cmd->tf_flags & IDE_TFLAG_IN_DEVICE)
28502848 AN	142	tf->device = tx4938ide_inb(io_ports->device_addr);
28502848 AN	143
22aa4b32	144	if (cmd->tf_flags & IDE_TFLAG_LBA48) {
4d74c3fc	145	tx4938ide_outb(ATA_HOB \| ATA_DEVCTL_OBS, io_ports->ctl_addr);
28502848	146
67625119 SS	147	if (cmd->tf_flags & IDE_TFLAG_IN_HOB_ERROR)
67625119 SS	148	tf->hob_error = tx4938ide_inb(io_ports->feature_addr);
22aa4b32	149	if (cmd->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
67625119	150	tf->hob_nsect = tx4938ide_inb(io_ports->nsect_addr);
22aa4b32	151	if (cmd->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
67625119	152	tf->hob_lbal = tx4938ide_inb(io_ports->lbal_addr);
22aa4b32	153	if (cmd->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
67625119	154	tf->hob_lbam = tx4938ide_inb(io_ports->lbam_addr);
22aa4b32	155	if (cmd->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
67625119	156	tf->hob_lbah = tx4938ide_inb(io_ports->lbah_addr);
28502848 AN	157	}
	158	}
	159
adb1af98	160	static void tx4938ide_input_data_swap(ide_drive_t drive, struct ide_cmd cmd,
28502848 AN	161	void *buf, unsigned int len)
	162	{
	163	unsigned long port = drive->hwif->io_ports.data_addr;
	164	unsigned short *ptr = buf;
	165	unsigned int count = (len + 1) / 2;
	166
	167	while (count--)
	168	ptr++ = cpu_to_le16(__raw_readw((void __iomem )port));
f26f6cea	169	__ide_flush_dcache_range((unsigned long)buf, roundup(len, 2));
28502848 AN	170	}
28502848 AN	171
adb1af98	172	static void tx4938ide_output_data_swap(ide_drive_t drive, struct ide_cmd cmd,
28502848 AN	173	void *buf, unsigned int len)
	174	{
	175	unsigned long port = drive->hwif->io_ports.data_addr;
	176	unsigned short *ptr = buf;
	177	unsigned int count = (len + 1) / 2;
	178
	179	while (count--) {
	180	__raw_writew(le16_to_cpu(ptr), (void __iomem )port);
	181	ptr++;
	182	}
f26f6cea	183	__ide_flush_dcache_range((unsigned long)buf, roundup(len, 2));
28502848 AN	184	}
	185
	186	static const struct ide_tp_ops tx4938ide_tp_ops = {
	187	.exec_command = ide_exec_command,
	188	.read_status = ide_read_status,
	189	.read_altstatus = ide_read_altstatus,
ecf3a31d	190	.write_devctl = ide_write_devctl,
28502848	191
abb596b2	192	.dev_select = ide_dev_select,
28502848 AN	193	.tf_load = tx4938ide_tf_load,
	194	.tf_read = tx4938ide_tf_read,
	195
	196	.input_data = tx4938ide_input_data_swap,
	197	.output_data = tx4938ide_output_data_swap,
	198	};
	199
	200	#endif /* __BIG_ENDIAN */
	201
	202	static const struct ide_port_ops tx4938ide_port_ops = {
3ee86dcd	203	.set_pio_mode = tx4938ide_set_pio_mode,
28502848 AN	204	};
	205
	206	static const struct ide_port_info tx4938ide_port_info __initdata = {
3ee86dcd	207	.port_ops = &tx4938ide_port_ops,
28502848	208	#ifdef __BIG_ENDIAN
3ee86dcd	209	.tp_ops = &tx4938ide_tp_ops,
28502848	210	#endif
3ee86dcd BZ	211	.host_flags = IDE_HFLAG_MMIO \| IDE_HFLAG_NO_DMA,
3ee86dcd BZ	212	.pio_mask = ATA_PIO5,
b1d249e8	213	.chipset = ide_generic,
28502848 AN	214	};
	215
	216	static int __init tx4938ide_probe(struct platform_device *pdev)
	217	{
	218	hw_regs_t hw;
	219	hw_regs_t *hws[] = { &hw, NULL, NULL, NULL };
	220	struct ide_host *host;
	221	struct resource *res;
	222	struct tx4938ide_platform_info *pdata = pdev->dev.platform_data;
	223	int irq, ret, i;
9d4eb0a3	224	unsigned long mapbase, mapctl;
28502848 AN	225	struct ide_port_info d = tx4938ide_port_info;
	226
	227	irq = platform_get_irq(pdev, 0);
	228	if (irq < 0)
	229	return -ENODEV;
	230	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	231	if (!res)
	232	return -ENODEV;
	233
	234	if (!devm_request_mem_region(&pdev->dev, res->start,
	235	res->end - res->start + 1, "tx4938ide"))
	236	return -EBUSY;
	237	mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start,
9d4eb0a3 AN	238	8 << pdata->ioport_shift);
	239	mapctl = (unsigned long)devm_ioremap(&pdev->dev,
	240	res->start + 0x10000 +
	241	(6 << pdata->ioport_shift),
	242	1 << pdata->ioport_shift);
	243	if (!mapbase \|\| !mapctl)
28502848 AN	244	return -EBUSY;
	245
	246	memset(&hw, 0, sizeof(hw));
	247	if (pdata->ioport_shift) {
	248	unsigned long port = mapbase;
9d4eb0a3	249	unsigned long ctl = mapctl;
28502848 AN	250
	251	hw.io_ports_array[0] = port;
	252	#ifdef __BIG_ENDIAN
	253	port++;
9d4eb0a3	254	ctl++;
28502848 AN	255	#endif
	256	for (i = 1; i <= 7; i++)
	257	hw.io_ports_array[i] =
	258	port + (i << pdata->ioport_shift);
9d4eb0a3	259	hw.io_ports.ctl_addr = ctl;
28502848	260	} else
9d4eb0a3	261	ide_std_init_ports(&hw, mapbase, mapctl);
28502848 AN	262	hw.irq = irq;
	263	hw.dev = &pdev->dev;
	264
9d4eb0a3 AN	265	pr_info("TX4938 IDE interface (base %#lx, ctl %#lx, irq %d)\n",
9d4eb0a3 AN	266	mapbase, mapctl, hw.irq);
28502848 AN	267	if (pdata->gbus_clock)
	268	tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, 0);
	269	else
	270	d.port_ops = NULL;
	271	ret = ide_host_add(&d, hws, &host);
9d4eb0a3 AN	272	if (!ret)
	273	platform_set_drvdata(pdev, host);
	274	return ret;
28502848 AN	275	}
	276
	277	static int __exit tx4938ide_remove(struct platform_device *pdev)
	278	{
	279	struct ide_host *host = platform_get_drvdata(pdev);
	280
	281	ide_host_remove(host);
	282	return 0;
	283	}
	284
	285	static struct platform_driver tx4938ide_driver = {
	286	.driver = {
	287	.name = "tx4938ide",
	288	.owner = THIS_MODULE,
	289	},
	290	.remove = __exit_p(tx4938ide_remove),
	291	};
	292
	293	static int __init tx4938ide_init(void)
	294	{
	295	return platform_driver_probe(&tx4938ide_driver, tx4938ide_probe);
	296	}
	297
	298	static void __exit tx4938ide_exit(void)
	299	{
	300	platform_driver_unregister(&tx4938ide_driver);
	301	}
	302
	303	module_init(tx4938ide_init);
	304	module_exit(tx4938ide_exit);
	305
	306	MODULE_DESCRIPTION("TX4938 internal IDE driver");
	307	MODULE_LICENSE("GPL");
	308	MODULE_ALIAS("platform:tx4938ide");