[deliverable/linux.git] / drivers / iio / adc / ad7923.c

/*
 * AD7923 SPI ADC driver
 *
 * Copyright 2011 Analog Devices Inc (from AD7923 Driver)
 * Copyright 2012 CS Systemes d'Information
 *
 * Licensed under the GPL-2.
 */

#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/spi/spi.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/interrupt.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>

#define AD7923_WRITE_CR		(1 << 11)	/* write control register */
#define AD7923_RANGE		(1 << 1)	/* range to REFin */
#define AD7923_CODING		(1 << 0)	/* coding is straight binary */
#define AD7923_PM_MODE_AS	(1)		/* auto shutdown */
#define AD7923_PM_MODE_FS	(2)		/* full shutdown */
#define AD7923_PM_MODE_OPS	(3)		/* normal operation */
#define AD7923_CHANNEL_0	(0)		/* analog input 0 */
#define AD7923_CHANNEL_1	(1)		/* analog input 1 */
#define AD7923_CHANNEL_2	(2)		/* analog input 2 */
#define AD7923_CHANNEL_3	(3)		/* analog input 3 */
#define AD7923_SEQUENCE_OFF	(0)		/* no sequence fonction */
#define AD7923_SEQUENCE_PROTECT	(2)		/* no interrupt write cycle */
#define AD7923_SEQUENCE_ON	(3)		/* continuous sequence */

#define AD7923_MAX_CHAN		4

#define AD7923_PM_MODE_WRITE(mode)	(mode << 4)	/* write mode */
#define AD7923_CHANNEL_WRITE(channel)	(channel << 6)	/* write channel */
#define AD7923_SEQUENCE_WRITE(sequence)	(((sequence & 1) << 3) \
					+ ((sequence & 2) << 9))
						/* write sequence fonction */
/* left shift for CR : bit 11 transmit in first */
#define AD7923_SHIFT_REGISTER	4

/* val = value, dec = left shift, bits = number of bits of the mask */
#define EXTRACT(val, dec, bits)		((val >> dec) & ((1 << bits) - 1))

struct ad7923_state {
	struct spi_device		*spi;
	struct spi_transfer		ring_xfer[5];
	struct spi_transfer		scan_single_xfer[2];
	struct spi_message		ring_msg;
	struct spi_message		scan_single_msg;
	/*
	 * DMA (thus cache coherency maintenance) requires the
	 * transfer buffers to live in their own cache lines.
	 */
	__be16				rx_buf[4] ____cacheline_aligned;
	__be16				tx_buf[4];
};

#define AD7923_V_CHAN(index)						\
	{								\
		.type = IIO_VOLTAGE,					\
		.indexed = 1,						\
		.channel = index,					\
		.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |		\
		IIO_CHAN_INFO_SCALE_SHARED_BIT,				\
		.address = index,					\
		.scan_index = index,					\
		.scan_type = {						\
			.sign = 'u',					\
			.realbits = 12,					\
			.storagebits = 16,				\
			.endianness = IIO_BE,				\
		},							\
	}

static const struct iio_chan_spec ad7923_channels[] = {
	AD7923_V_CHAN(0),
	AD7923_V_CHAN(1),
	AD7923_V_CHAN(2),
	AD7923_V_CHAN(3),
	IIO_CHAN_SOFT_TIMESTAMP(4),
};

/**
 * ad7923_update_scan_mode() setup the spi transfer buffer for the new scan mask
 **/
static int ad7923_update_scan_mode(struct iio_dev *indio_dev,
	const unsigned long *active_scan_mask)
{
	struct ad7923_state *st = iio_priv(indio_dev);
	int i, cmd, len;

	len = 0;
	for_each_set_bit(i, active_scan_mask, AD7923_MAX_CHAN) {
		cmd = AD7923_WRITE_CR | AD7923_CODING | AD7923_RANGE |
			AD7923_PM_MODE_WRITE(AD7923_PM_MODE_OPS) |
			AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
			AD7923_CHANNEL_WRITE(i);
		cmd <<= AD7923_SHIFT_REGISTER;
		st->tx_buf[len++] = cpu_to_be16(cmd);
	}
	/* build spi ring message */
	st->ring_xfer[0].tx_buf = &st->tx_buf[0];
	st->ring_xfer[0].len = len;
	st->ring_xfer[0].cs_change = 1;

	spi_message_init(&st->ring_msg);
	spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);

	for (i = 0; i < len; i++) {
		st->ring_xfer[i + 1].rx_buf = &st->rx_buf[i];
		st->ring_xfer[i + 1].len = 2;
		st->ring_xfer[i + 1].cs_change = 1;
		spi_message_add_tail(&st->ring_xfer[i + 1], &st->ring_msg);
	}
	/* make sure last transfer cs_change is not set */
	st->ring_xfer[i + 1].cs_change = 0;

	return 0;
}

/**
 * ad7923_trigger_handler() bh of trigger launched polling to ring buffer
 *
 * Currently there is no option in this driver to disable the saving of
 * timestamps within the ring.
 **/
static irqreturn_t ad7923_trigger_handler(int irq, void *p)
{
	struct iio_poll_func *pf = p;
	struct iio_dev *indio_dev = pf->indio_dev;
	struct ad7923_state *st = iio_priv(indio_dev);
	s64 time_ns = 0;
	int b_sent;

	b_sent = spi_sync(st->spi, &st->ring_msg);
	if (b_sent)
		goto done;

	if (indio_dev->scan_timestamp) {
		time_ns = iio_get_time_ns();
		memcpy((u8 *)st->rx_buf + indio_dev->scan_bytes - sizeof(s64),
			&time_ns, sizeof(time_ns));
	}

	iio_push_to_buffers(indio_dev, (u8 *)st->rx_buf);

done:
	iio_trigger_notify_done(indio_dev->trig);

	return IRQ_HANDLED;
}

static int ad7923_scan_direct(struct ad7923_state *st, unsigned ch)
{
	int ret, cmd;

	cmd = AD7923_WRITE_CR | AD7923_PM_MODE_WRITE(AD7923_PM_MODE_OPS) |
		AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) | AD7923_CODING |
		AD7923_CHANNEL_WRITE(ch) | AD7923_RANGE;
	cmd <<= AD7923_SHIFT_REGISTER;
	st->tx_buf[0] = cpu_to_be16(cmd);

	ret = spi_sync(st->spi, &st->scan_single_msg);
	if (ret)
		return ret;

	return be16_to_cpu(st->rx_buf[0]);
}

static int ad7923_read_raw(struct iio_dev *indio_dev,
			   struct iio_chan_spec const *chan,
			   int *val,
			   int *val2,
			   long m)
{
	int ret;
	struct ad7923_state *st = iio_priv(indio_dev);

	switch (m) {
	case IIO_CHAN_INFO_RAW:
		mutex_lock(&indio_dev->mlock);
		if (iio_buffer_enabled(indio_dev))
			ret = -EBUSY;
		else
			ret = ad7923_scan_direct(st, chan->address);
		mutex_unlock(&indio_dev->mlock);

		if (ret < 0)
			return ret;

		if (chan->address == EXTRACT(ret, 12, 4))
			*val = EXTRACT(ret, 0, 12);

		return IIO_VAL_INT;
	}
	return -EINVAL;
}

static const struct iio_info ad7923_info = {
	.read_raw = &ad7923_read_raw,
	.update_scan_mode = ad7923_update_scan_mode,
	.driver_module = THIS_MODULE,
};

static int ad7923_probe(struct spi_device *spi)
{
	struct ad7923_state *st;
	struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st));
	int ret;

	if (indio_dev == NULL)
		return -ENOMEM;

	st = iio_priv(indio_dev);

	spi_set_drvdata(spi, indio_dev);

	st->spi = spi;

	indio_dev->name = spi_get_device_id(spi)->name;
	indio_dev->dev.parent = &spi->dev;
	indio_dev->modes = INDIO_DIRECT_MODE;
	indio_dev->channels = ad7923_channels;
	indio_dev->num_channels = ARRAY_SIZE(ad7923_channels);
	indio_dev->info = &ad7923_info;

	/* Setup default message */

	st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
	st->scan_single_xfer[0].len = 2;
	st->scan_single_xfer[0].cs_change = 1;
	st->scan_single_xfer[1].rx_buf = &st->rx_buf[0];
	st->scan_single_xfer[1].len = 2;

	spi_message_init(&st->scan_single_msg);
	spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
	spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);

	ret = iio_triggered_buffer_setup(indio_dev, NULL,
			&ad7923_trigger_handler, NULL);
	if (ret)
		goto error_free;

	ret = iio_device_register(indio_dev);
	if (ret)
		goto error_cleanup_ring;

	return 0;

error_cleanup_ring:
	iio_triggered_buffer_cleanup(indio_dev);
error_free:
	iio_device_free(indio_dev);

	return ret;
}

static int ad7923_remove(struct spi_device *spi)
{
	struct iio_dev *indio_dev = spi_get_drvdata(spi);

	iio_device_unregister(indio_dev);
	iio_triggered_buffer_cleanup(indio_dev);
	iio_device_free(indio_dev);

	return 0;
}

static const struct spi_device_id ad7923_id[] = {
	{"ad7923", 0},
	{}
};
MODULE_DEVICE_TABLE(spi, ad7923_id);

static struct spi_driver ad7923_driver = {
	.driver = {
		.name	= "ad7923",
		.owner	= THIS_MODULE,
	},
	.probe		= ad7923_probe,
	.remove		= ad7923_remove,
	.id_table	= ad7923_id,
};
module_spi_driver(ad7923_driver);

MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
MODULE_AUTHOR("Patrick Vasseur <patrick.vasseur@c-s.fr>");
MODULE_DESCRIPTION("Analog Devices AD7923 ADC");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
0eac259d CL	1	/*
	2	* AD7923 SPI ADC driver
	3	*
	4	* Copyright 2011 Analog Devices Inc (from AD7923 Driver)
	5	* Copyright 2012 CS Systemes d'Information
	6	*
	7	* Licensed under the GPL-2.
	8	*/
	9
	10	#include <linux/device.h>
	11	#include <linux/kernel.h>
	12	#include <linux/slab.h>
	13	#include <linux/sysfs.h>
	14	#include <linux/spi/spi.h>
	15	#include <linux/err.h>
	16	#include <linux/delay.h>
	17	#include <linux/module.h>
	18	#include <linux/interrupt.h>
	19
	20	#include <linux/iio/iio.h>
	21	#include <linux/iio/sysfs.h>
	22	#include <linux/iio/buffer.h>
	23	#include <linux/iio/trigger_consumer.h>
	24	#include <linux/iio/triggered_buffer.h>
	25
	26	#define AD7923_WRITE_CR (1 << 11) /* write control register */
	27	#define AD7923_RANGE (1 << 1) /* range to REFin */
	28	#define AD7923_CODING (1 << 0) /* coding is straight binary */
	29	#define AD7923_PM_MODE_AS (1) /* auto shutdown */
	30	#define AD7923_PM_MODE_FS (2) /* full shutdown */
	31	#define AD7923_PM_MODE_OPS (3) /* normal operation */
	32	#define AD7923_CHANNEL_0 (0) /* analog input 0 */
	33	#define AD7923_CHANNEL_1 (1) /* analog input 1 */
	34	#define AD7923_CHANNEL_2 (2) /* analog input 2 */
	35	#define AD7923_CHANNEL_3 (3) /* analog input 3 */
	36	#define AD7923_SEQUENCE_OFF (0) /* no sequence fonction */
	37	#define AD7923_SEQUENCE_PROTECT (2) /* no interrupt write cycle */
	38	#define AD7923_SEQUENCE_ON (3) /* continuous sequence */
	39
	40	#define AD7923_MAX_CHAN 4
	41
	42	#define AD7923_PM_MODE_WRITE(mode) (mode << 4) /* write mode */
	43	#define AD7923_CHANNEL_WRITE(channel) (channel << 6) /* write channel */
	44	#define AD7923_SEQUENCE_WRITE(sequence) (((sequence & 1) << 3) \
	45	+ ((sequence & 2) << 9))
	46	/* write sequence fonction */
	47	/* left shift for CR : bit 11 transmit in first */
	48	#define AD7923_SHIFT_REGISTER 4
	49
	50	/* val = value, dec = left shift, bits = number of bits of the mask */
	51	#define EXTRACT(val, dec, bits) ((val >> dec) & ((1 << bits) - 1))
	52
	53	struct ad7923_state {
	54	struct spi_device *spi;
	55	struct spi_transfer ring_xfer[5];
	56	struct spi_transfer scan_single_xfer[2];
	57	struct spi_message ring_msg;
	58	struct spi_message scan_single_msg;
	59	/*
	60	* DMA (thus cache coherency maintenance) requires the
	61	* transfer buffers to live in their own cache lines.
	62	*/
	63	__be16 rx_buf[4] ____cacheline_aligned;
	64	__be16 tx_buf[4];
65	};
66
67	#define AD7923_V_CHAN(index) \
68	{ \
69	.type = IIO_VOLTAGE, \
70	.indexed = 1, \
71	.channel = index, \
72	.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT \| \
73	IIO_CHAN_INFO_SCALE_SHARED_BIT, \
74	.address = index, \
75	.scan_index = index, \
76	.scan_type = { \
77	.sign = 'u', \
78	.realbits = 12, \
79	.storagebits = 16, \
80	.endianness = IIO_BE, \
81	}, \
82	}
83
84	static const struct iio_chan_spec ad7923_channels[] = {
85	AD7923_V_CHAN(0),
86	AD7923_V_CHAN(1),
87	AD7923_V_CHAN(2),
88	AD7923_V_CHAN(3),
89	IIO_CHAN_SOFT_TIMESTAMP(4),
90	};
91
92	/**
93	* ad7923_update_scan_mode() setup the spi transfer buffer for the new scan mask
94	**/
95	static int ad7923_update_scan_mode(struct iio_dev *indio_dev,
96	const unsigned long *active_scan_mask)
97	{
98	struct ad7923_state *st = iio_priv(indio_dev);
99	int i, cmd, len;
100
101	len = 0;
102	for_each_set_bit(i, active_scan_mask, AD7923_MAX_CHAN) {
103	cmd = AD7923_WRITE_CR \| AD7923_CODING \| AD7923_RANGE \|
104	AD7923_PM_MODE_WRITE(AD7923_PM_MODE_OPS) \|
105	AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) \|
106	AD7923_CHANNEL_WRITE(i);
107	cmd <<= AD7923_SHIFT_REGISTER;
108	st->tx_buf[len++] = cpu_to_be16(cmd);
109	}
110	/* build spi ring message */
111	st->ring_xfer[0].tx_buf = &st->tx_buf[0];
112	st->ring_xfer[0].len = len;
113	st->ring_xfer[0].cs_change = 1;
114
115	spi_message_init(&st->ring_msg);
116	spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
117
118	for (i = 0; i < len; i++) {
119	st->ring_xfer[i + 1].rx_buf = &st->rx_buf[i];
120	st->ring_xfer[i + 1].len = 2;
121	st->ring_xfer[i + 1].cs_change = 1;
122	spi_message_add_tail(&st->ring_xfer[i + 1], &st->ring_msg);
123	}
124	/* make sure last transfer cs_change is not set */
125	st->ring_xfer[i + 1].cs_change = 0;
126
127	return 0;
128	}
129
130	/**
131	* ad7923_trigger_handler() bh of trigger launched polling to ring buffer
132	*
133	* Currently there is no option in this driver to disable the saving of
134	* timestamps within the ring.
135	**/
136	static irqreturn_t ad7923_trigger_handler(int irq, void *p)
137	{
138	struct iio_poll_func *pf = p;
139	struct iio_dev *indio_dev = pf->indio_dev;
140	struct ad7923_state *st = iio_priv(indio_dev);
141	s64 time_ns = 0;
142	int b_sent;
143
144	b_sent = spi_sync(st->spi, &st->ring_msg);
145	if (b_sent)
146	goto done;
147
148	if (indio_dev->scan_timestamp) {
149	time_ns = iio_get_time_ns();
150	memcpy((u8 *)st->rx_buf + indio_dev->scan_bytes - sizeof(s64),
151	&time_ns, sizeof(time_ns));
152	}
153
154	iio_push_to_buffers(indio_dev, (u8 *)st->rx_buf);
155
156	done:
157	iio_trigger_notify_done(indio_dev->trig);
158
159	return IRQ_HANDLED;
160	}
161
162	static int ad7923_scan_direct(struct ad7923_state *st, unsigned ch)
163	{
164	int ret, cmd;
165
166	cmd = AD7923_WRITE_CR \| AD7923_PM_MODE_WRITE(AD7923_PM_MODE_OPS) \|
167	AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) \| AD7923_CODING \|
168	AD7923_CHANNEL_WRITE(ch) \| AD7923_RANGE;
169	cmd <<= AD7923_SHIFT_REGISTER;
170	st->tx_buf[0] = cpu_to_be16(cmd);
171
172	ret = spi_sync(st->spi, &st->scan_single_msg);
173	if (ret)
174	return ret;
175
176	return be16_to_cpu(st->rx_buf[0]);
177	}
178
179	static int ad7923_read_raw(struct iio_dev *indio_dev,
180	struct iio_chan_spec const *chan,
181	int *val,
182	int *val2,
183	long m)
184	{
185	int ret;
186	struct ad7923_state *st = iio_priv(indio_dev);
187
188	switch (m) {
189	case IIO_CHAN_INFO_RAW:
190	mutex_lock(&indio_dev->mlock);
191	if (iio_buffer_enabled(indio_dev))
192	ret = -EBUSY;
193	else
194	ret = ad7923_scan_direct(st, chan->address);
195	mutex_unlock(&indio_dev->mlock);
196
197	if (ret < 0)
198	return ret;
199
200	if (chan->address == EXTRACT(ret, 12, 4))
201	*val = EXTRACT(ret, 0, 12);
202
203	return IIO_VAL_INT;
204	}
205	return -EINVAL;
206	}
207
208	static const struct iio_info ad7923_info = {
209	.read_raw = &ad7923_read_raw,
210	.update_scan_mode = ad7923_update_scan_mode,
211	.driver_module = THIS_MODULE,
212	};
213
214	static int ad7923_probe(struct spi_device *spi)
215	{
216	struct ad7923_state *st;
217	struct iio_dev indio_dev = iio_device_alloc(sizeof(st));
218	int ret;
219
220	if (indio_dev == NULL)
221	return -ENOMEM;
222
223	st = iio_priv(indio_dev);
224
225	spi_set_drvdata(spi, indio_dev);
226
227	st->spi = spi;
228
229	indio_dev->name = spi_get_device_id(spi)->name;
230	indio_dev->dev.parent = &spi->dev;
231	indio_dev->modes = INDIO_DIRECT_MODE;
232	indio_dev->channels = ad7923_channels;
233	indio_dev->num_channels = ARRAY_SIZE(ad7923_channels);
234	indio_dev->info = &ad7923_info;
235
236	/* Setup default message */
237
238	st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
239	st->scan_single_xfer[0].len = 2;
240	st->scan_single_xfer[0].cs_change = 1;
241	st->scan_single_xfer[1].rx_buf = &st->rx_buf[0];
242	st->scan_single_xfer[1].len = 2;
243
244	spi_message_init(&st->scan_single_msg);
245	spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
246	spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
247
248	ret = iio_triggered_buffer_setup(indio_dev, NULL,
249	&ad7923_trigger_handler, NULL);
250	if (ret)
251	goto error_free;
252
253	ret = iio_device_register(indio_dev);
254	if (ret)
255	goto error_cleanup_ring;
256
257	return 0;
258
259	error_cleanup_ring:
260	iio_triggered_buffer_cleanup(indio_dev);
261	error_free:
262	iio_device_free(indio_dev);
263
264	return ret;
265	}
266
267	static int ad7923_remove(struct spi_device *spi)
268	{
269	struct iio_dev *indio_dev = spi_get_drvdata(spi);
270
271	iio_device_unregister(indio_dev);
272	iio_triggered_buffer_cleanup(indio_dev);
273	iio_device_free(indio_dev);
274
275	return 0;
276	}
277
278	static const struct spi_device_id ad7923_id[] = {
279	{"ad7923", 0},
280	{}
281	};
282	MODULE_DEVICE_TABLE(spi, ad7923_id);
283
284	static struct spi_driver ad7923_driver = {
285	.driver = {
286	.name = "ad7923",
287	.owner = THIS_MODULE,
288	},
289	.probe = ad7923_probe,
290	.remove = ad7923_remove,
291	.id_table = ad7923_id,
292	};
293	module_spi_driver(ad7923_driver);
294
295	MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
296	MODULE_AUTHOR("Patrick Vasseur <patrick.vasseur@c-s.fr>");
297	MODULE_DESCRIPTION("Analog Devices AD7923 ADC");
298	MODULE_LICENSE("GPL v2");