[deliverable/linux.git] / drivers / iio / adc / ti_am335x_adc.c

/*
 * TI ADC MFD driver
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/kernel.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/iio/iio.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/iio/machine.h>
#include <linux/iio/driver.h>

#include <linux/mfd/ti_am335x_tscadc.h>
#include <linux/iio/buffer.h>
#include <linux/iio/kfifo_buf.h>

struct tiadc_device {
	struct ti_tscadc_dev *mfd_tscadc;
	int channels;
	u8 channel_line[8];
	u8 channel_step[8];
	int buffer_en_ch_steps;
	u16 data[8];
};

static unsigned int tiadc_readl(struct tiadc_device *adc, unsigned int reg)
{
	return readl(adc->mfd_tscadc->tscadc_base + reg);
}

static void tiadc_writel(struct tiadc_device *adc, unsigned int reg,
					unsigned int val)
{
	writel(val, adc->mfd_tscadc->tscadc_base + reg);
}

static u32 get_adc_step_mask(struct tiadc_device *adc_dev)
{
	u32 step_en;

	step_en = ((1 << adc_dev->channels) - 1);
	step_en <<= TOTAL_STEPS - adc_dev->channels + 1;
	return step_en;
}

static u32 get_adc_chan_step_mask(struct tiadc_device *adc_dev,
		struct iio_chan_spec const *chan)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) {
		if (chan->channel == adc_dev->channel_line[i]) {
			u32 step;

			step = adc_dev->channel_step[i];
			/* +1 for the charger */
			return 1 << (step + 1);
		}
	}
	WARN_ON(1);
	return 0;
}

static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan)
{
	return 1 << adc_dev->channel_step[chan];
}

static void tiadc_step_config(struct iio_dev *indio_dev)
{
	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	unsigned int stepconfig;
	int i, steps;

	/*
	 * There are 16 configurable steps and 8 analog input
	 * lines available which are shared between Touchscreen and ADC.
	 *
	 * Steps backwards i.e. from 16 towards 0 are used by ADC
	 * depending on number of input lines needed.
	 * Channel would represent which analog input
	 * needs to be given to ADC to digitalize data.
	 */

	steps = TOTAL_STEPS - adc_dev->channels;
	if (iio_buffer_enabled(indio_dev))
		stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1
					| STEPCONFIG_MODE_SWCNT;
	else
		stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1;

	for (i = 0; i < adc_dev->channels; i++) {
		int chan;

		chan = adc_dev->channel_line[i];
		tiadc_writel(adc_dev, REG_STEPCONFIG(steps),
				stepconfig | STEPCONFIG_INP(chan));
		tiadc_writel(adc_dev, REG_STEPDELAY(steps),
				STEPCONFIG_OPENDLY);
		adc_dev->channel_step[i] = steps;
		steps++;
	}
}

static irqreturn_t tiadc_irq_h(int irq, void *private)
{
	struct iio_dev *indio_dev = private;
	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	unsigned int status, config;
	status = tiadc_readl(adc_dev, REG_IRQSTATUS);

	/*
	 * ADC and touchscreen share the IRQ line.
	 * FIFO0 interrupts are used by TSC. Handle FIFO1 IRQs here only
	 */
	if (status & IRQENB_FIFO1OVRRUN) {
		/* FIFO Overrun. Clear flag. Disable/Enable ADC to recover */
		config = tiadc_readl(adc_dev, REG_CTRL);
		config &= ~(CNTRLREG_TSCSSENB);
		tiadc_writel(adc_dev, REG_CTRL, config);
		tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1OVRRUN
				| IRQENB_FIFO1UNDRFLW | IRQENB_FIFO1THRES);
		tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_TSCSSENB));
		return IRQ_HANDLED;
	} else if (status & IRQENB_FIFO1THRES) {
		/* Disable irq and wake worker thread */
		tiadc_writel(adc_dev, REG_IRQCLR, IRQENB_FIFO1THRES);
		return IRQ_WAKE_THREAD;
	}

	return IRQ_NONE;
}

static irqreturn_t tiadc_worker_h(int irq, void *private)
{
	struct iio_dev *indio_dev = private;
	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	int i, k, fifo1count, read;
	u16 *data = adc_dev->data;

	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
	for (k = 0; k < fifo1count; k = k + i) {
		for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
			read = tiadc_readl(adc_dev, REG_FIFO1);
			data[i] = read & FIFOREAD_DATA_MASK;
		}
		iio_push_to_buffers(indio_dev, (u8 *) data);
	}

	tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES);
	tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES);

	return IRQ_HANDLED;
}

static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
{
	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	int i, fifo1count, read;

	tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
				IRQENB_FIFO1OVRRUN |
				IRQENB_FIFO1UNDRFLW));

	/* Flush FIFO. Needed in corner cases in simultaneous tsc/adc use */
	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
	for (i = 0; i < fifo1count; i++)
		read = tiadc_readl(adc_dev, REG_FIFO1);

	return 0;
}

static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
{
	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	struct iio_buffer *buffer = indio_dev->buffer;
	unsigned int enb = 0;
	u8 bit;

	tiadc_step_config(indio_dev);
	for_each_set_bit(bit, buffer->scan_mask, adc_dev->channels)
		enb |= (get_adc_step_bit(adc_dev, bit) << 1);
	adc_dev->buffer_en_ch_steps = enb;

	am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);

	tiadc_writel(adc_dev,  REG_IRQSTATUS, IRQENB_FIFO1THRES
				| IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
	tiadc_writel(adc_dev,  REG_IRQENABLE, IRQENB_FIFO1THRES
				| IRQENB_FIFO1OVRRUN);

	return 0;
}

static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
{
	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	int fifo1count, i, read;

	tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
				IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW));
	am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
	adc_dev->buffer_en_ch_steps = 0;

	/* Flush FIFO of leftover data in the time it takes to disable adc */
	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
	for (i = 0; i < fifo1count; i++)
		read = tiadc_readl(adc_dev, REG_FIFO1);

	return 0;
}

static int tiadc_buffer_postdisable(struct iio_dev *indio_dev)
{
	tiadc_step_config(indio_dev);

	return 0;
}

static const struct iio_buffer_setup_ops tiadc_buffer_setup_ops = {
	.preenable = &tiadc_buffer_preenable,
	.postenable = &tiadc_buffer_postenable,
	.predisable = &tiadc_buffer_predisable,
	.postdisable = &tiadc_buffer_postdisable,
};

static int tiadc_iio_buffered_hardware_setup(struct iio_dev *indio_dev,
	irqreturn_t (*pollfunc_bh)(int irq, void *p),
	irqreturn_t (*pollfunc_th)(int irq, void *p),
	int irq,
	unsigned long flags,
	const struct iio_buffer_setup_ops *setup_ops)
{
	struct iio_buffer *buffer;
	int ret;

	buffer = iio_kfifo_allocate(indio_dev);
	if (!buffer)
		return -ENOMEM;

	iio_device_attach_buffer(indio_dev, buffer);

	ret = request_threaded_irq(irq,	pollfunc_th, pollfunc_bh,
				flags, indio_dev->name, indio_dev);
	if (ret)
		goto error_kfifo_free;

	indio_dev->setup_ops = setup_ops;
	indio_dev->modes |= INDIO_BUFFER_HARDWARE;

	ret = iio_buffer_register(indio_dev,
				  indio_dev->channels,
				  indio_dev->num_channels);
	if (ret)
		goto error_free_irq;

	return 0;

error_free_irq:
	free_irq(irq, indio_dev);
error_kfifo_free:
	iio_kfifo_free(indio_dev->buffer);
	return ret;
}

static void tiadc_iio_buffered_hardware_remove(struct iio_dev *indio_dev)
{
	struct tiadc_device *adc_dev = iio_priv(indio_dev);

	free_irq(adc_dev->mfd_tscadc->irq, indio_dev);
	iio_kfifo_free(indio_dev->buffer);
	iio_buffer_unregister(indio_dev);
}


static const char * const chan_name_ain[] = {
	"AIN0",
	"AIN1",
	"AIN2",
	"AIN3",
	"AIN4",
	"AIN5",
	"AIN6",
	"AIN7",
};

static int tiadc_channel_init(struct iio_dev *indio_dev, int channels)
{
	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	struct iio_chan_spec *chan_array;
	struct iio_chan_spec *chan;
	int i;

	indio_dev->num_channels = channels;
	chan_array = kcalloc(channels,
			sizeof(struct iio_chan_spec), GFP_KERNEL);
	if (chan_array == NULL)
		return -ENOMEM;

	chan = chan_array;
	for (i = 0; i < channels; i++, chan++) {

		chan->type = IIO_VOLTAGE;
		chan->indexed = 1;
		chan->channel = adc_dev->channel_line[i];
		chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
		chan->datasheet_name = chan_name_ain[chan->channel];
		chan->scan_index = i;
		chan->scan_type.sign = 'u';
		chan->scan_type.realbits = 12;
		chan->scan_type.storagebits = 16;
	}

	indio_dev->channels = chan_array;

	return 0;
}

static void tiadc_channels_remove(struct iio_dev *indio_dev)
{
	kfree(indio_dev->channels);
}

static int tiadc_read_raw(struct iio_dev *indio_dev,
		struct iio_chan_spec const *chan,
		int *val, int *val2, long mask)
{
	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	int i, map_val;
	unsigned int fifo1count, read, stepid;
	bool found = false;
	u32 step_en;
	unsigned long timeout;

	if (iio_buffer_enabled(indio_dev))
		return -EBUSY;

	step_en = get_adc_chan_step_mask(adc_dev, chan);
	if (!step_en)
		return -EINVAL;

	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
	while (fifo1count--)
		tiadc_readl(adc_dev, REG_FIFO1);

	am335x_tsc_se_set_once(adc_dev->mfd_tscadc, step_en);

	timeout = jiffies + usecs_to_jiffies
				(IDLE_TIMEOUT * adc_dev->channels);
	/* Wait for Fifo threshold interrupt */
	while (1) {
		fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
		if (fifo1count)
			break;

		if (time_after(jiffies, timeout)) {
			am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
			return -EAGAIN;
		}
	}
	map_val = adc_dev->channel_step[chan->scan_index];

	/*
	 * We check the complete FIFO. We programmed just one entry but in case
	 * something went wrong we left empty handed (-EAGAIN previously) and
	 * then the value apeared somehow in the FIFO we would have two entries.
	 * Therefore we read every item and keep only the latest version of the
	 * requested channel.
	 */
	for (i = 0; i < fifo1count; i++) {
		read = tiadc_readl(adc_dev, REG_FIFO1);
		stepid = read & FIFOREAD_CHNLID_MASK;
		stepid = stepid >> 0x10;

		if (stepid == map_val) {
			read = read & FIFOREAD_DATA_MASK;
			found = true;
			*val = (u16) read;
		}
	}
	am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);

	if (found == false)
		return -EBUSY;
	return IIO_VAL_INT;
}

static const struct iio_info tiadc_info = {
	.read_raw = &tiadc_read_raw,
	.driver_module = THIS_MODULE,
};

static int tiadc_probe(struct platform_device *pdev)
{
	struct iio_dev		*indio_dev;
	struct tiadc_device	*adc_dev;
	struct device_node	*node = pdev->dev.of_node;
	struct property		*prop;
	const __be32		*cur;
	int			err;
	u32			val;
	int			channels = 0;

	if (!node) {
		dev_err(&pdev->dev, "Could not find valid DT data.\n");
		return -EINVAL;
	}

	indio_dev = devm_iio_device_alloc(&pdev->dev,
					  sizeof(struct tiadc_device));
	if (indio_dev == NULL) {
		dev_err(&pdev->dev, "failed to allocate iio device\n");
		return -ENOMEM;
	}
	adc_dev = iio_priv(indio_dev);

	adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev);

	of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
		adc_dev->channel_line[channels] = val;
		channels++;
	}
	adc_dev->channels = channels;

	indio_dev->dev.parent = &pdev->dev;
	indio_dev->name = dev_name(&pdev->dev);
	indio_dev->modes = INDIO_DIRECT_MODE;
	indio_dev->info = &tiadc_info;

	tiadc_step_config(indio_dev);
	tiadc_writel(adc_dev, REG_FIFO1THR, FIFO1_THRESHOLD);

	err = tiadc_channel_init(indio_dev, adc_dev->channels);
	if (err < 0)
		return err;

	err = tiadc_iio_buffered_hardware_setup(indio_dev,
		&tiadc_worker_h,
		&tiadc_irq_h,
		adc_dev->mfd_tscadc->irq,
		IRQF_SHARED,
		&tiadc_buffer_setup_ops);

	if (err)
		goto err_free_channels;

	err = iio_device_register(indio_dev);
	if (err)
		goto err_buffer_unregister;

	platform_set_drvdata(pdev, indio_dev);

	return 0;

err_buffer_unregister:
	tiadc_iio_buffered_hardware_remove(indio_dev);
err_free_channels:
	tiadc_channels_remove(indio_dev);
	return err;
}

static int tiadc_remove(struct platform_device *pdev)
{
	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	u32 step_en;

	iio_device_unregister(indio_dev);
	tiadc_iio_buffered_hardware_remove(indio_dev);
	tiadc_channels_remove(indio_dev);

	step_en = get_adc_step_mask(adc_dev);
	am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en);

	return 0;
}

#ifdef CONFIG_PM
static int tiadc_suspend(struct device *dev)
{
	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	struct ti_tscadc_dev *tscadc_dev;
	unsigned int idle;

	tscadc_dev = ti_tscadc_dev_get(to_platform_device(dev));
	if (!device_may_wakeup(tscadc_dev->dev)) {
		idle = tiadc_readl(adc_dev, REG_CTRL);
		idle &= ~(CNTRLREG_TSCSSENB);
		tiadc_writel(adc_dev, REG_CTRL, (idle |
				CNTRLREG_POWERDOWN));
	}

	return 0;
}

static int tiadc_resume(struct device *dev)
{
	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	unsigned int restore;

	/* Make sure ADC is powered up */
	restore = tiadc_readl(adc_dev, REG_CTRL);
	restore &= ~(CNTRLREG_POWERDOWN);
	tiadc_writel(adc_dev, REG_CTRL, restore);

	tiadc_step_config(indio_dev);
	am335x_tsc_se_set_cache(adc_dev->mfd_tscadc,
			adc_dev->buffer_en_ch_steps);
	return 0;
}

static const struct dev_pm_ops tiadc_pm_ops = {
	.suspend = tiadc_suspend,
	.resume = tiadc_resume,
};
#define TIADC_PM_OPS (&tiadc_pm_ops)
#else
#define TIADC_PM_OPS NULL
#endif

static const struct of_device_id ti_adc_dt_ids[] = {
	{ .compatible = "ti,am3359-adc", },
	{ }
};
MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);

static struct platform_driver tiadc_driver = {
	.driver = {
		.name   = "TI-am335x-adc",
		.pm	= TIADC_PM_OPS,
		.of_match_table = ti_adc_dt_ids,
	},
	.probe	= tiadc_probe,
	.remove	= tiadc_remove,
};
module_platform_driver(tiadc_driver);

MODULE_DESCRIPTION("TI ADC controller driver");
MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
5e53a69b PR	1	/*
	2	* TI ADC MFD driver
	3	*
	4	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License as
	8	* published by the Free Software Foundation version 2.
	9	*
	10	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	11	* kind, whether express or implied; without even the implied warranty
	12	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*/
	15
5e53a69b PR	16	#include <linux/kernel.h>
	17	#include <linux/err.h>
	18	#include <linux/module.h>
	19	#include <linux/slab.h>
	20	#include <linux/interrupt.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/io.h>
	23	#include <linux/iio/iio.h>
6f39ac4e PR	24	#include <linux/of.h>
6f39ac4e PR	25	#include <linux/of_device.h>
c80df483 PA	26	#include <linux/iio/machine.h>
c80df483 PA	27	#include <linux/iio/driver.h>
5e53a69b PR	28
5e53a69b PR	29	#include <linux/mfd/ti_am335x_tscadc.h>
ca9a5638 ZL	30	#include <linux/iio/buffer.h>
ca9a5638 ZL	31	#include <linux/iio/kfifo_buf.h>
5e53a69b PR	32
	33	struct tiadc_device {
	34	struct ti_tscadc_dev *mfd_tscadc;
	35	int channels;
18926ede SAS	36	u8 channel_line[8];
18926ede SAS	37	u8 channel_step[8];
ca9a5638	38	int buffer_en_ch_steps;
ca9a5638	39	u16 data[8];
5e53a69b PR	40	};
	41
	42	static unsigned int tiadc_readl(struct tiadc_device *adc, unsigned int reg)
	43	{
	44	return readl(adc->mfd_tscadc->tscadc_base + reg);
	45	}
	46
	47	static void tiadc_writel(struct tiadc_device *adc, unsigned int reg,
	48	unsigned int val)
	49	{
	50	writel(val, adc->mfd_tscadc->tscadc_base + reg);
	51	}
	52
abeccee4 PR	53	static u32 get_adc_step_mask(struct tiadc_device *adc_dev)
	54	{
	55	u32 step_en;
	56
	57	step_en = ((1 << adc_dev->channels) - 1);
	58	step_en <<= TOTAL_STEPS - adc_dev->channels + 1;
	59	return step_en;
	60	}
	61
7ca6740c SAS	62	static u32 get_adc_chan_step_mask(struct tiadc_device *adc_dev,
	63	struct iio_chan_spec const *chan)
	64	{
	65	int i;
	66
	67	for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) {
	68	if (chan->channel == adc_dev->channel_line[i]) {
	69	u32 step;
	70
	71	step = adc_dev->channel_step[i];
	72	/* +1 for the charger */
	73	return 1 << (step + 1);
	74	}
	75	}
	76	WARN_ON(1);
	77	return 0;
	78	}
	79
ca9a5638	80	static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan)
5e53a69b	81	{
ca9a5638 ZL	82	return 1 << adc_dev->channel_step[chan];
	83	}
	84
	85	static void tiadc_step_config(struct iio_dev *indio_dev)
	86	{
	87	struct tiadc_device *adc_dev = iio_priv(indio_dev);
5e53a69b	88	unsigned int stepconfig;
18926ede	89	int i, steps;
5e53a69b PR	90
	91	/*
	92	* There are 16 configurable steps and 8 analog input
	93	* lines available which are shared between Touchscreen and ADC.
	94	*
	95	* Steps backwards i.e. from 16 towards 0 are used by ADC
	96	* depending on number of input lines needed.
	97	* Channel would represent which analog input
	98	* needs to be given to ADC to digitalize data.
	99	*/
	100
	101	steps = TOTAL_STEPS - adc_dev->channels;
ca9a5638 ZL	102	if (iio_buffer_enabled(indio_dev))
	103	stepconfig = STEPCONFIG_AVG_16 \| STEPCONFIG_FIFO1
	104	\| STEPCONFIG_MODE_SWCNT;
	105	else
	106	stepconfig = STEPCONFIG_AVG_16 \| STEPCONFIG_FIFO1;
5e53a69b	107
18926ede SAS	108	for (i = 0; i < adc_dev->channels; i++) {
	109	int chan;
	110
	111	chan = adc_dev->channel_line[i];
	112	tiadc_writel(adc_dev, REG_STEPCONFIG(steps),
	113	stepconfig \| STEPCONFIG_INP(chan));
	114	tiadc_writel(adc_dev, REG_STEPDELAY(steps),
5e53a69b	115	STEPCONFIG_OPENDLY);
18926ede SAS	116	adc_dev->channel_step[i] = steps;
18926ede SAS	117	steps++;
5e53a69b	118	}
ca9a5638 ZL	119	}
	120
	121	static irqreturn_t tiadc_irq_h(int irq, void *private)
	122	{
	123	struct iio_dev *indio_dev = private;
	124	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	125	unsigned int status, config;
	126	status = tiadc_readl(adc_dev, REG_IRQSTATUS);
	127
	128	/*
	129	* ADC and touchscreen share the IRQ line.
	130	* FIFO0 interrupts are used by TSC. Handle FIFO1 IRQs here only
	131	*/
	132	if (status & IRQENB_FIFO1OVRRUN) {
	133	/* FIFO Overrun. Clear flag. Disable/Enable ADC to recover */
	134	config = tiadc_readl(adc_dev, REG_CTRL);
	135	config &= ~(CNTRLREG_TSCSSENB);
	136	tiadc_writel(adc_dev, REG_CTRL, config);
	137	tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1OVRRUN
	138	\| IRQENB_FIFO1UNDRFLW \| IRQENB_FIFO1THRES);
	139	tiadc_writel(adc_dev, REG_CTRL, (config \| CNTRLREG_TSCSSENB));
	140	return IRQ_HANDLED;
	141	} else if (status & IRQENB_FIFO1THRES) {
	142	/* Disable irq and wake worker thread */
	143	tiadc_writel(adc_dev, REG_IRQCLR, IRQENB_FIFO1THRES);
	144	return IRQ_WAKE_THREAD;
	145	}
	146
	147	return IRQ_NONE;
	148	}
	149
	150	static irqreturn_t tiadc_worker_h(int irq, void *private)
	151	{
	152	struct iio_dev *indio_dev = private;
	153	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	154	int i, k, fifo1count, read;
	155	u16 *data = adc_dev->data;
	156
	157	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
	158	for (k = 0; k < fifo1count; k = k + i) {
	159	for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
	160	read = tiadc_readl(adc_dev, REG_FIFO1);
	161	data[i] = read & FIFOREAD_DATA_MASK;
	162	}
	163	iio_push_to_buffers(indio_dev, (u8 *) data);
	164	}
	165
	166	tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES);
	167	tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES);
	168
	169	return IRQ_HANDLED;
	170	}
	171
	172	static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
	173	{
	174	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	175	int i, fifo1count, read;
	176
	177	tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES \|
	178	IRQENB_FIFO1OVRRUN \|
	179	IRQENB_FIFO1UNDRFLW));
	180
	181	/* Flush FIFO. Needed in corner cases in simultaneous tsc/adc use */
	182	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
183	for (i = 0; i < fifo1count; i++)
184	read = tiadc_readl(adc_dev, REG_FIFO1);
185
24adaf79	186	return 0;
ca9a5638 ZL	187	}
	188
	189	static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
	190	{
	191	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	192	struct iio_buffer *buffer = indio_dev->buffer;
	193	unsigned int enb = 0;
	194	u8 bit;
	195
	196	tiadc_step_config(indio_dev);
	197	for_each_set_bit(bit, buffer->scan_mask, adc_dev->channels)
	198	enb \|= (get_adc_step_bit(adc_dev, bit) << 1);
	199	adc_dev->buffer_en_ch_steps = enb;
	200
7e170c6e	201	am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
ca9a5638 ZL	202
	203	tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES
	204	\| IRQENB_FIFO1OVRRUN \| IRQENB_FIFO1UNDRFLW);
	205	tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES
	206	\| IRQENB_FIFO1OVRRUN);
	207
	208	return 0;
	209	}
	210
	211	static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
	212	{
	213	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	214	int fifo1count, i, read;
	215
	216	tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES \|
	217	IRQENB_FIFO1OVRRUN \| IRQENB_FIFO1UNDRFLW));
	218	am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
3954b7bf	219	adc_dev->buffer_en_ch_steps = 0;
b1451e54	220
ca9a5638 ZL	221	/* Flush FIFO of leftover data in the time it takes to disable adc */
	222	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
	223	for (i = 0; i < fifo1count; i++)
	224	read = tiadc_readl(adc_dev, REG_FIFO1);
	225
	226	return 0;
5e53a69b PR	227	}
5e53a69b PR	228
ca9a5638 ZL	229	static int tiadc_buffer_postdisable(struct iio_dev *indio_dev)
	230	{
	231	tiadc_step_config(indio_dev);
	232
	233	return 0;
	234	}
	235
	236	static const struct iio_buffer_setup_ops tiadc_buffer_setup_ops = {
	237	.preenable = &tiadc_buffer_preenable,
	238	.postenable = &tiadc_buffer_postenable,
	239	.predisable = &tiadc_buffer_predisable,
	240	.postdisable = &tiadc_buffer_postdisable,
	241	};
	242
98c08cf4	243	static int tiadc_iio_buffered_hardware_setup(struct iio_dev *indio_dev,
ca9a5638 ZL	244	irqreturn_t (pollfunc_bh)(int irq, void p),
	245	irqreturn_t (pollfunc_th)(int irq, void p),
	246	int irq,
	247	unsigned long flags,
	248	const struct iio_buffer_setup_ops *setup_ops)
	249	{
fe26980e	250	struct iio_buffer *buffer;
ca9a5638 ZL	251	int ret;
ca9a5638 ZL	252
fe26980e LPC	253	buffer = iio_kfifo_allocate(indio_dev);
fe26980e LPC	254	if (!buffer)
ca9a5638 ZL	255	return -ENOMEM;
ca9a5638 ZL	256
fe26980e LPC	257	iio_device_attach_buffer(indio_dev, buffer);
fe26980e LPC	258
ca9a5638 ZL	259	ret = request_threaded_irq(irq, pollfunc_th, pollfunc_bh,
	260	flags, indio_dev->name, indio_dev);
	261	if (ret)
	262	goto error_kfifo_free;
	263
	264	indio_dev->setup_ops = setup_ops;
	265	indio_dev->modes \|= INDIO_BUFFER_HARDWARE;
	266
	267	ret = iio_buffer_register(indio_dev,
	268	indio_dev->channels,
	269	indio_dev->num_channels);
	270	if (ret)
	271	goto error_free_irq;
	272
	273	return 0;
	274
	275	error_free_irq:
	276	free_irq(irq, indio_dev);
	277	error_kfifo_free:
	278	iio_kfifo_free(indio_dev->buffer);
	279	return ret;
	280	}
	281
	282	static void tiadc_iio_buffered_hardware_remove(struct iio_dev *indio_dev)
	283	{
	284	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	285
	286	free_irq(adc_dev->mfd_tscadc->irq, indio_dev);
	287	iio_kfifo_free(indio_dev->buffer);
	288	iio_buffer_unregister(indio_dev);
	289	}
	290
	291
c80df483 PA	292	static const char * const chan_name_ain[] = {
	293	"AIN0",
	294	"AIN1",
	295	"AIN2",
	296	"AIN3",
	297	"AIN4",
	298	"AIN5",
	299	"AIN6",
	300	"AIN7",
	301	};
	302
5e53a69b PR	303	static int tiadc_channel_init(struct iio_dev *indio_dev, int channels)
5e53a69b PR	304	{
c80df483	305	struct tiadc_device *adc_dev = iio_priv(indio_dev);
5e53a69b	306	struct iio_chan_spec *chan_array;
c80df483	307	struct iio_chan_spec *chan;
5e53a69b PR	308	int i;
	309
	310	indio_dev->num_channels = channels;
c80df483	311	chan_array = kcalloc(channels,
5e53a69b	312	sizeof(struct iio_chan_spec), GFP_KERNEL);
5e53a69b PR	313	if (chan_array == NULL)
	314	return -ENOMEM;
	315
c80df483 PA	316	chan = chan_array;
	317	for (i = 0; i < channels; i++, chan++) {
	318
5e53a69b PR	319	chan->type = IIO_VOLTAGE;
5e53a69b PR	320	chan->indexed = 1;
18926ede	321	chan->channel = adc_dev->channel_line[i];
6c572522	322	chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
18926ede	323	chan->datasheet_name = chan_name_ain[chan->channel];
ca9a5638	324	chan->scan_index = i;
c80df483 PA	325	chan->scan_type.sign = 'u';
c80df483 PA	326	chan->scan_type.realbits = 12;
0f6fc7d5	327	chan->scan_type.storagebits = 16;
5e53a69b PR	328	}
	329
	330	indio_dev->channels = chan_array;
	331
c80df483	332	return 0;
5e53a69b PR	333	}
	334
	335	static void tiadc_channels_remove(struct iio_dev *indio_dev)
	336	{
	337	kfree(indio_dev->channels);
	338	}
	339
	340	static int tiadc_read_raw(struct iio_dev *indio_dev,
	341	struct iio_chan_spec const *chan,
	342	int val, int val2, long mask)
	343	{
	344	struct tiadc_device *adc_dev = iio_priv(indio_dev);
b1451e54 PR	345	int i, map_val;
b1451e54 PR	346	unsigned int fifo1count, read, stepid;
1460c152	347	bool found = false;
b1451e54	348	u32 step_en;
7ca6740c	349	unsigned long timeout;
ca9a5638 ZL	350
	351	if (iio_buffer_enabled(indio_dev))
	352	return -EBUSY;
	353
7ca6740c SAS	354	step_en = get_adc_chan_step_mask(adc_dev, chan);
	355	if (!step_en)
	356	return -EINVAL;
	357
	358	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
	359	while (fifo1count--)
	360	tiadc_readl(adc_dev, REG_FIFO1);
	361
7e170c6e	362	am335x_tsc_se_set_once(adc_dev->mfd_tscadc, step_en);
b1451e54	363
7ca6740c SAS	364	timeout = jiffies + usecs_to_jiffies
	365	(IDLE_TIMEOUT * adc_dev->channels);
	366	/* Wait for Fifo threshold interrupt */
	367	while (1) {
	368	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
	369	if (fifo1count)
	370	break;
	371
	372	if (time_after(jiffies, timeout)) {
	373	am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
b1451e54 PR	374	return -EAGAIN;
b1451e54 PR	375	}
fb7f8ce3	376	}
baa3c652	377	map_val = adc_dev->channel_step[chan->scan_index];
5e53a69b PR	378
5e53a69b PR	379	/*
7ca6740c SAS	380	* We check the complete FIFO. We programmed just one entry but in case
	381	* something went wrong we left empty handed (-EAGAIN previously) and
	382	* then the value apeared somehow in the FIFO we would have two entries.
	383	* Therefore we read every item and keep only the latest version of the
	384	* requested channel.
5e53a69b	385	*/
5e53a69b	386	for (i = 0; i < fifo1count; i++) {
18926ede	387	read = tiadc_readl(adc_dev, REG_FIFO1);
b1451e54 PR	388	stepid = read & FIFOREAD_CHNLID_MASK;
	389	stepid = stepid >> 0x10;
	390
	391	if (stepid == map_val) {
	392	read = read & FIFOREAD_DATA_MASK;
1460c152	393	found = true;
0f6fc7d5	394	*val = (u16) read;
1460c152	395	}
5e53a69b	396	}
7ca6740c	397	am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
b1451e54	398
1460c152 SAS	399	if (found == false)
1460c152 SAS	400	return -EBUSY;
5e53a69b PR	401	return IIO_VAL_INT;
	402	}
	403
	404	static const struct iio_info tiadc_info = {
	405	.read_raw = &tiadc_read_raw,
bc93aa76	406	.driver_module = THIS_MODULE,
5e53a69b PR	407	};
5e53a69b PR	408
fc52692c	409	static int tiadc_probe(struct platform_device *pdev)
5e53a69b PR	410	{
	411	struct iio_dev *indio_dev;
	412	struct tiadc_device *adc_dev;
6f39ac4e	413	struct device_node *node = pdev->dev.of_node;
18926ede SAS	414	struct property *prop;
18926ede SAS	415	const __be32 *cur;
5e53a69b	416	int err;
18926ede SAS	417	u32 val;
18926ede SAS	418	int channels = 0;
5e53a69b	419
0ead4fb2 SAS	420	if (!node) {
0ead4fb2 SAS	421	dev_err(&pdev->dev, "Could not find valid DT data.\n");
5e53a69b PR	422	return -EINVAL;
	423	}
	424
a0648130 SK	425	indio_dev = devm_iio_device_alloc(&pdev->dev,
a0648130 SK	426	sizeof(struct tiadc_device));
5e53a69b PR	427	if (indio_dev == NULL) {
5e53a69b PR	428	dev_err(&pdev->dev, "failed to allocate iio device\n");
a0648130	429	return -ENOMEM;
5e53a69b PR	430	}
	431	adc_dev = iio_priv(indio_dev);
	432
6f39ac4e PR	433	adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev);
6f39ac4e PR	434
18926ede SAS	435	of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
	436	adc_dev->channel_line[channels] = val;
	437	channels++;
	438	}
	439	adc_dev->channels = channels;
5e53a69b PR	440
	441	indio_dev->dev.parent = &pdev->dev;
	442	indio_dev->name = dev_name(&pdev->dev);
	443	indio_dev->modes = INDIO_DIRECT_MODE;
	444	indio_dev->info = &tiadc_info;
	445
ca9a5638 ZL	446	tiadc_step_config(indio_dev);
ca9a5638 ZL	447	tiadc_writel(adc_dev, REG_FIFO1THR, FIFO1_THRESHOLD);
5e53a69b PR	448
	449	err = tiadc_channel_init(indio_dev, adc_dev->channels);
	450	if (err < 0)
a0648130	451	return err;
5e53a69b	452
ca9a5638 ZL	453	err = tiadc_iio_buffered_hardware_setup(indio_dev,
	454	&tiadc_worker_h,
	455	&tiadc_irq_h,
	456	adc_dev->mfd_tscadc->irq,
	457	IRQF_SHARED,
	458	&tiadc_buffer_setup_ops);
	459
5e53a69b PR	460	if (err)
	461	goto err_free_channels;
	462
ca9a5638 ZL	463	err = iio_device_register(indio_dev);
	464	if (err)
	465	goto err_buffer_unregister;
	466
5e53a69b PR	467	platform_set_drvdata(pdev, indio_dev);
	468
	469	return 0;
	470
ca9a5638 ZL	471	err_buffer_unregister:
ca9a5638 ZL	472	tiadc_iio_buffered_hardware_remove(indio_dev);
5e53a69b PR	473	err_free_channels:
5e53a69b PR	474	tiadc_channels_remove(indio_dev);
5e53a69b PR	475	return err;
	476	}
	477
fc52692c	478	static int tiadc_remove(struct platform_device *pdev)
5e53a69b PR	479	{
5e53a69b PR	480	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
abeccee4 PR	481	struct tiadc_device *adc_dev = iio_priv(indio_dev);
abeccee4 PR	482	u32 step_en;
5e53a69b PR	483
5e53a69b PR	484	iio_device_unregister(indio_dev);
ca9a5638	485	tiadc_iio_buffered_hardware_remove(indio_dev);
5e53a69b PR	486	tiadc_channels_remove(indio_dev);
5e53a69b PR	487
abeccee4 PR	488	step_en = get_adc_step_mask(adc_dev);
	489	am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en);
	490
5e53a69b PR	491	return 0;
	492	}
	493
	494	#ifdef CONFIG_PM
	495	static int tiadc_suspend(struct device *dev)
	496	{
	497	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	498	struct tiadc_device *adc_dev = iio_priv(indio_dev);
a9bce1b0	499	struct ti_tscadc_dev *tscadc_dev;
5e53a69b PR	500	unsigned int idle;
5e53a69b PR	501
a9bce1b0	502	tscadc_dev = ti_tscadc_dev_get(to_platform_device(dev));
5e53a69b PR	503	if (!device_may_wakeup(tscadc_dev->dev)) {
	504	idle = tiadc_readl(adc_dev, REG_CTRL);
	505	idle &= ~(CNTRLREG_TSCSSENB);
	506	tiadc_writel(adc_dev, REG_CTRL, (idle \|
	507	CNTRLREG_POWERDOWN));
	508	}
	509
	510	return 0;
	511	}
	512
	513	static int tiadc_resume(struct device *dev)
	514	{
	515	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	516	struct tiadc_device *adc_dev = iio_priv(indio_dev);
	517	unsigned int restore;
	518
	519	/* Make sure ADC is powered up */
	520	restore = tiadc_readl(adc_dev, REG_CTRL);
	521	restore &= ~(CNTRLREG_POWERDOWN);
	522	tiadc_writel(adc_dev, REG_CTRL, restore);
	523
ca9a5638	524	tiadc_step_config(indio_dev);
7ca6740c SAS	525	am335x_tsc_se_set_cache(adc_dev->mfd_tscadc,
7ca6740c SAS	526	adc_dev->buffer_en_ch_steps);
5e53a69b PR	527	return 0;
	528	}
	529
	530	static const struct dev_pm_ops tiadc_pm_ops = {
	531	.suspend = tiadc_suspend,
	532	.resume = tiadc_resume,
	533	};
	534	#define TIADC_PM_OPS (&tiadc_pm_ops)
	535	#else
	536	#define TIADC_PM_OPS NULL
	537	#endif
	538
6f39ac4e PR	539	static const struct of_device_id ti_adc_dt_ids[] = {
	540	{ .compatible = "ti,am3359-adc", },
	541	{ }
	542	};
	543	MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);
	544
5e53a69b PR	545	static struct platform_driver tiadc_driver = {
5e53a69b PR	546	.driver = {
9f99928f	547	.name = "TI-am335x-adc",
5e53a69b	548	.pm = TIADC_PM_OPS,
de06b344	549	.of_match_table = ti_adc_dt_ids,
5e53a69b PR	550	},
5e53a69b PR	551	.probe = tiadc_probe,
fc52692c	552	.remove = tiadc_remove,
5e53a69b	553	};
5e53a69b PR	554	module_platform_driver(tiadc_driver);
	555
	556	MODULE_DESCRIPTION("TI ADC controller driver");
	557	MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
	558	MODULE_LICENSE("GPL");