drm/radeon: add golden register settings for Hainan (v2)
[deliverable/linux.git] / drivers / iio / dac / ad5791.c
CommitLineData
69d900a6 1/*
9d41c5bb
LPC
2 * AD5760, AD5780, AD5781, AD5790, AD5791 Voltage Output Digital to Analog
3 * Converter
69d900a6
MH
4 *
5 * Copyright 2011 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/interrupt.h>
69d900a6
MH
11#include <linux/fs.h>
12#include <linux/device.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/regulator/consumer.h>
99c97852 18#include <linux/module.h>
69d900a6 19
06458e27
JC
20#include <linux/iio/iio.h>
21#include <linux/iio/sysfs.h>
dbdc025b 22#include <linux/iio/dac/ad5791.h>
69d900a6 23
20374d1a
LPC
24#define AD5791_RES_MASK(x) ((1 << (x)) - 1)
25#define AD5791_DAC_MASK AD5791_RES_MASK(20)
26#define AD5791_DAC_MSB (1 << 19)
27
28#define AD5791_CMD_READ (1 << 23)
29#define AD5791_CMD_WRITE (0 << 23)
30#define AD5791_ADDR(addr) ((addr) << 20)
31
32/* Registers */
33#define AD5791_ADDR_NOOP 0
34#define AD5791_ADDR_DAC0 1
35#define AD5791_ADDR_CTRL 2
36#define AD5791_ADDR_CLRCODE 3
37#define AD5791_ADDR_SW_CTRL 4
38
39/* Control Register */
40#define AD5791_CTRL_RBUF (1 << 1)
41#define AD5791_CTRL_OPGND (1 << 2)
42#define AD5791_CTRL_DACTRI (1 << 3)
43#define AD5791_CTRL_BIN2SC (1 << 4)
44#define AD5791_CTRL_SDODIS (1 << 5)
45#define AD5761_CTRL_LINCOMP(x) ((x) << 6)
46
47#define AD5791_LINCOMP_0_10 0
48#define AD5791_LINCOMP_10_12 1
49#define AD5791_LINCOMP_12_16 2
50#define AD5791_LINCOMP_16_19 3
51#define AD5791_LINCOMP_19_20 12
52
53#define AD5780_LINCOMP_0_10 0
54#define AD5780_LINCOMP_10_20 12
55
56/* Software Control Register */
57#define AD5791_SWCTRL_LDAC (1 << 0)
58#define AD5791_SWCTRL_CLR (1 << 1)
59#define AD5791_SWCTRL_RESET (1 << 2)
60
61#define AD5791_DAC_PWRDN_6K 0
62#define AD5791_DAC_PWRDN_3STATE 1
63
64/**
65 * struct ad5791_chip_info - chip specific information
66 * @get_lin_comp: function pointer to the device specific function
67 */
68
69struct ad5791_chip_info {
70 int (*get_lin_comp) (unsigned int span);
71};
72
73/**
74 * struct ad5791_state - driver instance specific data
75 * @us: spi_device
76 * @reg_vdd: positive supply regulator
77 * @reg_vss: negative supply regulator
78 * @chip_info: chip model specific constants
79 * @vref_mv: actual reference voltage used
80 * @vref_neg_mv: voltage of the negative supply
81 * @pwr_down_mode current power down mode
82 */
83
84struct ad5791_state {
85 struct spi_device *spi;
86 struct regulator *reg_vdd;
87 struct regulator *reg_vss;
88 const struct ad5791_chip_info *chip_info;
89 unsigned short vref_mv;
90 unsigned int vref_neg_mv;
91 unsigned ctrl;
92 unsigned pwr_down_mode;
93 bool pwr_down;
94};
95
96/**
97 * ad5791_supported_device_ids:
98 */
99
100enum ad5791_supported_device_ids {
101 ID_AD5760,
102 ID_AD5780,
103 ID_AD5781,
104 ID_AD5791,
105};
106
69d900a6
MH
107static int ad5791_spi_write(struct spi_device *spi, u8 addr, u32 val)
108{
109 union {
110 u32 d32;
111 u8 d8[4];
112 } data;
113
114 data.d32 = cpu_to_be32(AD5791_CMD_WRITE |
115 AD5791_ADDR(addr) |
116 (val & AD5791_DAC_MASK));
117
118 return spi_write(spi, &data.d8[1], 3);
119}
120
121static int ad5791_spi_read(struct spi_device *spi, u8 addr, u32 *val)
122{
123 union {
124 u32 d32;
125 u8 d8[4];
126 } data[3];
127 int ret;
69d900a6
MH
128 struct spi_transfer xfers[] = {
129 {
130 .tx_buf = &data[0].d8[1],
131 .bits_per_word = 8,
132 .len = 3,
133 .cs_change = 1,
134 }, {
135 .tx_buf = &data[1].d8[1],
136 .rx_buf = &data[2].d8[1],
137 .bits_per_word = 8,
138 .len = 3,
139 },
140 };
141
142 data[0].d32 = cpu_to_be32(AD5791_CMD_READ |
143 AD5791_ADDR(addr));
144 data[1].d32 = cpu_to_be32(AD5791_ADDR(AD5791_ADDR_NOOP));
145
14543a00 146 ret = spi_sync_transfer(spi, xfers, ARRAY_SIZE(xfers));
69d900a6
MH
147
148 *val = be32_to_cpu(data[2].d32);
149
150 return ret;
151}
152
4571b39b
LPC
153static const char * const ad5791_powerdown_modes[] = {
154 "6kohm_to_gnd",
155 "three_state",
c5b99396 156};
69d900a6 157
4571b39b
LPC
158static int ad5791_get_powerdown_mode(struct iio_dev *indio_dev,
159 const struct iio_chan_spec *chan)
69d900a6 160{
f5730d52 161 struct ad5791_state *st = iio_priv(indio_dev);
69d900a6 162
4571b39b 163 return st->pwr_down_mode;
69d900a6
MH
164}
165
4571b39b
LPC
166static int ad5791_set_powerdown_mode(struct iio_dev *indio_dev,
167 const struct iio_chan_spec *chan, unsigned int mode)
69d900a6 168{
f5730d52 169 struct ad5791_state *st = iio_priv(indio_dev);
69d900a6 170
4571b39b 171 st->pwr_down_mode = mode;
69d900a6 172
4571b39b 173 return 0;
69d900a6
MH
174}
175
4571b39b
LPC
176static const struct iio_enum ad5791_powerdown_mode_enum = {
177 .items = ad5791_powerdown_modes,
178 .num_items = ARRAY_SIZE(ad5791_powerdown_modes),
179 .get = ad5791_get_powerdown_mode,
180 .set = ad5791_set_powerdown_mode,
181};
182
183static ssize_t ad5791_read_dac_powerdown(struct iio_dev *indio_dev,
184 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
69d900a6 185{
f5730d52 186 struct ad5791_state *st = iio_priv(indio_dev);
69d900a6
MH
187
188 return sprintf(buf, "%d\n", st->pwr_down);
189}
190
4571b39b
LPC
191static ssize_t ad5791_write_dac_powerdown(struct iio_dev *indio_dev,
192 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
193 size_t len)
69d900a6 194{
4468cb55 195 bool pwr_down;
69d900a6 196 int ret;
f5730d52 197 struct ad5791_state *st = iio_priv(indio_dev);
69d900a6 198
4468cb55 199 ret = strtobool(buf, &pwr_down);
69d900a6
MH
200 if (ret)
201 return ret;
202
4468cb55 203 if (!pwr_down) {
69d900a6 204 st->ctrl &= ~(AD5791_CTRL_OPGND | AD5791_CTRL_DACTRI);
4468cb55 205 } else {
69d900a6
MH
206 if (st->pwr_down_mode == AD5791_DAC_PWRDN_6K)
207 st->ctrl |= AD5791_CTRL_OPGND;
208 else if (st->pwr_down_mode == AD5791_DAC_PWRDN_3STATE)
209 st->ctrl |= AD5791_CTRL_DACTRI;
4468cb55
LPC
210 }
211 st->pwr_down = pwr_down;
69d900a6
MH
212
213 ret = ad5791_spi_write(st->spi, AD5791_ADDR_CTRL, st->ctrl);
214
215 return ret ? ret : len;
216}
217
69d900a6
MH
218static int ad5791_get_lin_comp(unsigned int span)
219{
220 if (span <= 10000)
221 return AD5791_LINCOMP_0_10;
222 else if (span <= 12000)
223 return AD5791_LINCOMP_10_12;
224 else if (span <= 16000)
225 return AD5791_LINCOMP_12_16;
226 else if (span <= 19000)
227 return AD5791_LINCOMP_16_19;
228 else
229 return AD5791_LINCOMP_19_20;
230}
231
ba1c2bb2
MH
232static int ad5780_get_lin_comp(unsigned int span)
233{
234 if (span <= 10000)
235 return AD5780_LINCOMP_0_10;
236 else
237 return AD5780_LINCOMP_10_20;
238}
ba1c2bb2
MH
239static const struct ad5791_chip_info ad5791_chip_info_tbl[] = {
240 [ID_AD5760] = {
ba1c2bb2
MH
241 .get_lin_comp = ad5780_get_lin_comp,
242 },
243 [ID_AD5780] = {
ba1c2bb2
MH
244 .get_lin_comp = ad5780_get_lin_comp,
245 },
246 [ID_AD5781] = {
ba1c2bb2
MH
247 .get_lin_comp = ad5791_get_lin_comp,
248 },
249 [ID_AD5791] = {
ba1c2bb2
MH
250 .get_lin_comp = ad5791_get_lin_comp,
251 },
252};
253
c5b99396
JC
254static int ad5791_read_raw(struct iio_dev *indio_dev,
255 struct iio_chan_spec const *chan,
256 int *val,
257 int *val2,
258 long m)
259{
260 struct ad5791_state *st = iio_priv(indio_dev);
9dc9961d 261 u64 val64;
c5b99396
JC
262 int ret;
263
264 switch (m) {
09f4eb40 265 case IIO_CHAN_INFO_RAW:
c5b99396
JC
266 ret = ad5791_spi_read(st->spi, chan->address, val);
267 if (ret)
268 return ret;
269 *val &= AD5791_DAC_MASK;
270 *val >>= chan->scan_type.shift;
c5b99396 271 return IIO_VAL_INT;
c8a9f805 272 case IIO_CHAN_INFO_SCALE:
c5b99396 273 *val = 0;
75bb23a2 274 *val2 = (((u64)st->vref_mv) * 1000000ULL) >> chan->scan_type.realbits;
c5b99396 275 return IIO_VAL_INT_PLUS_MICRO;
c8a9f805 276 case IIO_CHAN_INFO_OFFSET:
9dc9961d
LPC
277 val64 = (((u64)st->vref_neg_mv) << chan->scan_type.realbits);
278 do_div(val64, st->vref_mv);
279 *val = -val64;
280 return IIO_VAL_INT;
c5b99396
JC
281 default:
282 return -EINVAL;
283 }
284
285};
286
4571b39b
LPC
287static const struct iio_chan_spec_ext_info ad5791_ext_info[] = {
288 {
289 .name = "powerdown",
290 .shared = true,
291 .read = ad5791_read_dac_powerdown,
292 .write = ad5791_write_dac_powerdown,
293 },
294 IIO_ENUM("powerdown_mode", true, &ad5791_powerdown_mode_enum),
295 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5791_powerdown_mode_enum),
296 { },
297};
298
299#define AD5791_CHAN(bits, shift) { \
300 .type = IIO_VOLTAGE, \
301 .output = 1, \
302 .indexed = 1, \
303 .address = AD5791_ADDR_DAC0, \
304 .channel = 0, \
305 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
306 IIO_CHAN_INFO_SCALE_SHARED_BIT | \
307 IIO_CHAN_INFO_OFFSET_SHARED_BIT, \
308 .scan_type = IIO_ST('u', bits, 24, shift), \
309 .ext_info = ad5791_ext_info, \
310}
311
312static const struct iio_chan_spec ad5791_channels[] = {
313 [ID_AD5760] = AD5791_CHAN(16, 4),
314 [ID_AD5780] = AD5791_CHAN(18, 2),
315 [ID_AD5781] = AD5791_CHAN(18, 2),
316 [ID_AD5791] = AD5791_CHAN(20, 0)
317};
c5b99396
JC
318
319static int ad5791_write_raw(struct iio_dev *indio_dev,
320 struct iio_chan_spec const *chan,
321 int val,
322 int val2,
323 long mask)
324{
325 struct ad5791_state *st = iio_priv(indio_dev);
326
327 switch (mask) {
09f4eb40 328 case IIO_CHAN_INFO_RAW:
021c0a38 329 val &= AD5791_RES_MASK(chan->scan_type.realbits);
c5b99396
JC
330 val <<= chan->scan_type.shift;
331
332 return ad5791_spi_write(st->spi, chan->address, val);
333
334 default:
335 return -EINVAL;
336 }
337}
338
6fe8135f 339static const struct iio_info ad5791_info = {
c5b99396
JC
340 .read_raw = &ad5791_read_raw,
341 .write_raw = &ad5791_write_raw,
6fe8135f
JC
342 .driver_module = THIS_MODULE,
343};
344
fc52692c 345static int ad5791_probe(struct spi_device *spi)
69d900a6
MH
346{
347 struct ad5791_platform_data *pdata = spi->dev.platform_data;
f5730d52 348 struct iio_dev *indio_dev;
69d900a6
MH
349 struct ad5791_state *st;
350 int ret, pos_voltage_uv = 0, neg_voltage_uv = 0;
351
7cbb7537 352 indio_dev = iio_device_alloc(sizeof(*st));
26a54797
JC
353 if (indio_dev == NULL) {
354 ret = -ENOMEM;
355 goto error_ret;
356 }
357 st = iio_priv(indio_dev);
358 st->reg_vdd = regulator_get(&spi->dev, "vdd");
359 if (!IS_ERR(st->reg_vdd)) {
360 ret = regulator_enable(st->reg_vdd);
69d900a6
MH
361 if (ret)
362 goto error_put_reg_pos;
363
7e2dcc69
AL
364 ret = regulator_get_voltage(st->reg_vdd);
365 if (ret < 0)
366 goto error_disable_reg_pos;
367
368 pos_voltage_uv = ret;
69d900a6
MH
369 }
370
26a54797
JC
371 st->reg_vss = regulator_get(&spi->dev, "vss");
372 if (!IS_ERR(st->reg_vss)) {
373 ret = regulator_enable(st->reg_vss);
69d900a6
MH
374 if (ret)
375 goto error_put_reg_neg;
376
7e2dcc69
AL
377 ret = regulator_get_voltage(st->reg_vss);
378 if (ret < 0)
379 goto error_disable_reg_neg;
380
381 neg_voltage_uv = ret;
69d900a6
MH
382 }
383
f5730d52
JC
384 st->pwr_down = true;
385 st->spi = spi;
386
9dc9961d
LPC
387 if (!IS_ERR(st->reg_vss) && !IS_ERR(st->reg_vdd)) {
388 st->vref_mv = (pos_voltage_uv + neg_voltage_uv) / 1000;
389 st->vref_neg_mv = neg_voltage_uv / 1000;
390 } else if (pdata) {
391 st->vref_mv = pdata->vref_pos_mv + pdata->vref_neg_mv;
392 st->vref_neg_mv = pdata->vref_neg_mv;
393 } else {
69d900a6 394 dev_warn(&spi->dev, "reference voltage unspecified\n");
9dc9961d 395 }
69d900a6
MH
396
397 ret = ad5791_spi_write(spi, AD5791_ADDR_SW_CTRL, AD5791_SWCTRL_RESET);
398 if (ret)
26a54797 399 goto error_disable_reg_neg;
69d900a6 400
c5b99396
JC
401 st->chip_info = &ad5791_chip_info_tbl[spi_get_device_id(spi)
402 ->driver_data];
69d900a6
MH
403
404
ba1c2bb2
MH
405 st->ctrl = AD5761_CTRL_LINCOMP(st->chip_info->get_lin_comp(st->vref_mv))
406 | ((pdata && pdata->use_rbuf_gain2) ? 0 : AD5791_CTRL_RBUF) |
69d900a6
MH
407 AD5791_CTRL_BIN2SC;
408
409 ret = ad5791_spi_write(spi, AD5791_ADDR_CTRL, st->ctrl |
410 AD5791_CTRL_OPGND | AD5791_CTRL_DACTRI);
411 if (ret)
26a54797 412 goto error_disable_reg_neg;
69d900a6 413
f5730d52
JC
414 spi_set_drvdata(spi, indio_dev);
415 indio_dev->dev.parent = &spi->dev;
416 indio_dev->info = &ad5791_info;
417 indio_dev->modes = INDIO_DIRECT_MODE;
c5b99396
JC
418 indio_dev->channels
419 = &ad5791_channels[spi_get_device_id(spi)->driver_data];
420 indio_dev->num_channels = 1;
421 indio_dev->name = spi_get_device_id(st->spi)->name;
f5730d52 422 ret = iio_device_register(indio_dev);
69d900a6 423 if (ret)
26a54797 424 goto error_disable_reg_neg;
69d900a6
MH
425
426 return 0;
427
69d900a6 428error_disable_reg_neg:
26a54797
JC
429 if (!IS_ERR(st->reg_vss))
430 regulator_disable(st->reg_vss);
69d900a6 431error_put_reg_neg:
26a54797
JC
432 if (!IS_ERR(st->reg_vss))
433 regulator_put(st->reg_vss);
69d900a6 434
7e2dcc69 435error_disable_reg_pos:
26a54797
JC
436 if (!IS_ERR(st->reg_vdd))
437 regulator_disable(st->reg_vdd);
69d900a6 438error_put_reg_pos:
26a54797
JC
439 if (!IS_ERR(st->reg_vdd))
440 regulator_put(st->reg_vdd);
7cbb7537 441 iio_device_free(indio_dev);
26a54797 442error_ret:
69d900a6 443
69d900a6
MH
444 return ret;
445}
446
fc52692c 447static int ad5791_remove(struct spi_device *spi)
69d900a6 448{
f5730d52
JC
449 struct iio_dev *indio_dev = spi_get_drvdata(spi);
450 struct ad5791_state *st = iio_priv(indio_dev);
69d900a6 451
d2fffd6c 452 iio_device_unregister(indio_dev);
69d900a6 453 if (!IS_ERR(st->reg_vdd)) {
26a54797
JC
454 regulator_disable(st->reg_vdd);
455 regulator_put(st->reg_vdd);
69d900a6
MH
456 }
457
458 if (!IS_ERR(st->reg_vss)) {
26a54797
JC
459 regulator_disable(st->reg_vss);
460 regulator_put(st->reg_vss);
69d900a6 461 }
7cbb7537 462 iio_device_free(indio_dev);
26d25ae3 463
69d900a6
MH
464 return 0;
465}
466
467static const struct spi_device_id ad5791_id[] = {
ba1c2bb2
MH
468 {"ad5760", ID_AD5760},
469 {"ad5780", ID_AD5780},
69d900a6 470 {"ad5781", ID_AD5781},
9d41c5bb 471 {"ad5790", ID_AD5791},
ba1c2bb2 472 {"ad5791", ID_AD5791},
69d900a6
MH
473 {}
474};
55e4390c 475MODULE_DEVICE_TABLE(spi, ad5791_id);
69d900a6
MH
476
477static struct spi_driver ad5791_driver = {
478 .driver = {
479 .name = "ad5791",
480 .owner = THIS_MODULE,
481 },
482 .probe = ad5791_probe,
fc52692c 483 .remove = ad5791_remove,
69d900a6
MH
484 .id_table = ad5791_id,
485};
ae6ae6fe 486module_spi_driver(ad5791_driver);
69d900a6
MH
487
488MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
9d41c5bb 489MODULE_DESCRIPTION("Analog Devices AD5760/AD5780/AD5781/AD5790/AD5791 DAC");
69d900a6 490MODULE_LICENSE("GPL v2");
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