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22b46c45 SP |
1 | /* |
2 | * BMG160 Gyro Sensor driver | |
3 | * Copyright (c) 2014, Intel Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/i2c.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/slab.h> | |
20 | #include <linux/acpi.h> | |
21 | #include <linux/gpio/consumer.h> | |
22 | #include <linux/pm.h> | |
23 | #include <linux/pm_runtime.h> | |
24 | #include <linux/iio/iio.h> | |
25 | #include <linux/iio/sysfs.h> | |
26 | #include <linux/iio/buffer.h> | |
27 | #include <linux/iio/trigger.h> | |
28 | #include <linux/iio/events.h> | |
29 | #include <linux/iio/trigger_consumer.h> | |
30 | #include <linux/iio/triggered_buffer.h> | |
c6c9e995 | 31 | #include <linux/regmap.h> |
22b46c45 SP |
32 | |
33 | #define BMG160_DRV_NAME "bmg160" | |
34 | #define BMG160_IRQ_NAME "bmg160_event" | |
35 | #define BMG160_GPIO_NAME "gpio_int" | |
36 | ||
37 | #define BMG160_REG_CHIP_ID 0x00 | |
38 | #define BMG160_CHIP_ID_VAL 0x0F | |
39 | ||
40 | #define BMG160_REG_PMU_LPW 0x11 | |
41 | #define BMG160_MODE_NORMAL 0x00 | |
42 | #define BMG160_MODE_DEEP_SUSPEND 0x20 | |
43 | #define BMG160_MODE_SUSPEND 0x80 | |
44 | ||
45 | #define BMG160_REG_RANGE 0x0F | |
46 | ||
47 | #define BMG160_RANGE_2000DPS 0 | |
48 | #define BMG160_RANGE_1000DPS 1 | |
49 | #define BMG160_RANGE_500DPS 2 | |
50 | #define BMG160_RANGE_250DPS 3 | |
51 | #define BMG160_RANGE_125DPS 4 | |
52 | ||
53 | #define BMG160_REG_PMU_BW 0x10 | |
54 | #define BMG160_NO_FILTER 0 | |
55 | #define BMG160_DEF_BW 100 | |
56 | ||
57 | #define BMG160_REG_INT_MAP_0 0x17 | |
58 | #define BMG160_INT_MAP_0_BIT_ANY BIT(1) | |
59 | ||
60 | #define BMG160_REG_INT_MAP_1 0x18 | |
61 | #define BMG160_INT_MAP_1_BIT_NEW_DATA BIT(0) | |
62 | ||
63 | #define BMG160_REG_INT_RST_LATCH 0x21 | |
64 | #define BMG160_INT_MODE_LATCH_RESET 0x80 | |
65 | #define BMG160_INT_MODE_LATCH_INT 0x0F | |
66 | #define BMG160_INT_MODE_NON_LATCH_INT 0x00 | |
67 | ||
68 | #define BMG160_REG_INT_EN_0 0x15 | |
69 | #define BMG160_DATA_ENABLE_INT BIT(7) | |
70 | ||
5af6b307 SP |
71 | #define BMG160_REG_INT_EN_1 0x16 |
72 | #define BMG160_INT1_BIT_OD BIT(1) | |
73 | ||
22b46c45 SP |
74 | #define BMG160_REG_XOUT_L 0x02 |
75 | #define BMG160_AXIS_TO_REG(axis) (BMG160_REG_XOUT_L + (axis * 2)) | |
76 | ||
77 | #define BMG160_REG_SLOPE_THRES 0x1B | |
78 | #define BMG160_SLOPE_THRES_MASK 0x0F | |
79 | ||
80 | #define BMG160_REG_MOTION_INTR 0x1C | |
81 | #define BMG160_INT_MOTION_X BIT(0) | |
82 | #define BMG160_INT_MOTION_Y BIT(1) | |
83 | #define BMG160_INT_MOTION_Z BIT(2) | |
84 | #define BMG160_ANY_DUR_MASK 0x30 | |
85 | #define BMG160_ANY_DUR_SHIFT 4 | |
86 | ||
87 | #define BMG160_REG_INT_STATUS_2 0x0B | |
88 | #define BMG160_ANY_MOTION_MASK 0x07 | |
cb80f6a3 SP |
89 | #define BMG160_ANY_MOTION_BIT_X BIT(0) |
90 | #define BMG160_ANY_MOTION_BIT_Y BIT(1) | |
91 | #define BMG160_ANY_MOTION_BIT_Z BIT(2) | |
22b46c45 SP |
92 | |
93 | #define BMG160_REG_TEMP 0x08 | |
94 | #define BMG160_TEMP_CENTER_VAL 23 | |
95 | ||
96 | #define BMG160_MAX_STARTUP_TIME_MS 80 | |
97 | ||
98 | #define BMG160_AUTO_SUSPEND_DELAY_MS 2000 | |
99 | ||
100 | struct bmg160_data { | |
74e04345 | 101 | struct device *dev; |
c6c9e995 | 102 | struct regmap *regmap; |
22b46c45 SP |
103 | struct iio_trigger *dready_trig; |
104 | struct iio_trigger *motion_trig; | |
105 | struct mutex mutex; | |
106 | s16 buffer[8]; | |
107 | u8 bw_bits; | |
108 | u32 dps_range; | |
109 | int ev_enable_state; | |
110 | int slope_thres; | |
111 | bool dready_trigger_on; | |
112 | bool motion_trigger_on; | |
22b46c45 SP |
113 | }; |
114 | ||
115 | enum bmg160_axis { | |
116 | AXIS_X, | |
117 | AXIS_Y, | |
118 | AXIS_Z, | |
119 | }; | |
120 | ||
121 | static const struct { | |
122 | int val; | |
123 | int bw_bits; | |
124 | } bmg160_samp_freq_table[] = { {100, 0x07}, | |
125 | {200, 0x06}, | |
126 | {400, 0x03}, | |
127 | {1000, 0x02}, | |
128 | {2000, 0x01} }; | |
129 | ||
130 | static const struct { | |
131 | int scale; | |
132 | int dps_range; | |
133 | } bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS}, | |
134 | { 532, BMG160_RANGE_1000DPS}, | |
135 | { 266, BMG160_RANGE_500DPS}, | |
136 | { 133, BMG160_RANGE_250DPS}, | |
137 | { 66, BMG160_RANGE_125DPS} }; | |
138 | ||
c6c9e995 MP |
139 | static struct regmap_config bmg160_regmap_i2c_conf = { |
140 | .reg_bits = 8, | |
141 | .val_bits = 8, | |
142 | .max_register = 0x3f | |
143 | }; | |
144 | ||
22b46c45 SP |
145 | static int bmg160_set_mode(struct bmg160_data *data, u8 mode) |
146 | { | |
147 | int ret; | |
148 | ||
c6c9e995 | 149 | ret = regmap_write(data->regmap, BMG160_REG_PMU_LPW, mode); |
22b46c45 | 150 | if (ret < 0) { |
74e04345 | 151 | dev_err(data->dev, "Error writing reg_pmu_lpw\n"); |
22b46c45 SP |
152 | return ret; |
153 | } | |
154 | ||
155 | return 0; | |
156 | } | |
157 | ||
158 | static int bmg160_convert_freq_to_bit(int val) | |
159 | { | |
160 | int i; | |
161 | ||
162 | for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) { | |
163 | if (bmg160_samp_freq_table[i].val == val) | |
164 | return bmg160_samp_freq_table[i].bw_bits; | |
165 | } | |
166 | ||
167 | return -EINVAL; | |
168 | } | |
169 | ||
170 | static int bmg160_set_bw(struct bmg160_data *data, int val) | |
171 | { | |
172 | int ret; | |
173 | int bw_bits; | |
174 | ||
175 | bw_bits = bmg160_convert_freq_to_bit(val); | |
176 | if (bw_bits < 0) | |
177 | return bw_bits; | |
178 | ||
c6c9e995 | 179 | ret = regmap_write(data->regmap, BMG160_REG_PMU_BW, bw_bits); |
22b46c45 | 180 | if (ret < 0) { |
74e04345 | 181 | dev_err(data->dev, "Error writing reg_pmu_bw\n"); |
22b46c45 SP |
182 | return ret; |
183 | } | |
184 | ||
185 | data->bw_bits = bw_bits; | |
186 | ||
187 | return 0; | |
188 | } | |
189 | ||
190 | static int bmg160_chip_init(struct bmg160_data *data) | |
191 | { | |
192 | int ret; | |
c6c9e995 | 193 | unsigned int val; |
22b46c45 | 194 | |
c6c9e995 | 195 | ret = regmap_read(data->regmap, BMG160_REG_CHIP_ID, &val); |
22b46c45 | 196 | if (ret < 0) { |
74e04345 | 197 | dev_err(data->dev, "Error reading reg_chip_id\n"); |
22b46c45 SP |
198 | return ret; |
199 | } | |
200 | ||
74e04345 | 201 | dev_dbg(data->dev, "Chip Id %x\n", val); |
c6c9e995 | 202 | if (val != BMG160_CHIP_ID_VAL) { |
74e04345 | 203 | dev_err(data->dev, "invalid chip %x\n", val); |
22b46c45 SP |
204 | return -ENODEV; |
205 | } | |
206 | ||
207 | ret = bmg160_set_mode(data, BMG160_MODE_NORMAL); | |
208 | if (ret < 0) | |
209 | return ret; | |
210 | ||
211 | /* Wait upto 500 ms to be ready after changing mode */ | |
212 | usleep_range(500, 1000); | |
213 | ||
214 | /* Set Bandwidth */ | |
215 | ret = bmg160_set_bw(data, BMG160_DEF_BW); | |
216 | if (ret < 0) | |
217 | return ret; | |
218 | ||
219 | /* Set Default Range */ | |
c6c9e995 | 220 | ret = regmap_write(data->regmap, BMG160_REG_RANGE, BMG160_RANGE_500DPS); |
22b46c45 | 221 | if (ret < 0) { |
74e04345 | 222 | dev_err(data->dev, "Error writing reg_range\n"); |
22b46c45 SP |
223 | return ret; |
224 | } | |
225 | data->dps_range = BMG160_RANGE_500DPS; | |
226 | ||
c6c9e995 | 227 | ret = regmap_read(data->regmap, BMG160_REG_SLOPE_THRES, &val); |
22b46c45 | 228 | if (ret < 0) { |
74e04345 | 229 | dev_err(data->dev, "Error reading reg_slope_thres\n"); |
22b46c45 SP |
230 | return ret; |
231 | } | |
c6c9e995 | 232 | data->slope_thres = val; |
22b46c45 SP |
233 | |
234 | /* Set default interrupt mode */ | |
c6c9e995 MP |
235 | ret = regmap_update_bits(data->regmap, BMG160_REG_INT_EN_1, |
236 | BMG160_INT1_BIT_OD, 0); | |
5af6b307 | 237 | if (ret < 0) { |
74e04345 | 238 | dev_err(data->dev, "Error updating bits in reg_int_en_1\n"); |
5af6b307 SP |
239 | return ret; |
240 | } | |
241 | ||
c6c9e995 MP |
242 | ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH, |
243 | BMG160_INT_MODE_LATCH_INT | | |
244 | BMG160_INT_MODE_LATCH_RESET); | |
22b46c45 | 245 | if (ret < 0) { |
74e04345 | 246 | dev_err(data->dev, |
22b46c45 SP |
247 | "Error writing reg_motion_intr\n"); |
248 | return ret; | |
249 | } | |
250 | ||
251 | return 0; | |
252 | } | |
253 | ||
254 | static int bmg160_set_power_state(struct bmg160_data *data, bool on) | |
255 | { | |
6f0a13f2 | 256 | #ifdef CONFIG_PM |
22b46c45 SP |
257 | int ret; |
258 | ||
259 | if (on) | |
74e04345 | 260 | ret = pm_runtime_get_sync(data->dev); |
22b46c45 | 261 | else { |
74e04345 MP |
262 | pm_runtime_mark_last_busy(data->dev); |
263 | ret = pm_runtime_put_autosuspend(data->dev); | |
22b46c45 SP |
264 | } |
265 | ||
266 | if (ret < 0) { | |
74e04345 | 267 | dev_err(data->dev, |
22b46c45 | 268 | "Failed: bmg160_set_power_state for %d\n", on); |
10bef289 | 269 | if (on) |
74e04345 | 270 | pm_runtime_put_noidle(data->dev); |
10bef289 | 271 | |
22b46c45 SP |
272 | return ret; |
273 | } | |
ef1c6b23 | 274 | #endif |
22b46c45 SP |
275 | |
276 | return 0; | |
277 | } | |
278 | ||
279 | static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data, | |
280 | bool status) | |
281 | { | |
282 | int ret; | |
283 | ||
284 | /* Enable/Disable INT_MAP0 mapping */ | |
c6c9e995 MP |
285 | ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_0, |
286 | BMG160_INT_MAP_0_BIT_ANY, | |
287 | (status ? BMG160_INT_MAP_0_BIT_ANY : 0)); | |
22b46c45 | 288 | if (ret < 0) { |
74e04345 | 289 | dev_err(data->dev, "Error updating bits reg_int_map0\n"); |
22b46c45 SP |
290 | return ret; |
291 | } | |
292 | ||
293 | /* Enable/Disable slope interrupts */ | |
294 | if (status) { | |
295 | /* Update slope thres */ | |
c6c9e995 MP |
296 | ret = regmap_write(data->regmap, BMG160_REG_SLOPE_THRES, |
297 | data->slope_thres); | |
22b46c45 | 298 | if (ret < 0) { |
74e04345 | 299 | dev_err(data->dev, |
22b46c45 SP |
300 | "Error writing reg_slope_thres\n"); |
301 | return ret; | |
302 | } | |
303 | ||
c6c9e995 MP |
304 | ret = regmap_write(data->regmap, BMG160_REG_MOTION_INTR, |
305 | BMG160_INT_MOTION_X | BMG160_INT_MOTION_Y | | |
306 | BMG160_INT_MOTION_Z); | |
22b46c45 | 307 | if (ret < 0) { |
74e04345 | 308 | dev_err(data->dev, |
22b46c45 SP |
309 | "Error writing reg_motion_intr\n"); |
310 | return ret; | |
311 | } | |
312 | ||
313 | /* | |
314 | * New data interrupt is always non-latched, | |
315 | * which will have higher priority, so no need | |
316 | * to set latched mode, we will be flooded anyway with INTR | |
317 | */ | |
318 | if (!data->dready_trigger_on) { | |
c6c9e995 MP |
319 | ret = regmap_write(data->regmap, |
320 | BMG160_REG_INT_RST_LATCH, | |
321 | BMG160_INT_MODE_LATCH_INT | | |
322 | BMG160_INT_MODE_LATCH_RESET); | |
22b46c45 | 323 | if (ret < 0) { |
74e04345 | 324 | dev_err(data->dev, |
22b46c45 SP |
325 | "Error writing reg_rst_latch\n"); |
326 | return ret; | |
327 | } | |
328 | } | |
329 | ||
c6c9e995 MP |
330 | ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, |
331 | BMG160_DATA_ENABLE_INT); | |
22b46c45 | 332 | |
c6c9e995 MP |
333 | } else { |
334 | ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0); | |
335 | } | |
22b46c45 SP |
336 | |
337 | if (ret < 0) { | |
74e04345 | 338 | dev_err(data->dev, "Error writing reg_int_en0\n"); |
22b46c45 SP |
339 | return ret; |
340 | } | |
341 | ||
342 | return 0; | |
343 | } | |
344 | ||
345 | static int bmg160_setup_new_data_interrupt(struct bmg160_data *data, | |
346 | bool status) | |
347 | { | |
348 | int ret; | |
349 | ||
350 | /* Enable/Disable INT_MAP1 mapping */ | |
c6c9e995 MP |
351 | ret = regmap_update_bits(data->regmap, BMG160_REG_INT_MAP_1, |
352 | BMG160_INT_MAP_1_BIT_NEW_DATA, | |
353 | (status ? BMG160_INT_MAP_1_BIT_NEW_DATA : 0)); | |
22b46c45 | 354 | if (ret < 0) { |
74e04345 | 355 | dev_err(data->dev, "Error updating bits in reg_int_map1\n"); |
22b46c45 SP |
356 | return ret; |
357 | } | |
358 | ||
359 | if (status) { | |
c6c9e995 MP |
360 | ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH, |
361 | BMG160_INT_MODE_NON_LATCH_INT | | |
362 | BMG160_INT_MODE_LATCH_RESET); | |
22b46c45 | 363 | if (ret < 0) { |
74e04345 | 364 | dev_err(data->dev, |
22b46c45 SP |
365 | "Error writing reg_rst_latch\n"); |
366 | return ret; | |
367 | } | |
368 | ||
c6c9e995 MP |
369 | ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, |
370 | BMG160_DATA_ENABLE_INT); | |
22b46c45 SP |
371 | |
372 | } else { | |
373 | /* Restore interrupt mode */ | |
c6c9e995 MP |
374 | ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH, |
375 | BMG160_INT_MODE_LATCH_INT | | |
376 | BMG160_INT_MODE_LATCH_RESET); | |
22b46c45 | 377 | if (ret < 0) { |
74e04345 | 378 | dev_err(data->dev, |
22b46c45 SP |
379 | "Error writing reg_rst_latch\n"); |
380 | return ret; | |
381 | } | |
382 | ||
c6c9e995 | 383 | ret = regmap_write(data->regmap, BMG160_REG_INT_EN_0, 0); |
22b46c45 SP |
384 | } |
385 | ||
386 | if (ret < 0) { | |
74e04345 | 387 | dev_err(data->dev, "Error writing reg_int_en0\n"); |
22b46c45 SP |
388 | return ret; |
389 | } | |
390 | ||
391 | return 0; | |
392 | } | |
393 | ||
394 | static int bmg160_get_bw(struct bmg160_data *data, int *val) | |
395 | { | |
396 | int i; | |
397 | ||
398 | for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) { | |
399 | if (bmg160_samp_freq_table[i].bw_bits == data->bw_bits) { | |
400 | *val = bmg160_samp_freq_table[i].val; | |
401 | return IIO_VAL_INT; | |
402 | } | |
403 | } | |
404 | ||
405 | return -EINVAL; | |
406 | } | |
407 | ||
408 | static int bmg160_set_scale(struct bmg160_data *data, int val) | |
409 | { | |
410 | int ret, i; | |
411 | ||
412 | for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) { | |
413 | if (bmg160_scale_table[i].scale == val) { | |
c6c9e995 MP |
414 | ret = regmap_write(data->regmap, BMG160_REG_RANGE, |
415 | bmg160_scale_table[i].dps_range); | |
22b46c45 | 416 | if (ret < 0) { |
74e04345 | 417 | dev_err(data->dev, |
22b46c45 SP |
418 | "Error writing reg_range\n"); |
419 | return ret; | |
420 | } | |
421 | data->dps_range = bmg160_scale_table[i].dps_range; | |
422 | return 0; | |
423 | } | |
424 | } | |
425 | ||
426 | return -EINVAL; | |
427 | } | |
428 | ||
429 | static int bmg160_get_temp(struct bmg160_data *data, int *val) | |
430 | { | |
431 | int ret; | |
c6c9e995 | 432 | unsigned int raw_val; |
22b46c45 SP |
433 | |
434 | mutex_lock(&data->mutex); | |
435 | ret = bmg160_set_power_state(data, true); | |
436 | if (ret < 0) { | |
437 | mutex_unlock(&data->mutex); | |
438 | return ret; | |
439 | } | |
440 | ||
c6c9e995 | 441 | ret = regmap_read(data->regmap, BMG160_REG_TEMP, &raw_val); |
22b46c45 | 442 | if (ret < 0) { |
74e04345 | 443 | dev_err(data->dev, "Error reading reg_temp\n"); |
22b46c45 SP |
444 | bmg160_set_power_state(data, false); |
445 | mutex_unlock(&data->mutex); | |
446 | return ret; | |
447 | } | |
448 | ||
c6c9e995 | 449 | *val = sign_extend32(raw_val, 7); |
22b46c45 SP |
450 | ret = bmg160_set_power_state(data, false); |
451 | mutex_unlock(&data->mutex); | |
452 | if (ret < 0) | |
453 | return ret; | |
454 | ||
455 | return IIO_VAL_INT; | |
456 | } | |
457 | ||
458 | static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val) | |
459 | { | |
460 | int ret; | |
c6c9e995 | 461 | unsigned int raw_val; |
22b46c45 SP |
462 | |
463 | mutex_lock(&data->mutex); | |
464 | ret = bmg160_set_power_state(data, true); | |
465 | if (ret < 0) { | |
466 | mutex_unlock(&data->mutex); | |
467 | return ret; | |
468 | } | |
469 | ||
c6c9e995 MP |
470 | ret = regmap_bulk_read(data->regmap, BMG160_AXIS_TO_REG(axis), &raw_val, |
471 | 2); | |
22b46c45 | 472 | if (ret < 0) { |
74e04345 | 473 | dev_err(data->dev, "Error reading axis %d\n", axis); |
22b46c45 SP |
474 | bmg160_set_power_state(data, false); |
475 | mutex_unlock(&data->mutex); | |
476 | return ret; | |
477 | } | |
478 | ||
c6c9e995 | 479 | *val = sign_extend32(raw_val, 15); |
22b46c45 SP |
480 | ret = bmg160_set_power_state(data, false); |
481 | mutex_unlock(&data->mutex); | |
482 | if (ret < 0) | |
483 | return ret; | |
484 | ||
485 | return IIO_VAL_INT; | |
486 | } | |
487 | ||
488 | static int bmg160_read_raw(struct iio_dev *indio_dev, | |
489 | struct iio_chan_spec const *chan, | |
490 | int *val, int *val2, long mask) | |
491 | { | |
492 | struct bmg160_data *data = iio_priv(indio_dev); | |
493 | int ret; | |
494 | ||
495 | switch (mask) { | |
496 | case IIO_CHAN_INFO_RAW: | |
497 | switch (chan->type) { | |
498 | case IIO_TEMP: | |
499 | return bmg160_get_temp(data, val); | |
500 | case IIO_ANGL_VEL: | |
501 | if (iio_buffer_enabled(indio_dev)) | |
502 | return -EBUSY; | |
503 | else | |
504 | return bmg160_get_axis(data, chan->scan_index, | |
505 | val); | |
506 | default: | |
507 | return -EINVAL; | |
508 | } | |
509 | case IIO_CHAN_INFO_OFFSET: | |
510 | if (chan->type == IIO_TEMP) { | |
511 | *val = BMG160_TEMP_CENTER_VAL; | |
512 | return IIO_VAL_INT; | |
513 | } else | |
514 | return -EINVAL; | |
515 | case IIO_CHAN_INFO_SCALE: | |
516 | *val = 0; | |
517 | switch (chan->type) { | |
518 | case IIO_TEMP: | |
519 | *val2 = 500000; | |
520 | return IIO_VAL_INT_PLUS_MICRO; | |
521 | case IIO_ANGL_VEL: | |
522 | { | |
523 | int i; | |
524 | ||
525 | for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) { | |
526 | if (bmg160_scale_table[i].dps_range == | |
527 | data->dps_range) { | |
528 | *val2 = bmg160_scale_table[i].scale; | |
529 | return IIO_VAL_INT_PLUS_MICRO; | |
530 | } | |
531 | } | |
532 | return -EINVAL; | |
533 | } | |
534 | default: | |
535 | return -EINVAL; | |
536 | } | |
537 | case IIO_CHAN_INFO_SAMP_FREQ: | |
538 | *val2 = 0; | |
539 | mutex_lock(&data->mutex); | |
540 | ret = bmg160_get_bw(data, val); | |
541 | mutex_unlock(&data->mutex); | |
542 | return ret; | |
543 | default: | |
544 | return -EINVAL; | |
545 | } | |
546 | } | |
547 | ||
548 | static int bmg160_write_raw(struct iio_dev *indio_dev, | |
549 | struct iio_chan_spec const *chan, | |
550 | int val, int val2, long mask) | |
551 | { | |
552 | struct bmg160_data *data = iio_priv(indio_dev); | |
553 | int ret; | |
554 | ||
555 | switch (mask) { | |
556 | case IIO_CHAN_INFO_SAMP_FREQ: | |
557 | mutex_lock(&data->mutex); | |
558 | /* | |
559 | * Section 4.2 of spec | |
560 | * In suspend mode, the only supported operations are reading | |
561 | * registers as well as writing to the (0x14) softreset | |
562 | * register. Since we will be in suspend mode by default, change | |
563 | * mode to power on for other writes. | |
564 | */ | |
565 | ret = bmg160_set_power_state(data, true); | |
566 | if (ret < 0) { | |
567 | mutex_unlock(&data->mutex); | |
568 | return ret; | |
569 | } | |
570 | ret = bmg160_set_bw(data, val); | |
571 | if (ret < 0) { | |
572 | bmg160_set_power_state(data, false); | |
573 | mutex_unlock(&data->mutex); | |
574 | return ret; | |
575 | } | |
576 | ret = bmg160_set_power_state(data, false); | |
577 | mutex_unlock(&data->mutex); | |
578 | return ret; | |
579 | case IIO_CHAN_INFO_SCALE: | |
580 | if (val) | |
581 | return -EINVAL; | |
582 | ||
583 | mutex_lock(&data->mutex); | |
584 | /* Refer to comments above for the suspend mode ops */ | |
585 | ret = bmg160_set_power_state(data, true); | |
586 | if (ret < 0) { | |
587 | mutex_unlock(&data->mutex); | |
588 | return ret; | |
589 | } | |
590 | ret = bmg160_set_scale(data, val2); | |
591 | if (ret < 0) { | |
592 | bmg160_set_power_state(data, false); | |
593 | mutex_unlock(&data->mutex); | |
594 | return ret; | |
595 | } | |
596 | ret = bmg160_set_power_state(data, false); | |
597 | mutex_unlock(&data->mutex); | |
598 | return ret; | |
599 | default: | |
600 | return -EINVAL; | |
601 | } | |
602 | ||
603 | return -EINVAL; | |
604 | } | |
605 | ||
606 | static int bmg160_read_event(struct iio_dev *indio_dev, | |
607 | const struct iio_chan_spec *chan, | |
608 | enum iio_event_type type, | |
609 | enum iio_event_direction dir, | |
610 | enum iio_event_info info, | |
611 | int *val, int *val2) | |
612 | { | |
613 | struct bmg160_data *data = iio_priv(indio_dev); | |
614 | ||
615 | *val2 = 0; | |
616 | switch (info) { | |
617 | case IIO_EV_INFO_VALUE: | |
618 | *val = data->slope_thres & BMG160_SLOPE_THRES_MASK; | |
619 | break; | |
620 | default: | |
621 | return -EINVAL; | |
622 | } | |
623 | ||
624 | return IIO_VAL_INT; | |
625 | } | |
626 | ||
627 | static int bmg160_write_event(struct iio_dev *indio_dev, | |
628 | const struct iio_chan_spec *chan, | |
629 | enum iio_event_type type, | |
630 | enum iio_event_direction dir, | |
631 | enum iio_event_info info, | |
632 | int val, int val2) | |
633 | { | |
634 | struct bmg160_data *data = iio_priv(indio_dev); | |
635 | ||
636 | switch (info) { | |
637 | case IIO_EV_INFO_VALUE: | |
638 | if (data->ev_enable_state) | |
639 | return -EBUSY; | |
640 | data->slope_thres &= ~BMG160_SLOPE_THRES_MASK; | |
641 | data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK); | |
642 | break; | |
643 | default: | |
644 | return -EINVAL; | |
645 | } | |
646 | ||
647 | return 0; | |
648 | } | |
649 | ||
650 | static int bmg160_read_event_config(struct iio_dev *indio_dev, | |
651 | const struct iio_chan_spec *chan, | |
652 | enum iio_event_type type, | |
653 | enum iio_event_direction dir) | |
654 | { | |
655 | ||
656 | struct bmg160_data *data = iio_priv(indio_dev); | |
657 | ||
658 | return data->ev_enable_state; | |
659 | } | |
660 | ||
661 | static int bmg160_write_event_config(struct iio_dev *indio_dev, | |
662 | const struct iio_chan_spec *chan, | |
663 | enum iio_event_type type, | |
664 | enum iio_event_direction dir, | |
665 | int state) | |
666 | { | |
667 | struct bmg160_data *data = iio_priv(indio_dev); | |
668 | int ret; | |
669 | ||
670 | if (state && data->ev_enable_state) | |
671 | return 0; | |
672 | ||
673 | mutex_lock(&data->mutex); | |
674 | ||
675 | if (!state && data->motion_trigger_on) { | |
676 | data->ev_enable_state = 0; | |
677 | mutex_unlock(&data->mutex); | |
678 | return 0; | |
679 | } | |
680 | /* | |
681 | * We will expect the enable and disable to do operation in | |
682 | * in reverse order. This will happen here anyway as our | |
683 | * resume operation uses sync mode runtime pm calls, the | |
684 | * suspend operation will be delayed by autosuspend delay | |
685 | * So the disable operation will still happen in reverse of | |
686 | * enable operation. When runtime pm is disabled the mode | |
687 | * is always on so sequence doesn't matter | |
688 | */ | |
689 | ret = bmg160_set_power_state(data, state); | |
690 | if (ret < 0) { | |
691 | mutex_unlock(&data->mutex); | |
692 | return ret; | |
693 | } | |
694 | ||
695 | ret = bmg160_setup_any_motion_interrupt(data, state); | |
696 | if (ret < 0) { | |
10bef289 | 697 | bmg160_set_power_state(data, false); |
22b46c45 SP |
698 | mutex_unlock(&data->mutex); |
699 | return ret; | |
700 | } | |
701 | ||
702 | data->ev_enable_state = state; | |
703 | mutex_unlock(&data->mutex); | |
704 | ||
705 | return 0; | |
706 | } | |
707 | ||
22b46c45 SP |
708 | static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000"); |
709 | ||
710 | static IIO_CONST_ATTR(in_anglvel_scale_available, | |
711 | "0.001065 0.000532 0.000266 0.000133 0.000066"); | |
712 | ||
713 | static struct attribute *bmg160_attributes[] = { | |
714 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, | |
715 | &iio_const_attr_in_anglvel_scale_available.dev_attr.attr, | |
716 | NULL, | |
717 | }; | |
718 | ||
719 | static const struct attribute_group bmg160_attrs_group = { | |
720 | .attrs = bmg160_attributes, | |
721 | }; | |
722 | ||
723 | static const struct iio_event_spec bmg160_event = { | |
724 | .type = IIO_EV_TYPE_ROC, | |
6896ab3a | 725 | .dir = IIO_EV_DIR_EITHER, |
22b46c45 SP |
726 | .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) | |
727 | BIT(IIO_EV_INFO_ENABLE) | |
728 | }; | |
729 | ||
730 | #define BMG160_CHANNEL(_axis) { \ | |
731 | .type = IIO_ANGL_VEL, \ | |
732 | .modified = 1, \ | |
733 | .channel2 = IIO_MOD_##_axis, \ | |
734 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ | |
735 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ | |
736 | BIT(IIO_CHAN_INFO_SAMP_FREQ), \ | |
737 | .scan_index = AXIS_##_axis, \ | |
738 | .scan_type = { \ | |
739 | .sign = 's', \ | |
740 | .realbits = 16, \ | |
741 | .storagebits = 16, \ | |
742 | }, \ | |
743 | .event_spec = &bmg160_event, \ | |
744 | .num_event_specs = 1 \ | |
745 | } | |
746 | ||
747 | static const struct iio_chan_spec bmg160_channels[] = { | |
748 | { | |
749 | .type = IIO_TEMP, | |
750 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | | |
751 | BIT(IIO_CHAN_INFO_SCALE) | | |
752 | BIT(IIO_CHAN_INFO_OFFSET), | |
753 | .scan_index = -1, | |
754 | }, | |
755 | BMG160_CHANNEL(X), | |
756 | BMG160_CHANNEL(Y), | |
757 | BMG160_CHANNEL(Z), | |
758 | IIO_CHAN_SOFT_TIMESTAMP(3), | |
759 | }; | |
760 | ||
761 | static const struct iio_info bmg160_info = { | |
762 | .attrs = &bmg160_attrs_group, | |
763 | .read_raw = bmg160_read_raw, | |
764 | .write_raw = bmg160_write_raw, | |
765 | .read_event_value = bmg160_read_event, | |
766 | .write_event_value = bmg160_write_event, | |
767 | .write_event_config = bmg160_write_event_config, | |
768 | .read_event_config = bmg160_read_event_config, | |
22b46c45 SP |
769 | .driver_module = THIS_MODULE, |
770 | }; | |
771 | ||
772 | static irqreturn_t bmg160_trigger_handler(int irq, void *p) | |
773 | { | |
774 | struct iio_poll_func *pf = p; | |
775 | struct iio_dev *indio_dev = pf->indio_dev; | |
776 | struct bmg160_data *data = iio_priv(indio_dev); | |
777 | int bit, ret, i = 0; | |
c6c9e995 | 778 | unsigned int val; |
22b46c45 SP |
779 | |
780 | mutex_lock(&data->mutex); | |
70dddeee | 781 | for_each_set_bit(bit, indio_dev->active_scan_mask, |
22b46c45 | 782 | indio_dev->masklength) { |
c6c9e995 MP |
783 | ret = regmap_bulk_read(data->regmap, BMG160_AXIS_TO_REG(bit), |
784 | &val, 2); | |
22b46c45 SP |
785 | if (ret < 0) { |
786 | mutex_unlock(&data->mutex); | |
787 | goto err; | |
788 | } | |
789 | data->buffer[i++] = ret; | |
790 | } | |
791 | mutex_unlock(&data->mutex); | |
792 | ||
793 | iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, | |
eb219101 | 794 | pf->timestamp); |
22b46c45 SP |
795 | err: |
796 | iio_trigger_notify_done(indio_dev->trig); | |
797 | ||
798 | return IRQ_HANDLED; | |
799 | } | |
800 | ||
801 | static int bmg160_trig_try_reen(struct iio_trigger *trig) | |
802 | { | |
803 | struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); | |
804 | struct bmg160_data *data = iio_priv(indio_dev); | |
805 | int ret; | |
806 | ||
807 | /* new data interrupts don't need ack */ | |
808 | if (data->dready_trigger_on) | |
809 | return 0; | |
810 | ||
811 | /* Set latched mode interrupt and clear any latched interrupt */ | |
c6c9e995 MP |
812 | ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH, |
813 | BMG160_INT_MODE_LATCH_INT | | |
814 | BMG160_INT_MODE_LATCH_RESET); | |
22b46c45 | 815 | if (ret < 0) { |
74e04345 | 816 | dev_err(data->dev, "Error writing reg_rst_latch\n"); |
22b46c45 SP |
817 | return ret; |
818 | } | |
819 | ||
820 | return 0; | |
821 | } | |
822 | ||
823 | static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig, | |
824 | bool state) | |
825 | { | |
826 | struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); | |
827 | struct bmg160_data *data = iio_priv(indio_dev); | |
828 | int ret; | |
829 | ||
830 | mutex_lock(&data->mutex); | |
831 | ||
832 | if (!state && data->ev_enable_state && data->motion_trigger_on) { | |
833 | data->motion_trigger_on = false; | |
834 | mutex_unlock(&data->mutex); | |
835 | return 0; | |
836 | } | |
837 | ||
838 | /* | |
839 | * Refer to comment in bmg160_write_event_config for | |
840 | * enable/disable operation order | |
841 | */ | |
842 | ret = bmg160_set_power_state(data, state); | |
843 | if (ret < 0) { | |
844 | mutex_unlock(&data->mutex); | |
845 | return ret; | |
846 | } | |
847 | if (data->motion_trig == trig) | |
848 | ret = bmg160_setup_any_motion_interrupt(data, state); | |
849 | else | |
850 | ret = bmg160_setup_new_data_interrupt(data, state); | |
851 | if (ret < 0) { | |
10bef289 | 852 | bmg160_set_power_state(data, false); |
22b46c45 SP |
853 | mutex_unlock(&data->mutex); |
854 | return ret; | |
855 | } | |
856 | if (data->motion_trig == trig) | |
857 | data->motion_trigger_on = state; | |
858 | else | |
859 | data->dready_trigger_on = state; | |
860 | ||
861 | mutex_unlock(&data->mutex); | |
862 | ||
863 | return 0; | |
864 | } | |
865 | ||
866 | static const struct iio_trigger_ops bmg160_trigger_ops = { | |
867 | .set_trigger_state = bmg160_data_rdy_trigger_set_state, | |
868 | .try_reenable = bmg160_trig_try_reen, | |
869 | .owner = THIS_MODULE, | |
870 | }; | |
871 | ||
872 | static irqreturn_t bmg160_event_handler(int irq, void *private) | |
873 | { | |
874 | struct iio_dev *indio_dev = private; | |
875 | struct bmg160_data *data = iio_priv(indio_dev); | |
876 | int ret; | |
877 | int dir; | |
c6c9e995 | 878 | unsigned int val; |
22b46c45 | 879 | |
c6c9e995 | 880 | ret = regmap_read(data->regmap, BMG160_REG_INT_STATUS_2, &val); |
22b46c45 | 881 | if (ret < 0) { |
74e04345 | 882 | dev_err(data->dev, "Error reading reg_int_status2\n"); |
22b46c45 SP |
883 | goto ack_intr_status; |
884 | } | |
885 | ||
c6c9e995 | 886 | if (val & 0x08) |
22b46c45 SP |
887 | dir = IIO_EV_DIR_RISING; |
888 | else | |
889 | dir = IIO_EV_DIR_FALLING; | |
890 | ||
c6c9e995 | 891 | if (val & BMG160_ANY_MOTION_BIT_X) |
22b46c45 SP |
892 | iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL, |
893 | 0, | |
cb80f6a3 SP |
894 | IIO_MOD_X, |
895 | IIO_EV_TYPE_ROC, | |
896 | dir), | |
eb219101 | 897 | iio_get_time_ns()); |
c6c9e995 | 898 | if (val & BMG160_ANY_MOTION_BIT_Y) |
cb80f6a3 SP |
899 | iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL, |
900 | 0, | |
901 | IIO_MOD_Y, | |
902 | IIO_EV_TYPE_ROC, | |
903 | dir), | |
eb219101 | 904 | iio_get_time_ns()); |
c6c9e995 | 905 | if (val & BMG160_ANY_MOTION_BIT_Z) |
cb80f6a3 SP |
906 | iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL, |
907 | 0, | |
908 | IIO_MOD_Z, | |
22b46c45 SP |
909 | IIO_EV_TYPE_ROC, |
910 | dir), | |
eb219101 | 911 | iio_get_time_ns()); |
22b46c45 SP |
912 | |
913 | ack_intr_status: | |
914 | if (!data->dready_trigger_on) { | |
c6c9e995 MP |
915 | ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH, |
916 | BMG160_INT_MODE_LATCH_INT | | |
917 | BMG160_INT_MODE_LATCH_RESET); | |
22b46c45 | 918 | if (ret < 0) |
74e04345 | 919 | dev_err(data->dev, |
22b46c45 SP |
920 | "Error writing reg_rst_latch\n"); |
921 | } | |
922 | ||
923 | return IRQ_HANDLED; | |
924 | } | |
925 | ||
926 | static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private) | |
927 | { | |
928 | struct iio_dev *indio_dev = private; | |
929 | struct bmg160_data *data = iio_priv(indio_dev); | |
930 | ||
22b46c45 SP |
931 | if (data->dready_trigger_on) |
932 | iio_trigger_poll(data->dready_trig); | |
933 | else if (data->motion_trigger_on) | |
934 | iio_trigger_poll(data->motion_trig); | |
935 | ||
936 | if (data->ev_enable_state) | |
937 | return IRQ_WAKE_THREAD; | |
938 | else | |
939 | return IRQ_HANDLED; | |
940 | ||
941 | } | |
942 | ||
00e0c8e8 VD |
943 | static int bmg160_buffer_preenable(struct iio_dev *indio_dev) |
944 | { | |
945 | struct bmg160_data *data = iio_priv(indio_dev); | |
946 | ||
947 | return bmg160_set_power_state(data, true); | |
948 | } | |
949 | ||
950 | static int bmg160_buffer_postdisable(struct iio_dev *indio_dev) | |
951 | { | |
952 | struct bmg160_data *data = iio_priv(indio_dev); | |
953 | ||
954 | return bmg160_set_power_state(data, false); | |
955 | } | |
956 | ||
957 | static const struct iio_buffer_setup_ops bmg160_buffer_setup_ops = { | |
958 | .preenable = bmg160_buffer_preenable, | |
959 | .postenable = iio_triggered_buffer_postenable, | |
960 | .predisable = iio_triggered_buffer_predisable, | |
961 | .postdisable = bmg160_buffer_postdisable, | |
962 | }; | |
963 | ||
3a0888ed IT |
964 | static int bmg160_gpio_probe(struct i2c_client *client, |
965 | struct bmg160_data *data) | |
966 | ||
22b46c45 | 967 | { |
22b46c45 SP |
968 | struct device *dev; |
969 | struct gpio_desc *gpio; | |
970 | int ret; | |
971 | ||
972 | if (!client) | |
973 | return -EINVAL; | |
974 | ||
975 | dev = &client->dev; | |
22b46c45 SP |
976 | |
977 | /* data ready gpio interrupt pin */ | |
b457f53a | 978 | gpio = devm_gpiod_get_index(dev, BMG160_GPIO_NAME, 0, GPIOD_IN); |
22b46c45 SP |
979 | if (IS_ERR(gpio)) { |
980 | dev_err(dev, "acpi gpio get index failed\n"); | |
981 | return PTR_ERR(gpio); | |
982 | } | |
983 | ||
22b46c45 SP |
984 | ret = gpiod_to_irq(gpio); |
985 | ||
986 | dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret); | |
987 | ||
988 | return ret; | |
989 | } | |
990 | ||
3a0888ed IT |
991 | static const char *bmg160_match_acpi_device(struct device *dev) |
992 | { | |
993 | const struct acpi_device_id *id; | |
994 | ||
995 | id = acpi_match_device(dev->driver->acpi_match_table, dev); | |
996 | if (!id) | |
997 | return NULL; | |
998 | ||
999 | return dev_name(dev); | |
1000 | } | |
1001 | ||
22b46c45 SP |
1002 | static int bmg160_probe(struct i2c_client *client, |
1003 | const struct i2c_device_id *id) | |
1004 | { | |
1005 | struct bmg160_data *data; | |
1006 | struct iio_dev *indio_dev; | |
1007 | int ret; | |
3a0888ed | 1008 | const char *name = NULL; |
c6c9e995 MP |
1009 | struct regmap *regmap; |
1010 | ||
1011 | regmap = devm_regmap_init_i2c(client, &bmg160_regmap_i2c_conf); | |
1012 | if (IS_ERR(regmap)) { | |
1013 | dev_err(&client->dev, "Failed to register i2c regmap %d\n", | |
1014 | (int)PTR_ERR(regmap)); | |
1015 | return PTR_ERR(regmap); | |
1016 | } | |
22b46c45 SP |
1017 | |
1018 | indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); | |
1019 | if (!indio_dev) | |
1020 | return -ENOMEM; | |
1021 | ||
1022 | data = iio_priv(indio_dev); | |
1023 | i2c_set_clientdata(client, indio_dev); | |
74e04345 | 1024 | data->dev = &client->dev; |
22b46c45 SP |
1025 | |
1026 | ret = bmg160_chip_init(data); | |
1027 | if (ret < 0) | |
1028 | return ret; | |
1029 | ||
1030 | mutex_init(&data->mutex); | |
1031 | ||
3a0888ed IT |
1032 | if (id) |
1033 | name = id->name; | |
1034 | ||
1035 | if (ACPI_HANDLE(&client->dev)) | |
1036 | name = bmg160_match_acpi_device(&client->dev); | |
1037 | ||
22b46c45 SP |
1038 | indio_dev->dev.parent = &client->dev; |
1039 | indio_dev->channels = bmg160_channels; | |
1040 | indio_dev->num_channels = ARRAY_SIZE(bmg160_channels); | |
3a0888ed | 1041 | indio_dev->name = name; |
22b46c45 SP |
1042 | indio_dev->modes = INDIO_DIRECT_MODE; |
1043 | indio_dev->info = &bmg160_info; | |
1044 | ||
1045 | if (client->irq <= 0) | |
3a0888ed | 1046 | client->irq = bmg160_gpio_probe(client, data); |
22b46c45 SP |
1047 | |
1048 | if (client->irq > 0) { | |
1049 | ret = devm_request_threaded_irq(&client->dev, | |
1050 | client->irq, | |
1051 | bmg160_data_rdy_trig_poll, | |
1052 | bmg160_event_handler, | |
1053 | IRQF_TRIGGER_RISING, | |
1054 | BMG160_IRQ_NAME, | |
1055 | indio_dev); | |
1056 | if (ret) | |
1057 | return ret; | |
1058 | ||
1059 | data->dready_trig = devm_iio_trigger_alloc(&client->dev, | |
1060 | "%s-dev%d", | |
1061 | indio_dev->name, | |
1062 | indio_dev->id); | |
1063 | if (!data->dready_trig) | |
1064 | return -ENOMEM; | |
1065 | ||
1066 | data->motion_trig = devm_iio_trigger_alloc(&client->dev, | |
1067 | "%s-any-motion-dev%d", | |
1068 | indio_dev->name, | |
1069 | indio_dev->id); | |
1070 | if (!data->motion_trig) | |
1071 | return -ENOMEM; | |
1072 | ||
1073 | data->dready_trig->dev.parent = &client->dev; | |
1074 | data->dready_trig->ops = &bmg160_trigger_ops; | |
1075 | iio_trigger_set_drvdata(data->dready_trig, indio_dev); | |
1076 | ret = iio_trigger_register(data->dready_trig); | |
1077 | if (ret) | |
1078 | return ret; | |
1079 | ||
1080 | data->motion_trig->dev.parent = &client->dev; | |
1081 | data->motion_trig->ops = &bmg160_trigger_ops; | |
1082 | iio_trigger_set_drvdata(data->motion_trig, indio_dev); | |
1083 | ret = iio_trigger_register(data->motion_trig); | |
1084 | if (ret) { | |
1085 | data->motion_trig = NULL; | |
1086 | goto err_trigger_unregister; | |
1087 | } | |
00e0c8e8 | 1088 | } |
22b46c45 | 1089 | |
00e0c8e8 VD |
1090 | ret = iio_triggered_buffer_setup(indio_dev, |
1091 | iio_pollfunc_store_time, | |
1092 | bmg160_trigger_handler, | |
1093 | &bmg160_buffer_setup_ops); | |
1094 | if (ret < 0) { | |
1095 | dev_err(&client->dev, | |
1096 | "iio triggered buffer setup failed\n"); | |
1097 | goto err_trigger_unregister; | |
22b46c45 SP |
1098 | } |
1099 | ||
1100 | ret = iio_device_register(indio_dev); | |
1101 | if (ret < 0) { | |
1102 | dev_err(&client->dev, "unable to register iio device\n"); | |
1103 | goto err_buffer_cleanup; | |
1104 | } | |
1105 | ||
1106 | ret = pm_runtime_set_active(&client->dev); | |
1107 | if (ret) | |
1108 | goto err_iio_unregister; | |
1109 | ||
1110 | pm_runtime_enable(&client->dev); | |
1111 | pm_runtime_set_autosuspend_delay(&client->dev, | |
1112 | BMG160_AUTO_SUSPEND_DELAY_MS); | |
1113 | pm_runtime_use_autosuspend(&client->dev); | |
1114 | ||
1115 | return 0; | |
1116 | ||
1117 | err_iio_unregister: | |
1118 | iio_device_unregister(indio_dev); | |
1119 | err_buffer_cleanup: | |
00e0c8e8 | 1120 | iio_triggered_buffer_cleanup(indio_dev); |
22b46c45 SP |
1121 | err_trigger_unregister: |
1122 | if (data->dready_trig) | |
1123 | iio_trigger_unregister(data->dready_trig); | |
1124 | if (data->motion_trig) | |
1125 | iio_trigger_unregister(data->motion_trig); | |
1126 | ||
1127 | return ret; | |
1128 | } | |
1129 | ||
1130 | static int bmg160_remove(struct i2c_client *client) | |
1131 | { | |
1132 | struct iio_dev *indio_dev = i2c_get_clientdata(client); | |
1133 | struct bmg160_data *data = iio_priv(indio_dev); | |
1134 | ||
1135 | pm_runtime_disable(&client->dev); | |
1136 | pm_runtime_set_suspended(&client->dev); | |
1137 | pm_runtime_put_noidle(&client->dev); | |
1138 | ||
1139 | iio_device_unregister(indio_dev); | |
00e0c8e8 | 1140 | iio_triggered_buffer_cleanup(indio_dev); |
22b46c45 SP |
1141 | |
1142 | if (data->dready_trig) { | |
22b46c45 SP |
1143 | iio_trigger_unregister(data->dready_trig); |
1144 | iio_trigger_unregister(data->motion_trig); | |
1145 | } | |
1146 | ||
1147 | mutex_lock(&data->mutex); | |
1148 | bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND); | |
1149 | mutex_unlock(&data->mutex); | |
1150 | ||
1151 | return 0; | |
1152 | } | |
1153 | ||
1154 | #ifdef CONFIG_PM_SLEEP | |
1155 | static int bmg160_suspend(struct device *dev) | |
1156 | { | |
1157 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
1158 | struct bmg160_data *data = iio_priv(indio_dev); | |
1159 | ||
1160 | mutex_lock(&data->mutex); | |
1161 | bmg160_set_mode(data, BMG160_MODE_SUSPEND); | |
1162 | mutex_unlock(&data->mutex); | |
1163 | ||
1164 | return 0; | |
1165 | } | |
1166 | ||
1167 | static int bmg160_resume(struct device *dev) | |
1168 | { | |
1169 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
1170 | struct bmg160_data *data = iio_priv(indio_dev); | |
1171 | ||
1172 | mutex_lock(&data->mutex); | |
1173 | if (data->dready_trigger_on || data->motion_trigger_on || | |
1174 | data->ev_enable_state) | |
1175 | bmg160_set_mode(data, BMG160_MODE_NORMAL); | |
1176 | mutex_unlock(&data->mutex); | |
1177 | ||
1178 | return 0; | |
1179 | } | |
1180 | #endif | |
1181 | ||
6f0a13f2 | 1182 | #ifdef CONFIG_PM |
22b46c45 SP |
1183 | static int bmg160_runtime_suspend(struct device *dev) |
1184 | { | |
1185 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
1186 | struct bmg160_data *data = iio_priv(indio_dev); | |
10bef289 | 1187 | int ret; |
22b46c45 | 1188 | |
10bef289 SP |
1189 | ret = bmg160_set_mode(data, BMG160_MODE_SUSPEND); |
1190 | if (ret < 0) { | |
74e04345 | 1191 | dev_err(data->dev, "set mode failed\n"); |
10bef289 SP |
1192 | return -EAGAIN; |
1193 | } | |
1194 | ||
1195 | return 0; | |
22b46c45 SP |
1196 | } |
1197 | ||
1198 | static int bmg160_runtime_resume(struct device *dev) | |
1199 | { | |
1200 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
1201 | struct bmg160_data *data = iio_priv(indio_dev); | |
1202 | int ret; | |
1203 | ||
1204 | ret = bmg160_set_mode(data, BMG160_MODE_NORMAL); | |
1205 | if (ret < 0) | |
1206 | return ret; | |
1207 | ||
1208 | msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS); | |
1209 | ||
1210 | return 0; | |
1211 | } | |
1212 | #endif | |
1213 | ||
1214 | static const struct dev_pm_ops bmg160_pm_ops = { | |
1215 | SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume) | |
1216 | SET_RUNTIME_PM_OPS(bmg160_runtime_suspend, | |
1217 | bmg160_runtime_resume, NULL) | |
1218 | }; | |
1219 | ||
1220 | static const struct acpi_device_id bmg160_acpi_match[] = { | |
1221 | {"BMG0160", 0}, | |
3a0888ed IT |
1222 | {"BMI055B", 0}, |
1223 | {}, | |
22b46c45 | 1224 | }; |
3a0888ed | 1225 | |
22b46c45 SP |
1226 | MODULE_DEVICE_TABLE(acpi, bmg160_acpi_match); |
1227 | ||
1228 | static const struct i2c_device_id bmg160_id[] = { | |
1229 | {"bmg160", 0}, | |
3a0888ed | 1230 | {"bmi055_gyro", 0}, |
22b46c45 SP |
1231 | {} |
1232 | }; | |
1233 | ||
1234 | MODULE_DEVICE_TABLE(i2c, bmg160_id); | |
1235 | ||
1236 | static struct i2c_driver bmg160_driver = { | |
1237 | .driver = { | |
1238 | .name = BMG160_DRV_NAME, | |
1239 | .acpi_match_table = ACPI_PTR(bmg160_acpi_match), | |
1240 | .pm = &bmg160_pm_ops, | |
1241 | }, | |
1242 | .probe = bmg160_probe, | |
1243 | .remove = bmg160_remove, | |
1244 | .id_table = bmg160_id, | |
1245 | }; | |
1246 | module_i2c_driver(bmg160_driver); | |
1247 | ||
1248 | MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); | |
1249 | MODULE_LICENSE("GPL v2"); | |
1250 | MODULE_DESCRIPTION("BMG160 Gyro driver"); |