[deliverable/linux.git] / drivers / infiniband / hw / ehca / ehca_classes.h

/*
 *  IBM eServer eHCA Infiniband device driver for Linux on POWER
 *
 *  Struct definition for eHCA internal structures
 *
 *  Authors: Heiko J Schick <schickhj@de.ibm.com>
 *           Christoph Raisch <raisch@de.ibm.com>
 *           Joachim Fenkes <fenkes@de.ibm.com>
 *
 *  Copyright (c) 2005 IBM Corporation
 *
 *  All rights reserved.
 *
 *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
 *  BSD.
 *
 * OpenIB BSD License
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * Redistributions of source code must retain the above copyright notice, this
 * list of conditions and the following disclaimer.
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials
 * provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __EHCA_CLASSES_H__
#define __EHCA_CLASSES_H__


struct ehca_module;
struct ehca_qp;
struct ehca_cq;
struct ehca_eq;
struct ehca_mr;
struct ehca_mw;
struct ehca_pd;
struct ehca_av;

#include <linux/wait.h>

#include <rdma/ib_verbs.h>
#include <rdma/ib_user_verbs.h>

#ifdef CONFIG_PPC64
#include "ehca_classes_pSeries.h"
#endif
#include "ipz_pt_fn.h"
#include "ehca_qes.h"
#include "ehca_irq.h"

#define EHCA_EQE_CACHE_SIZE 20

struct ehca_eqe_cache_entry {
	struct ehca_eqe *eqe;
	struct ehca_cq *cq;
};

struct ehca_eq {
	u32 length;
	struct ipz_queue ipz_queue;
	struct ipz_eq_handle ipz_eq_handle;
	struct work_struct work;
	struct h_galpas galpas;
	int is_initialized;
	struct ehca_pfeq pf;
	spinlock_t spinlock;
	struct tasklet_struct interrupt_task;
	u32 ist;
	spinlock_t irq_spinlock;
	struct ehca_eqe_cache_entry eqe_cache[EHCA_EQE_CACHE_SIZE];
};

struct ehca_sma_attr {
	u16 lid, lmc, sm_sl, sm_lid;
	u16 pkey_tbl_len, pkeys[16];
};

struct ehca_sport {
	struct ib_cq *ibcq_aqp1;
	struct ib_qp *ibqp_aqp1;
	enum ib_rate  rate;
	enum ib_port_state port_state;
	struct ehca_sma_attr saved_attr;
};

struct ehca_shca {
	struct ib_device ib_device;
	struct ibmebus_dev *ibmebus_dev;
	u8 num_ports;
	int hw_level;
	struct list_head shca_list;
	struct ipz_adapter_handle ipz_hca_handle;
	struct ehca_sport sport[2];
	struct ehca_eq eq;
	struct ehca_eq neq;
	struct ehca_mr *maxmr;
	struct ehca_pd *pd;
	struct h_galpas galpas;
	struct mutex modify_mutex;
	u64 hca_cap;
	int max_mtu;
};

struct ehca_pd {
	struct ib_pd ib_pd;
	struct ipz_pd fw_pd;
	u32 ownpid;
};

enum ehca_ext_qp_type {
	EQPT_NORMAL    = 0,
	EQPT_LLQP      = 1,
	EQPT_SRQBASE   = 2,
	EQPT_SRQ       = 3,
};

struct ehca_qp {
	union {
		struct ib_qp ib_qp;
		struct ib_srq ib_srq;
	};
	u32 qp_type;
	enum ehca_ext_qp_type ext_type;
	struct ipz_queue ipz_squeue;
	struct ipz_queue ipz_rqueue;
	struct h_galpas galpas;
	u32 qkey;
	u32 real_qp_num;
	u32 token;
	spinlock_t spinlock_s;
	spinlock_t spinlock_r;
	u32 sq_max_inline_data_size;
	struct ipz_qp_handle ipz_qp_handle;
	struct ehca_pfqp pf;
	struct ib_qp_init_attr init_attr;
	struct ehca_cq *send_cq;
	struct ehca_cq *recv_cq;
	unsigned int sqerr_purgeflag;
	struct hlist_node list_entries;
	/* mmap counter for resources mapped into user space */
	u32 mm_count_squeue;
	u32 mm_count_rqueue;
	u32 mm_count_galpa;
};

#define IS_SRQ(qp) (qp->ext_type == EQPT_SRQ)
#define HAS_SQ(qp) (qp->ext_type != EQPT_SRQ)
#define HAS_RQ(qp) (qp->ext_type != EQPT_SRQBASE)

/* must be power of 2 */
#define QP_HASHTAB_LEN 8

struct ehca_cq {
	struct ib_cq ib_cq;
	struct ipz_queue ipz_queue;
	struct h_galpas galpas;
	spinlock_t spinlock;
	u32 cq_number;
	u32 token;
	u32 nr_of_entries;
	struct ipz_cq_handle ipz_cq_handle;
	struct ehca_pfcq pf;
	spinlock_t cb_lock;
	struct hlist_head qp_hashtab[QP_HASHTAB_LEN];
	struct list_head entry;
	u32 nr_callbacks;   /* #events assigned to cpu by scaling code */
	atomic_t nr_events; /* #events seen */
	wait_queue_head_t wait_completion;
	spinlock_t task_lock;
	u32 ownpid;
	/* mmap counter for resources mapped into user space */
	u32 mm_count_queue;
	u32 mm_count_galpa;
};

enum ehca_mr_flag {
	EHCA_MR_FLAG_FMR = 0x80000000,	 /* FMR, created with ehca_alloc_fmr */
	EHCA_MR_FLAG_MAXMR = 0x40000000, /* max-MR                           */
};

struct ehca_mr {
	union {
		struct ib_mr ib_mr;	/* must always be first in ehca_mr */
		struct ib_fmr ib_fmr;	/* must always be first in ehca_mr */
	} ib;
	struct ib_umem *umem;
	spinlock_t mrlock;

	enum ehca_mr_flag flags;
	u32 num_pages;		/* number of MR pages */
	u32 num_4k;		/* number of 4k "page" portions to form MR */
	int acl;		/* ACL (stored here for usage in reregister) */
	u64 *start;		/* virtual start address (stored here for */
	                        /* usage in reregister) */
	u64 size;		/* size (stored here for usage in reregister) */
	u32 fmr_page_size;	/* page size for FMR */
	u32 fmr_max_pages;	/* max pages for FMR */
	u32 fmr_max_maps;	/* max outstanding maps for FMR */
	u32 fmr_map_cnt;	/* map counter for FMR */
	/* fw specific data */
	struct ipz_mrmw_handle ipz_mr_handle;	/* MR handle for h-calls */
	struct h_galpas galpas;
	/* data for userspace bridge */
	u32 nr_of_pages;
	void *pagearray;
};

struct ehca_mw {
	struct ib_mw ib_mw;	/* gen2 mw, must always be first in ehca_mw */
	spinlock_t mwlock;

	u8 never_bound;		/* indication MW was never bound */
	struct ipz_mrmw_handle ipz_mw_handle;	/* MW handle for h-calls */
	struct h_galpas galpas;
};

enum ehca_mr_pgi_type {
	EHCA_MR_PGI_PHYS   = 1,  /* type of ehca_reg_phys_mr,
				  * ehca_rereg_phys_mr,
				  * ehca_reg_internal_maxmr */
	EHCA_MR_PGI_USER   = 2,  /* type of ehca_reg_user_mr */
	EHCA_MR_PGI_FMR    = 3   /* type of ehca_map_phys_fmr */
};

struct ehca_mr_pginfo {
	enum ehca_mr_pgi_type type;
	u64 num_pages;
	u64 page_cnt;
	u64 num_4k;       /* number of 4k "page" portions */
	u64 page_4k_cnt;  /* counter for 4k "page" portions */
	u64 next_4k;      /* next 4k "page" portion in buffer/chunk/listelem */

	/* type EHCA_MR_PGI_PHYS section */
	int num_phys_buf;
	struct ib_phys_buf *phys_buf_array;
	u64 next_buf;

	/* type EHCA_MR_PGI_USER section */
	struct ib_umem *region;
	struct ib_umem_chunk *next_chunk;
	u64 next_nmap;

	/* type EHCA_MR_PGI_FMR section */
	u64 *page_list;
	u64 next_listelem;
	/* next_4k also used within EHCA_MR_PGI_FMR */
};

/* output parameters for MR/FMR hipz calls */
struct ehca_mr_hipzout_parms {
	struct ipz_mrmw_handle handle;
	u32 lkey;
	u32 rkey;
	u64 len;
	u64 vaddr;
	u32 acl;
};

/* output parameters for MW hipz calls */
struct ehca_mw_hipzout_parms {
	struct ipz_mrmw_handle handle;
	u32 rkey;
};

struct ehca_av {
	struct ib_ah ib_ah;
	struct ehca_ud_av av;
};

struct ehca_ucontext {
	struct ib_ucontext ib_ucontext;
};

int ehca_init_pd_cache(void);
void ehca_cleanup_pd_cache(void);
int ehca_init_cq_cache(void);
void ehca_cleanup_cq_cache(void);
int ehca_init_qp_cache(void);
void ehca_cleanup_qp_cache(void);
int ehca_init_av_cache(void);
void ehca_cleanup_av_cache(void);
int ehca_init_mrmw_cache(void);
void ehca_cleanup_mrmw_cache(void);

extern rwlock_t ehca_qp_idr_lock;
extern rwlock_t ehca_cq_idr_lock;
extern struct idr ehca_qp_idr;
extern struct idr ehca_cq_idr;

extern int ehca_static_rate;
extern int ehca_port_act_time;
extern int ehca_use_hp_mr;
extern int ehca_scaling_code;

struct ipzu_queue_resp {
	u32 qe_size;      /* queue entry size */
	u32 act_nr_of_sg;
	u32 queue_length; /* queue length allocated in bytes */
	u32 pagesize;
	u32 toggle_state;
	u32 dummy; /* padding for 8 byte alignment */
};

struct ehca_create_cq_resp {
	u32 cq_number;
	u32 token;
	struct ipzu_queue_resp ipz_queue;
};

struct ehca_create_qp_resp {
	u32 qp_num;
	u32 token;
	u32 qp_type;
	u32 ext_type;
	u32 qkey;
	/* qp_num assigned by ehca: sqp0/1 may have got different numbers */
	u32 real_qp_num;
	u32 dummy; /* padding for 8 byte alignment */
	struct ipzu_queue_resp ipz_squeue;
	struct ipzu_queue_resp ipz_rqueue;
};

struct ehca_alloc_cq_parms {
	u32 nr_cqe;
	u32 act_nr_of_entries;
	u32 act_pages;
	struct ipz_eq_handle eq_handle;
};

enum ehca_service_type {
	ST_RC  = 0,
	ST_UC  = 1,
	ST_RD  = 2,
	ST_UD  = 3,
};

enum ehca_ll_comp_flags {
	LLQP_SEND_COMP = 0x20,
	LLQP_RECV_COMP = 0x40,
	LLQP_COMP_MASK = 0x60,
};

struct ehca_alloc_qp_parms {
/* input parameters */
	enum ehca_service_type servicetype;
	int sigtype;
	enum ehca_ext_qp_type ext_type;
	enum ehca_ll_comp_flags ll_comp_flags;

	int max_send_wr, max_recv_wr;
	int max_send_sge, max_recv_sge;
	int ud_av_l_key_ctl;

	u32 token;
	struct ipz_eq_handle eq_handle;
	struct ipz_pd pd;
	struct ipz_cq_handle send_cq_handle, recv_cq_handle;

	u32 srq_qpn, srq_token, srq_limit;

/* output parameters */
	u32 real_qp_num;
	struct ipz_qp_handle qp_handle;
	struct h_galpas galpas;

	u16 act_nr_send_wqes;
	u16 act_nr_recv_wqes;
	u8  act_nr_recv_sges;
	u8  act_nr_send_sges;

	u32 nr_rq_pages;
	u32 nr_sq_pages;
};

int ehca_cq_assign_qp(struct ehca_cq *cq, struct ehca_qp *qp);
int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int qp_num);
struct ehca_qp* ehca_cq_get_qp(struct ehca_cq *cq, int qp_num);

#endif
Commit	Line	Data
fab97220 HS	1	/*
	2	* IBM eServer eHCA Infiniband device driver for Linux on POWER
	3	*
	4	* Struct definition for eHCA internal structures
	5	*
	6	* Authors: Heiko J Schick <schickhj@de.ibm.com>
	7	* Christoph Raisch <raisch@de.ibm.com>
a6a12947	8	* Joachim Fenkes <fenkes@de.ibm.com>
fab97220 HS	9	*
	10	* Copyright (c) 2005 IBM Corporation
	11	*
	12	* All rights reserved.
	13	*
	14	* This source code is distributed under a dual license of GPL v2.0 and OpenIB
	15	* BSD.
	16	*
	17	* OpenIB BSD License
	18	*
	19	* Redistribution and use in source and binary forms, with or without
	20	* modification, are permitted provided that the following conditions are met:
	21	*
	22	* Redistributions of source code must retain the above copyright notice, this
	23	* list of conditions and the following disclaimer.
	24	*
	25	* Redistributions in binary form must reproduce the above copyright notice,
	26	* this list of conditions and the following disclaimer in the documentation
	27	* and/or other materials
	28	* provided with the distribution.
	29	*
	30	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	31	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	32	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
	33	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
	34	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
	35	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
	36	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
	37	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
	38	* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
	39	* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
	40	* POSSIBILITY OF SUCH DAMAGE.
	41	*/
	42
	43	#ifndef __EHCA_CLASSES_H__
	44	#define __EHCA_CLASSES_H__
	45
fab97220 HS	46
	47	struct ehca_module;
	48	struct ehca_qp;
	49	struct ehca_cq;
	50	struct ehca_eq;
	51	struct ehca_mr;
	52	struct ehca_mw;
	53	struct ehca_pd;
	54	struct ehca_av;
	55
31726798 HNN	56	#include <linux/wait.h>
31726798 HNN	57
78d8d5f9 HNN	58	#include <rdma/ib_verbs.h>
	59	#include <rdma/ib_user_verbs.h>
	60
fab97220 HS	61	#ifdef CONFIG_PPC64
	62	#include "ehca_classes_pSeries.h"
	63	#endif
78d8d5f9 HNN	64	#include "ipz_pt_fn.h"
	65	#include "ehca_qes.h"
	66	#include "ehca_irq.h"
fab97220	67
78d8d5f9	68	#define EHCA_EQE_CACHE_SIZE 20
fab97220	69
78d8d5f9 HNN	70	struct ehca_eqe_cache_entry {
	71	struct ehca_eqe *eqe;
	72	struct ehca_cq *cq;
	73	};
fab97220 HS	74
	75	struct ehca_eq {
	76	u32 length;
	77	struct ipz_queue ipz_queue;
	78	struct ipz_eq_handle ipz_eq_handle;
	79	struct work_struct work;
	80	struct h_galpas galpas;
	81	int is_initialized;
	82	struct ehca_pfeq pf;
	83	spinlock_t spinlock;
	84	struct tasklet_struct interrupt_task;
	85	u32 ist;
78d8d5f9 HNN	86	spinlock_t irq_spinlock;
78d8d5f9 HNN	87	struct ehca_eqe_cache_entry eqe_cache[EHCA_EQE_CACHE_SIZE];
fab97220 HS	88	};
fab97220 HS	89
8705ce5b JF	90	struct ehca_sma_attr {
	91	u16 lid, lmc, sm_sl, sm_lid;
	92	u16 pkey_tbl_len, pkeys[16];
	93	};
	94
fab97220 HS	95	struct ehca_sport {
	96	struct ib_cq *ibcq_aqp1;
	97	struct ib_qp *ibqp_aqp1;
	98	enum ib_rate rate;
	99	enum ib_port_state port_state;
8705ce5b	100	struct ehca_sma_attr saved_attr;
fab97220 HS	101	};
	102
	103	struct ehca_shca {
	104	struct ib_device ib_device;
	105	struct ibmebus_dev *ibmebus_dev;
	106	u8 num_ports;
	107	int hw_level;
	108	struct list_head shca_list;
	109	struct ipz_adapter_handle ipz_hca_handle;
	110	struct ehca_sport sport[2];
	111	struct ehca_eq eq;
	112	struct ehca_eq neq;
	113	struct ehca_mr *maxmr;
	114	struct ehca_pd *pd;
	115	struct h_galpas galpas;
c4ed790d	116	struct mutex modify_mutex;
91f13aa3 JF	117	u64 hca_cap;
91f13aa3 JF	118	int max_mtu;
fab97220 HS	119	};
	120
	121	struct ehca_pd {
	122	struct ib_pd ib_pd;
	123	struct ipz_pd fw_pd;
	124	u32 ownpid;
	125	};
	126
a6a12947 JF	127	enum ehca_ext_qp_type {
	128	EQPT_NORMAL = 0,
	129	EQPT_LLQP = 1,
	130	EQPT_SRQBASE = 2,
	131	EQPT_SRQ = 3,
	132	};
	133
fab97220	134	struct ehca_qp {
a6a12947 JF	135	union {
	136	struct ib_qp ib_qp;
	137	struct ib_srq ib_srq;
	138	};
fab97220	139	u32 qp_type;
a6a12947	140	enum ehca_ext_qp_type ext_type;
fab97220 HS	141	struct ipz_queue ipz_squeue;
	142	struct ipz_queue ipz_rqueue;
	143	struct h_galpas galpas;
	144	u32 qkey;
	145	u32 real_qp_num;
	146	u32 token;
	147	spinlock_t spinlock_s;
	148	spinlock_t spinlock_r;
	149	u32 sq_max_inline_data_size;
	150	struct ipz_qp_handle ipz_qp_handle;
	151	struct ehca_pfqp pf;
	152	struct ib_qp_init_attr init_attr;
fab97220 HS	153	struct ehca_cq *send_cq;
	154	struct ehca_cq *recv_cq;
	155	unsigned int sqerr_purgeflag;
	156	struct hlist_node list_entries;
4c34bdf5 HNN	157	/* mmap counter for resources mapped into user space */
	158	u32 mm_count_squeue;
	159	u32 mm_count_rqueue;
	160	u32 mm_count_galpa;
fab97220 HS	161	};
fab97220 HS	162
a6a12947 JF	163	#define IS_SRQ(qp) (qp->ext_type == EQPT_SRQ)
	164	#define HAS_SQ(qp) (qp->ext_type != EQPT_SRQ)
	165	#define HAS_RQ(qp) (qp->ext_type != EQPT_SRQBASE)
	166
fab97220 HS	167	/* must be power of 2 */
	168	#define QP_HASHTAB_LEN 8
	169
	170	struct ehca_cq {
	171	struct ib_cq ib_cq;
	172	struct ipz_queue ipz_queue;
	173	struct h_galpas galpas;
	174	spinlock_t spinlock;
	175	u32 cq_number;
	176	u32 token;
	177	u32 nr_of_entries;
	178	struct ipz_cq_handle ipz_cq_handle;
	179	struct ehca_pfcq pf;
	180	spinlock_t cb_lock;
fab97220 HS	181	struct hlist_head qp_hashtab[QP_HASHTAB_LEN];
fab97220 HS	182	struct list_head entry;
28db6beb JF	183	u32 nr_callbacks; /* #events assigned to cpu by scaling code */
28db6beb JF	184	atomic_t nr_events; /* #events seen */
31726798	185	wait_queue_head_t wait_completion;
fab97220 HS	186	spinlock_t task_lock;
fab97220 HS	187	u32 ownpid;
4c34bdf5 HNN	188	/* mmap counter for resources mapped into user space */
	189	u32 mm_count_queue;
	190	u32 mm_count_galpa;
fab97220 HS	191	};
	192
	193	enum ehca_mr_flag {
	194	EHCA_MR_FLAG_FMR = 0x80000000, /* FMR, created with ehca_alloc_fmr */
	195	EHCA_MR_FLAG_MAXMR = 0x40000000, /* max-MR */
	196	};
	197
	198	struct ehca_mr {
	199	union {
	200	struct ib_mr ib_mr; /* must always be first in ehca_mr */
	201	struct ib_fmr ib_fmr; /* must always be first in ehca_mr */
	202	} ib;
f7c6a7b5	203	struct ib_umem *umem;
fab97220 HS	204	spinlock_t mrlock;
	205
	206	enum ehca_mr_flag flags;
	207	u32 num_pages; /* number of MR pages */
	208	u32 num_4k; /* number of 4k "page" portions to form MR */
	209	int acl; /* ACL (stored here for usage in reregister) */
	210	u64 start; / virtual start address (stored here for */
	211	/* usage in reregister) */
	212	u64 size; /* size (stored here for usage in reregister) */
	213	u32 fmr_page_size; /* page size for FMR */
	214	u32 fmr_max_pages; /* max pages for FMR */
	215	u32 fmr_max_maps; /* max outstanding maps for FMR */
	216	u32 fmr_map_cnt; /* map counter for FMR */
	217	/* fw specific data */
	218	struct ipz_mrmw_handle ipz_mr_handle; /* MR handle for h-calls */
	219	struct h_galpas galpas;
	220	/* data for userspace bridge */
	221	u32 nr_of_pages;
	222	void *pagearray;
	223	};
	224
	225	struct ehca_mw {
	226	struct ib_mw ib_mw; /* gen2 mw, must always be first in ehca_mw */
	227	spinlock_t mwlock;
	228
	229	u8 never_bound; /* indication MW was never bound */
	230	struct ipz_mrmw_handle ipz_mw_handle; /* MW handle for h-calls */
	231	struct h_galpas galpas;
	232	};
	233
	234	enum ehca_mr_pgi_type {
	235	EHCA_MR_PGI_PHYS = 1, /* type of ehca_reg_phys_mr,
	236	* ehca_rereg_phys_mr,
	237	* ehca_reg_internal_maxmr */
	238	EHCA_MR_PGI_USER = 2, /* type of ehca_reg_user_mr */
	239	EHCA_MR_PGI_FMR = 3 /* type of ehca_map_phys_fmr */
	240	};
	241
	242	struct ehca_mr_pginfo {
	243	enum ehca_mr_pgi_type type;
	244	u64 num_pages;
	245	u64 page_cnt;
	246	u64 num_4k; /* number of 4k "page" portions */
	247	u64 page_4k_cnt; /* counter for 4k "page" portions */
	248	u64 next_4k; /* next 4k "page" portion in buffer/chunk/listelem */
	249
	250	/* type EHCA_MR_PGI_PHYS section */
	251	int num_phys_buf;
	252	struct ib_phys_buf *phys_buf_array;
	253	u64 next_buf;
	254
	255	/* type EHCA_MR_PGI_USER section */
	256	struct ib_umem *region;
	257	struct ib_umem_chunk *next_chunk;
	258	u64 next_nmap;
	259
	260	/* type EHCA_MR_PGI_FMR section */
	261	u64 *page_list;
	262	u64 next_listelem;
	263	/* next_4k also used within EHCA_MR_PGI_FMR */
	264	};
	265
	266	/* output parameters for MR/FMR hipz calls */
	267	struct ehca_mr_hipzout_parms {
268	struct ipz_mrmw_handle handle;
269	u32 lkey;
270	u32 rkey;
271	u64 len;
272	u64 vaddr;
273	u32 acl;
274	};
275
276	/* output parameters for MW hipz calls */
277	struct ehca_mw_hipzout_parms {
278	struct ipz_mrmw_handle handle;
279	u32 rkey;
280	};
281
282	struct ehca_av {
283	struct ib_ah ib_ah;
284	struct ehca_ud_av av;
285	};
286
287	struct ehca_ucontext {
288	struct ib_ucontext ib_ucontext;
289	};
290
fab97220 HS	291	int ehca_init_pd_cache(void);
	292	void ehca_cleanup_pd_cache(void);
	293	int ehca_init_cq_cache(void);
	294	void ehca_cleanup_cq_cache(void);
	295	int ehca_init_qp_cache(void);
	296	void ehca_cleanup_qp_cache(void);
	297	int ehca_init_av_cache(void);
	298	void ehca_cleanup_av_cache(void);
	299	int ehca_init_mrmw_cache(void);
	300	void ehca_cleanup_mrmw_cache(void);
	301
26ed687f JF	302	extern rwlock_t ehca_qp_idr_lock;
26ed687f JF	303	extern rwlock_t ehca_cq_idr_lock;
fab97220 HS	304	extern struct idr ehca_qp_idr;
	305	extern struct idr ehca_cq_idr;
	306
	307	extern int ehca_static_rate;
	308	extern int ehca_port_act_time;
	309	extern int ehca_use_hp_mr;
4fd30060	310	extern int ehca_scaling_code;
fab97220 HS	311
fab97220 HS	312	struct ipzu_queue_resp {
fab97220 HS	313	u32 qe_size; /* queue entry size */
	314	u32 act_nr_of_sg;
	315	u32 queue_length; /* queue length allocated in bytes */
	316	u32 pagesize;
	317	u32 toggle_state;
	318	u32 dummy; /* padding for 8 byte alignment */
	319	};
	320
	321	struct ehca_create_cq_resp {
	322	u32 cq_number;
	323	u32 token;
	324	struct ipzu_queue_resp ipz_queue;
fab97220 HS	325	};
	326
	327	struct ehca_create_qp_resp {
	328	u32 qp_num;
	329	u32 token;
	330	u32 qp_type;
a6a12947	331	u32 ext_type;
fab97220 HS	332	u32 qkey;
	333	/* qp_num assigned by ehca: sqp0/1 may have got different numbers */
	334	u32 real_qp_num;
	335	u32 dummy; /* padding for 8 byte alignment */
	336	struct ipzu_queue_resp ipz_squeue;
	337	struct ipzu_queue_resp ipz_rqueue;
fab97220 HS	338	};
	339
	340	struct ehca_alloc_cq_parms {
	341	u32 nr_cqe;
	342	u32 act_nr_of_entries;
	343	u32 act_pages;
	344	struct ipz_eq_handle eq_handle;
	345	};
	346
9a79fc0a JF	347	enum ehca_service_type {
	348	ST_RC = 0,
	349	ST_UC = 1,
	350	ST_RD = 2,
	351	ST_UD = 3,
	352	};
	353
9a79fc0a JF	354	enum ehca_ll_comp_flags {
	355	LLQP_SEND_COMP = 0x20,
	356	LLQP_RECV_COMP = 0x40,
	357	LLQP_COMP_MASK = 0x60,
	358	};
	359
fab97220	360	struct ehca_alloc_qp_parms {
9a79fc0a JF	361	/* input parameters */
9a79fc0a JF	362	enum ehca_service_type servicetype;
fab97220	363	int sigtype;
9a79fc0a JF	364	enum ehca_ext_qp_type ext_type;
	365	enum ehca_ll_comp_flags ll_comp_flags;
	366
	367	int max_send_wr, max_recv_wr;
	368	int max_send_sge, max_recv_sge;
fab97220 HS	369	int ud_av_l_key_ctl;
fab97220 HS	370
9a79fc0a JF	371	u32 token;
	372	struct ipz_eq_handle eq_handle;
	373	struct ipz_pd pd;
	374	struct ipz_cq_handle send_cq_handle, recv_cq_handle;
	375
	376	u32 srq_qpn, srq_token, srq_limit;
	377
	378	/* output parameters */
	379	u32 real_qp_num;
	380	struct ipz_qp_handle qp_handle;
	381	struct h_galpas galpas;
	382
fab97220 HS	383	u16 act_nr_send_wqes;
	384	u16 act_nr_recv_wqes;
	385	u8 act_nr_recv_sges;
	386	u8 act_nr_send_sges;
	387
	388	u32 nr_rq_pages;
	389	u32 nr_sq_pages;
fab97220 HS	390	};
	391
	392	int ehca_cq_assign_qp(struct ehca_cq cq, struct ehca_qp qp);
	393	int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int qp_num);
	394	struct ehca_qp* ehca_cq_get_qp(struct ehca_cq *cq, int qp_num);
	395
	396	#endif