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d3749841 FL |
1 | /******************************************************************************* |
2 | * | |
3 | * Copyright (c) 2015-2016 Intel Corporation. All rights reserved. | |
4 | * | |
5 | * This software is available to you under a choice of one of two | |
6 | * licenses. You may choose to be licensed under the terms of the GNU | |
7 | * General Public License (GPL) Version 2, available from the file | |
8 | * COPYING in the main directory of this source tree, or the | |
9 | * OpenFabrics.org BSD license below: | |
10 | * | |
11 | * Redistribution and use in source and binary forms, with or | |
12 | * without modification, are permitted provided that the following | |
13 | * conditions are met: | |
14 | * | |
15 | * - Redistributions of source code must retain the above | |
16 | * copyright notice, this list of conditions and the following | |
17 | * disclaimer. | |
18 | * | |
19 | * - Redistributions in binary form must reproduce the above | |
20 | * copyright notice, this list of conditions and the following | |
21 | * disclaimer in the documentation and/or other materials | |
22 | * provided with the distribution. | |
23 | * | |
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
31 | * SOFTWARE. | |
32 | * | |
33 | *******************************************************************************/ | |
34 | ||
35 | #include <linux/module.h> | |
36 | #include <linux/moduleparam.h> | |
37 | #include <linux/random.h> | |
38 | #include <linux/highmem.h> | |
39 | #include <linux/time.h> | |
40 | #include <asm/byteorder.h> | |
41 | #include <net/ip.h> | |
42 | #include <rdma/ib_verbs.h> | |
43 | #include <rdma/iw_cm.h> | |
44 | #include <rdma/ib_user_verbs.h> | |
45 | #include <rdma/ib_umem.h> | |
46 | #include "i40iw.h" | |
47 | ||
48 | /** | |
49 | * i40iw_query_device - get device attributes | |
50 | * @ibdev: device pointer from stack | |
51 | * @props: returning device attributes | |
52 | * @udata: user data | |
53 | */ | |
54 | static int i40iw_query_device(struct ib_device *ibdev, | |
55 | struct ib_device_attr *props, | |
56 | struct ib_udata *udata) | |
57 | { | |
58 | struct i40iw_device *iwdev = to_iwdev(ibdev); | |
59 | ||
60 | if (udata->inlen || udata->outlen) | |
61 | return -EINVAL; | |
62 | memset(props, 0, sizeof(*props)); | |
63 | ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr); | |
64 | props->fw_ver = I40IW_FW_VERSION; | |
65 | props->device_cap_flags = iwdev->device_cap_flags; | |
4920dc31 IM |
66 | props->vendor_id = iwdev->ldev->pcidev->vendor; |
67 | props->vendor_part_id = iwdev->ldev->pcidev->device; | |
d3749841 FL |
68 | props->hw_ver = (u32)iwdev->sc_dev.hw_rev; |
69 | props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE; | |
70 | props->max_qp = iwdev->max_qp; | |
71 | props->max_qp_wr = (I40IW_MAX_WQ_ENTRIES >> 2) - 1; | |
72 | props->max_sge = I40IW_MAX_WQ_FRAGMENT_COUNT; | |
73 | props->max_cq = iwdev->max_cq; | |
74 | props->max_cqe = iwdev->max_cqe; | |
75 | props->max_mr = iwdev->max_mr; | |
76 | props->max_pd = iwdev->max_pd; | |
77 | props->max_sge_rd = 1; | |
78 | props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE; | |
79 | props->max_qp_init_rd_atom = props->max_qp_rd_atom; | |
80 | props->atomic_cap = IB_ATOMIC_NONE; | |
81 | props->max_map_per_fmr = 1; | |
82 | return 0; | |
83 | } | |
84 | ||
85 | /** | |
86 | * i40iw_query_port - get port attrubutes | |
87 | * @ibdev: device pointer from stack | |
88 | * @port: port number for query | |
89 | * @props: returning device attributes | |
90 | */ | |
91 | static int i40iw_query_port(struct ib_device *ibdev, | |
92 | u8 port, | |
93 | struct ib_port_attr *props) | |
94 | { | |
95 | struct i40iw_device *iwdev = to_iwdev(ibdev); | |
96 | struct net_device *netdev = iwdev->netdev; | |
97 | ||
98 | memset(props, 0, sizeof(*props)); | |
99 | ||
100 | props->max_mtu = IB_MTU_4096; | |
101 | if (netdev->mtu >= 4096) | |
102 | props->active_mtu = IB_MTU_4096; | |
103 | else if (netdev->mtu >= 2048) | |
104 | props->active_mtu = IB_MTU_2048; | |
105 | else if (netdev->mtu >= 1024) | |
106 | props->active_mtu = IB_MTU_1024; | |
107 | else if (netdev->mtu >= 512) | |
108 | props->active_mtu = IB_MTU_512; | |
109 | else | |
110 | props->active_mtu = IB_MTU_256; | |
111 | ||
112 | props->lid = 1; | |
113 | if (netif_carrier_ok(iwdev->netdev)) | |
114 | props->state = IB_PORT_ACTIVE; | |
115 | else | |
116 | props->state = IB_PORT_DOWN; | |
117 | props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP | | |
118 | IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP; | |
119 | props->gid_tbl_len = 1; | |
120 | props->pkey_tbl_len = 1; | |
121 | props->active_width = IB_WIDTH_4X; | |
122 | props->active_speed = 1; | |
bd57aeae | 123 | props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE; |
d3749841 FL |
124 | return 0; |
125 | } | |
126 | ||
127 | /** | |
128 | * i40iw_alloc_ucontext - Allocate the user context data structure | |
129 | * @ibdev: device pointer from stack | |
130 | * @udata: user data | |
131 | * | |
132 | * This keeps track of all objects associated with a particular | |
133 | * user-mode client. | |
134 | */ | |
135 | static struct ib_ucontext *i40iw_alloc_ucontext(struct ib_device *ibdev, | |
136 | struct ib_udata *udata) | |
137 | { | |
138 | struct i40iw_device *iwdev = to_iwdev(ibdev); | |
139 | struct i40iw_alloc_ucontext_req req; | |
140 | struct i40iw_alloc_ucontext_resp uresp; | |
141 | struct i40iw_ucontext *ucontext; | |
142 | ||
143 | if (ib_copy_from_udata(&req, udata, sizeof(req))) | |
144 | return ERR_PTR(-EINVAL); | |
145 | ||
146 | if (req.userspace_ver != I40IW_ABI_USERSPACE_VER) { | |
147 | i40iw_pr_err("Invalid userspace driver version detected. Detected version %d, should be %d\n", | |
148 | req.userspace_ver, I40IW_ABI_USERSPACE_VER); | |
149 | return ERR_PTR(-EINVAL); | |
150 | } | |
151 | ||
152 | memset(&uresp, 0, sizeof(uresp)); | |
153 | uresp.max_qps = iwdev->max_qp; | |
154 | uresp.max_pds = iwdev->max_pd; | |
155 | uresp.wq_size = iwdev->max_qp_wr * 2; | |
156 | uresp.kernel_ver = I40IW_ABI_KERNEL_VER; | |
157 | ||
158 | ucontext = kzalloc(sizeof(*ucontext), GFP_KERNEL); | |
159 | if (!ucontext) | |
160 | return ERR_PTR(-ENOMEM); | |
161 | ||
162 | ucontext->iwdev = iwdev; | |
163 | ||
164 | if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) { | |
165 | kfree(ucontext); | |
166 | return ERR_PTR(-EFAULT); | |
167 | } | |
168 | ||
169 | INIT_LIST_HEAD(&ucontext->cq_reg_mem_list); | |
170 | spin_lock_init(&ucontext->cq_reg_mem_list_lock); | |
171 | INIT_LIST_HEAD(&ucontext->qp_reg_mem_list); | |
172 | spin_lock_init(&ucontext->qp_reg_mem_list_lock); | |
173 | ||
174 | return &ucontext->ibucontext; | |
175 | } | |
176 | ||
177 | /** | |
178 | * i40iw_dealloc_ucontext - deallocate the user context data structure | |
179 | * @context: user context created during alloc | |
180 | */ | |
181 | static int i40iw_dealloc_ucontext(struct ib_ucontext *context) | |
182 | { | |
183 | struct i40iw_ucontext *ucontext = to_ucontext(context); | |
184 | unsigned long flags; | |
185 | ||
186 | spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); | |
187 | if (!list_empty(&ucontext->cq_reg_mem_list)) { | |
188 | spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); | |
189 | return -EBUSY; | |
190 | } | |
191 | spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); | |
192 | spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags); | |
193 | if (!list_empty(&ucontext->qp_reg_mem_list)) { | |
194 | spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); | |
195 | return -EBUSY; | |
196 | } | |
197 | spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); | |
198 | ||
199 | kfree(ucontext); | |
200 | return 0; | |
201 | } | |
202 | ||
203 | /** | |
204 | * i40iw_mmap - user memory map | |
205 | * @context: context created during alloc | |
206 | * @vma: kernel info for user memory map | |
207 | */ | |
208 | static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) | |
209 | { | |
210 | struct i40iw_ucontext *ucontext; | |
211 | u64 db_addr_offset; | |
212 | u64 push_offset; | |
213 | ||
214 | ucontext = to_ucontext(context); | |
215 | if (ucontext->iwdev->sc_dev.is_pf) { | |
216 | db_addr_offset = I40IW_DB_ADDR_OFFSET; | |
217 | push_offset = I40IW_PUSH_OFFSET; | |
218 | if (vma->vm_pgoff) | |
219 | vma->vm_pgoff += I40IW_PF_FIRST_PUSH_PAGE_INDEX - 1; | |
220 | } else { | |
221 | db_addr_offset = I40IW_VF_DB_ADDR_OFFSET; | |
222 | push_offset = I40IW_VF_PUSH_OFFSET; | |
223 | if (vma->vm_pgoff) | |
224 | vma->vm_pgoff += I40IW_VF_FIRST_PUSH_PAGE_INDEX - 1; | |
225 | } | |
226 | ||
227 | vma->vm_pgoff += db_addr_offset >> PAGE_SHIFT; | |
228 | ||
229 | if (vma->vm_pgoff == (db_addr_offset >> PAGE_SHIFT)) { | |
230 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
231 | vma->vm_private_data = ucontext; | |
232 | } else { | |
233 | if ((vma->vm_pgoff - (push_offset >> PAGE_SHIFT)) % 2) | |
234 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
235 | else | |
236 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); | |
237 | } | |
238 | ||
239 | if (io_remap_pfn_range(vma, vma->vm_start, | |
240 | vma->vm_pgoff + (pci_resource_start(ucontext->iwdev->ldev->pcidev, 0) >> PAGE_SHIFT), | |
241 | PAGE_SIZE, vma->vm_page_prot)) | |
242 | return -EAGAIN; | |
243 | ||
244 | return 0; | |
245 | } | |
246 | ||
247 | /** | |
248 | * i40iw_alloc_push_page - allocate a push page for qp | |
249 | * @iwdev: iwarp device | |
250 | * @qp: hardware control qp | |
251 | */ | |
252 | static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp) | |
253 | { | |
254 | struct i40iw_cqp_request *cqp_request; | |
255 | struct cqp_commands_info *cqp_info; | |
256 | struct i40iw_sc_dev *dev = &iwdev->sc_dev; | |
257 | enum i40iw_status_code status; | |
258 | ||
259 | if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX) | |
260 | return; | |
261 | ||
262 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true); | |
263 | if (!cqp_request) | |
264 | return; | |
265 | ||
266 | atomic_inc(&cqp_request->refcount); | |
267 | ||
268 | cqp_info = &cqp_request->info; | |
269 | cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE; | |
270 | cqp_info->post_sq = 1; | |
271 | ||
272 | cqp_info->in.u.manage_push_page.info.qs_handle = dev->qs_handle; | |
273 | cqp_info->in.u.manage_push_page.info.free_page = 0; | |
274 | cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp; | |
275 | cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request; | |
276 | ||
277 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
278 | if (!status) | |
279 | qp->push_idx = cqp_request->compl_info.op_ret_val; | |
280 | else | |
281 | i40iw_pr_err("CQP-OP Push page fail"); | |
282 | i40iw_put_cqp_request(&iwdev->cqp, cqp_request); | |
283 | } | |
284 | ||
285 | /** | |
286 | * i40iw_dealloc_push_page - free a push page for qp | |
287 | * @iwdev: iwarp device | |
288 | * @qp: hardware control qp | |
289 | */ | |
290 | static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp) | |
291 | { | |
292 | struct i40iw_cqp_request *cqp_request; | |
293 | struct cqp_commands_info *cqp_info; | |
294 | struct i40iw_sc_dev *dev = &iwdev->sc_dev; | |
295 | enum i40iw_status_code status; | |
296 | ||
297 | if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) | |
298 | return; | |
299 | ||
300 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false); | |
301 | if (!cqp_request) | |
302 | return; | |
303 | ||
304 | cqp_info = &cqp_request->info; | |
305 | cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE; | |
306 | cqp_info->post_sq = 1; | |
307 | ||
308 | cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx; | |
309 | cqp_info->in.u.manage_push_page.info.qs_handle = dev->qs_handle; | |
310 | cqp_info->in.u.manage_push_page.info.free_page = 1; | |
311 | cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp; | |
312 | cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request; | |
313 | ||
314 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
315 | if (!status) | |
316 | qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX; | |
317 | else | |
318 | i40iw_pr_err("CQP-OP Push page fail"); | |
319 | } | |
320 | ||
321 | /** | |
322 | * i40iw_alloc_pd - allocate protection domain | |
323 | * @ibdev: device pointer from stack | |
324 | * @context: user context created during alloc | |
325 | * @udata: user data | |
326 | */ | |
327 | static struct ib_pd *i40iw_alloc_pd(struct ib_device *ibdev, | |
328 | struct ib_ucontext *context, | |
329 | struct ib_udata *udata) | |
330 | { | |
331 | struct i40iw_pd *iwpd; | |
332 | struct i40iw_device *iwdev = to_iwdev(ibdev); | |
333 | struct i40iw_sc_dev *dev = &iwdev->sc_dev; | |
334 | struct i40iw_alloc_pd_resp uresp; | |
335 | struct i40iw_sc_pd *sc_pd; | |
336 | u32 pd_id = 0; | |
337 | int err; | |
338 | ||
339 | err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds, | |
340 | iwdev->max_pd, &pd_id, &iwdev->next_pd); | |
341 | if (err) { | |
342 | i40iw_pr_err("alloc resource failed\n"); | |
343 | return ERR_PTR(err); | |
344 | } | |
345 | ||
346 | iwpd = kzalloc(sizeof(*iwpd), GFP_KERNEL); | |
347 | if (!iwpd) { | |
348 | err = -ENOMEM; | |
349 | goto free_res; | |
350 | } | |
351 | ||
352 | sc_pd = &iwpd->sc_pd; | |
353 | dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id); | |
354 | ||
355 | if (context) { | |
356 | memset(&uresp, 0, sizeof(uresp)); | |
357 | uresp.pd_id = pd_id; | |
358 | if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) { | |
359 | err = -EFAULT; | |
360 | goto error; | |
361 | } | |
362 | } | |
363 | ||
364 | i40iw_add_pdusecount(iwpd); | |
365 | return &iwpd->ibpd; | |
366 | error: | |
367 | kfree(iwpd); | |
368 | free_res: | |
369 | i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id); | |
370 | return ERR_PTR(err); | |
371 | } | |
372 | ||
373 | /** | |
374 | * i40iw_dealloc_pd - deallocate pd | |
375 | * @ibpd: ptr of pd to be deallocated | |
376 | */ | |
377 | static int i40iw_dealloc_pd(struct ib_pd *ibpd) | |
378 | { | |
379 | struct i40iw_pd *iwpd = to_iwpd(ibpd); | |
380 | struct i40iw_device *iwdev = to_iwdev(ibpd->device); | |
381 | ||
382 | i40iw_rem_pdusecount(iwpd, iwdev); | |
383 | return 0; | |
384 | } | |
385 | ||
386 | /** | |
387 | * i40iw_qp_roundup - return round up qp ring size | |
388 | * @wr_ring_size: ring size to round up | |
389 | */ | |
390 | static int i40iw_qp_roundup(u32 wr_ring_size) | |
391 | { | |
392 | int scount = 1; | |
393 | ||
394 | if (wr_ring_size < I40IWQP_SW_MIN_WQSIZE) | |
395 | wr_ring_size = I40IWQP_SW_MIN_WQSIZE; | |
396 | ||
397 | for (wr_ring_size--; scount <= 16; scount *= 2) | |
398 | wr_ring_size |= wr_ring_size >> scount; | |
399 | return ++wr_ring_size; | |
400 | } | |
401 | ||
402 | /** | |
403 | * i40iw_get_pbl - Retrieve pbl from a list given a virtual | |
404 | * address | |
405 | * @va: user virtual address | |
406 | * @pbl_list: pbl list to search in (QP's or CQ's) | |
407 | */ | |
408 | static struct i40iw_pbl *i40iw_get_pbl(unsigned long va, | |
409 | struct list_head *pbl_list) | |
410 | { | |
411 | struct i40iw_pbl *iwpbl; | |
412 | ||
413 | list_for_each_entry(iwpbl, pbl_list, list) { | |
414 | if (iwpbl->user_base == va) { | |
415 | list_del(&iwpbl->list); | |
416 | return iwpbl; | |
417 | } | |
418 | } | |
419 | return NULL; | |
420 | } | |
421 | ||
422 | /** | |
423 | * i40iw_free_qp_resources - free up memory resources for qp | |
424 | * @iwdev: iwarp device | |
425 | * @iwqp: qp ptr (user or kernel) | |
426 | * @qp_num: qp number assigned | |
427 | */ | |
428 | void i40iw_free_qp_resources(struct i40iw_device *iwdev, | |
429 | struct i40iw_qp *iwqp, | |
430 | u32 qp_num) | |
431 | { | |
432 | i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp); | |
433 | if (qp_num) | |
434 | i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num); | |
435 | i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem); | |
436 | i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem); | |
437 | kfree(iwqp->kqp.wrid_mem); | |
438 | iwqp->kqp.wrid_mem = NULL; | |
439 | kfree(iwqp->allocated_buffer); | |
d3749841 FL |
440 | } |
441 | ||
442 | /** | |
443 | * i40iw_clean_cqes - clean cq entries for qp | |
444 | * @iwqp: qp ptr (user or kernel) | |
445 | * @iwcq: cq ptr | |
446 | */ | |
447 | static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq) | |
448 | { | |
449 | struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk; | |
450 | ||
451 | ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq); | |
452 | } | |
453 | ||
454 | /** | |
455 | * i40iw_destroy_qp - destroy qp | |
456 | * @ibqp: qp's ib pointer also to get to device's qp address | |
457 | */ | |
458 | static int i40iw_destroy_qp(struct ib_qp *ibqp) | |
459 | { | |
460 | struct i40iw_qp *iwqp = to_iwqp(ibqp); | |
461 | ||
462 | iwqp->destroyed = 1; | |
463 | ||
464 | if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS) | |
465 | i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0); | |
466 | ||
467 | if (!iwqp->user_mode) { | |
468 | if (iwqp->iwscq) { | |
469 | i40iw_clean_cqes(iwqp, iwqp->iwscq); | |
470 | if (iwqp->iwrcq != iwqp->iwscq) | |
471 | i40iw_clean_cqes(iwqp, iwqp->iwrcq); | |
472 | } | |
473 | } | |
474 | ||
475 | i40iw_rem_ref(&iwqp->ibqp); | |
476 | return 0; | |
477 | } | |
478 | ||
479 | /** | |
480 | * i40iw_setup_virt_qp - setup for allocation of virtual qp | |
481 | * @dev: iwarp device | |
482 | * @qp: qp ptr | |
483 | * @init_info: initialize info to return | |
484 | */ | |
485 | static int i40iw_setup_virt_qp(struct i40iw_device *iwdev, | |
486 | struct i40iw_qp *iwqp, | |
487 | struct i40iw_qp_init_info *init_info) | |
488 | { | |
489 | struct i40iw_pbl *iwpbl = iwqp->iwpbl; | |
490 | struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr; | |
491 | ||
492 | iwqp->page = qpmr->sq_page; | |
493 | init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow); | |
494 | if (iwpbl->pbl_allocated) { | |
495 | init_info->virtual_map = true; | |
496 | init_info->sq_pa = qpmr->sq_pbl.idx; | |
497 | init_info->rq_pa = qpmr->rq_pbl.idx; | |
498 | } else { | |
499 | init_info->sq_pa = qpmr->sq_pbl.addr; | |
500 | init_info->rq_pa = qpmr->rq_pbl.addr; | |
501 | } | |
502 | return 0; | |
503 | } | |
504 | ||
505 | /** | |
506 | * i40iw_setup_kmode_qp - setup initialization for kernel mode qp | |
507 | * @iwdev: iwarp device | |
508 | * @iwqp: qp ptr (user or kernel) | |
509 | * @info: initialize info to return | |
510 | */ | |
511 | static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev, | |
512 | struct i40iw_qp *iwqp, | |
513 | struct i40iw_qp_init_info *info) | |
514 | { | |
515 | struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem; | |
516 | u32 sqdepth, rqdepth; | |
517 | u32 sq_size, rq_size; | |
518 | u8 sqshift, rqshift; | |
519 | u32 size; | |
520 | enum i40iw_status_code status; | |
521 | struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info; | |
522 | ||
523 | ukinfo->max_sq_frag_cnt = I40IW_MAX_WQ_FRAGMENT_COUNT; | |
524 | ||
525 | sq_size = i40iw_qp_roundup(ukinfo->sq_size + 1); | |
526 | rq_size = i40iw_qp_roundup(ukinfo->rq_size + 1); | |
527 | ||
23ef48ad | 528 | status = i40iw_get_wqe_shift(sq_size, ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift); |
d3749841 | 529 | if (!status) |
23ef48ad | 530 | status = i40iw_get_wqe_shift(rq_size, ukinfo->max_rq_frag_cnt, 0, &rqshift); |
d3749841 FL |
531 | |
532 | if (status) | |
533 | return -ENOSYS; | |
534 | ||
535 | sqdepth = sq_size << sqshift; | |
536 | rqdepth = rq_size << rqshift; | |
537 | ||
538 | size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3); | |
539 | iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL); | |
540 | ||
541 | ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem; | |
542 | if (!ukinfo->sq_wrtrk_array) | |
543 | return -ENOMEM; | |
544 | ||
545 | ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth]; | |
546 | ||
547 | size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE; | |
548 | size += (I40IW_SHADOW_AREA_SIZE << 3); | |
549 | ||
550 | status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256); | |
551 | if (status) { | |
552 | kfree(ukinfo->sq_wrtrk_array); | |
553 | ukinfo->sq_wrtrk_array = NULL; | |
554 | return -ENOMEM; | |
555 | } | |
556 | ||
557 | ukinfo->sq = mem->va; | |
558 | info->sq_pa = mem->pa; | |
559 | ||
560 | ukinfo->rq = &ukinfo->sq[sqdepth]; | |
561 | info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE); | |
562 | ||
563 | ukinfo->shadow_area = ukinfo->rq[rqdepth].elem; | |
564 | info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE); | |
565 | ||
566 | ukinfo->sq_size = sq_size; | |
567 | ukinfo->rq_size = rq_size; | |
568 | ukinfo->qp_id = iwqp->ibqp.qp_num; | |
569 | return 0; | |
570 | } | |
571 | ||
572 | /** | |
573 | * i40iw_create_qp - create qp | |
574 | * @ibpd: ptr of pd | |
575 | * @init_attr: attributes for qp | |
576 | * @udata: user data for create qp | |
577 | */ | |
578 | static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd, | |
579 | struct ib_qp_init_attr *init_attr, | |
580 | struct ib_udata *udata) | |
581 | { | |
582 | struct i40iw_pd *iwpd = to_iwpd(ibpd); | |
583 | struct i40iw_device *iwdev = to_iwdev(ibpd->device); | |
584 | struct i40iw_cqp *iwcqp = &iwdev->cqp; | |
585 | struct i40iw_qp *iwqp; | |
586 | struct i40iw_ucontext *ucontext; | |
587 | struct i40iw_create_qp_req req; | |
588 | struct i40iw_create_qp_resp uresp; | |
589 | u32 qp_num = 0; | |
590 | void *mem; | |
591 | enum i40iw_status_code ret; | |
592 | int err_code; | |
593 | int sq_size; | |
594 | int rq_size; | |
595 | struct i40iw_sc_qp *qp; | |
596 | struct i40iw_sc_dev *dev = &iwdev->sc_dev; | |
597 | struct i40iw_qp_init_info init_info; | |
598 | struct i40iw_create_qp_info *qp_info; | |
599 | struct i40iw_cqp_request *cqp_request; | |
600 | struct cqp_commands_info *cqp_info; | |
601 | ||
602 | struct i40iw_qp_host_ctx_info *ctx_info; | |
603 | struct i40iwarp_offload_info *iwarp_info; | |
604 | unsigned long flags; | |
605 | ||
606 | if (init_attr->create_flags) | |
607 | return ERR_PTR(-EINVAL); | |
608 | if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE) | |
609 | init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE; | |
610 | ||
23ef48ad IM |
611 | if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT) |
612 | init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT; | |
613 | ||
d3749841 FL |
614 | memset(&init_info, 0, sizeof(init_info)); |
615 | ||
616 | sq_size = init_attr->cap.max_send_wr; | |
617 | rq_size = init_attr->cap.max_recv_wr; | |
618 | ||
619 | init_info.qp_uk_init_info.sq_size = sq_size; | |
620 | init_info.qp_uk_init_info.rq_size = rq_size; | |
621 | init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge; | |
622 | init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge; | |
23ef48ad | 623 | init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data; |
d3749841 FL |
624 | |
625 | mem = kzalloc(sizeof(*iwqp), GFP_KERNEL); | |
626 | if (!mem) | |
627 | return ERR_PTR(-ENOMEM); | |
628 | ||
629 | iwqp = (struct i40iw_qp *)mem; | |
630 | qp = &iwqp->sc_qp; | |
631 | qp->back_qp = (void *)iwqp; | |
632 | qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX; | |
633 | ||
634 | iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info; | |
635 | ||
636 | if (i40iw_allocate_dma_mem(dev->hw, | |
637 | &iwqp->q2_ctx_mem, | |
638 | I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE, | |
639 | 256)) { | |
640 | i40iw_pr_err("dma_mem failed\n"); | |
641 | err_code = -ENOMEM; | |
642 | goto error; | |
643 | } | |
644 | ||
645 | init_info.q2 = iwqp->q2_ctx_mem.va; | |
646 | init_info.q2_pa = iwqp->q2_ctx_mem.pa; | |
647 | ||
648 | init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE; | |
649 | init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE; | |
650 | ||
651 | err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp, | |
652 | &qp_num, &iwdev->next_qp); | |
653 | if (err_code) { | |
654 | i40iw_pr_err("qp resource\n"); | |
655 | goto error; | |
656 | } | |
657 | ||
658 | iwqp->allocated_buffer = mem; | |
659 | iwqp->iwdev = iwdev; | |
660 | iwqp->iwpd = iwpd; | |
661 | iwqp->ibqp.qp_num = qp_num; | |
662 | qp = &iwqp->sc_qp; | |
663 | iwqp->iwscq = to_iwcq(init_attr->send_cq); | |
664 | iwqp->iwrcq = to_iwcq(init_attr->recv_cq); | |
665 | ||
666 | iwqp->host_ctx.va = init_info.host_ctx; | |
667 | iwqp->host_ctx.pa = init_info.host_ctx_pa; | |
668 | iwqp->host_ctx.size = I40IW_QP_CTX_SIZE; | |
669 | ||
670 | init_info.pd = &iwpd->sc_pd; | |
671 | init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num; | |
672 | iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp; | |
673 | ||
674 | if (init_attr->qp_type != IB_QPT_RC) { | |
675 | err_code = -ENOSYS; | |
676 | goto error; | |
677 | } | |
678 | if (iwdev->push_mode) | |
679 | i40iw_alloc_push_page(iwdev, qp); | |
680 | if (udata) { | |
681 | err_code = ib_copy_from_udata(&req, udata, sizeof(req)); | |
682 | if (err_code) { | |
683 | i40iw_pr_err("ib_copy_from_data\n"); | |
684 | goto error; | |
685 | } | |
686 | iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx; | |
687 | if (ibpd->uobject && ibpd->uobject->context) { | |
688 | iwqp->user_mode = 1; | |
689 | ucontext = to_ucontext(ibpd->uobject->context); | |
690 | ||
691 | if (req.user_wqe_buffers) { | |
692 | spin_lock_irqsave( | |
693 | &ucontext->qp_reg_mem_list_lock, flags); | |
694 | iwqp->iwpbl = i40iw_get_pbl( | |
695 | (unsigned long)req.user_wqe_buffers, | |
696 | &ucontext->qp_reg_mem_list); | |
697 | spin_unlock_irqrestore( | |
698 | &ucontext->qp_reg_mem_list_lock, flags); | |
699 | ||
700 | if (!iwqp->iwpbl) { | |
701 | err_code = -ENODATA; | |
702 | i40iw_pr_err("no pbl info\n"); | |
703 | goto error; | |
704 | } | |
705 | } | |
706 | } | |
707 | err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info); | |
708 | } else { | |
709 | err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info); | |
710 | } | |
711 | ||
712 | if (err_code) { | |
713 | i40iw_pr_err("setup qp failed\n"); | |
714 | goto error; | |
715 | } | |
716 | ||
717 | init_info.type = I40IW_QP_TYPE_IWARP; | |
718 | ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info); | |
719 | if (ret) { | |
720 | err_code = -EPROTO; | |
721 | i40iw_pr_err("qp_init fail\n"); | |
722 | goto error; | |
723 | } | |
724 | ctx_info = &iwqp->ctx_info; | |
725 | iwarp_info = &iwqp->iwarp_info; | |
726 | iwarp_info->rd_enable = true; | |
727 | iwarp_info->wr_rdresp_en = true; | |
b7aee855 IM |
728 | if (!iwqp->user_mode) { |
729 | iwarp_info->fast_reg_en = true; | |
d3749841 | 730 | iwarp_info->priv_mode_en = true; |
b7aee855 | 731 | } |
d3749841 FL |
732 | iwarp_info->ddp_ver = 1; |
733 | iwarp_info->rdmap_ver = 1; | |
734 | ||
735 | ctx_info->iwarp_info_valid = true; | |
736 | ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id; | |
737 | ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id; | |
738 | if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) { | |
739 | ctx_info->push_mode_en = false; | |
740 | } else { | |
741 | ctx_info->push_mode_en = true; | |
742 | ctx_info->push_idx = qp->push_idx; | |
743 | } | |
744 | ||
745 | ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp, | |
746 | (u64 *)iwqp->host_ctx.va, | |
747 | ctx_info); | |
748 | ctx_info->iwarp_info_valid = false; | |
749 | cqp_request = i40iw_get_cqp_request(iwcqp, true); | |
750 | if (!cqp_request) { | |
751 | err_code = -ENOMEM; | |
752 | goto error; | |
753 | } | |
754 | cqp_info = &cqp_request->info; | |
755 | qp_info = &cqp_request->info.in.u.qp_create.info; | |
756 | ||
757 | memset(qp_info, 0, sizeof(*qp_info)); | |
758 | ||
759 | qp_info->cq_num_valid = true; | |
760 | qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE; | |
761 | ||
762 | cqp_info->cqp_cmd = OP_QP_CREATE; | |
763 | cqp_info->post_sq = 1; | |
764 | cqp_info->in.u.qp_create.qp = qp; | |
765 | cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request; | |
766 | ret = i40iw_handle_cqp_op(iwdev, cqp_request); | |
767 | if (ret) { | |
768 | i40iw_pr_err("CQP-OP QP create fail"); | |
769 | err_code = -EACCES; | |
770 | goto error; | |
771 | } | |
772 | ||
773 | i40iw_add_ref(&iwqp->ibqp); | |
774 | spin_lock_init(&iwqp->lock); | |
775 | iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0; | |
776 | iwdev->qp_table[qp_num] = iwqp; | |
777 | i40iw_add_pdusecount(iwqp->iwpd); | |
778 | if (ibpd->uobject && udata) { | |
779 | memset(&uresp, 0, sizeof(uresp)); | |
780 | uresp.actual_sq_size = sq_size; | |
781 | uresp.actual_rq_size = rq_size; | |
782 | uresp.qp_id = qp_num; | |
783 | uresp.push_idx = qp->push_idx; | |
784 | err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp)); | |
785 | if (err_code) { | |
786 | i40iw_pr_err("copy_to_udata failed\n"); | |
787 | i40iw_destroy_qp(&iwqp->ibqp); | |
788 | /* let the completion of the qp destroy free the qp */ | |
789 | return ERR_PTR(err_code); | |
790 | } | |
791 | } | |
c2b75ef7 IM |
792 | init_completion(&iwqp->sq_drained); |
793 | init_completion(&iwqp->rq_drained); | |
d3749841 FL |
794 | |
795 | return &iwqp->ibqp; | |
796 | error: | |
797 | i40iw_free_qp_resources(iwdev, iwqp, qp_num); | |
798 | kfree(mem); | |
799 | return ERR_PTR(err_code); | |
800 | } | |
801 | ||
802 | /** | |
803 | * i40iw_query - query qp attributes | |
804 | * @ibqp: qp pointer | |
805 | * @attr: attributes pointer | |
806 | * @attr_mask: Not used | |
807 | * @init_attr: qp attributes to return | |
808 | */ | |
809 | static int i40iw_query_qp(struct ib_qp *ibqp, | |
810 | struct ib_qp_attr *attr, | |
811 | int attr_mask, | |
812 | struct ib_qp_init_attr *init_attr) | |
813 | { | |
814 | struct i40iw_qp *iwqp = to_iwqp(ibqp); | |
815 | struct i40iw_sc_qp *qp = &iwqp->sc_qp; | |
816 | ||
817 | attr->qp_access_flags = 0; | |
818 | attr->cap.max_send_wr = qp->qp_uk.sq_size; | |
819 | attr->cap.max_recv_wr = qp->qp_uk.rq_size; | |
820 | attr->cap.max_recv_sge = 1; | |
821 | attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE; | |
822 | init_attr->event_handler = iwqp->ibqp.event_handler; | |
823 | init_attr->qp_context = iwqp->ibqp.qp_context; | |
824 | init_attr->send_cq = iwqp->ibqp.send_cq; | |
825 | init_attr->recv_cq = iwqp->ibqp.recv_cq; | |
826 | init_attr->srq = iwqp->ibqp.srq; | |
827 | init_attr->cap = attr->cap; | |
828 | return 0; | |
829 | } | |
830 | ||
831 | /** | |
832 | * i40iw_hw_modify_qp - setup cqp for modify qp | |
833 | * @iwdev: iwarp device | |
834 | * @iwqp: qp ptr (user or kernel) | |
835 | * @info: info for modify qp | |
836 | * @wait: flag to wait or not for modify qp completion | |
837 | */ | |
838 | void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp, | |
839 | struct i40iw_modify_qp_info *info, bool wait) | |
840 | { | |
841 | enum i40iw_status_code status; | |
842 | struct i40iw_cqp_request *cqp_request; | |
843 | struct cqp_commands_info *cqp_info; | |
844 | struct i40iw_modify_qp_info *m_info; | |
845 | ||
846 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait); | |
847 | if (!cqp_request) | |
848 | return; | |
849 | ||
850 | cqp_info = &cqp_request->info; | |
851 | m_info = &cqp_info->in.u.qp_modify.info; | |
852 | memcpy(m_info, info, sizeof(*m_info)); | |
853 | cqp_info->cqp_cmd = OP_QP_MODIFY; | |
854 | cqp_info->post_sq = 1; | |
855 | cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp; | |
856 | cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request; | |
857 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
858 | if (status) | |
859 | i40iw_pr_err("CQP-OP Modify QP fail"); | |
860 | } | |
861 | ||
862 | /** | |
863 | * i40iw_modify_qp - modify qp request | |
864 | * @ibqp: qp's pointer for modify | |
865 | * @attr: access attributes | |
866 | * @attr_mask: state mask | |
867 | * @udata: user data | |
868 | */ | |
869 | int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, | |
870 | int attr_mask, struct ib_udata *udata) | |
871 | { | |
872 | struct i40iw_qp *iwqp = to_iwqp(ibqp); | |
873 | struct i40iw_device *iwdev = iwqp->iwdev; | |
874 | struct i40iw_qp_host_ctx_info *ctx_info; | |
875 | struct i40iwarp_offload_info *iwarp_info; | |
876 | struct i40iw_modify_qp_info info; | |
877 | u8 issue_modify_qp = 0; | |
878 | u8 dont_wait = 0; | |
879 | u32 err; | |
880 | unsigned long flags; | |
881 | ||
882 | memset(&info, 0, sizeof(info)); | |
883 | ctx_info = &iwqp->ctx_info; | |
884 | iwarp_info = &iwqp->iwarp_info; | |
885 | ||
886 | spin_lock_irqsave(&iwqp->lock, flags); | |
887 | ||
888 | if (attr_mask & IB_QP_STATE) { | |
889 | switch (attr->qp_state) { | |
890 | case IB_QPS_INIT: | |
891 | case IB_QPS_RTR: | |
892 | if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) { | |
893 | err = -EINVAL; | |
894 | goto exit; | |
895 | } | |
896 | if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) { | |
897 | info.next_iwarp_state = I40IW_QP_STATE_IDLE; | |
898 | issue_modify_qp = 1; | |
899 | } | |
900 | break; | |
901 | case IB_QPS_RTS: | |
902 | if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) || | |
903 | (!iwqp->cm_id)) { | |
904 | err = -EINVAL; | |
905 | goto exit; | |
906 | } | |
907 | ||
908 | issue_modify_qp = 1; | |
909 | iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED; | |
910 | iwqp->hte_added = 1; | |
911 | info.next_iwarp_state = I40IW_QP_STATE_RTS; | |
912 | info.tcp_ctx_valid = true; | |
913 | info.ord_valid = true; | |
914 | info.arp_cache_idx_valid = true; | |
915 | info.cq_num_valid = true; | |
916 | break; | |
917 | case IB_QPS_SQD: | |
918 | if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) { | |
919 | err = 0; | |
920 | goto exit; | |
921 | } | |
922 | if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) || | |
923 | (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) { | |
924 | err = 0; | |
925 | goto exit; | |
926 | } | |
927 | if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) { | |
928 | err = -EINVAL; | |
929 | goto exit; | |
930 | } | |
931 | info.next_iwarp_state = I40IW_QP_STATE_CLOSING; | |
932 | issue_modify_qp = 1; | |
933 | break; | |
934 | case IB_QPS_SQE: | |
935 | if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) { | |
936 | err = -EINVAL; | |
937 | goto exit; | |
938 | } | |
939 | info.next_iwarp_state = I40IW_QP_STATE_TERMINATE; | |
940 | issue_modify_qp = 1; | |
941 | break; | |
942 | case IB_QPS_ERR: | |
943 | case IB_QPS_RESET: | |
944 | if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) { | |
945 | err = -EINVAL; | |
946 | goto exit; | |
947 | } | |
948 | if (iwqp->sc_qp.term_flags) | |
949 | del_timer(&iwqp->terminate_timer); | |
950 | info.next_iwarp_state = I40IW_QP_STATE_ERROR; | |
951 | if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) && | |
952 | iwdev->iw_status && | |
953 | (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT)) | |
954 | info.reset_tcp_conn = true; | |
955 | else | |
956 | dont_wait = 1; | |
957 | issue_modify_qp = 1; | |
958 | info.next_iwarp_state = I40IW_QP_STATE_ERROR; | |
959 | break; | |
960 | default: | |
961 | err = -EINVAL; | |
962 | goto exit; | |
963 | } | |
964 | ||
965 | iwqp->ibqp_state = attr->qp_state; | |
966 | ||
967 | if (issue_modify_qp) | |
968 | iwqp->iwarp_state = info.next_iwarp_state; | |
969 | else | |
970 | info.next_iwarp_state = iwqp->iwarp_state; | |
971 | } | |
972 | if (attr_mask & IB_QP_ACCESS_FLAGS) { | |
973 | ctx_info->iwarp_info_valid = true; | |
974 | if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE) | |
975 | iwarp_info->wr_rdresp_en = true; | |
976 | if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) | |
977 | iwarp_info->wr_rdresp_en = true; | |
978 | if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) | |
979 | iwarp_info->rd_enable = true; | |
980 | if (attr->qp_access_flags & IB_ACCESS_MW_BIND) | |
981 | iwarp_info->bind_en = true; | |
982 | ||
983 | if (iwqp->user_mode) { | |
984 | iwarp_info->rd_enable = true; | |
985 | iwarp_info->wr_rdresp_en = true; | |
986 | iwarp_info->priv_mode_en = false; | |
987 | } | |
988 | } | |
989 | ||
990 | if (ctx_info->iwarp_info_valid) { | |
991 | struct i40iw_sc_dev *dev = &iwdev->sc_dev; | |
992 | int ret; | |
993 | ||
994 | ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id; | |
995 | ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id; | |
996 | ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp, | |
997 | (u64 *)iwqp->host_ctx.va, | |
998 | ctx_info); | |
999 | if (ret) { | |
1000 | i40iw_pr_err("setting QP context\n"); | |
1001 | err = -EINVAL; | |
1002 | goto exit; | |
1003 | } | |
1004 | } | |
1005 | ||
1006 | spin_unlock_irqrestore(&iwqp->lock, flags); | |
1007 | ||
1008 | if (issue_modify_qp) | |
1009 | i40iw_hw_modify_qp(iwdev, iwqp, &info, true); | |
1010 | ||
1011 | if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) { | |
1012 | if (dont_wait) { | |
1013 | if (iwqp->cm_id && iwqp->hw_tcp_state) { | |
1014 | spin_lock_irqsave(&iwqp->lock, flags); | |
1015 | iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED; | |
1016 | iwqp->last_aeq = I40IW_AE_RESET_SENT; | |
1017 | spin_unlock_irqrestore(&iwqp->lock, flags); | |
1018 | } | |
1019 | } | |
1020 | } | |
1021 | return 0; | |
1022 | exit: | |
1023 | spin_unlock_irqrestore(&iwqp->lock, flags); | |
1024 | return err; | |
1025 | } | |
1026 | ||
1027 | /** | |
1028 | * cq_free_resources - free up recources for cq | |
1029 | * @iwdev: iwarp device | |
1030 | * @iwcq: cq ptr | |
1031 | */ | |
1032 | static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq) | |
1033 | { | |
1034 | struct i40iw_sc_cq *cq = &iwcq->sc_cq; | |
1035 | ||
1036 | if (!iwcq->user_mode) | |
1037 | i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem); | |
1038 | i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id); | |
1039 | } | |
1040 | ||
1041 | /** | |
1042 | * cq_wq_destroy - send cq destroy cqp | |
1043 | * @iwdev: iwarp device | |
1044 | * @cq: hardware control cq | |
1045 | */ | |
1046 | static void cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq) | |
1047 | { | |
1048 | enum i40iw_status_code status; | |
1049 | struct i40iw_cqp_request *cqp_request; | |
1050 | struct cqp_commands_info *cqp_info; | |
1051 | ||
1052 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true); | |
1053 | if (!cqp_request) | |
1054 | return; | |
1055 | ||
1056 | cqp_info = &cqp_request->info; | |
1057 | ||
1058 | cqp_info->cqp_cmd = OP_CQ_DESTROY; | |
1059 | cqp_info->post_sq = 1; | |
1060 | cqp_info->in.u.cq_destroy.cq = cq; | |
1061 | cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request; | |
1062 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
1063 | if (status) | |
1064 | i40iw_pr_err("CQP-OP Destroy QP fail"); | |
1065 | } | |
1066 | ||
1067 | /** | |
1068 | * i40iw_destroy_cq - destroy cq | |
1069 | * @ib_cq: cq pointer | |
1070 | */ | |
1071 | static int i40iw_destroy_cq(struct ib_cq *ib_cq) | |
1072 | { | |
1073 | struct i40iw_cq *iwcq; | |
1074 | struct i40iw_device *iwdev; | |
1075 | struct i40iw_sc_cq *cq; | |
1076 | ||
1077 | if (!ib_cq) { | |
1078 | i40iw_pr_err("ib_cq == NULL\n"); | |
1079 | return 0; | |
1080 | } | |
1081 | ||
1082 | iwcq = to_iwcq(ib_cq); | |
1083 | iwdev = to_iwdev(ib_cq->device); | |
1084 | cq = &iwcq->sc_cq; | |
1085 | cq_wq_destroy(iwdev, cq); | |
1086 | cq_free_resources(iwdev, iwcq); | |
1087 | kfree(iwcq); | |
1088 | return 0; | |
1089 | } | |
1090 | ||
1091 | /** | |
1092 | * i40iw_create_cq - create cq | |
1093 | * @ibdev: device pointer from stack | |
1094 | * @attr: attributes for cq | |
1095 | * @context: user context created during alloc | |
1096 | * @udata: user data | |
1097 | */ | |
1098 | static struct ib_cq *i40iw_create_cq(struct ib_device *ibdev, | |
1099 | const struct ib_cq_init_attr *attr, | |
1100 | struct ib_ucontext *context, | |
1101 | struct ib_udata *udata) | |
1102 | { | |
1103 | struct i40iw_device *iwdev = to_iwdev(ibdev); | |
1104 | struct i40iw_cq *iwcq; | |
1105 | struct i40iw_pbl *iwpbl; | |
1106 | u32 cq_num = 0; | |
1107 | struct i40iw_sc_cq *cq; | |
1108 | struct i40iw_sc_dev *dev = &iwdev->sc_dev; | |
1109 | struct i40iw_cq_init_info info; | |
1110 | enum i40iw_status_code status; | |
1111 | struct i40iw_cqp_request *cqp_request; | |
1112 | struct cqp_commands_info *cqp_info; | |
1113 | struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info; | |
1114 | unsigned long flags; | |
1115 | int err_code; | |
1116 | int entries = attr->cqe; | |
1117 | ||
1118 | if (entries > iwdev->max_cqe) | |
1119 | return ERR_PTR(-EINVAL); | |
1120 | ||
1121 | iwcq = kzalloc(sizeof(*iwcq), GFP_KERNEL); | |
1122 | if (!iwcq) | |
1123 | return ERR_PTR(-ENOMEM); | |
1124 | ||
1125 | memset(&info, 0, sizeof(info)); | |
1126 | ||
1127 | err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs, | |
1128 | iwdev->max_cq, &cq_num, | |
1129 | &iwdev->next_cq); | |
1130 | if (err_code) | |
1131 | goto error; | |
1132 | ||
1133 | cq = &iwcq->sc_cq; | |
1134 | cq->back_cq = (void *)iwcq; | |
1135 | spin_lock_init(&iwcq->lock); | |
1136 | ||
1137 | info.dev = dev; | |
1138 | ukinfo->cq_size = max(entries, 4); | |
1139 | ukinfo->cq_id = cq_num; | |
1140 | iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size; | |
1141 | info.ceqe_mask = 0; | |
1142 | info.ceq_id = 0; | |
1143 | info.ceq_id_valid = true; | |
1144 | info.ceqe_mask = 1; | |
1145 | info.type = I40IW_CQ_TYPE_IWARP; | |
1146 | if (context) { | |
1147 | struct i40iw_ucontext *ucontext; | |
1148 | struct i40iw_create_cq_req req; | |
1149 | struct i40iw_cq_mr *cqmr; | |
1150 | ||
1151 | memset(&req, 0, sizeof(req)); | |
1152 | iwcq->user_mode = true; | |
1153 | ucontext = to_ucontext(context); | |
1154 | if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req))) | |
1155 | goto cq_free_resources; | |
1156 | ||
1157 | spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); | |
1158 | iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer, | |
1159 | &ucontext->cq_reg_mem_list); | |
1160 | spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); | |
1161 | if (!iwpbl) { | |
1162 | err_code = -EPROTO; | |
1163 | goto cq_free_resources; | |
1164 | } | |
1165 | ||
1166 | iwcq->iwpbl = iwpbl; | |
1167 | iwcq->cq_mem_size = 0; | |
1168 | cqmr = &iwpbl->cq_mr; | |
1169 | info.shadow_area_pa = cpu_to_le64(cqmr->shadow); | |
1170 | if (iwpbl->pbl_allocated) { | |
1171 | info.virtual_map = true; | |
1172 | info.pbl_chunk_size = 1; | |
1173 | info.first_pm_pbl_idx = cqmr->cq_pbl.idx; | |
1174 | } else { | |
1175 | info.cq_base_pa = cqmr->cq_pbl.addr; | |
1176 | } | |
1177 | } else { | |
1178 | /* Kmode allocations */ | |
1179 | int rsize; | |
1180 | int shadow; | |
1181 | ||
1182 | rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe); | |
1183 | rsize = round_up(rsize, 256); | |
1184 | shadow = I40IW_SHADOW_AREA_SIZE << 3; | |
1185 | status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem, | |
1186 | rsize + shadow, 256); | |
1187 | if (status) { | |
1188 | err_code = -ENOMEM; | |
1189 | goto cq_free_resources; | |
1190 | } | |
1191 | ukinfo->cq_base = iwcq->kmem.va; | |
1192 | info.cq_base_pa = iwcq->kmem.pa; | |
1193 | info.shadow_area_pa = info.cq_base_pa + rsize; | |
1194 | ukinfo->shadow_area = iwcq->kmem.va + rsize; | |
1195 | } | |
1196 | ||
1197 | if (dev->iw_priv_cq_ops->cq_init(cq, &info)) { | |
1198 | i40iw_pr_err("init cq fail\n"); | |
1199 | err_code = -EPROTO; | |
1200 | goto cq_free_resources; | |
1201 | } | |
1202 | ||
1203 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true); | |
1204 | if (!cqp_request) { | |
1205 | err_code = -ENOMEM; | |
1206 | goto cq_free_resources; | |
1207 | } | |
1208 | ||
1209 | cqp_info = &cqp_request->info; | |
1210 | cqp_info->cqp_cmd = OP_CQ_CREATE; | |
1211 | cqp_info->post_sq = 1; | |
1212 | cqp_info->in.u.cq_create.cq = cq; | |
1213 | cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request; | |
1214 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
1215 | if (status) { | |
1216 | i40iw_pr_err("CQP-OP Create QP fail"); | |
1217 | err_code = -EPROTO; | |
1218 | goto cq_free_resources; | |
1219 | } | |
1220 | ||
1221 | if (context) { | |
1222 | struct i40iw_create_cq_resp resp; | |
1223 | ||
1224 | memset(&resp, 0, sizeof(resp)); | |
1225 | resp.cq_id = info.cq_uk_init_info.cq_id; | |
1226 | resp.cq_size = info.cq_uk_init_info.cq_size; | |
1227 | if (ib_copy_to_udata(udata, &resp, sizeof(resp))) { | |
1228 | i40iw_pr_err("copy to user data\n"); | |
1229 | err_code = -EPROTO; | |
1230 | goto cq_destroy; | |
1231 | } | |
1232 | } | |
1233 | ||
1234 | return (struct ib_cq *)iwcq; | |
1235 | ||
1236 | cq_destroy: | |
1237 | cq_wq_destroy(iwdev, cq); | |
1238 | cq_free_resources: | |
1239 | cq_free_resources(iwdev, iwcq); | |
1240 | error: | |
1241 | kfree(iwcq); | |
1242 | return ERR_PTR(err_code); | |
1243 | } | |
1244 | ||
1245 | /** | |
1246 | * i40iw_get_user_access - get hw access from IB access | |
1247 | * @acc: IB access to return hw access | |
1248 | */ | |
1249 | static inline u16 i40iw_get_user_access(int acc) | |
1250 | { | |
1251 | u16 access = 0; | |
1252 | ||
1253 | access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0; | |
1254 | access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0; | |
1255 | access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0; | |
1256 | access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0; | |
1257 | return access; | |
1258 | } | |
1259 | ||
1260 | /** | |
1261 | * i40iw_free_stag - free stag resource | |
1262 | * @iwdev: iwarp device | |
1263 | * @stag: stag to free | |
1264 | */ | |
1265 | static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag) | |
1266 | { | |
1267 | u32 stag_idx; | |
1268 | ||
1269 | stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT; | |
1270 | i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx); | |
1271 | } | |
1272 | ||
1273 | /** | |
1274 | * i40iw_create_stag - create random stag | |
1275 | * @iwdev: iwarp device | |
1276 | */ | |
1277 | static u32 i40iw_create_stag(struct i40iw_device *iwdev) | |
1278 | { | |
1279 | u32 stag = 0; | |
1280 | u32 stag_index = 0; | |
1281 | u32 next_stag_index; | |
1282 | u32 driver_key; | |
1283 | u32 random; | |
1284 | u8 consumer_key; | |
1285 | int ret; | |
1286 | ||
1287 | get_random_bytes(&random, sizeof(random)); | |
1288 | consumer_key = (u8)random; | |
1289 | ||
1290 | driver_key = random & ~iwdev->mr_stagmask; | |
1291 | next_stag_index = (random & iwdev->mr_stagmask) >> 8; | |
1292 | next_stag_index %= iwdev->max_mr; | |
1293 | ||
1294 | ret = i40iw_alloc_resource(iwdev, | |
1295 | iwdev->allocated_mrs, iwdev->max_mr, | |
1296 | &stag_index, &next_stag_index); | |
1297 | if (!ret) { | |
1298 | stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT; | |
1299 | stag |= driver_key; | |
1300 | stag += (u32)consumer_key; | |
1301 | } | |
1302 | return stag; | |
1303 | } | |
1304 | ||
1305 | /** | |
1306 | * i40iw_next_pbl_addr - Get next pbl address | |
1307 | * @palloc: Poiner to allocated pbles | |
1308 | * @pbl: pointer to a pble | |
1309 | * @pinfo: info pointer | |
1310 | * @idx: index | |
1311 | */ | |
1312 | static inline u64 *i40iw_next_pbl_addr(struct i40iw_pble_alloc *palloc, | |
1313 | u64 *pbl, | |
1314 | struct i40iw_pble_info **pinfo, | |
1315 | u32 *idx) | |
1316 | { | |
1317 | *idx += 1; | |
1318 | if ((!(*pinfo)) || (*idx != (*pinfo)->cnt)) | |
1319 | return ++pbl; | |
1320 | *idx = 0; | |
1321 | (*pinfo)++; | |
1322 | return (u64 *)(*pinfo)->addr; | |
1323 | } | |
1324 | ||
1325 | /** | |
1326 | * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally | |
1327 | * @iwmr: iwmr for IB's user page addresses | |
1328 | * @pbl: ple pointer to save 1 level or 0 level pble | |
1329 | * @level: indicated level 0, 1 or 2 | |
1330 | */ | |
1331 | static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr, | |
1332 | u64 *pbl, | |
1333 | enum i40iw_pble_level level) | |
1334 | { | |
1335 | struct ib_umem *region = iwmr->region; | |
1336 | struct i40iw_pbl *iwpbl = &iwmr->iwpbl; | |
1337 | int chunk_pages, entry, pg_shift, i; | |
1338 | struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc; | |
1339 | struct i40iw_pble_info *pinfo; | |
1340 | struct scatterlist *sg; | |
1341 | u32 idx = 0; | |
1342 | ||
1343 | pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf; | |
1344 | pg_shift = ffs(region->page_size) - 1; | |
1345 | for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) { | |
1346 | chunk_pages = sg_dma_len(sg) >> pg_shift; | |
1347 | if ((iwmr->type == IW_MEMREG_TYPE_QP) && | |
1348 | !iwpbl->qp_mr.sq_page) | |
1349 | iwpbl->qp_mr.sq_page = sg_page(sg); | |
1350 | for (i = 0; i < chunk_pages; i++) { | |
1351 | *pbl = cpu_to_le64(sg_dma_address(sg) + region->page_size * i); | |
1352 | pbl = i40iw_next_pbl_addr(palloc, pbl, &pinfo, &idx); | |
1353 | } | |
1354 | } | |
1355 | } | |
1356 | ||
1357 | /** | |
1358 | * i40iw_setup_pbles - copy user pg address to pble's | |
1359 | * @iwdev: iwarp device | |
1360 | * @iwmr: mr pointer for this memory registration | |
1361 | * @use_pbles: flag if to use pble's or memory (level 0) | |
1362 | */ | |
1363 | static int i40iw_setup_pbles(struct i40iw_device *iwdev, | |
1364 | struct i40iw_mr *iwmr, | |
1365 | bool use_pbles) | |
1366 | { | |
1367 | struct i40iw_pbl *iwpbl = &iwmr->iwpbl; | |
1368 | struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc; | |
1369 | struct i40iw_pble_info *pinfo; | |
1370 | u64 *pbl; | |
1371 | enum i40iw_status_code status; | |
1372 | enum i40iw_pble_level level = I40IW_LEVEL_1; | |
1373 | ||
1374 | if (!use_pbles && (iwmr->page_cnt > MAX_SAVE_PAGE_ADDRS)) | |
1375 | return -ENOMEM; | |
1376 | ||
1377 | if (use_pbles) { | |
1378 | mutex_lock(&iwdev->pbl_mutex); | |
1379 | status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt); | |
1380 | mutex_unlock(&iwdev->pbl_mutex); | |
1381 | if (status) | |
1382 | return -ENOMEM; | |
1383 | ||
1384 | iwpbl->pbl_allocated = true; | |
1385 | level = palloc->level; | |
1386 | pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf; | |
1387 | pbl = (u64 *)pinfo->addr; | |
1388 | } else { | |
1389 | pbl = iwmr->pgaddrmem; | |
1390 | } | |
1391 | ||
1392 | i40iw_copy_user_pgaddrs(iwmr, pbl, level); | |
1393 | return 0; | |
1394 | } | |
1395 | ||
1396 | /** | |
1397 | * i40iw_handle_q_mem - handle memory for qp and cq | |
1398 | * @iwdev: iwarp device | |
1399 | * @req: information for q memory management | |
1400 | * @iwpbl: pble struct | |
1401 | * @use_pbles: flag to use pble | |
1402 | */ | |
1403 | static int i40iw_handle_q_mem(struct i40iw_device *iwdev, | |
1404 | struct i40iw_mem_reg_req *req, | |
1405 | struct i40iw_pbl *iwpbl, | |
1406 | bool use_pbles) | |
1407 | { | |
1408 | struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc; | |
1409 | struct i40iw_mr *iwmr = iwpbl->iwmr; | |
1410 | struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr; | |
1411 | struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr; | |
1412 | struct i40iw_hmc_pble *hmc_p; | |
1413 | u64 *arr = iwmr->pgaddrmem; | |
1414 | int err; | |
1415 | int total; | |
1416 | ||
1417 | total = req->sq_pages + req->rq_pages + req->cq_pages; | |
1418 | ||
1419 | err = i40iw_setup_pbles(iwdev, iwmr, use_pbles); | |
1420 | if (err) | |
1421 | return err; | |
1422 | if (use_pbles && (palloc->level != I40IW_LEVEL_1)) { | |
1423 | i40iw_free_pble(iwdev->pble_rsrc, palloc); | |
1424 | iwpbl->pbl_allocated = false; | |
1425 | return -ENOMEM; | |
1426 | } | |
1427 | ||
1428 | if (use_pbles) | |
1429 | arr = (u64 *)palloc->level1.addr; | |
1430 | if (req->reg_type == IW_MEMREG_TYPE_QP) { | |
1431 | hmc_p = &qpmr->sq_pbl; | |
1432 | qpmr->shadow = (dma_addr_t)arr[total]; | |
1433 | if (use_pbles) { | |
1434 | hmc_p->idx = palloc->level1.idx; | |
1435 | hmc_p = &qpmr->rq_pbl; | |
1436 | hmc_p->idx = palloc->level1.idx + req->sq_pages; | |
1437 | } else { | |
1438 | hmc_p->addr = arr[0]; | |
1439 | hmc_p = &qpmr->rq_pbl; | |
1440 | hmc_p->addr = arr[1]; | |
1441 | } | |
1442 | } else { /* CQ */ | |
1443 | hmc_p = &cqmr->cq_pbl; | |
1444 | cqmr->shadow = (dma_addr_t)arr[total]; | |
1445 | if (use_pbles) | |
1446 | hmc_p->idx = palloc->level1.idx; | |
1447 | else | |
1448 | hmc_p->addr = arr[0]; | |
1449 | } | |
1450 | return err; | |
1451 | } | |
1452 | ||
b7aee855 IM |
1453 | /** |
1454 | * i40iw_hw_alloc_stag - cqp command to allocate stag | |
1455 | * @iwdev: iwarp device | |
1456 | * @iwmr: iwarp mr pointer | |
1457 | */ | |
1458 | static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr) | |
1459 | { | |
1460 | struct i40iw_allocate_stag_info *info; | |
1461 | struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd); | |
1462 | enum i40iw_status_code status; | |
1463 | int err = 0; | |
1464 | struct i40iw_cqp_request *cqp_request; | |
1465 | struct cqp_commands_info *cqp_info; | |
1466 | ||
1467 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true); | |
1468 | if (!cqp_request) | |
1469 | return -ENOMEM; | |
1470 | ||
1471 | cqp_info = &cqp_request->info; | |
1472 | info = &cqp_info->in.u.alloc_stag.info; | |
1473 | memset(info, 0, sizeof(*info)); | |
1474 | info->page_size = PAGE_SIZE; | |
1475 | info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT; | |
1476 | info->pd_id = iwpd->sc_pd.pd_id; | |
1477 | info->total_len = iwmr->length; | |
1478 | cqp_info->cqp_cmd = OP_ALLOC_STAG; | |
1479 | cqp_info->post_sq = 1; | |
1480 | cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev; | |
1481 | cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request; | |
1482 | ||
1483 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
1484 | if (status) { | |
1485 | err = -ENOMEM; | |
1486 | i40iw_pr_err("CQP-OP MR Reg fail"); | |
1487 | } | |
1488 | return err; | |
1489 | } | |
1490 | ||
1491 | /** | |
1492 | * i40iw_alloc_mr - register stag for fast memory registration | |
1493 | * @pd: ibpd pointer | |
1494 | * @mr_type: memory for stag registrion | |
1495 | * @max_num_sg: man number of pages | |
1496 | */ | |
1497 | static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd, | |
1498 | enum ib_mr_type mr_type, | |
1499 | u32 max_num_sg) | |
1500 | { | |
1501 | struct i40iw_pd *iwpd = to_iwpd(pd); | |
1502 | struct i40iw_device *iwdev = to_iwdev(pd->device); | |
1503 | struct i40iw_pble_alloc *palloc; | |
1504 | struct i40iw_pbl *iwpbl; | |
1505 | struct i40iw_mr *iwmr; | |
1506 | enum i40iw_status_code status; | |
1507 | u32 stag; | |
1508 | int err_code = -ENOMEM; | |
1509 | ||
1510 | iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL); | |
1511 | if (!iwmr) | |
1512 | return ERR_PTR(-ENOMEM); | |
1513 | ||
1514 | stag = i40iw_create_stag(iwdev); | |
1515 | if (!stag) { | |
1516 | err_code = -EOVERFLOW; | |
1517 | goto err; | |
1518 | } | |
1519 | iwmr->stag = stag; | |
1520 | iwmr->ibmr.rkey = stag; | |
1521 | iwmr->ibmr.lkey = stag; | |
1522 | iwmr->ibmr.pd = pd; | |
1523 | iwmr->ibmr.device = pd->device; | |
1524 | iwpbl = &iwmr->iwpbl; | |
1525 | iwpbl->iwmr = iwmr; | |
1526 | iwmr->type = IW_MEMREG_TYPE_MEM; | |
1527 | palloc = &iwpbl->pble_alloc; | |
1528 | iwmr->page_cnt = max_num_sg; | |
1529 | mutex_lock(&iwdev->pbl_mutex); | |
1530 | status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt); | |
1531 | mutex_unlock(&iwdev->pbl_mutex); | |
1532 | if (!status) | |
1533 | goto err1; | |
1534 | ||
1535 | if (palloc->level != I40IW_LEVEL_1) | |
1536 | goto err2; | |
1537 | err_code = i40iw_hw_alloc_stag(iwdev, iwmr); | |
1538 | if (err_code) | |
1539 | goto err2; | |
1540 | iwpbl->pbl_allocated = true; | |
1541 | i40iw_add_pdusecount(iwpd); | |
1542 | return &iwmr->ibmr; | |
1543 | err2: | |
1544 | i40iw_free_pble(iwdev->pble_rsrc, palloc); | |
1545 | err1: | |
1546 | i40iw_free_stag(iwdev, stag); | |
1547 | err: | |
1548 | kfree(iwmr); | |
1549 | return ERR_PTR(err_code); | |
1550 | } | |
1551 | ||
1552 | /** | |
1553 | * i40iw_set_page - populate pbl list for fmr | |
1554 | * @ibmr: ib mem to access iwarp mr pointer | |
1555 | * @addr: page dma address fro pbl list | |
1556 | */ | |
1557 | static int i40iw_set_page(struct ib_mr *ibmr, u64 addr) | |
1558 | { | |
1559 | struct i40iw_mr *iwmr = to_iwmr(ibmr); | |
1560 | struct i40iw_pbl *iwpbl = &iwmr->iwpbl; | |
1561 | struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc; | |
1562 | u64 *pbl; | |
1563 | ||
1564 | if (unlikely(iwmr->npages == iwmr->page_cnt)) | |
1565 | return -ENOMEM; | |
1566 | ||
1567 | pbl = (u64 *)palloc->level1.addr; | |
1568 | pbl[iwmr->npages++] = cpu_to_le64(addr); | |
1569 | return 0; | |
1570 | } | |
1571 | ||
1572 | /** | |
1573 | * i40iw_map_mr_sg - map of sg list for fmr | |
1574 | * @ibmr: ib mem to access iwarp mr pointer | |
1575 | * @sg: scatter gather list for fmr | |
1576 | * @sg_nents: number of sg pages | |
1577 | */ | |
1578 | static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents) | |
1579 | { | |
1580 | struct i40iw_mr *iwmr = to_iwmr(ibmr); | |
1581 | ||
1582 | iwmr->npages = 0; | |
1583 | return ib_sg_to_pages(ibmr, sg, sg_nents, i40iw_set_page); | |
1584 | } | |
1585 | ||
c2b75ef7 IM |
1586 | /** |
1587 | * i40iw_drain_sq - drain the send queue | |
1588 | * @ibqp: ib qp pointer | |
1589 | */ | |
1590 | static void i40iw_drain_sq(struct ib_qp *ibqp) | |
1591 | { | |
1592 | struct i40iw_qp *iwqp = to_iwqp(ibqp); | |
1593 | struct i40iw_sc_qp *qp = &iwqp->sc_qp; | |
1594 | ||
1595 | if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring)) | |
1596 | wait_for_completion(&iwqp->sq_drained); | |
1597 | } | |
1598 | ||
1599 | /** | |
1600 | * i40iw_drain_rq - drain the receive queue | |
1601 | * @ibqp: ib qp pointer | |
1602 | */ | |
1603 | static void i40iw_drain_rq(struct ib_qp *ibqp) | |
1604 | { | |
1605 | struct i40iw_qp *iwqp = to_iwqp(ibqp); | |
1606 | struct i40iw_sc_qp *qp = &iwqp->sc_qp; | |
1607 | ||
1608 | if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring)) | |
1609 | wait_for_completion(&iwqp->rq_drained); | |
1610 | } | |
1611 | ||
d3749841 FL |
1612 | /** |
1613 | * i40iw_hwreg_mr - send cqp command for memory registration | |
1614 | * @iwdev: iwarp device | |
1615 | * @iwmr: iwarp mr pointer | |
1616 | * @access: access for MR | |
1617 | */ | |
1618 | static int i40iw_hwreg_mr(struct i40iw_device *iwdev, | |
1619 | struct i40iw_mr *iwmr, | |
1620 | u16 access) | |
1621 | { | |
1622 | struct i40iw_pbl *iwpbl = &iwmr->iwpbl; | |
1623 | struct i40iw_reg_ns_stag_info *stag_info; | |
1624 | struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd); | |
1625 | struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc; | |
1626 | enum i40iw_status_code status; | |
1627 | int err = 0; | |
1628 | struct i40iw_cqp_request *cqp_request; | |
1629 | struct cqp_commands_info *cqp_info; | |
1630 | ||
1631 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true); | |
1632 | if (!cqp_request) | |
1633 | return -ENOMEM; | |
1634 | ||
1635 | cqp_info = &cqp_request->info; | |
1636 | stag_info = &cqp_info->in.u.mr_reg_non_shared.info; | |
1637 | memset(stag_info, 0, sizeof(*stag_info)); | |
1638 | stag_info->va = (void *)(unsigned long)iwpbl->user_base; | |
1639 | stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT; | |
1640 | stag_info->stag_key = (u8)iwmr->stag; | |
1641 | stag_info->total_len = iwmr->length; | |
1642 | stag_info->access_rights = access; | |
1643 | stag_info->pd_id = iwpd->sc_pd.pd_id; | |
1644 | stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED; | |
1645 | ||
1646 | if (iwmr->page_cnt > 1) { | |
1647 | if (palloc->level == I40IW_LEVEL_1) { | |
1648 | stag_info->first_pm_pbl_index = palloc->level1.idx; | |
1649 | stag_info->chunk_size = 1; | |
1650 | } else { | |
1651 | stag_info->first_pm_pbl_index = palloc->level2.root.idx; | |
1652 | stag_info->chunk_size = 3; | |
1653 | } | |
1654 | } else { | |
1655 | stag_info->reg_addr_pa = iwmr->pgaddrmem[0]; | |
1656 | } | |
1657 | ||
1658 | cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED; | |
1659 | cqp_info->post_sq = 1; | |
1660 | cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev; | |
1661 | cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request; | |
1662 | ||
1663 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
1664 | if (status) { | |
1665 | err = -ENOMEM; | |
1666 | i40iw_pr_err("CQP-OP MR Reg fail"); | |
1667 | } | |
1668 | return err; | |
1669 | } | |
1670 | ||
1671 | /** | |
1672 | * i40iw_reg_user_mr - Register a user memory region | |
1673 | * @pd: ptr of pd | |
1674 | * @start: virtual start address | |
1675 | * @length: length of mr | |
1676 | * @virt: virtual address | |
1677 | * @acc: access of mr | |
1678 | * @udata: user data | |
1679 | */ | |
1680 | static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd, | |
1681 | u64 start, | |
1682 | u64 length, | |
1683 | u64 virt, | |
1684 | int acc, | |
1685 | struct ib_udata *udata) | |
1686 | { | |
1687 | struct i40iw_pd *iwpd = to_iwpd(pd); | |
1688 | struct i40iw_device *iwdev = to_iwdev(pd->device); | |
1689 | struct i40iw_ucontext *ucontext; | |
1690 | struct i40iw_pble_alloc *palloc; | |
1691 | struct i40iw_pbl *iwpbl; | |
1692 | struct i40iw_mr *iwmr; | |
1693 | struct ib_umem *region; | |
1694 | struct i40iw_mem_reg_req req; | |
6b900365 | 1695 | u64 pbl_depth = 0; |
d3749841 FL |
1696 | u32 stag = 0; |
1697 | u16 access; | |
6b900365 | 1698 | u64 region_length; |
d3749841 FL |
1699 | bool use_pbles = false; |
1700 | unsigned long flags; | |
1701 | int err = -ENOSYS; | |
1702 | ||
6b900365 IM |
1703 | if (length > I40IW_MAX_MR_SIZE) |
1704 | return ERR_PTR(-EINVAL); | |
d3749841 FL |
1705 | region = ib_umem_get(pd->uobject->context, start, length, acc, 0); |
1706 | if (IS_ERR(region)) | |
1707 | return (struct ib_mr *)region; | |
1708 | ||
1709 | if (ib_copy_from_udata(&req, udata, sizeof(req))) { | |
1710 | ib_umem_release(region); | |
1711 | return ERR_PTR(-EFAULT); | |
1712 | } | |
1713 | ||
1714 | iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL); | |
1715 | if (!iwmr) { | |
1716 | ib_umem_release(region); | |
1717 | return ERR_PTR(-ENOMEM); | |
1718 | } | |
1719 | ||
1720 | iwpbl = &iwmr->iwpbl; | |
1721 | iwpbl->iwmr = iwmr; | |
1722 | iwmr->region = region; | |
1723 | iwmr->ibmr.pd = pd; | |
1724 | iwmr->ibmr.device = pd->device; | |
1725 | ucontext = to_ucontext(pd->uobject->context); | |
1726 | region_length = region->length + (start & 0xfff); | |
1727 | pbl_depth = region_length >> 12; | |
1728 | pbl_depth += (region_length & (4096 - 1)) ? 1 : 0; | |
1729 | iwmr->length = region->length; | |
1730 | ||
1731 | iwpbl->user_base = virt; | |
1732 | palloc = &iwpbl->pble_alloc; | |
1733 | ||
1734 | iwmr->type = req.reg_type; | |
6b900365 | 1735 | iwmr->page_cnt = (u32)pbl_depth; |
d3749841 FL |
1736 | |
1737 | switch (req.reg_type) { | |
1738 | case IW_MEMREG_TYPE_QP: | |
1739 | use_pbles = ((req.sq_pages + req.rq_pages) > 2); | |
1740 | err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles); | |
1741 | if (err) | |
1742 | goto error; | |
1743 | spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags); | |
1744 | list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list); | |
1745 | spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); | |
1746 | break; | |
1747 | case IW_MEMREG_TYPE_CQ: | |
1748 | use_pbles = (req.cq_pages > 1); | |
1749 | err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles); | |
1750 | if (err) | |
1751 | goto error; | |
1752 | ||
1753 | spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); | |
1754 | list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list); | |
1755 | spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); | |
1756 | break; | |
1757 | case IW_MEMREG_TYPE_MEM: | |
1758 | access = I40IW_ACCESS_FLAGS_LOCALREAD; | |
1759 | ||
1760 | use_pbles = (iwmr->page_cnt != 1); | |
1761 | err = i40iw_setup_pbles(iwdev, iwmr, use_pbles); | |
1762 | if (err) | |
1763 | goto error; | |
1764 | ||
1765 | access |= i40iw_get_user_access(acc); | |
1766 | stag = i40iw_create_stag(iwdev); | |
1767 | if (!stag) { | |
1768 | err = -ENOMEM; | |
1769 | goto error; | |
1770 | } | |
1771 | ||
1772 | iwmr->stag = stag; | |
1773 | iwmr->ibmr.rkey = stag; | |
1774 | iwmr->ibmr.lkey = stag; | |
1775 | ||
1776 | err = i40iw_hwreg_mr(iwdev, iwmr, access); | |
1777 | if (err) { | |
1778 | i40iw_free_stag(iwdev, stag); | |
1779 | goto error; | |
1780 | } | |
1781 | break; | |
1782 | default: | |
1783 | goto error; | |
1784 | } | |
1785 | ||
1786 | iwmr->type = req.reg_type; | |
1787 | if (req.reg_type == IW_MEMREG_TYPE_MEM) | |
1788 | i40iw_add_pdusecount(iwpd); | |
1789 | return &iwmr->ibmr; | |
1790 | ||
1791 | error: | |
1792 | if (palloc->level != I40IW_LEVEL_0) | |
1793 | i40iw_free_pble(iwdev->pble_rsrc, palloc); | |
1794 | ib_umem_release(region); | |
1795 | kfree(iwmr); | |
1796 | return ERR_PTR(err); | |
1797 | } | |
1798 | ||
1799 | /** | |
1800 | * i40iw_reg_phys_mr - register kernel physical memory | |
1801 | * @pd: ibpd pointer | |
1802 | * @addr: physical address of memory to register | |
1803 | * @size: size of memory to register | |
1804 | * @acc: Access rights | |
1805 | * @iova_start: start of virtual address for physical buffers | |
1806 | */ | |
1807 | struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd, | |
1808 | u64 addr, | |
1809 | u64 size, | |
1810 | int acc, | |
1811 | u64 *iova_start) | |
1812 | { | |
1813 | struct i40iw_pd *iwpd = to_iwpd(pd); | |
1814 | struct i40iw_device *iwdev = to_iwdev(pd->device); | |
1815 | struct i40iw_pbl *iwpbl; | |
1816 | struct i40iw_mr *iwmr; | |
1817 | enum i40iw_status_code status; | |
1818 | u32 stag; | |
1819 | u16 access = I40IW_ACCESS_FLAGS_LOCALREAD; | |
1820 | int ret; | |
1821 | ||
1822 | iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL); | |
1823 | if (!iwmr) | |
1824 | return ERR_PTR(-ENOMEM); | |
1825 | iwmr->ibmr.pd = pd; | |
1826 | iwmr->ibmr.device = pd->device; | |
1827 | iwpbl = &iwmr->iwpbl; | |
1828 | iwpbl->iwmr = iwmr; | |
1829 | iwmr->type = IW_MEMREG_TYPE_MEM; | |
1830 | iwpbl->user_base = *iova_start; | |
1831 | stag = i40iw_create_stag(iwdev); | |
1832 | if (!stag) { | |
1833 | ret = -EOVERFLOW; | |
1834 | goto err; | |
1835 | } | |
1836 | access |= i40iw_get_user_access(acc); | |
1837 | iwmr->stag = stag; | |
1838 | iwmr->ibmr.rkey = stag; | |
1839 | iwmr->ibmr.lkey = stag; | |
1840 | iwmr->page_cnt = 1; | |
1841 | iwmr->pgaddrmem[0] = addr; | |
1842 | status = i40iw_hwreg_mr(iwdev, iwmr, access); | |
1843 | if (status) { | |
1844 | i40iw_free_stag(iwdev, stag); | |
1845 | ret = -ENOMEM; | |
1846 | goto err; | |
1847 | } | |
1848 | ||
1849 | i40iw_add_pdusecount(iwpd); | |
1850 | return &iwmr->ibmr; | |
1851 | err: | |
1852 | kfree(iwmr); | |
1853 | return ERR_PTR(ret); | |
1854 | } | |
1855 | ||
1856 | /** | |
1857 | * i40iw_get_dma_mr - register physical mem | |
1858 | * @pd: ptr of pd | |
1859 | * @acc: access for memory | |
1860 | */ | |
1861 | static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc) | |
1862 | { | |
1863 | u64 kva = 0; | |
1864 | ||
1865 | return i40iw_reg_phys_mr(pd, 0, 0xffffffffffULL, acc, &kva); | |
1866 | } | |
1867 | ||
1868 | /** | |
1869 | * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP | |
1870 | * @iwmr: iwmr for IB's user page addresses | |
1871 | * @ucontext: ptr to user context | |
1872 | */ | |
1873 | static void i40iw_del_memlist(struct i40iw_mr *iwmr, | |
1874 | struct i40iw_ucontext *ucontext) | |
1875 | { | |
1876 | struct i40iw_pbl *iwpbl = &iwmr->iwpbl; | |
1877 | unsigned long flags; | |
1878 | ||
1879 | switch (iwmr->type) { | |
1880 | case IW_MEMREG_TYPE_CQ: | |
1881 | spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); | |
1882 | if (!list_empty(&ucontext->cq_reg_mem_list)) | |
1883 | list_del(&iwpbl->list); | |
1884 | spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); | |
1885 | break; | |
1886 | case IW_MEMREG_TYPE_QP: | |
1887 | spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags); | |
1888 | if (!list_empty(&ucontext->qp_reg_mem_list)) | |
1889 | list_del(&iwpbl->list); | |
1890 | spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); | |
1891 | break; | |
1892 | default: | |
1893 | break; | |
1894 | } | |
1895 | } | |
1896 | ||
1897 | /** | |
1898 | * i40iw_dereg_mr - deregister mr | |
1899 | * @ib_mr: mr ptr for dereg | |
1900 | */ | |
1901 | static int i40iw_dereg_mr(struct ib_mr *ib_mr) | |
1902 | { | |
1903 | struct ib_pd *ibpd = ib_mr->pd; | |
1904 | struct i40iw_pd *iwpd = to_iwpd(ibpd); | |
1905 | struct i40iw_mr *iwmr = to_iwmr(ib_mr); | |
1906 | struct i40iw_device *iwdev = to_iwdev(ib_mr->device); | |
1907 | enum i40iw_status_code status; | |
1908 | struct i40iw_dealloc_stag_info *info; | |
1909 | struct i40iw_pbl *iwpbl = &iwmr->iwpbl; | |
1910 | struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc; | |
1911 | struct i40iw_cqp_request *cqp_request; | |
1912 | struct cqp_commands_info *cqp_info; | |
1913 | u32 stag_idx; | |
1914 | ||
1915 | if (iwmr->region) | |
1916 | ib_umem_release(iwmr->region); | |
1917 | ||
1918 | if (iwmr->type != IW_MEMREG_TYPE_MEM) { | |
1919 | if (ibpd->uobject) { | |
1920 | struct i40iw_ucontext *ucontext; | |
1921 | ||
1922 | ucontext = to_ucontext(ibpd->uobject->context); | |
1923 | i40iw_del_memlist(iwmr, ucontext); | |
1924 | } | |
1925 | if (iwpbl->pbl_allocated) | |
1926 | i40iw_free_pble(iwdev->pble_rsrc, palloc); | |
1927 | kfree(iwpbl->iwmr); | |
1928 | iwpbl->iwmr = NULL; | |
1929 | return 0; | |
1930 | } | |
1931 | ||
1932 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true); | |
1933 | if (!cqp_request) | |
1934 | return -ENOMEM; | |
1935 | ||
1936 | cqp_info = &cqp_request->info; | |
1937 | info = &cqp_info->in.u.dealloc_stag.info; | |
1938 | memset(info, 0, sizeof(*info)); | |
1939 | ||
1940 | info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff); | |
1941 | info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT); | |
1942 | stag_idx = info->stag_idx; | |
1943 | info->mr = true; | |
1944 | if (iwpbl->pbl_allocated) | |
1945 | info->dealloc_pbl = true; | |
1946 | ||
1947 | cqp_info->cqp_cmd = OP_DEALLOC_STAG; | |
1948 | cqp_info->post_sq = 1; | |
1949 | cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev; | |
1950 | cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request; | |
1951 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
1952 | if (status) | |
1953 | i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx); | |
1954 | i40iw_rem_pdusecount(iwpd, iwdev); | |
1955 | i40iw_free_stag(iwdev, iwmr->stag); | |
1956 | if (iwpbl->pbl_allocated) | |
1957 | i40iw_free_pble(iwdev->pble_rsrc, palloc); | |
1958 | kfree(iwmr); | |
1959 | return 0; | |
1960 | } | |
1961 | ||
1962 | /** | |
1963 | * i40iw_show_rev | |
1964 | */ | |
1965 | static ssize_t i40iw_show_rev(struct device *dev, | |
1966 | struct device_attribute *attr, char *buf) | |
1967 | { | |
1968 | struct i40iw_ib_device *iwibdev = container_of(dev, | |
1969 | struct i40iw_ib_device, | |
1970 | ibdev.dev); | |
1971 | u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev; | |
1972 | ||
1973 | return sprintf(buf, "%x\n", hw_rev); | |
1974 | } | |
1975 | ||
1976 | /** | |
1977 | * i40iw_show_fw_ver | |
1978 | */ | |
1979 | static ssize_t i40iw_show_fw_ver(struct device *dev, | |
1980 | struct device_attribute *attr, char *buf) | |
1981 | { | |
1982 | u32 firmware_version = I40IW_FW_VERSION; | |
1983 | ||
1984 | return sprintf(buf, "%u.%u\n", firmware_version, | |
1985 | (firmware_version & 0x000000ff)); | |
1986 | } | |
1987 | ||
1988 | /** | |
1989 | * i40iw_show_hca | |
1990 | */ | |
1991 | static ssize_t i40iw_show_hca(struct device *dev, | |
1992 | struct device_attribute *attr, char *buf) | |
1993 | { | |
1994 | return sprintf(buf, "I40IW\n"); | |
1995 | } | |
1996 | ||
1997 | /** | |
1998 | * i40iw_show_board | |
1999 | */ | |
2000 | static ssize_t i40iw_show_board(struct device *dev, | |
2001 | struct device_attribute *attr, | |
2002 | char *buf) | |
2003 | { | |
2004 | return sprintf(buf, "%.*s\n", 32, "I40IW Board ID"); | |
2005 | } | |
2006 | ||
2007 | static DEVICE_ATTR(hw_rev, S_IRUGO, i40iw_show_rev, NULL); | |
2008 | static DEVICE_ATTR(fw_ver, S_IRUGO, i40iw_show_fw_ver, NULL); | |
2009 | static DEVICE_ATTR(hca_type, S_IRUGO, i40iw_show_hca, NULL); | |
2010 | static DEVICE_ATTR(board_id, S_IRUGO, i40iw_show_board, NULL); | |
2011 | ||
2012 | static struct device_attribute *i40iw_dev_attributes[] = { | |
2013 | &dev_attr_hw_rev, | |
2014 | &dev_attr_fw_ver, | |
2015 | &dev_attr_hca_type, | |
2016 | &dev_attr_board_id | |
2017 | }; | |
2018 | ||
2019 | /** | |
2020 | * i40iw_copy_sg_list - copy sg list for qp | |
2021 | * @sg_list: copied into sg_list | |
2022 | * @sgl: copy from sgl | |
2023 | * @num_sges: count of sg entries | |
2024 | */ | |
2025 | static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges) | |
2026 | { | |
2027 | unsigned int i; | |
2028 | ||
2029 | for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) { | |
2030 | sg_list[i].tag_off = sgl[i].addr; | |
2031 | sg_list[i].len = sgl[i].length; | |
2032 | sg_list[i].stag = sgl[i].lkey; | |
2033 | } | |
2034 | } | |
2035 | ||
2036 | /** | |
2037 | * i40iw_post_send - kernel application wr | |
2038 | * @ibqp: qp ptr for wr | |
2039 | * @ib_wr: work request ptr | |
2040 | * @bad_wr: return of bad wr if err | |
2041 | */ | |
2042 | static int i40iw_post_send(struct ib_qp *ibqp, | |
2043 | struct ib_send_wr *ib_wr, | |
2044 | struct ib_send_wr **bad_wr) | |
2045 | { | |
2046 | struct i40iw_qp *iwqp; | |
2047 | struct i40iw_qp_uk *ukqp; | |
2048 | struct i40iw_post_sq_info info; | |
2049 | enum i40iw_status_code ret; | |
2050 | int err = 0; | |
2051 | unsigned long flags; | |
b7aee855 | 2052 | bool inv_stag; |
d3749841 FL |
2053 | |
2054 | iwqp = (struct i40iw_qp *)ibqp; | |
2055 | ukqp = &iwqp->sc_qp.qp_uk; | |
2056 | ||
2057 | spin_lock_irqsave(&iwqp->lock, flags); | |
2058 | while (ib_wr) { | |
b7aee855 | 2059 | inv_stag = false; |
d3749841 FL |
2060 | memset(&info, 0, sizeof(info)); |
2061 | info.wr_id = (u64)(ib_wr->wr_id); | |
2062 | if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all) | |
2063 | info.signaled = true; | |
2064 | if (ib_wr->send_flags & IB_SEND_FENCE) | |
2065 | info.read_fence = true; | |
2066 | ||
2067 | switch (ib_wr->opcode) { | |
2068 | case IB_WR_SEND: | |
b7aee855 IM |
2069 | /* fall-through */ |
2070 | case IB_WR_SEND_WITH_INV: | |
2071 | if (ib_wr->opcode == IB_WR_SEND) { | |
2072 | if (ib_wr->send_flags & IB_SEND_SOLICITED) | |
2073 | info.op_type = I40IW_OP_TYPE_SEND_SOL; | |
2074 | else | |
2075 | info.op_type = I40IW_OP_TYPE_SEND; | |
2076 | } else { | |
2077 | if (ib_wr->send_flags & IB_SEND_SOLICITED) | |
2078 | info.op_type = I40IW_OP_TYPE_SEND_SOL_INV; | |
2079 | else | |
2080 | info.op_type = I40IW_OP_TYPE_SEND_INV; | |
2081 | } | |
d3749841 FL |
2082 | |
2083 | if (ib_wr->send_flags & IB_SEND_INLINE) { | |
2084 | info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr; | |
2085 | info.op.inline_send.len = ib_wr->sg_list[0].length; | |
b7aee855 | 2086 | ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false); |
d3749841 FL |
2087 | } else { |
2088 | info.op.send.num_sges = ib_wr->num_sge; | |
2089 | info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list; | |
b7aee855 | 2090 | ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false); |
d3749841 FL |
2091 | } |
2092 | ||
2093 | if (ret) | |
2094 | err = -EIO; | |
2095 | break; | |
2096 | case IB_WR_RDMA_WRITE: | |
2097 | info.op_type = I40IW_OP_TYPE_RDMA_WRITE; | |
2098 | ||
2099 | if (ib_wr->send_flags & IB_SEND_INLINE) { | |
2100 | info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr; | |
2101 | info.op.inline_rdma_write.len = ib_wr->sg_list[0].length; | |
2102 | info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr; | |
2103 | info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey; | |
2104 | info.op.inline_rdma_write.rem_addr.len = ib_wr->sg_list->length; | |
2105 | ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false); | |
2106 | } else { | |
2107 | info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list; | |
2108 | info.op.rdma_write.num_lo_sges = ib_wr->num_sge; | |
2109 | info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr; | |
2110 | info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey; | |
2111 | info.op.rdma_write.rem_addr.len = ib_wr->sg_list->length; | |
2112 | ret = ukqp->ops.iw_rdma_write(ukqp, &info, false); | |
2113 | } | |
2114 | ||
2115 | if (ret) | |
2116 | err = -EIO; | |
2117 | break; | |
b7aee855 IM |
2118 | case IB_WR_RDMA_READ_WITH_INV: |
2119 | inv_stag = true; | |
2120 | /* fall-through*/ | |
d3749841 FL |
2121 | case IB_WR_RDMA_READ: |
2122 | info.op_type = I40IW_OP_TYPE_RDMA_READ; | |
2123 | info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr; | |
2124 | info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey; | |
2125 | info.op.rdma_read.rem_addr.len = ib_wr->sg_list->length; | |
2126 | info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr; | |
2127 | info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey; | |
2128 | info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length; | |
b7aee855 | 2129 | ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false); |
d3749841 FL |
2130 | if (ret) |
2131 | err = -EIO; | |
2132 | break; | |
b7aee855 IM |
2133 | case IB_WR_LOCAL_INV: |
2134 | info.op_type = I40IW_OP_TYPE_INV_STAG; | |
2135 | info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey; | |
2136 | ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true); | |
2137 | if (ret) | |
2138 | err = -EIO; | |
2139 | break; | |
2140 | case IB_WR_REG_MR: | |
2141 | { | |
2142 | struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr); | |
2143 | int page_shift = ilog2(reg_wr(ib_wr)->mr->page_size); | |
2144 | int flags = reg_wr(ib_wr)->access; | |
2145 | struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc; | |
2146 | struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev; | |
2147 | struct i40iw_fast_reg_stag_info info; | |
2148 | ||
2149 | info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD; | |
2150 | info.access_rights |= i40iw_get_user_access(flags); | |
2151 | info.stag_key = reg_wr(ib_wr)->key & 0xff; | |
2152 | info.stag_idx = reg_wr(ib_wr)->key >> 8; | |
2153 | info.wr_id = ib_wr->wr_id; | |
2154 | ||
2155 | info.addr_type = I40IW_ADDR_TYPE_VA_BASED; | |
2156 | info.va = (void *)(uintptr_t)iwmr->ibmr.iova; | |
2157 | info.total_len = iwmr->ibmr.length; | |
2158 | info.first_pm_pbl_index = palloc->level1.idx; | |
2159 | info.local_fence = ib_wr->send_flags & IB_SEND_FENCE; | |
2160 | info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED; | |
2161 | ||
2162 | if (page_shift == 21) | |
2163 | info.page_size = 1; /* 2M page */ | |
2164 | ||
2165 | ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true); | |
2166 | if (ret) | |
2167 | err = -EIO; | |
2168 | break; | |
2169 | } | |
d3749841 FL |
2170 | default: |
2171 | err = -EINVAL; | |
2172 | i40iw_pr_err(" upost_send bad opcode = 0x%x\n", | |
2173 | ib_wr->opcode); | |
2174 | break; | |
2175 | } | |
2176 | ||
2177 | if (err) | |
2178 | break; | |
2179 | ib_wr = ib_wr->next; | |
2180 | } | |
2181 | ||
2182 | if (err) | |
2183 | *bad_wr = ib_wr; | |
2184 | else | |
2185 | ukqp->ops.iw_qp_post_wr(ukqp); | |
2186 | spin_unlock_irqrestore(&iwqp->lock, flags); | |
2187 | ||
2188 | return err; | |
2189 | } | |
2190 | ||
2191 | /** | |
2192 | * i40iw_post_recv - post receive wr for kernel application | |
2193 | * @ibqp: ib qp pointer | |
2194 | * @ib_wr: work request for receive | |
2195 | * @bad_wr: bad wr caused an error | |
2196 | */ | |
2197 | static int i40iw_post_recv(struct ib_qp *ibqp, | |
2198 | struct ib_recv_wr *ib_wr, | |
2199 | struct ib_recv_wr **bad_wr) | |
2200 | { | |
2201 | struct i40iw_qp *iwqp; | |
2202 | struct i40iw_qp_uk *ukqp; | |
2203 | struct i40iw_post_rq_info post_recv; | |
2204 | struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT]; | |
2205 | enum i40iw_status_code ret = 0; | |
2206 | unsigned long flags; | |
2207 | ||
2208 | iwqp = (struct i40iw_qp *)ibqp; | |
2209 | ukqp = &iwqp->sc_qp.qp_uk; | |
2210 | ||
2211 | memset(&post_recv, 0, sizeof(post_recv)); | |
2212 | spin_lock_irqsave(&iwqp->lock, flags); | |
2213 | while (ib_wr) { | |
2214 | post_recv.num_sges = ib_wr->num_sge; | |
2215 | post_recv.wr_id = ib_wr->wr_id; | |
2216 | i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge); | |
2217 | post_recv.sg_list = sg_list; | |
2218 | ret = ukqp->ops.iw_post_receive(ukqp, &post_recv); | |
2219 | if (ret) { | |
2220 | i40iw_pr_err(" post_recv err %d\n", ret); | |
2221 | *bad_wr = ib_wr; | |
2222 | goto out; | |
2223 | } | |
2224 | ib_wr = ib_wr->next; | |
2225 | } | |
2226 | out: | |
2227 | spin_unlock_irqrestore(&iwqp->lock, flags); | |
2228 | if (ret) | |
2229 | return -ENOSYS; | |
2230 | return 0; | |
2231 | } | |
2232 | ||
2233 | /** | |
2234 | * i40iw_poll_cq - poll cq for completion (kernel apps) | |
2235 | * @ibcq: cq to poll | |
2236 | * @num_entries: number of entries to poll | |
2237 | * @entry: wr of entry completed | |
2238 | */ | |
2239 | static int i40iw_poll_cq(struct ib_cq *ibcq, | |
2240 | int num_entries, | |
2241 | struct ib_wc *entry) | |
2242 | { | |
2243 | struct i40iw_cq *iwcq; | |
2244 | int cqe_count = 0; | |
2245 | struct i40iw_cq_poll_info cq_poll_info; | |
2246 | enum i40iw_status_code ret; | |
2247 | struct i40iw_cq_uk *ukcq; | |
2248 | struct i40iw_sc_qp *qp; | |
c2b75ef7 | 2249 | struct i40iw_qp *iwqp; |
d3749841 FL |
2250 | unsigned long flags; |
2251 | ||
2252 | iwcq = (struct i40iw_cq *)ibcq; | |
2253 | ukcq = &iwcq->sc_cq.cq_uk; | |
2254 | ||
2255 | spin_lock_irqsave(&iwcq->lock, flags); | |
2256 | while (cqe_count < num_entries) { | |
2257 | ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info, true); | |
2258 | if (ret == I40IW_ERR_QUEUE_EMPTY) { | |
2259 | break; | |
2260 | } else if (ret) { | |
2261 | if (!cqe_count) | |
2262 | cqe_count = -1; | |
2263 | break; | |
2264 | } | |
2265 | entry->wc_flags = 0; | |
2266 | entry->wr_id = cq_poll_info.wr_id; | |
df35630a | 2267 | if (cq_poll_info.error) { |
d3749841 | 2268 | entry->status = IB_WC_WR_FLUSH_ERR; |
df35630a IM |
2269 | entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err; |
2270 | } else { | |
2271 | entry->status = IB_WC_SUCCESS; | |
2272 | } | |
d3749841 FL |
2273 | |
2274 | switch (cq_poll_info.op_type) { | |
2275 | case I40IW_OP_TYPE_RDMA_WRITE: | |
2276 | entry->opcode = IB_WC_RDMA_WRITE; | |
2277 | break; | |
2278 | case I40IW_OP_TYPE_RDMA_READ_INV_STAG: | |
2279 | case I40IW_OP_TYPE_RDMA_READ: | |
2280 | entry->opcode = IB_WC_RDMA_READ; | |
2281 | break; | |
2282 | case I40IW_OP_TYPE_SEND_SOL: | |
2283 | case I40IW_OP_TYPE_SEND_SOL_INV: | |
2284 | case I40IW_OP_TYPE_SEND_INV: | |
2285 | case I40IW_OP_TYPE_SEND: | |
2286 | entry->opcode = IB_WC_SEND; | |
2287 | break; | |
2288 | case I40IW_OP_TYPE_REC: | |
2289 | entry->opcode = IB_WC_RECV; | |
2290 | break; | |
2291 | default: | |
2292 | entry->opcode = IB_WC_RECV; | |
2293 | break; | |
2294 | } | |
2295 | ||
d3749841 FL |
2296 | entry->ex.imm_data = 0; |
2297 | qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle; | |
2298 | entry->qp = (struct ib_qp *)qp->back_qp; | |
2299 | entry->src_qp = cq_poll_info.qp_id; | |
c2b75ef7 IM |
2300 | iwqp = (struct i40iw_qp *)qp->back_qp; |
2301 | if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) { | |
2302 | if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring)) | |
2303 | complete(&iwqp->sq_drained); | |
2304 | if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring)) | |
2305 | complete(&iwqp->rq_drained); | |
2306 | } | |
d3749841 FL |
2307 | entry->byte_len = cq_poll_info.bytes_xfered; |
2308 | entry++; | |
2309 | cqe_count++; | |
2310 | } | |
2311 | spin_unlock_irqrestore(&iwcq->lock, flags); | |
2312 | return cqe_count; | |
2313 | } | |
2314 | ||
2315 | /** | |
2316 | * i40iw_req_notify_cq - arm cq kernel application | |
2317 | * @ibcq: cq to arm | |
2318 | * @notify_flags: notofication flags | |
2319 | */ | |
2320 | static int i40iw_req_notify_cq(struct ib_cq *ibcq, | |
2321 | enum ib_cq_notify_flags notify_flags) | |
2322 | { | |
2323 | struct i40iw_cq *iwcq; | |
2324 | struct i40iw_cq_uk *ukcq; | |
2325 | enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_SOLICITED; | |
2326 | ||
2327 | iwcq = (struct i40iw_cq *)ibcq; | |
2328 | ukcq = &iwcq->sc_cq.cq_uk; | |
2329 | if (notify_flags == IB_CQ_NEXT_COMP) | |
2330 | cq_notify = IW_CQ_COMPL_EVENT; | |
2331 | ukcq->ops.iw_cq_request_notification(ukcq, cq_notify); | |
2332 | return 0; | |
2333 | } | |
2334 | ||
2335 | /** | |
2336 | * i40iw_port_immutable - return port's immutable data | |
2337 | * @ibdev: ib dev struct | |
2338 | * @port_num: port number | |
2339 | * @immutable: immutable data for the port return | |
2340 | */ | |
2341 | static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num, | |
2342 | struct ib_port_immutable *immutable) | |
2343 | { | |
2344 | struct ib_port_attr attr; | |
2345 | int err; | |
2346 | ||
2347 | err = i40iw_query_port(ibdev, port_num, &attr); | |
2348 | ||
2349 | if (err) | |
2350 | return err; | |
2351 | ||
2352 | immutable->pkey_tbl_len = attr.pkey_tbl_len; | |
2353 | immutable->gid_tbl_len = attr.gid_tbl_len; | |
2354 | immutable->core_cap_flags = RDMA_CORE_PORT_IWARP; | |
2355 | ||
2356 | return 0; | |
2357 | } | |
2358 | ||
2359 | /** | |
2360 | * i40iw_get_protocol_stats - Populates the rdma_stats structure | |
2361 | * @ibdev: ib dev struct | |
2362 | * @stats: iw protocol stats struct | |
2363 | */ | |
2364 | static int i40iw_get_protocol_stats(struct ib_device *ibdev, | |
2365 | union rdma_protocol_stats *stats) | |
2366 | { | |
2367 | struct i40iw_device *iwdev = to_iwdev(ibdev); | |
2368 | struct i40iw_sc_dev *dev = &iwdev->sc_dev; | |
2369 | struct i40iw_dev_pestat *devstat = &dev->dev_pestat; | |
2370 | struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats; | |
2371 | struct timespec curr_time; | |
2372 | static struct timespec last_rd_time = {0, 0}; | |
d3749841 FL |
2373 | unsigned long flags; |
2374 | ||
2375 | curr_time = current_kernel_time(); | |
2376 | memset(stats, 0, sizeof(*stats)); | |
2377 | ||
2378 | if (dev->is_pf) { | |
2379 | spin_lock_irqsave(&devstat->stats_lock, flags); | |
2380 | devstat->ops.iw_hw_stat_read_all(devstat, | |
2381 | &devstat->hw_stats); | |
2382 | spin_unlock_irqrestore(&devstat->stats_lock, flags); | |
2383 | } else { | |
2384 | if (((u64)curr_time.tv_sec - (u64)last_rd_time.tv_sec) > 1) | |
f69c3331 IM |
2385 | if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats)) |
2386 | return -ENOSYS; | |
d3749841 FL |
2387 | } |
2388 | ||
2389 | stats->iw.ipInReceives = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4RXPKTS] + | |
2390 | hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6RXPKTS]; | |
2391 | stats->iw.ipInTruncatedPkts = hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP4RXTRUNC] + | |
2392 | hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP6RXTRUNC]; | |
2393 | stats->iw.ipInDiscards = hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP4RXDISCARD] + | |
2394 | hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP6RXDISCARD]; | |
2395 | stats->iw.ipOutNoRoutes = hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP4TXNOROUTE] + | |
2396 | hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP6TXNOROUTE]; | |
2397 | stats->iw.ipReasmReqds = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4RXFRAGS] + | |
2398 | hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6RXFRAGS]; | |
2399 | stats->iw.ipFragCreates = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4TXFRAGS] + | |
2400 | hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6TXFRAGS]; | |
2401 | stats->iw.ipInMcastPkts = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4RXMCPKTS] + | |
2402 | hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6RXMCPKTS]; | |
2403 | stats->iw.ipOutMcastPkts = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4TXMCPKTS] + | |
2404 | hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6TXMCPKTS]; | |
2405 | stats->iw.tcpOutSegs = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_TCPTXSEG]; | |
2406 | stats->iw.tcpInSegs = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_TCPRXSEGS]; | |
2407 | stats->iw.tcpRetransSegs = hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_TCPRTXSEG]; | |
2408 | ||
2409 | last_rd_time = curr_time; | |
2410 | return 0; | |
2411 | } | |
2412 | ||
2413 | /** | |
2414 | * i40iw_query_gid - Query port GID | |
2415 | * @ibdev: device pointer from stack | |
2416 | * @port: port number | |
2417 | * @index: Entry index | |
2418 | * @gid: Global ID | |
2419 | */ | |
2420 | static int i40iw_query_gid(struct ib_device *ibdev, | |
2421 | u8 port, | |
2422 | int index, | |
2423 | union ib_gid *gid) | |
2424 | { | |
2425 | struct i40iw_device *iwdev = to_iwdev(ibdev); | |
2426 | ||
2427 | memset(gid->raw, 0, sizeof(gid->raw)); | |
2428 | ether_addr_copy(gid->raw, iwdev->netdev->dev_addr); | |
2429 | return 0; | |
2430 | } | |
2431 | ||
2432 | /** | |
2433 | * i40iw_modify_port Modify port properties | |
2434 | * @ibdev: device pointer from stack | |
2435 | * @port: port number | |
2436 | * @port_modify_mask: mask for port modifications | |
2437 | * @props: port properties | |
2438 | */ | |
2439 | static int i40iw_modify_port(struct ib_device *ibdev, | |
2440 | u8 port, | |
2441 | int port_modify_mask, | |
2442 | struct ib_port_modify *props) | |
2443 | { | |
2444 | return 0; | |
2445 | } | |
2446 | ||
2447 | /** | |
2448 | * i40iw_query_pkey - Query partition key | |
2449 | * @ibdev: device pointer from stack | |
2450 | * @port: port number | |
2451 | * @index: index of pkey | |
2452 | * @pkey: pointer to store the pkey | |
2453 | */ | |
2454 | static int i40iw_query_pkey(struct ib_device *ibdev, | |
2455 | u8 port, | |
2456 | u16 index, | |
2457 | u16 *pkey) | |
2458 | { | |
2459 | *pkey = 0; | |
2460 | return 0; | |
2461 | } | |
2462 | ||
2463 | /** | |
2464 | * i40iw_create_ah - create address handle | |
2465 | * @ibpd: ptr of pd | |
2466 | * @ah_attr: address handle attributes | |
2467 | */ | |
2468 | static struct ib_ah *i40iw_create_ah(struct ib_pd *ibpd, | |
2469 | struct ib_ah_attr *attr) | |
2470 | { | |
2471 | return ERR_PTR(-ENOSYS); | |
2472 | } | |
2473 | ||
2474 | /** | |
2475 | * i40iw_destroy_ah - Destroy address handle | |
2476 | * @ah: pointer to address handle | |
2477 | */ | |
2478 | static int i40iw_destroy_ah(struct ib_ah *ah) | |
2479 | { | |
2480 | return -ENOSYS; | |
2481 | } | |
2482 | ||
2483 | /** | |
2484 | * i40iw_init_rdma_device - initialization of iwarp device | |
2485 | * @iwdev: iwarp device | |
2486 | */ | |
2487 | static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev) | |
2488 | { | |
2489 | struct i40iw_ib_device *iwibdev; | |
2490 | struct net_device *netdev = iwdev->netdev; | |
2491 | struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context; | |
2492 | ||
2493 | iwibdev = (struct i40iw_ib_device *)ib_alloc_device(sizeof(*iwibdev)); | |
2494 | if (!iwibdev) { | |
2495 | i40iw_pr_err("iwdev == NULL\n"); | |
2496 | return NULL; | |
2497 | } | |
2498 | strlcpy(iwibdev->ibdev.name, "i40iw%d", IB_DEVICE_NAME_MAX); | |
2499 | iwibdev->ibdev.owner = THIS_MODULE; | |
2500 | iwdev->iwibdev = iwibdev; | |
2501 | iwibdev->iwdev = iwdev; | |
2502 | ||
2503 | iwibdev->ibdev.node_type = RDMA_NODE_RNIC; | |
2504 | ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr); | |
2505 | ||
2506 | iwibdev->ibdev.uverbs_cmd_mask = | |
2507 | (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | | |
2508 | (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | | |
2509 | (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | | |
2510 | (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | | |
2511 | (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | | |
2512 | (1ull << IB_USER_VERBS_CMD_REG_MR) | | |
2513 | (1ull << IB_USER_VERBS_CMD_DEREG_MR) | | |
2514 | (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | | |
2515 | (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | | |
2516 | (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | | |
2517 | (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) | | |
2518 | (1ull << IB_USER_VERBS_CMD_CREATE_QP) | | |
2519 | (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | | |
2520 | (1ull << IB_USER_VERBS_CMD_QUERY_QP) | | |
2521 | (1ull << IB_USER_VERBS_CMD_POLL_CQ) | | |
2522 | (1ull << IB_USER_VERBS_CMD_CREATE_AH) | | |
2523 | (1ull << IB_USER_VERBS_CMD_DESTROY_AH) | | |
2524 | (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | | |
2525 | (1ull << IB_USER_VERBS_CMD_POST_RECV) | | |
2526 | (1ull << IB_USER_VERBS_CMD_POST_SEND); | |
2527 | iwibdev->ibdev.phys_port_cnt = 1; | |
2528 | iwibdev->ibdev.num_comp_vectors = 1; | |
2529 | iwibdev->ibdev.dma_device = &pcidev->dev; | |
2530 | iwibdev->ibdev.dev.parent = &pcidev->dev; | |
2531 | iwibdev->ibdev.query_port = i40iw_query_port; | |
2532 | iwibdev->ibdev.modify_port = i40iw_modify_port; | |
2533 | iwibdev->ibdev.query_pkey = i40iw_query_pkey; | |
2534 | iwibdev->ibdev.query_gid = i40iw_query_gid; | |
2535 | iwibdev->ibdev.alloc_ucontext = i40iw_alloc_ucontext; | |
2536 | iwibdev->ibdev.dealloc_ucontext = i40iw_dealloc_ucontext; | |
2537 | iwibdev->ibdev.mmap = i40iw_mmap; | |
2538 | iwibdev->ibdev.alloc_pd = i40iw_alloc_pd; | |
2539 | iwibdev->ibdev.dealloc_pd = i40iw_dealloc_pd; | |
2540 | iwibdev->ibdev.create_qp = i40iw_create_qp; | |
2541 | iwibdev->ibdev.modify_qp = i40iw_modify_qp; | |
2542 | iwibdev->ibdev.query_qp = i40iw_query_qp; | |
2543 | iwibdev->ibdev.destroy_qp = i40iw_destroy_qp; | |
2544 | iwibdev->ibdev.create_cq = i40iw_create_cq; | |
2545 | iwibdev->ibdev.destroy_cq = i40iw_destroy_cq; | |
2546 | iwibdev->ibdev.get_dma_mr = i40iw_get_dma_mr; | |
2547 | iwibdev->ibdev.reg_user_mr = i40iw_reg_user_mr; | |
2548 | iwibdev->ibdev.dereg_mr = i40iw_dereg_mr; | |
2549 | iwibdev->ibdev.get_protocol_stats = i40iw_get_protocol_stats; | |
2550 | iwibdev->ibdev.query_device = i40iw_query_device; | |
2551 | iwibdev->ibdev.create_ah = i40iw_create_ah; | |
2552 | iwibdev->ibdev.destroy_ah = i40iw_destroy_ah; | |
c2b75ef7 IM |
2553 | iwibdev->ibdev.drain_sq = i40iw_drain_sq; |
2554 | iwibdev->ibdev.drain_rq = i40iw_drain_rq; | |
b7aee855 IM |
2555 | iwibdev->ibdev.alloc_mr = i40iw_alloc_mr; |
2556 | iwibdev->ibdev.map_mr_sg = i40iw_map_mr_sg; | |
d3749841 FL |
2557 | iwibdev->ibdev.iwcm = kzalloc(sizeof(*iwibdev->ibdev.iwcm), GFP_KERNEL); |
2558 | if (!iwibdev->ibdev.iwcm) { | |
2559 | ib_dealloc_device(&iwibdev->ibdev); | |
2560 | i40iw_pr_err("iwcm == NULL\n"); | |
2561 | return NULL; | |
2562 | } | |
2563 | ||
2564 | iwibdev->ibdev.iwcm->add_ref = i40iw_add_ref; | |
2565 | iwibdev->ibdev.iwcm->rem_ref = i40iw_rem_ref; | |
2566 | iwibdev->ibdev.iwcm->get_qp = i40iw_get_qp; | |
2567 | iwibdev->ibdev.iwcm->connect = i40iw_connect; | |
2568 | iwibdev->ibdev.iwcm->accept = i40iw_accept; | |
2569 | iwibdev->ibdev.iwcm->reject = i40iw_reject; | |
2570 | iwibdev->ibdev.iwcm->create_listen = i40iw_create_listen; | |
2571 | iwibdev->ibdev.iwcm->destroy_listen = i40iw_destroy_listen; | |
8d8cd0bf FL |
2572 | memcpy(iwibdev->ibdev.iwcm->ifname, netdev->name, |
2573 | sizeof(iwibdev->ibdev.iwcm->ifname)); | |
d3749841 FL |
2574 | iwibdev->ibdev.get_port_immutable = i40iw_port_immutable; |
2575 | iwibdev->ibdev.poll_cq = i40iw_poll_cq; | |
2576 | iwibdev->ibdev.req_notify_cq = i40iw_req_notify_cq; | |
2577 | iwibdev->ibdev.post_send = i40iw_post_send; | |
2578 | iwibdev->ibdev.post_recv = i40iw_post_recv; | |
8d8cd0bf | 2579 | |
d3749841 FL |
2580 | return iwibdev; |
2581 | } | |
2582 | ||
2583 | /** | |
2584 | * i40iw_port_ibevent - indicate port event | |
2585 | * @iwdev: iwarp device | |
2586 | */ | |
2587 | void i40iw_port_ibevent(struct i40iw_device *iwdev) | |
2588 | { | |
2589 | struct i40iw_ib_device *iwibdev = iwdev->iwibdev; | |
2590 | struct ib_event event; | |
2591 | ||
2592 | event.device = &iwibdev->ibdev; | |
2593 | event.element.port_num = 1; | |
2594 | event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; | |
2595 | ib_dispatch_event(&event); | |
2596 | } | |
2597 | ||
2598 | /** | |
2599 | * i40iw_unregister_rdma_device - unregister of iwarp from IB | |
2600 | * @iwibdev: rdma device ptr | |
2601 | */ | |
2602 | static void i40iw_unregister_rdma_device(struct i40iw_ib_device *iwibdev) | |
2603 | { | |
2604 | int i; | |
2605 | ||
2606 | for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i) | |
2607 | device_remove_file(&iwibdev->ibdev.dev, | |
2608 | i40iw_dev_attributes[i]); | |
2609 | ib_unregister_device(&iwibdev->ibdev); | |
2610 | } | |
2611 | ||
2612 | /** | |
2613 | * i40iw_destroy_rdma_device - destroy rdma device and free resources | |
2614 | * @iwibdev: IB device ptr | |
2615 | */ | |
2616 | void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev) | |
2617 | { | |
2618 | if (!iwibdev) | |
2619 | return; | |
2620 | ||
2621 | i40iw_unregister_rdma_device(iwibdev); | |
2622 | kfree(iwibdev->ibdev.iwcm); | |
2623 | iwibdev->ibdev.iwcm = NULL; | |
2624 | ib_dealloc_device(&iwibdev->ibdev); | |
2625 | } | |
2626 | ||
2627 | /** | |
2628 | * i40iw_register_rdma_device - register iwarp device to IB | |
2629 | * @iwdev: iwarp device | |
2630 | */ | |
2631 | int i40iw_register_rdma_device(struct i40iw_device *iwdev) | |
2632 | { | |
2633 | int i, ret; | |
2634 | struct i40iw_ib_device *iwibdev; | |
2635 | ||
2636 | iwdev->iwibdev = i40iw_init_rdma_device(iwdev); | |
2637 | if (!iwdev->iwibdev) | |
2638 | return -ENOSYS; | |
2639 | iwibdev = iwdev->iwibdev; | |
2640 | ||
2641 | ret = ib_register_device(&iwibdev->ibdev, NULL); | |
2642 | if (ret) | |
2643 | goto error; | |
2644 | ||
2645 | for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i) { | |
2646 | ret = | |
2647 | device_create_file(&iwibdev->ibdev.dev, | |
2648 | i40iw_dev_attributes[i]); | |
2649 | if (ret) { | |
2650 | while (i > 0) { | |
2651 | i--; | |
2652 | device_remove_file(&iwibdev->ibdev.dev, i40iw_dev_attributes[i]); | |
2653 | } | |
2654 | ib_unregister_device(&iwibdev->ibdev); | |
2655 | goto error; | |
2656 | } | |
2657 | } | |
2658 | return 0; | |
2659 | error: | |
2660 | kfree(iwdev->iwibdev->ibdev.iwcm); | |
2661 | iwdev->iwibdev->ibdev.iwcm = NULL; | |
2662 | ib_dealloc_device(&iwdev->iwibdev->ibdev); | |
2663 | return -ENOSYS; | |
2664 | } |