Restartable sequences: x86 32/64 architecture support
[deliverable/linux.git] / drivers / input / touchscreen / ad7877.c
CommitLineData
331b78ed
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1/*
2 * Copyright (C) 2006-2008 Michael Hennerich, Analog Devices Inc.
3 *
4 * Description: AD7877 based touchscreen, sensor (ADCs), DAC and GPIO driver
5 * Based on: ads7846.c
6 *
7 * Bugs: Enter bugs at http://blackfin.uclinux.org/
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, see the file COPYING, or write
21 * to the Free Software Foundation, Inc.,
22 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 *
24 * History:
25 * Copyright (c) 2005 David Brownell
26 * Copyright (c) 2006 Nokia Corporation
27 * Various changes: Imre Deak <imre.deak@nokia.com>
28 *
29 * Using code from:
30 * - corgi_ts.c
31 * Copyright (C) 2004-2005 Richard Purdie
32 * - omap_ts.[hc], ads7846.h, ts_osk.c
33 * Copyright (C) 2002 MontaVista Software
34 * Copyright (C) 2004 Texas Instruments
35 * Copyright (C) 2005 Dirk Behme
36 */
37
38
39#include <linux/device.h>
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40#include <linux/delay.h>
41#include <linux/input.h>
42#include <linux/interrupt.h>
fccdd7c4 43#include <linux/pm.h>
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44#include <linux/slab.h>
45#include <linux/spi/spi.h>
46#include <linux/spi/ad7877.h>
d2d8442d 47#include <linux/module.h>
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48#include <asm/irq.h>
49
4eb6f91b 50#define TS_PEN_UP_TIMEOUT msecs_to_jiffies(100)
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51
52#define MAX_SPI_FREQ_HZ 20000000
53#define MAX_12BIT ((1<<12)-1)
54
55#define AD7877_REG_ZEROS 0
56#define AD7877_REG_CTRL1 1
57#define AD7877_REG_CTRL2 2
58#define AD7877_REG_ALERT 3
59#define AD7877_REG_AUX1HIGH 4
60#define AD7877_REG_AUX1LOW 5
61#define AD7877_REG_BAT1HIGH 6
62#define AD7877_REG_BAT1LOW 7
63#define AD7877_REG_BAT2HIGH 8
64#define AD7877_REG_BAT2LOW 9
65#define AD7877_REG_TEMP1HIGH 10
66#define AD7877_REG_TEMP1LOW 11
67#define AD7877_REG_SEQ0 12
68#define AD7877_REG_SEQ1 13
69#define AD7877_REG_DAC 14
70#define AD7877_REG_NONE1 15
71#define AD7877_REG_EXTWRITE 15
72#define AD7877_REG_XPLUS 16
73#define AD7877_REG_YPLUS 17
74#define AD7877_REG_Z2 18
75#define AD7877_REG_aux1 19
76#define AD7877_REG_aux2 20
77#define AD7877_REG_aux3 21
78#define AD7877_REG_bat1 22
79#define AD7877_REG_bat2 23
80#define AD7877_REG_temp1 24
81#define AD7877_REG_temp2 25
82#define AD7877_REG_Z1 26
83#define AD7877_REG_GPIOCTRL1 27
84#define AD7877_REG_GPIOCTRL2 28
85#define AD7877_REG_GPIODATA 29
86#define AD7877_REG_NONE2 30
87#define AD7877_REG_NONE3 31
88
89#define AD7877_SEQ_YPLUS_BIT (1<<11)
90#define AD7877_SEQ_XPLUS_BIT (1<<10)
91#define AD7877_SEQ_Z2_BIT (1<<9)
92#define AD7877_SEQ_AUX1_BIT (1<<8)
93#define AD7877_SEQ_AUX2_BIT (1<<7)
94#define AD7877_SEQ_AUX3_BIT (1<<6)
95#define AD7877_SEQ_BAT1_BIT (1<<5)
96#define AD7877_SEQ_BAT2_BIT (1<<4)
97#define AD7877_SEQ_TEMP1_BIT (1<<3)
98#define AD7877_SEQ_TEMP2_BIT (1<<2)
99#define AD7877_SEQ_Z1_BIT (1<<1)
100
101enum {
102 AD7877_SEQ_YPOS = 0,
103 AD7877_SEQ_XPOS = 1,
104 AD7877_SEQ_Z2 = 2,
105 AD7877_SEQ_AUX1 = 3,
106 AD7877_SEQ_AUX2 = 4,
107 AD7877_SEQ_AUX3 = 5,
108 AD7877_SEQ_BAT1 = 6,
109 AD7877_SEQ_BAT2 = 7,
110 AD7877_SEQ_TEMP1 = 8,
111 AD7877_SEQ_TEMP2 = 9,
112 AD7877_SEQ_Z1 = 10,
113 AD7877_NR_SENSE = 11,
114};
115
116/* DAC Register Default RANGE 0 to Vcc, Volatge Mode, DAC On */
117#define AD7877_DAC_CONF 0x1
118
119/* If gpio3 is set AUX3/GPIO3 acts as GPIO Output */
120#define AD7877_EXTW_GPIO_3_CONF 0x1C4
121#define AD7877_EXTW_GPIO_DATA 0x200
122
123/* Control REG 2 */
124#define AD7877_TMR(x) ((x & 0x3) << 0)
125#define AD7877_REF(x) ((x & 0x1) << 2)
126#define AD7877_POL(x) ((x & 0x1) << 3)
127#define AD7877_FCD(x) ((x & 0x3) << 4)
128#define AD7877_PM(x) ((x & 0x3) << 6)
129#define AD7877_ACQ(x) ((x & 0x3) << 8)
130#define AD7877_AVG(x) ((x & 0x3) << 10)
131
132/* Control REG 1 */
133#define AD7877_SER (1 << 11) /* non-differential */
134#define AD7877_DFR (0 << 11) /* differential */
135
136#define AD7877_MODE_NOC (0) /* Do not convert */
137#define AD7877_MODE_SCC (1) /* Single channel conversion */
138#define AD7877_MODE_SEQ0 (2) /* Sequence 0 in Slave Mode */
139#define AD7877_MODE_SEQ1 (3) /* Sequence 1 in Master Mode */
140
141#define AD7877_CHANADD(x) ((x&0xF)<<7)
142#define AD7877_READADD(x) ((x)<<2)
143#define AD7877_WRITEADD(x) ((x)<<12)
144
145#define AD7877_READ_CHAN(x) (AD7877_WRITEADD(AD7877_REG_CTRL1) | AD7877_SER | \
146 AD7877_MODE_SCC | AD7877_CHANADD(AD7877_REG_ ## x) | \
147 AD7877_READADD(AD7877_REG_ ## x))
148
149#define AD7877_MM_SEQUENCE (AD7877_SEQ_YPLUS_BIT | AD7877_SEQ_XPLUS_BIT | \
150 AD7877_SEQ_Z2_BIT | AD7877_SEQ_Z1_BIT)
151
152/*
153 * Non-touchscreen sensors only use single-ended conversions.
154 */
155
156struct ser_req {
157 u16 reset;
158 u16 ref_on;
159 u16 command;
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160 struct spi_message msg;
161 struct spi_transfer xfer[6];
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162
163 /*
164 * DMA (thus cache coherency maintenance) requires the
165 * transfer buffers to live in their own cache lines.
166 */
167 u16 sample ____cacheline_aligned;
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168};
169
170struct ad7877 {
171 struct input_dev *input;
172 char phys[32];
173
174 struct spi_device *spi;
175 u16 model;
176 u16 vref_delay_usecs;
177 u16 x_plate_ohms;
178 u16 pressure_max;
179
180 u16 cmd_crtl1;
181 u16 cmd_crtl2;
182 u16 cmd_dummy;
183 u16 dac;
184
185 u8 stopacq_polarity;
186 u8 first_conversion_delay;
187 u8 acquisition_time;
188 u8 averaging;
189 u8 pen_down_acc_interval;
190
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191 struct spi_transfer xfer[AD7877_NR_SENSE + 2];
192 struct spi_message msg;
193
194 struct mutex mutex;
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DT
195 bool disabled; /* P: mutex */
196 bool gpio3; /* P: mutex */
197 bool gpio4; /* P: mutex */
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198
199 spinlock_t lock;
200 struct timer_list timer; /* P: lock */
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201
202 /*
203 * DMA (thus cache coherency maintenance) requires the
204 * transfer buffers to live in their own cache lines.
205 */
206 u16 conversion_data[AD7877_NR_SENSE] ____cacheline_aligned;
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207};
208
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209static bool gpio3;
210module_param(gpio3, bool, 0);
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211MODULE_PARM_DESC(gpio3, "If gpio3 is set to 1 AUX3 acts as GPIO3");
212
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213static int ad7877_read(struct spi_device *spi, u16 reg)
214{
215 struct ser_req *req;
216 int status, ret;
217
218 req = kzalloc(sizeof *req, GFP_KERNEL);
219 if (!req)
220 return -ENOMEM;
221
222 spi_message_init(&req->msg);
223
224 req->command = (u16) (AD7877_WRITEADD(AD7877_REG_CTRL1) |
225 AD7877_READADD(reg));
226 req->xfer[0].tx_buf = &req->command;
227 req->xfer[0].len = 2;
e92c27fb 228 req->xfer[0].cs_change = 1;
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229
230 req->xfer[1].rx_buf = &req->sample;
231 req->xfer[1].len = 2;
232
233 spi_message_add_tail(&req->xfer[0], &req->msg);
234 spi_message_add_tail(&req->xfer[1], &req->msg);
235
236 status = spi_sync(spi, &req->msg);
237 ret = status ? : req->sample;
238
239 kfree(req);
240
241 return ret;
242}
243
244static int ad7877_write(struct spi_device *spi, u16 reg, u16 val)
245{
246 struct ser_req *req;
247 int status;
248
249 req = kzalloc(sizeof *req, GFP_KERNEL);
250 if (!req)
251 return -ENOMEM;
252
253 spi_message_init(&req->msg);
254
255 req->command = (u16) (AD7877_WRITEADD(reg) | (val & MAX_12BIT));
256 req->xfer[0].tx_buf = &req->command;
257 req->xfer[0].len = 2;
258
259 spi_message_add_tail(&req->xfer[0], &req->msg);
260
261 status = spi_sync(spi, &req->msg);
262
263 kfree(req);
264
265 return status;
266}
267
268static int ad7877_read_adc(struct spi_device *spi, unsigned command)
269{
e1793c69 270 struct ad7877 *ts = spi_get_drvdata(spi);
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271 struct ser_req *req;
272 int status;
273 int sample;
274 int i;
275
276 req = kzalloc(sizeof *req, GFP_KERNEL);
277 if (!req)
278 return -ENOMEM;
279
280 spi_message_init(&req->msg);
281
282 /* activate reference, so it has time to settle; */
283 req->ref_on = AD7877_WRITEADD(AD7877_REG_CTRL2) |
284 AD7877_POL(ts->stopacq_polarity) |
285 AD7877_AVG(0) | AD7877_PM(2) | AD7877_TMR(0) |
286 AD7877_ACQ(ts->acquisition_time) | AD7877_FCD(0);
287
288 req->reset = AD7877_WRITEADD(AD7877_REG_CTRL1) | AD7877_MODE_NOC;
289
290 req->command = (u16) command;
291
292 req->xfer[0].tx_buf = &req->reset;
293 req->xfer[0].len = 2;
e92c27fb 294 req->xfer[0].cs_change = 1;
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295
296 req->xfer[1].tx_buf = &req->ref_on;
297 req->xfer[1].len = 2;
298 req->xfer[1].delay_usecs = ts->vref_delay_usecs;
e92c27fb 299 req->xfer[1].cs_change = 1;
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300
301 req->xfer[2].tx_buf = &req->command;
302 req->xfer[2].len = 2;
303 req->xfer[2].delay_usecs = ts->vref_delay_usecs;
e92c27fb 304 req->xfer[2].cs_change = 1;
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305
306 req->xfer[3].rx_buf = &req->sample;
307 req->xfer[3].len = 2;
e92c27fb 308 req->xfer[3].cs_change = 1;
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309
310 req->xfer[4].tx_buf = &ts->cmd_crtl2; /*REF OFF*/
311 req->xfer[4].len = 2;
e92c27fb 312 req->xfer[4].cs_change = 1;
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313
314 req->xfer[5].tx_buf = &ts->cmd_crtl1; /*DEFAULT*/
315 req->xfer[5].len = 2;
316
317 /* group all the transfers together, so we can't interfere with
318 * reading touchscreen state; disable penirq while sampling
319 */
320 for (i = 0; i < 6; i++)
321 spi_message_add_tail(&req->xfer[i], &req->msg);
322
323 status = spi_sync(spi, &req->msg);
324 sample = req->sample;
325
326 kfree(req);
327
328 return status ? : sample;
329}
330
b534422b 331static int ad7877_process_data(struct ad7877 *ts)
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MH
332{
333 struct input_dev *input_dev = ts->input;
334 unsigned Rt;
335 u16 x, y, z1, z2;
336
337 x = ts->conversion_data[AD7877_SEQ_XPOS] & MAX_12BIT;
338 y = ts->conversion_data[AD7877_SEQ_YPOS] & MAX_12BIT;
339 z1 = ts->conversion_data[AD7877_SEQ_Z1] & MAX_12BIT;
340 z2 = ts->conversion_data[AD7877_SEQ_Z2] & MAX_12BIT;
341
342 /*
343 * The samples processed here are already preprocessed by the AD7877.
344 * The preprocessing function consists of an averaging filter.
345 * The combination of 'first conversion delay' and averaging provides a robust solution,
346 * discarding the spurious noise in the signal and keeping only the data of interest.
347 * The size of the averaging filter is programmable. (dev.platform_data, see linux/spi/ad7877.h)
348 * Other user-programmable conversion controls include variable acquisition time,
349 * and first conversion delay. Up to 16 averages can be taken per conversion.
350 */
351
352 if (likely(x && z1)) {
353 /* compute touch pressure resistance using equation #1 */
354 Rt = (z2 - z1) * x * ts->x_plate_ohms;
355 Rt /= z1;
356 Rt = (Rt + 2047) >> 12;
357
1d02ad43
MH
358 /*
359 * Sample found inconsistent, pressure is beyond
360 * the maximum. Don't report it to user space.
361 */
362 if (Rt > ts->pressure_max)
363 return -EINVAL;
364
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MH
365 if (!timer_pending(&ts->timer))
366 input_report_key(input_dev, BTN_TOUCH, 1);
367
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368 input_report_abs(input_dev, ABS_X, x);
369 input_report_abs(input_dev, ABS_Y, y);
370 input_report_abs(input_dev, ABS_PRESSURE, Rt);
371 input_sync(input_dev);
b534422b 372
47026b25 373 return 0;
331b78ed 374 }
47026b25
MH
375
376 return -EINVAL;
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MH
377}
378
379static inline void ad7877_ts_event_release(struct ad7877 *ts)
380{
381 struct input_dev *input_dev = ts->input;
382
383 input_report_abs(input_dev, ABS_PRESSURE, 0);
47026b25 384 input_report_key(input_dev, BTN_TOUCH, 0);
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MH
385 input_sync(input_dev);
386}
387
388static void ad7877_timer(unsigned long handle)
389{
390 struct ad7877 *ts = (void *)handle;
b534422b 391 unsigned long flags;
331b78ed 392
b534422b 393 spin_lock_irqsave(&ts->lock, flags);
331b78ed 394 ad7877_ts_event_release(ts);
b534422b 395 spin_unlock_irqrestore(&ts->lock, flags);
331b78ed
MH
396}
397
398static irqreturn_t ad7877_irq(int irq, void *handle)
399{
400 struct ad7877 *ts = handle;
401 unsigned long flags;
b534422b 402 int error;
331b78ed 403
b534422b
DT
404 error = spi_sync(ts->spi, &ts->msg);
405 if (error) {
406 dev_err(&ts->spi->dev, "spi_sync --> %d\n", error);
407 goto out;
408 }
331b78ed
MH
409
410 spin_lock_irqsave(&ts->lock, flags);
b534422b
DT
411 error = ad7877_process_data(ts);
412 if (!error)
413 mod_timer(&ts->timer, jiffies + TS_PEN_UP_TIMEOUT);
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MH
414 spin_unlock_irqrestore(&ts->lock, flags);
415
b534422b 416out:
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MH
417 return IRQ_HANDLED;
418}
419
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420static void ad7877_disable(struct ad7877 *ts)
421{
422 mutex_lock(&ts->mutex);
423
424 if (!ts->disabled) {
b534422b 425 ts->disabled = true;
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MH
426 disable_irq(ts->spi->irq);
427
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MH
428 if (del_timer_sync(&ts->timer))
429 ad7877_ts_event_release(ts);
430 }
431
b534422b
DT
432 /*
433 * We know the chip's in lowpower mode since we always
331b78ed
MH
434 * leave it that way after every request
435 */
436
437 mutex_unlock(&ts->mutex);
438}
439
440static void ad7877_enable(struct ad7877 *ts)
441{
442 mutex_lock(&ts->mutex);
443
444 if (ts->disabled) {
b534422b 445 ts->disabled = false;
331b78ed
MH
446 enable_irq(ts->spi->irq);
447 }
448
449 mutex_unlock(&ts->mutex);
450}
451
452#define SHOW(name) static ssize_t \
453name ## _show(struct device *dev, struct device_attribute *attr, char *buf) \
454{ \
2fd18aba 455 struct ad7877 *ts = dev_get_drvdata(dev); \
331b78ed
MH
456 ssize_t v = ad7877_read_adc(ts->spi, \
457 AD7877_READ_CHAN(name)); \
458 if (v < 0) \
459 return v; \
460 return sprintf(buf, "%u\n", (unsigned) v); \
461} \
462static DEVICE_ATTR(name, S_IRUGO, name ## _show, NULL);
463
464SHOW(aux1)
465SHOW(aux2)
466SHOW(aux3)
467SHOW(bat1)
468SHOW(bat2)
469SHOW(temp1)
470SHOW(temp2)
471
472static ssize_t ad7877_disable_show(struct device *dev,
473 struct device_attribute *attr, char *buf)
474{
2fd18aba 475 struct ad7877 *ts = dev_get_drvdata(dev);
331b78ed
MH
476
477 return sprintf(buf, "%u\n", ts->disabled);
478}
479
480static ssize_t ad7877_disable_store(struct device *dev,
481 struct device_attribute *attr,
482 const char *buf, size_t count)
483{
484 struct ad7877 *ts = dev_get_drvdata(dev);
76496e7a 485 unsigned int val;
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486 int error;
487
76496e7a 488 error = kstrtouint(buf, 10, &val);
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MH
489 if (error)
490 return error;
491
492 if (val)
493 ad7877_disable(ts);
494 else
495 ad7877_enable(ts);
496
497 return count;
498}
499
500static DEVICE_ATTR(disable, 0664, ad7877_disable_show, ad7877_disable_store);
501
502static ssize_t ad7877_dac_show(struct device *dev,
503 struct device_attribute *attr, char *buf)
504{
2fd18aba 505 struct ad7877 *ts = dev_get_drvdata(dev);
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506
507 return sprintf(buf, "%u\n", ts->dac);
508}
509
510static ssize_t ad7877_dac_store(struct device *dev,
511 struct device_attribute *attr,
512 const char *buf, size_t count)
513{
514 struct ad7877 *ts = dev_get_drvdata(dev);
76496e7a 515 unsigned int val;
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516 int error;
517
76496e7a 518 error = kstrtouint(buf, 10, &val);
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519 if (error)
520 return error;
521
522 mutex_lock(&ts->mutex);
523 ts->dac = val & 0xFF;
524 ad7877_write(ts->spi, AD7877_REG_DAC, (ts->dac << 4) | AD7877_DAC_CONF);
525 mutex_unlock(&ts->mutex);
526
527 return count;
528}
529
530static DEVICE_ATTR(dac, 0664, ad7877_dac_show, ad7877_dac_store);
531
532static ssize_t ad7877_gpio3_show(struct device *dev,
533 struct device_attribute *attr, char *buf)
534{
2fd18aba 535 struct ad7877 *ts = dev_get_drvdata(dev);
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MH
536
537 return sprintf(buf, "%u\n", ts->gpio3);
538}
539
540static ssize_t ad7877_gpio3_store(struct device *dev,
541 struct device_attribute *attr,
542 const char *buf, size_t count)
543{
544 struct ad7877 *ts = dev_get_drvdata(dev);
76496e7a 545 unsigned int val;
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546 int error;
547
76496e7a 548 error = kstrtouint(buf, 10, &val);
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MH
549 if (error)
550 return error;
551
552 mutex_lock(&ts->mutex);
553 ts->gpio3 = !!val;
554 ad7877_write(ts->spi, AD7877_REG_EXTWRITE, AD7877_EXTW_GPIO_DATA |
555 (ts->gpio4 << 4) | (ts->gpio3 << 5));
556 mutex_unlock(&ts->mutex);
557
558 return count;
559}
560
561static DEVICE_ATTR(gpio3, 0664, ad7877_gpio3_show, ad7877_gpio3_store);
562
563static ssize_t ad7877_gpio4_show(struct device *dev,
564 struct device_attribute *attr, char *buf)
565{
2fd18aba 566 struct ad7877 *ts = dev_get_drvdata(dev);
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MH
567
568 return sprintf(buf, "%u\n", ts->gpio4);
569}
570
571static ssize_t ad7877_gpio4_store(struct device *dev,
572 struct device_attribute *attr,
573 const char *buf, size_t count)
574{
575 struct ad7877 *ts = dev_get_drvdata(dev);
76496e7a 576 unsigned int val;
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MH
577 int error;
578
76496e7a 579 error = kstrtouint(buf, 10, &val);
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MH
580 if (error)
581 return error;
582
583 mutex_lock(&ts->mutex);
584 ts->gpio4 = !!val;
585 ad7877_write(ts->spi, AD7877_REG_EXTWRITE, AD7877_EXTW_GPIO_DATA |
586 (ts->gpio4 << 4) | (ts->gpio3 << 5));
587 mutex_unlock(&ts->mutex);
588
589 return count;
590}
591
592static DEVICE_ATTR(gpio4, 0664, ad7877_gpio4_show, ad7877_gpio4_store);
593
594static struct attribute *ad7877_attributes[] = {
595 &dev_attr_temp1.attr,
596 &dev_attr_temp2.attr,
597 &dev_attr_aux1.attr,
598 &dev_attr_aux2.attr,
2fd18aba 599 &dev_attr_aux3.attr,
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600 &dev_attr_bat1.attr,
601 &dev_attr_bat2.attr,
602 &dev_attr_disable.attr,
603 &dev_attr_dac.attr,
2fd18aba 604 &dev_attr_gpio3.attr,
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605 &dev_attr_gpio4.attr,
606 NULL
607};
608
587a1f16 609static umode_t ad7877_attr_is_visible(struct kobject *kobj,
2fd18aba
DT
610 struct attribute *attr, int n)
611{
587a1f16 612 umode_t mode = attr->mode;
2fd18aba
DT
613
614 if (attr == &dev_attr_aux3.attr) {
615 if (gpio3)
616 mode = 0;
617 } else if (attr == &dev_attr_gpio3.attr) {
618 if (!gpio3)
619 mode = 0;
620 }
621
622 return mode;
623}
624
331b78ed 625static const struct attribute_group ad7877_attr_group = {
2fd18aba
DT
626 .is_visible = ad7877_attr_is_visible,
627 .attrs = ad7877_attributes,
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MH
628};
629
630static void ad7877_setup_ts_def_msg(struct spi_device *spi, struct ad7877 *ts)
631{
632 struct spi_message *m;
633 int i;
634
635 ts->cmd_crtl2 = AD7877_WRITEADD(AD7877_REG_CTRL2) |
636 AD7877_POL(ts->stopacq_polarity) |
637 AD7877_AVG(ts->averaging) | AD7877_PM(1) |
638 AD7877_TMR(ts->pen_down_acc_interval) |
639 AD7877_ACQ(ts->acquisition_time) |
640 AD7877_FCD(ts->first_conversion_delay);
641
642 ad7877_write(spi, AD7877_REG_CTRL2, ts->cmd_crtl2);
643
644 ts->cmd_crtl1 = AD7877_WRITEADD(AD7877_REG_CTRL1) |
645 AD7877_READADD(AD7877_REG_XPLUS-1) |
646 AD7877_MODE_SEQ1 | AD7877_DFR;
647
648 ad7877_write(spi, AD7877_REG_CTRL1, ts->cmd_crtl1);
649
650 ts->cmd_dummy = 0;
651
652 m = &ts->msg;
653
654 spi_message_init(m);
655
331b78ed
MH
656 m->context = ts;
657
658 ts->xfer[0].tx_buf = &ts->cmd_crtl1;
659 ts->xfer[0].len = 2;
e92c27fb 660 ts->xfer[0].cs_change = 1;
331b78ed
MH
661
662 spi_message_add_tail(&ts->xfer[0], m);
663
664 ts->xfer[1].tx_buf = &ts->cmd_dummy; /* Send ZERO */
665 ts->xfer[1].len = 2;
e92c27fb 666 ts->xfer[1].cs_change = 1;
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MH
667
668 spi_message_add_tail(&ts->xfer[1], m);
669
e92c27fb 670 for (i = 0; i < AD7877_NR_SENSE; i++) {
331b78ed
MH
671 ts->xfer[i + 2].rx_buf = &ts->conversion_data[AD7877_SEQ_YPOS + i];
672 ts->xfer[i + 2].len = 2;
e92c27fb
MH
673 if (i < (AD7877_NR_SENSE - 1))
674 ts->xfer[i + 2].cs_change = 1;
331b78ed
MH
675 spi_message_add_tail(&ts->xfer[i + 2], m);
676 }
677}
678
5298cc4c 679static int ad7877_probe(struct spi_device *spi)
331b78ed
MH
680{
681 struct ad7877 *ts;
682 struct input_dev *input_dev;
c838cb3d 683 struct ad7877_platform_data *pdata = dev_get_platdata(&spi->dev);
331b78ed
MH
684 int err;
685 u16 verify;
686
687 if (!spi->irq) {
688 dev_dbg(&spi->dev, "no IRQ?\n");
689 return -ENODEV;
690 }
691
692 if (!pdata) {
693 dev_dbg(&spi->dev, "no platform data?\n");
694 return -ENODEV;
695 }
696
697 /* don't exceed max specified SPI CLK frequency */
698 if (spi->max_speed_hz > MAX_SPI_FREQ_HZ) {
699 dev_dbg(&spi->dev, "SPI CLK %d Hz?\n",spi->max_speed_hz);
700 return -EINVAL;
701 }
702
cd9b6fdf
OS
703 spi->bits_per_word = 16;
704 err = spi_setup(spi);
705 if (err) {
706 dev_dbg(&spi->dev, "spi master doesn't support 16 bits/word\n");
707 return err;
708 }
709
331b78ed
MH
710 ts = kzalloc(sizeof(struct ad7877), GFP_KERNEL);
711 input_dev = input_allocate_device();
712 if (!ts || !input_dev) {
713 err = -ENOMEM;
714 goto err_free_mem;
715 }
716
e1793c69 717 spi_set_drvdata(spi, ts);
331b78ed
MH
718 ts->spi = spi;
719 ts->input = input_dev;
720
721 setup_timer(&ts->timer, ad7877_timer, (unsigned long) ts);
722 mutex_init(&ts->mutex);
723 spin_lock_init(&ts->lock);
724
725 ts->model = pdata->model ? : 7877;
726 ts->vref_delay_usecs = pdata->vref_delay_usecs ? : 100;
727 ts->x_plate_ohms = pdata->x_plate_ohms ? : 400;
728 ts->pressure_max = pdata->pressure_max ? : ~0;
729
730 ts->stopacq_polarity = pdata->stopacq_polarity;
731 ts->first_conversion_delay = pdata->first_conversion_delay;
732 ts->acquisition_time = pdata->acquisition_time;
733 ts->averaging = pdata->averaging;
734 ts->pen_down_acc_interval = pdata->pen_down_acc_interval;
735
736 snprintf(ts->phys, sizeof(ts->phys), "%s/input0", dev_name(&spi->dev));
737
738 input_dev->name = "AD7877 Touchscreen";
739 input_dev->phys = ts->phys;
740 input_dev->dev.parent = &spi->dev;
741
47026b25
MH
742 __set_bit(EV_KEY, input_dev->evbit);
743 __set_bit(BTN_TOUCH, input_dev->keybit);
331b78ed
MH
744 __set_bit(EV_ABS, input_dev->evbit);
745 __set_bit(ABS_X, input_dev->absbit);
746 __set_bit(ABS_Y, input_dev->absbit);
747 __set_bit(ABS_PRESSURE, input_dev->absbit);
748
749 input_set_abs_params(input_dev, ABS_X,
750 pdata->x_min ? : 0,
751 pdata->x_max ? : MAX_12BIT,
752 0, 0);
753 input_set_abs_params(input_dev, ABS_Y,
754 pdata->y_min ? : 0,
755 pdata->y_max ? : MAX_12BIT,
756 0, 0);
757 input_set_abs_params(input_dev, ABS_PRESSURE,
758 pdata->pressure_min, pdata->pressure_max, 0, 0);
759
760 ad7877_write(spi, AD7877_REG_SEQ1, AD7877_MM_SEQUENCE);
761
762 verify = ad7877_read(spi, AD7877_REG_SEQ1);
763
764 if (verify != AD7877_MM_SEQUENCE){
765 dev_err(&spi->dev, "%s: Failed to probe %s\n",
766 dev_name(&spi->dev), input_dev->name);
767 err = -ENODEV;
768 goto err_free_mem;
769 }
770
771 if (gpio3)
772 ad7877_write(spi, AD7877_REG_EXTWRITE, AD7877_EXTW_GPIO_3_CONF);
773
774 ad7877_setup_ts_def_msg(spi, ts);
775
776 /* Request AD7877 /DAV GPIO interrupt */
777
b534422b
DT
778 err = request_threaded_irq(spi->irq, NULL, ad7877_irq,
779 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
780 spi->dev.driver->name, ts);
331b78ed
MH
781 if (err) {
782 dev_dbg(&spi->dev, "irq %d busy?\n", spi->irq);
783 goto err_free_mem;
784 }
785
786 err = sysfs_create_group(&spi->dev.kobj, &ad7877_attr_group);
787 if (err)
788 goto err_free_irq;
789
331b78ed
MH
790 err = input_register_device(input_dev);
791 if (err)
2fd18aba 792 goto err_remove_attr_group;
331b78ed
MH
793
794 return 0;
795
331b78ed
MH
796err_remove_attr_group:
797 sysfs_remove_group(&spi->dev.kobj, &ad7877_attr_group);
798err_free_irq:
799 free_irq(spi->irq, ts);
800err_free_mem:
801 input_free_device(input_dev);
802 kfree(ts);
331b78ed
MH
803 return err;
804}
805
e2619cf7 806static int ad7877_remove(struct spi_device *spi)
331b78ed 807{
e1793c69 808 struct ad7877 *ts = spi_get_drvdata(spi);
331b78ed
MH
809
810 sysfs_remove_group(&spi->dev.kobj, &ad7877_attr_group);
331b78ed
MH
811
812 ad7877_disable(ts);
813 free_irq(ts->spi->irq, ts);
814
815 input_unregister_device(ts->input);
816 kfree(ts);
817
818 dev_dbg(&spi->dev, "unregistered touchscreen\n");
331b78ed
MH
819
820 return 0;
821}
822
02b6a58b 823static int __maybe_unused ad7877_suspend(struct device *dev)
331b78ed 824{
fccdd7c4 825 struct ad7877 *ts = dev_get_drvdata(dev);
331b78ed
MH
826
827 ad7877_disable(ts);
828
829 return 0;
830}
831
02b6a58b 832static int __maybe_unused ad7877_resume(struct device *dev)
331b78ed 833{
fccdd7c4 834 struct ad7877 *ts = dev_get_drvdata(dev);
331b78ed
MH
835
836 ad7877_enable(ts);
837
838 return 0;
839}
331b78ed 840
fccdd7c4
MB
841static SIMPLE_DEV_PM_OPS(ad7877_pm, ad7877_suspend, ad7877_resume);
842
331b78ed
MH
843static struct spi_driver ad7877_driver = {
844 .driver = {
845 .name = "ad7877",
fccdd7c4 846 .pm = &ad7877_pm,
331b78ed
MH
847 },
848 .probe = ad7877_probe,
1cb0aa88 849 .remove = ad7877_remove,
331b78ed
MH
850};
851
ca83922e 852module_spi_driver(ad7877_driver);
331b78ed
MH
853
854MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
855MODULE_DESCRIPTION("AD7877 touchscreen Driver");
856MODULE_LICENSE("GPL");
e0626e38 857MODULE_ALIAS("spi:ad7877");
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