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1 | #ifndef _TSC200X_CORE_H |
2 | #define _TSC200X_CORE_H | |
3 | ||
4 | /* control byte 1 */ | |
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5 | #define TSC200X_CMD 0x80 |
6 | #define TSC200X_CMD_NORMAL 0x00 | |
7 | #define TSC200X_CMD_STOP 0x01 | |
8 | #define TSC200X_CMD_12BIT 0x04 | |
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9 | |
10 | /* control byte 0 */ | |
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11 | #define TSC200X_REG_READ 0x01 /* R/W access */ |
12 | #define TSC200X_REG_PND0 0x02 /* Power Not Down Control */ | |
13 | #define TSC200X_REG_X (0x0 << 3) | |
14 | #define TSC200X_REG_Y (0x1 << 3) | |
15 | #define TSC200X_REG_Z1 (0x2 << 3) | |
16 | #define TSC200X_REG_Z2 (0x3 << 3) | |
17 | #define TSC200X_REG_AUX (0x4 << 3) | |
18 | #define TSC200X_REG_TEMP1 (0x5 << 3) | |
19 | #define TSC200X_REG_TEMP2 (0x6 << 3) | |
20 | #define TSC200X_REG_STATUS (0x7 << 3) | |
21 | #define TSC200X_REG_AUX_HIGH (0x8 << 3) | |
22 | #define TSC200X_REG_AUX_LOW (0x9 << 3) | |
23 | #define TSC200X_REG_TEMP_HIGH (0xA << 3) | |
24 | #define TSC200X_REG_TEMP_LOW (0xB << 3) | |
25 | #define TSC200X_REG_CFR0 (0xC << 3) | |
26 | #define TSC200X_REG_CFR1 (0xD << 3) | |
27 | #define TSC200X_REG_CFR2 (0xE << 3) | |
28 | #define TSC200X_REG_CONV_FUNC (0xF << 3) | |
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29 | |
30 | /* configuration register 0 */ | |
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31 | #define TSC200X_CFR0_PRECHARGE_276US 0x0040 |
32 | #define TSC200X_CFR0_STABTIME_1MS 0x0300 | |
33 | #define TSC200X_CFR0_CLOCK_1MHZ 0x1000 | |
34 | #define TSC200X_CFR0_RESOLUTION12 0x2000 | |
35 | #define TSC200X_CFR0_PENMODE 0x8000 | |
36 | #define TSC200X_CFR0_INITVALUE (TSC200X_CFR0_STABTIME_1MS | \ | |
37 | TSC200X_CFR0_CLOCK_1MHZ | \ | |
38 | TSC200X_CFR0_RESOLUTION12 | \ | |
39 | TSC200X_CFR0_PRECHARGE_276US | \ | |
40 | TSC200X_CFR0_PENMODE) | |
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41 | |
42 | /* bits common to both read and write of configuration register 0 */ | |
ef3b98c2 | 43 | #define TSC200X_CFR0_RW_MASK 0x3fff |
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44 | |
45 | /* configuration register 1 */ | |
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46 | #define TSC200X_CFR1_BATCHDELAY_4MS 0x0003 |
47 | #define TSC200X_CFR1_INITVALUE TSC200X_CFR1_BATCHDELAY_4MS | |
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48 | |
49 | /* configuration register 2 */ | |
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50 | #define TSC200X_CFR2_MAVE_Z 0x0004 |
51 | #define TSC200X_CFR2_MAVE_Y 0x0008 | |
52 | #define TSC200X_CFR2_MAVE_X 0x0010 | |
53 | #define TSC200X_CFR2_AVG_7 0x0800 | |
54 | #define TSC200X_CFR2_MEDIUM_15 0x3000 | |
55 | #define TSC200X_CFR2_INITVALUE (TSC200X_CFR2_MAVE_X | \ | |
56 | TSC200X_CFR2_MAVE_Y | \ | |
57 | TSC200X_CFR2_MAVE_Z | \ | |
58 | TSC200X_CFR2_MEDIUM_15 | \ | |
59 | TSC200X_CFR2_AVG_7) | |
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60 | |
61 | #define MAX_12BIT 0xfff | |
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62 | #define TSC200X_DEF_X_FUZZ 4 |
63 | #define TSC200X_DEF_Y_FUZZ 8 | |
64 | #define TSC200X_DEF_P_FUZZ 2 | |
65 | #define TSC200X_DEF_RESISTOR 280 | |
6ac24381 | 66 | |
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67 | #define TSC2005_SPI_MAX_SPEED_HZ 10000000 |
68 | #define TSC200X_PENUP_TIME_MS 40 | |
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69 | |
70 | extern const struct regmap_config tsc200x_regmap_config; | |
71 | extern const struct dev_pm_ops tsc200x_pm_ops; | |
72 | ||
e9003c9c | 73 | int tsc200x_probe(struct device *dev, int irq, const struct input_id *tsc_id, |
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74 | struct regmap *regmap, |
75 | int (*tsc200x_cmd)(struct device *dev, u8 cmd)); | |
76 | int tsc200x_remove(struct device *dev); | |
77 | ||
78 | #endif |