Commit | Line | Data |
---|---|---|
9b1b0e42 | 1 | #include <linux/seq_file.h> |
1c4248ca | 2 | #include <linux/cpumask.h> |
736baef4 JR |
3 | #include <linux/kernel.h> |
4 | #include <linux/string.h> | |
5 | #include <linux/errno.h> | |
98f1ad25 | 6 | #include <linux/msi.h> |
5afba62c JR |
7 | #include <linux/irq.h> |
8 | #include <linux/pci.h> | |
a62b32cd | 9 | #include <linux/irqdomain.h> |
98f1ad25 JR |
10 | |
11 | #include <asm/hw_irq.h> | |
12 | #include <asm/irq_remapping.h> | |
1c4248ca JR |
13 | #include <asm/processor.h> |
14 | #include <asm/x86_init.h> | |
15 | #include <asm/apic.h> | |
5fc24d8c | 16 | #include <asm/hpet.h> |
736baef4 | 17 | |
8a8f422d | 18 | #include "irq_remapping.h" |
736baef4 | 19 | |
95a02e97 | 20 | int irq_remapping_enabled; |
03bbcb2e | 21 | int irq_remap_broken; |
736baef4 JR |
22 | int disable_sourceid_checking; |
23 | int no_x2apic_optout; | |
24 | ||
7fa1c842 | 25 | static int disable_irq_remap; |
736baef4 JR |
26 | static struct irq_remap_ops *remap_ops; |
27 | ||
5afba62c JR |
28 | static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec); |
29 | static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq, | |
30 | int index, int sub_handle); | |
373dd7a2 JR |
31 | static int set_remapped_irq_affinity(struct irq_data *data, |
32 | const struct cpumask *mask, | |
33 | bool force); | |
5afba62c | 34 | |
a1bb20c2 JR |
35 | static bool irq_remapped(struct irq_cfg *cfg) |
36 | { | |
37 | return (cfg->remapped == 1); | |
38 | } | |
39 | ||
1c4248ca JR |
40 | static void irq_remapping_disable_io_apic(void) |
41 | { | |
42 | /* | |
43 | * With interrupt-remapping, for now we will use virtual wire A | |
44 | * mode, as virtual wire B is little complex (need to configure | |
45 | * both IOAPIC RTE as well as interrupt-remapping table entry). | |
46 | * As this gets called during crash dump, keep this simple for | |
47 | * now. | |
48 | */ | |
49 | if (cpu_has_apic || apic_from_smp_config()) | |
50 | disconnect_bsp_APIC(0); | |
51 | } | |
52 | ||
a62b32cd JL |
53 | #ifndef CONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ |
54 | static unsigned int irq_alloc_hwirqs(int cnt, int node) | |
55 | { | |
56 | return irq_domain_alloc_irqs(NULL, -1, cnt, node, NULL); | |
57 | } | |
58 | ||
59 | static void irq_free_hwirqs(unsigned int from, int cnt) | |
60 | { | |
61 | irq_domain_free_irqs(from, cnt); | |
62 | } | |
63 | #endif | |
64 | ||
5afba62c JR |
65 | static int do_setup_msi_irqs(struct pci_dev *dev, int nvec) |
66 | { | |
d24a1354 | 67 | int ret, sub_handle, nvec_pow2, index = 0; |
5afba62c JR |
68 | unsigned int irq; |
69 | struct msi_desc *msidesc; | |
70 | ||
5afba62c | 71 | msidesc = list_entry(dev->msi_list.next, struct msi_desc, list); |
5afba62c | 72 | |
d24a1354 | 73 | irq = irq_alloc_hwirqs(nvec, dev_to_node(&dev->dev)); |
5afba62c JR |
74 | if (irq == 0) |
75 | return -ENOSPC; | |
76 | ||
5fec9451 | 77 | nvec_pow2 = __roundup_pow_of_two(nvec); |
5afba62c JR |
78 | for (sub_handle = 0; sub_handle < nvec; sub_handle++) { |
79 | if (!sub_handle) { | |
5fec9451 | 80 | index = msi_alloc_remapped_irq(dev, irq, nvec_pow2); |
5afba62c JR |
81 | if (index < 0) { |
82 | ret = index; | |
83 | goto error; | |
84 | } | |
85 | } else { | |
86 | ret = msi_setup_remapped_irq(dev, irq + sub_handle, | |
87 | index, sub_handle); | |
88 | if (ret < 0) | |
89 | goto error; | |
90 | } | |
91 | ret = setup_msi_irq(dev, msidesc, irq, sub_handle); | |
92 | if (ret < 0) | |
93 | goto error; | |
94 | } | |
95 | return 0; | |
96 | ||
97 | error: | |
d24a1354 | 98 | irq_free_hwirqs(irq, nvec); |
5afba62c JR |
99 | |
100 | /* | |
101 | * Restore altered MSI descriptor fields and prevent just destroyed | |
102 | * IRQs from tearing down again in default_teardown_msi_irqs() | |
103 | */ | |
104 | msidesc->irq = 0; | |
5afba62c JR |
105 | |
106 | return ret; | |
107 | } | |
108 | ||
109 | static int do_setup_msix_irqs(struct pci_dev *dev, int nvec) | |
110 | { | |
111 | int node, ret, sub_handle, index = 0; | |
112 | struct msi_desc *msidesc; | |
113 | unsigned int irq; | |
114 | ||
115 | node = dev_to_node(&dev->dev); | |
5afba62c JR |
116 | sub_handle = 0; |
117 | ||
118 | list_for_each_entry(msidesc, &dev->msi_list, list) { | |
119 | ||
a62b32cd | 120 | irq = irq_alloc_hwirqs(1, node); |
5afba62c JR |
121 | if (irq == 0) |
122 | return -1; | |
123 | ||
124 | if (sub_handle == 0) | |
125 | ret = index = msi_alloc_remapped_irq(dev, irq, nvec); | |
126 | else | |
127 | ret = msi_setup_remapped_irq(dev, irq, index, sub_handle); | |
128 | ||
129 | if (ret < 0) | |
130 | goto error; | |
131 | ||
132 | ret = setup_msi_irq(dev, msidesc, irq, 0); | |
133 | if (ret < 0) | |
134 | goto error; | |
135 | ||
136 | sub_handle += 1; | |
137 | irq += 1; | |
138 | } | |
139 | ||
140 | return 0; | |
141 | ||
142 | error: | |
a62b32cd | 143 | irq_free_hwirqs(irq, 1); |
5afba62c JR |
144 | return ret; |
145 | } | |
146 | ||
147 | static int irq_remapping_setup_msi_irqs(struct pci_dev *dev, | |
148 | int nvec, int type) | |
149 | { | |
150 | if (type == PCI_CAP_ID_MSI) | |
151 | return do_setup_msi_irqs(dev, nvec); | |
152 | else | |
153 | return do_setup_msix_irqs(dev, nvec); | |
154 | } | |
155 | ||
d2d1e8fe | 156 | static void eoi_ioapic_pin_remapped(int apic, int pin, int vector) |
da165322 JR |
157 | { |
158 | /* | |
159 | * Intr-remapping uses pin number as the virtual vector | |
160 | * in the RTE. Actual vector is programmed in | |
161 | * intr-remapping table entry. Hence for the io-apic | |
162 | * EOI we use the pin number. | |
163 | */ | |
164 | io_apic_eoi(apic, pin); | |
165 | } | |
166 | ||
1c4248ca JR |
167 | static void __init irq_remapping_modify_x86_ops(void) |
168 | { | |
71054d88 | 169 | x86_io_apic_ops.disable = irq_remapping_disable_io_apic; |
373dd7a2 | 170 | x86_io_apic_ops.set_affinity = set_remapped_irq_affinity; |
a6a25dd3 | 171 | x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry; |
da165322 | 172 | x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; |
5afba62c | 173 | x86_msi.setup_msi_irqs = irq_remapping_setup_msi_irqs; |
71054d88 | 174 | x86_msi.setup_hpet_msi = setup_hpet_msi_remapped; |
7601384f | 175 | x86_msi.compose_msi_msg = compose_remapped_msi_msg; |
1c4248ca JR |
176 | } |
177 | ||
736baef4 JR |
178 | static __init int setup_nointremap(char *str) |
179 | { | |
95a02e97 | 180 | disable_irq_remap = 1; |
736baef4 JR |
181 | return 0; |
182 | } | |
183 | early_param("nointremap", setup_nointremap); | |
184 | ||
95a02e97 | 185 | static __init int setup_irqremap(char *str) |
736baef4 JR |
186 | { |
187 | if (!str) | |
188 | return -EINVAL; | |
189 | ||
190 | while (*str) { | |
191 | if (!strncmp(str, "on", 2)) | |
95a02e97 | 192 | disable_irq_remap = 0; |
736baef4 | 193 | else if (!strncmp(str, "off", 3)) |
95a02e97 | 194 | disable_irq_remap = 1; |
736baef4 JR |
195 | else if (!strncmp(str, "nosid", 5)) |
196 | disable_sourceid_checking = 1; | |
197 | else if (!strncmp(str, "no_x2apic_optout", 16)) | |
198 | no_x2apic_optout = 1; | |
199 | ||
200 | str += strcspn(str, ","); | |
201 | while (*str == ',') | |
202 | str++; | |
203 | } | |
204 | ||
205 | return 0; | |
206 | } | |
95a02e97 | 207 | early_param("intremap", setup_irqremap); |
736baef4 | 208 | |
03bbcb2e NH |
209 | void set_irq_remapping_broken(void) |
210 | { | |
211 | irq_remap_broken = 1; | |
212 | } | |
213 | ||
c392f56c | 214 | int __init irq_remapping_prepare(void) |
736baef4 | 215 | { |
95a02e97 | 216 | if (disable_irq_remap) |
c392f56c | 217 | return -ENOSYS; |
736baef4 | 218 | |
30969e34 JL |
219 | if (intel_irq_remap_ops.prepare() == 0) |
220 | remap_ops = &intel_irq_remap_ops; | |
221 | else if (IS_ENABLED(CONFIG_AMD_IOMMU) && | |
222 | amd_iommu_irq_ops.prepare() == 0) | |
a1dafe85 | 223 | remap_ops = &amd_iommu_irq_ops; |
30969e34 JL |
224 | else |
225 | return -ENOSYS; | |
226 | ||
227 | return 0; | |
736baef4 JR |
228 | } |
229 | ||
95a02e97 | 230 | int __init irq_remapping_enable(void) |
736baef4 | 231 | { |
1c4248ca JR |
232 | int ret; |
233 | ||
e9011760 | 234 | if (!remap_ops->enable) |
736baef4 JR |
235 | return -ENODEV; |
236 | ||
1c4248ca JR |
237 | ret = remap_ops->enable(); |
238 | ||
239 | if (irq_remapping_enabled) | |
240 | irq_remapping_modify_x86_ops(); | |
241 | ||
242 | return ret; | |
736baef4 | 243 | } |
4f3d8b67 | 244 | |
95a02e97 | 245 | void irq_remapping_disable(void) |
4f3d8b67 | 246 | { |
e9011760 JL |
247 | if (irq_remapping_enabled && remap_ops->disable) |
248 | remap_ops->disable(); | |
4f3d8b67 JR |
249 | } |
250 | ||
95a02e97 | 251 | int irq_remapping_reenable(int mode) |
4f3d8b67 | 252 | { |
e9011760 JL |
253 | if (irq_remapping_enabled && remap_ops->reenable) |
254 | return remap_ops->reenable(mode); | |
4f3d8b67 | 255 | |
e9011760 | 256 | return 0; |
4f3d8b67 JR |
257 | } |
258 | ||
95a02e97 | 259 | int __init irq_remap_enable_fault_handling(void) |
4f3d8b67 | 260 | { |
70733e0c JR |
261 | if (!irq_remapping_enabled) |
262 | return 0; | |
263 | ||
e9011760 | 264 | if (!remap_ops->enable_faulting) |
4f3d8b67 JR |
265 | return -ENODEV; |
266 | ||
267 | return remap_ops->enable_faulting(); | |
268 | } | |
0c3f173a | 269 | |
95a02e97 SS |
270 | int setup_ioapic_remapped_entry(int irq, |
271 | struct IO_APIC_route_entry *entry, | |
272 | unsigned int destination, int vector, | |
273 | struct io_apic_irq_attr *attr) | |
0c3f173a | 274 | { |
e9011760 | 275 | if (!remap_ops->setup_ioapic_entry) |
0c3f173a JR |
276 | return -ENODEV; |
277 | ||
278 | return remap_ops->setup_ioapic_entry(irq, entry, destination, | |
279 | vector, attr); | |
280 | } | |
4c1bad6a | 281 | |
b707cb02 JL |
282 | static int set_remapped_irq_affinity(struct irq_data *data, |
283 | const struct cpumask *mask, bool force) | |
4c1bad6a | 284 | { |
e9011760 | 285 | if (!config_enabled(CONFIG_SMP) || !remap_ops->set_affinity) |
4c1bad6a JR |
286 | return 0; |
287 | ||
288 | return remap_ops->set_affinity(data, mask, force); | |
289 | } | |
9d619f65 | 290 | |
95a02e97 | 291 | void free_remapped_irq(int irq) |
9d619f65 | 292 | { |
b71a3b29 | 293 | struct irq_cfg *cfg = irq_cfg(irq); |
11b4a1cc | 294 | |
e9011760 | 295 | if (irq_remapped(cfg) && remap_ops->free_irq) |
11b4a1cc | 296 | remap_ops->free_irq(irq); |
9d619f65 | 297 | } |
5e2b930b | 298 | |
95a02e97 SS |
299 | void compose_remapped_msi_msg(struct pci_dev *pdev, |
300 | unsigned int irq, unsigned int dest, | |
301 | struct msi_msg *msg, u8 hpet_id) | |
5e2b930b | 302 | { |
b71a3b29 | 303 | struct irq_cfg *cfg = irq_cfg(irq); |
5e2b930b | 304 | |
7601384f JR |
305 | if (!irq_remapped(cfg)) |
306 | native_compose_msi_msg(pdev, irq, dest, msg, hpet_id); | |
e9011760 | 307 | else if (remap_ops->compose_msi_msg) |
7601384f | 308 | remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id); |
5e2b930b JR |
309 | } |
310 | ||
5afba62c | 311 | static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec) |
5e2b930b | 312 | { |
e9011760 | 313 | if (!remap_ops->msi_alloc_irq) |
5e2b930b JR |
314 | return -ENODEV; |
315 | ||
316 | return remap_ops->msi_alloc_irq(pdev, irq, nvec); | |
317 | } | |
318 | ||
5afba62c JR |
319 | static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq, |
320 | int index, int sub_handle) | |
5e2b930b | 321 | { |
e9011760 | 322 | if (!remap_ops->msi_setup_irq) |
5e2b930b JR |
323 | return -ENODEV; |
324 | ||
325 | return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle); | |
326 | } | |
327 | ||
95a02e97 | 328 | int setup_hpet_msi_remapped(unsigned int irq, unsigned int id) |
5e2b930b | 329 | { |
5fc24d8c YW |
330 | int ret; |
331 | ||
e9011760 | 332 | if (!remap_ops->alloc_hpet_msi) |
5e2b930b JR |
333 | return -ENODEV; |
334 | ||
5fc24d8c YW |
335 | ret = remap_ops->alloc_hpet_msi(irq, id); |
336 | if (ret) | |
337 | return -EINVAL; | |
338 | ||
339 | return default_setup_hpet_msi(irq, id); | |
5e2b930b | 340 | } |
6a9f5de2 JR |
341 | |
342 | void panic_if_irq_remap(const char *msg) | |
343 | { | |
344 | if (irq_remapping_enabled) | |
345 | panic(msg); | |
346 | } | |
9b1b0e42 | 347 | |
947045a2 | 348 | void ir_ack_apic_edge(struct irq_data *data) |
9b1b0e42 JR |
349 | { |
350 | ack_APIC_irq(); | |
351 | } | |
352 | ||
353 | static void ir_ack_apic_level(struct irq_data *data) | |
354 | { | |
355 | ack_APIC_irq(); | |
b71a3b29 | 356 | eoi_ioapic_irq(data->irq, irqd_cfg(data)); |
9b1b0e42 JR |
357 | } |
358 | ||
947045a2 JL |
359 | void irq_remapping_print_chip(struct irq_data *data, struct seq_file *p) |
360 | { | |
361 | /* | |
362 | * Assume interrupt is remapped if the parent irqdomain isn't the | |
363 | * vector domain, which is true for MSI, HPET and IOAPIC on x86 | |
364 | * platforms. | |
365 | */ | |
366 | if (data->domain && data->domain->parent != arch_get_ir_parent_domain()) | |
367 | seq_printf(p, " IR-%s", data->chip->name); | |
368 | else | |
369 | seq_printf(p, " %s", data->chip->name); | |
370 | } | |
371 | ||
9b1b0e42 JR |
372 | static void ir_print_prefix(struct irq_data *data, struct seq_file *p) |
373 | { | |
374 | seq_printf(p, " IR-%s", data->chip->name); | |
375 | } | |
376 | ||
377 | void irq_remap_modify_chip_defaults(struct irq_chip *chip) | |
378 | { | |
379 | chip->irq_print_chip = ir_print_prefix; | |
380 | chip->irq_ack = ir_ack_apic_edge; | |
381 | chip->irq_eoi = ir_ack_apic_level; | |
382 | chip->irq_set_affinity = x86_io_apic_ops.set_affinity; | |
383 | } | |
2976fd84 JR |
384 | |
385 | bool setup_remapped_irq(int irq, struct irq_cfg *cfg, struct irq_chip *chip) | |
386 | { | |
387 | if (!irq_remapped(cfg)) | |
388 | return false; | |
389 | irq_set_status_flags(irq, IRQ_MOVE_PCNTXT); | |
390 | irq_remap_modify_chip_defaults(chip); | |
391 | return true; | |
392 | } | |
947045a2 JL |
393 | |
394 | /** | |
395 | * irq_remapping_get_ir_irq_domain - Get the irqdomain associated with the IOMMU | |
396 | * device serving request @info | |
397 | * @info: interrupt allocation information, used to identify the IOMMU device | |
398 | * | |
399 | * It's used to get parent irqdomain for HPET and IOAPIC irqdomains. | |
400 | * Returns pointer to IRQ domain, or NULL on failure. | |
401 | */ | |
402 | struct irq_domain * | |
403 | irq_remapping_get_ir_irq_domain(struct irq_alloc_info *info) | |
404 | { | |
405 | if (!remap_ops || !remap_ops->get_ir_irq_domain) | |
406 | return NULL; | |
407 | ||
408 | return remap_ops->get_ir_irq_domain(info); | |
409 | } | |
410 | ||
411 | /** | |
412 | * irq_remapping_get_irq_domain - Get the irqdomain serving the request @info | |
413 | * @info: interrupt allocation information, used to identify the IOMMU device | |
414 | * | |
415 | * There will be one PCI MSI/MSIX irqdomain associated with each interrupt | |
416 | * remapping device, so this interface is used to retrieve the PCI MSI/MSIX | |
417 | * irqdomain serving request @info. | |
418 | * Returns pointer to IRQ domain, or NULL on failure. | |
419 | */ | |
420 | struct irq_domain * | |
421 | irq_remapping_get_irq_domain(struct irq_alloc_info *info) | |
422 | { | |
423 | if (!remap_ops || !remap_ops->get_irq_domain) | |
424 | return NULL; | |
425 | ||
426 | return remap_ops->get_irq_domain(info); | |
427 | } |