Commit | Line | Data |
---|---|---|
8673c1d7 LW |
1 | /* |
2 | * Special GIC quirks for the ARM RealView | |
3 | * Copyright (C) 2015 Linus Walleij | |
4 | */ | |
5 | #include <linux/of.h> | |
6 | #include <linux/regmap.h> | |
7 | #include <linux/mfd/syscon.h> | |
8 | #include <linux/bitops.h> | |
9 | #include <linux/irqchip.h> | |
10 | #include <linux/irqchip/arm-gic.h> | |
11 | ||
12 | #define REALVIEW_SYS_LOCK_OFFSET 0x20 | |
13 | #define REALVIEW_PB11MP_SYS_PLD_CTRL1 0x74 | |
14 | #define VERSATILE_LOCK_VAL 0xA05F | |
15 | #define PLD_INTMODE_MASK BIT(22)|BIT(23)|BIT(24) | |
16 | #define PLD_INTMODE_LEGACY 0x0 | |
17 | #define PLD_INTMODE_NEW_DCC BIT(22) | |
18 | #define PLD_INTMODE_NEW_NO_DCC BIT(23) | |
19 | #define PLD_INTMODE_FIQ_ENABLE BIT(24) | |
20 | ||
21 | static int __init | |
22 | realview_gic_of_init(struct device_node *node, struct device_node *parent) | |
23 | { | |
24 | static struct regmap *map; | |
25 | ||
26 | /* The PB11MPCore GIC needs to be configured in the syscon */ | |
27 | map = syscon_regmap_lookup_by_compatible("arm,realview-pb11mp-syscon"); | |
28 | if (!IS_ERR(map)) { | |
29 | /* new irq mode with no DCC */ | |
30 | regmap_write(map, REALVIEW_SYS_LOCK_OFFSET, | |
31 | VERSATILE_LOCK_VAL); | |
32 | regmap_update_bits(map, REALVIEW_PB11MP_SYS_PLD_CTRL1, | |
33 | PLD_INTMODE_NEW_NO_DCC, | |
34 | PLD_INTMODE_MASK); | |
35 | regmap_write(map, REALVIEW_SYS_LOCK_OFFSET, 0x0000); | |
36 | pr_info("TC11MP GIC: set up interrupt controller to NEW mode, no DCC\n"); | |
37 | } else { | |
38 | pr_err("TC11MP GIC setup: could not find syscon\n"); | |
39 | return -ENXIO; | |
40 | } | |
41 | return gic_of_init(node, parent); | |
42 | } | |
43 | IRQCHIP_DECLARE(armtc11mp_gic, "arm,tc11mp-gic", realview_gic_of_init); |